Patches on tip/master as of April 16th. See base-commit at end of
this message for exact commit ID.
Intel has been using family 6 almost exclusively for many
years. As a result, Linux has built up infrastructure like
X86_MATCH_INTEL_FAM6_MODEL() to make it easy for model specific code to
use the #defines for each Intel CPU model.
But the reign of family 6 is about to end. Intel will begin using non-zero
values for the extended family field in CPUID(1).EAX. The minimal patch
size approach to handle these would be to clone the FAM6 macros. But
that will get messy as these prolifrate. This approach does not have an
elegant solution if a switch() statement needs to choose between CPUs
from different families.
Dave Hansen suggested that a more general cleanup that provides
CPU #defines that encode all of <vendor, family, model> would make
existing code better, and provide infrastructure that makes it trivial
to incorporate new families.
Big picture view is that code like this:
if (c->x86_vendor == X86_VENDOR_INTEL && c->x86 == 6 && c->x86_model == INTEL_FAM6_ICELAKE_X)
can become:
if (c->x86_vfm == INTEL_ICELAKE_X)
which is:
a) Simpler
b) Faster
c) More resilient (can't forget to check vendor & family along with model)
d) Code style doesn't change for every new family.
Note that "struct cpuinfo_x86" gains a new xf6_vfm field and the ICELAKE
#define loses the "FAM6_" substring and will be initialized with a macro
that does the bit shuffling to fit X86_VENDOR_INTEL and a family and
model into a "u32":
#define INTEL_ICELAKE_X IFM(6, 0x6A) /* Sunny Cove */
New CPUs in other families might look like:
#define INTEL_DOUGLASCOVE IFM(42, 0x01) /* Adams Lake */
#define INTEL_SHELDONMONT IFM(73, 0x01) /* Cooper Forest */
[Some folks missed the jokes embedded in these EXAMPLE names/numbers.
For cultural references read/listen/watch "The Hitchhikers Guide to the
Galaxy" by Douglas Adams and "The Big Bang Theory" TV show created by
Chuck Lorre and Bill Prady].
Model specific "if" statements then follow the same pattern
regardless of family:
if (c->x86_vfm == INTEL_DOUGLASCOVE || c->x86_vfm == INTEL_SHELDONMONT) {
}
If needed these could even appear in the same switch statement:
switch (c->x86_vfm) {
case INTEL_ICELAKE_X:
...
case INTEL_DOUGLASCOVE:
...
case INTEL_SHELDONMONT:
...
}
The existing X86_MATCH_INTEL_FAM6_MODEL() can be replaced with a new
X86_MATCH_VFM() macro.
Update can happen in phases:
1) Add infrastructure macros, new "x86_vfm" field, new CPU #defines
Patches 0001 .. 0003
2) arch/x86 update from old to new
Patches 0004 .. 0039
3) Other treewide updates from old to new
Patches 0040 .. 0072
4) Delete the old INTEL_FAM6 and X86_MATCH_INTEL_FAM6 macros (when
all of 0001 .. 0072 have been applied)
Patches 0073 .. 0074
Signed-off-by: Tony Luck <[email protected]>
---
Link: v1: https://lore.kernel.org/all/[email protected]/
v2: Just changed parts 1 & 2 to rearrange the vendor, family, model
fields in x86_vfm so that model is in the least significant bits with
family and vendor each in more significant bits so that ranges of models
could be used in "if" and "switch" statements.
v3: Added Thomas Gleixner's reviewed-by to parts 1-3. Shuffled parts
4-72 so that arch/x86 files appear before other changes scattered around
the source tree.
Tony Luck (74):
x86/cpu/vfm: Add/initialize x86_vfm field to struct cpuinfo_x86
x86/cpu/vfm: Add new macros to work with (vendor/family/model) values
x86/cpu/vfm: Update arch/x86/include/asm/intel-family.h
x86/cpu/vfm: Update arch/x86/crypto/poly1305_glue.c
x86/cpu/vfm: Update arch/x86/crypto/twofish_glue_3way.c
x86/cpu/vfm: Update arch/x86/events/intel/cstate.c
x86/cpu/vfm: Update arch/x86/events/intel/lbr.c
x86/cpu/vfm: Update arch/x86/events/intel/pt.c
x86/cpu/vfm: Update arch/x86/events/intel/uncore.c
x86/cpu/vfm: Update arch/x86/events/intel/uncore_nhmex.c
x86/cpu/vfm: Update arch/x86/events/intel/uncore_snbep.c
x86/cpu/vfm: Update arch/x86/events/msr.c
x86/cpu/vfm: Update arch/x86/events/rapl.c
x86/cpu/vfm: Update arch/x86/kernel/apic/apic.c
x86/cpu/vfm: Update arch/x86/kernel/cpu/aperfmperf.c
x86/cpu/vfm: Update arch/x86/kernel/cpu/bugs.c
x86/cpu/vfm: Update arch/x86/kernel/cpu/common.c
x86/cpu/vfm: Update arch/x86/kernel/cpu/intel.c
x86/cpu/vfm: Update arch/x86/kernel/cpu/intel_epb.c
x86/cpu/vfm: Update arch/x86/kernel/cpu/match.c
x86/cpu/vfm: Update arch/x86/kernel/cpu/mce/core.c
x86/cpu/vfm: Update arch/x86/kernel/cpu/mce/intel.c
x86/cpu/vfm: Update arch/x86/kernel/cpu/mce/severity.c
x86/cpu/vfm: Update arch/x86/kernel/cpu/microcode/intel.c
x86/cpu/vfm: Update arch/x86/kernel/cpu/resctrl/core.c
x86/cpu/vfm: Update arch/x86/kernel/cpu/resctrl/pseudo_lock.c
x86/cpu/vfm: Update arch/x86/kernel/smpboot.c
x86/cpu/vfm: Update arch/x86/kernel/tsc.c
x86/cpu/vfm: Update arch/x86/kernel/tsc_msr.c
x86/cpu/vfm: Update arch/x86/kvm/pmu.c
x86/cpu/vfm: Update arch/x86/kvm/vmx/vmx.c
x86/cpu/vfm: Update arch/x86/mm/init.c
x86/cpu/vfm: Update arch/x86/pci/intel_mid_pci.c
x86/cpu/vfm: Update arch/x86/virt/vmx/tdx/tdx.c
x86/cpu/vfm: Update arch/x86/events/intel/core.c
x86/cpu/vfm: Update arch/x86/platform/intel-mid/intel-mid.c
x86/cpu/vfm: Update arch/x86/platform/atom/punit_atom_debug.c
x86/cpu/vfm: Update arch/x86/events/intel/core.c
x86/cpu/vfm: Update arch/x86/boot/cpucheck.c
x86/cpu/vfm: Update drivers/acpi/acpi_lpss.c
x86/cpu/vfm: Update drivers/acpi/x86/utils.c
x86/cpu/vfm: Update tpm files
x86/cpu/vfm: Update drivers/cpufreq/intel_pstate.c
x86/cpu/vfm: Update drivers/cpufreq/speedstep-centrino.c
x86/cpu/vfm: Update drivers/edac/i10nm_base.c
x86/cpu/vfm: Update drivers/edac/pnd2_edac.c
x86/cpu/vfm: Update drivers/edac/sb_edac.c
x86/cpu/vfm: Update drivers/edac/skx_base.c
x86/cpu/vfm: Update drivers/extcon/extcon-axp288.c
x86/cpu/vfm: Update drivers/hwmon/peci/cputemp.c
x86/cpu/vfm: Update drivers/idle/intel_idle.c
x86/cpu/vfm: Update drivers/pci/pci-mid.c
x86/cpu/vfm: Update drivers/peci/cpu.c
x86/cpu/vfm: Update drivers/platform/x86/intel/ifs/core.c
x86/cpu/vfm: Update drivers/platform/x86/intel_ips.c
x86/cpu/vfm: Update drivers/platform/x86/intel/pmc/core.c
x86/cpu/vfm: Update drivers/platform/x86/intel/pmc/pltdrv.c
x86/cpu/vfm: Update drivers/platform/x86/intel_scu_wdt.c
x86/cpu/vfm: Update
drivers/platform/x86/intel/speed_select_if/isst_if_common.c
x86/cpu/vfm: Update
drivers/platform/x86/intel/speed_select_if/isst_if_mbox_msr.c
x86/cpu/vfm: Update drivers/platform/x86/intel/telemetry/debugfs.c
x86/cpu/vfm: Update drivers/platform/x86/intel/telemetry/pltdrv.c
x86/cpu/vfm: Update drivers/platform/x86/intel/turbo_max_3.c
x86/cpu/vfm: Update
drivers/platform/x86/intel/uncore-frequency/uncore-frequency.c
x86/cpu/vfm: Update drivers/platform/x86/p2sb.c
x86/cpu/vfm: Update drivers/powercap/intel_rapl_common.c
x86/cpu/vfm: Update drivers/powercap/intel_rapl_msr.c
x86/cpu/vfm: Update
drivers/staging/media/atomisp/include/linux/atomisp_platform.h
x86/cpu/vfm: Update intel_soc_dts_thermal.c
x86/cpu/vfm: Update drivers/thermal/intel/intel_tcc_cooling.c
x86/cpu/vfm: Update sound/soc/intel/avs/boards/es8336.c
x86/cpu/vfm: Update tools/power/x86/turbostat/turbostat.c
x86/cpu/vfm: Delete X86_MATCH_INTEL_FAM6_MODEL[_STEPPING]() macros
x86/cpu/vfm: Delete all the *_FAM6_ CPU #defines
.../atomisp/include/linux/atomisp_platform.h | 26 +--
include/linux/peci-cpu.h | 1 +
include/linux/platform_data/x86/soc.h | 12 +-
arch/x86/include/asm/cpu_device_id.h | 103 +++++++--
arch/x86/include/asm/intel-family.h | 167 +++++++-------
arch/x86/include/asm/processor.h | 12 +-
drivers/char/tpm/tpm.h | 1 +
drivers/char/tpm/tpm_tis_core.h | 2 +-
arch/x86/boot/cpucheck.c | 2 +-
arch/x86/crypto/poly1305_glue.c | 3 +-
arch/x86/crypto/twofish_glue_3way.c | 10 +-
arch/x86/events/intel/core.c | 212 +++++++++---------
arch/x86/events/intel/cstate.c | 144 ++++++------
arch/x86/events/intel/lbr.c | 3 +-
arch/x86/events/intel/pt.c | 11 +-
arch/x86/events/intel/uncore.c | 100 ++++-----
arch/x86/events/intel/uncore_nhmex.c | 3 +-
arch/x86/events/intel/uncore_snbep.c | 5 +-
arch/x86/events/msr.c | 131 +++++------
arch/x86/events/rapl.c | 90 ++++----
arch/x86/kernel/apic/apic.c | 38 ++--
arch/x86/kernel/cpu/aperfmperf.c | 17 +-
arch/x86/kernel/cpu/bugs.c | 29 +--
arch/x86/kernel/cpu/common.c | 154 +++++++------
arch/x86/kernel/cpu/intel.c | 115 +++++-----
arch/x86/kernel/cpu/intel_epb.c | 12 +-
arch/x86/kernel/cpu/match.c | 5 +-
arch/x86/kernel/cpu/mce/core.c | 5 +-
arch/x86/kernel/cpu/mce/intel.c | 20 +-
arch/x86/kernel/cpu/mce/severity.c | 9 +-
arch/x86/kernel/cpu/microcode/intel.c | 4 +-
arch/x86/kernel/cpu/resctrl/core.c | 9 +-
arch/x86/kernel/cpu/resctrl/pseudo_lock.c | 21 +-
arch/x86/kernel/smpboot.c | 6 +-
arch/x86/kernel/tsc.c | 5 +-
arch/x86/kernel/tsc_msr.c | 14 +-
arch/x86/kvm/pmu.c | 8 +-
arch/x86/kvm/vmx/vmx.c | 20 +-
arch/x86/mm/init.c | 16 +-
arch/x86/pci/intel_mid_pci.c | 4 +-
arch/x86/platform/atom/punit_atom_debug.c | 11 +-
arch/x86/platform/intel-mid/intel-mid.c | 7 +-
arch/x86/virt/vmx/tdx/tdx.c | 7 +-
drivers/acpi/acpi_lpss.c | 4 +-
drivers/acpi/x86/utils.c | 42 ++--
drivers/cpufreq/intel_pstate.c | 90 ++++----
drivers/cpufreq/speedstep-centrino.c | 8 +-
drivers/edac/i10nm_base.c | 20 +-
drivers/edac/pnd2_edac.c | 4 +-
drivers/edac/sb_edac.c | 14 +-
drivers/edac/skx_base.c | 2 +-
drivers/extcon/extcon-axp288.c | 2 +-
drivers/hwmon/peci/cputemp.c | 7 +-
drivers/idle/intel_idle.c | 116 +++++-----
drivers/pci/pci-mid.c | 4 +-
drivers/peci/cpu.c | 28 +--
drivers/platform/x86/intel/ifs/core.c | 15 +-
drivers/platform/x86/intel/pmc/core.c | 46 ++--
drivers/platform/x86/intel/pmc/pltdrv.c | 16 +-
.../intel/speed_select_if/isst_if_common.c | 4 +-
.../intel/speed_select_if/isst_if_mbox_msr.c | 2 +-
.../platform/x86/intel/telemetry/debugfs.c | 4 +-
drivers/platform/x86/intel/telemetry/pltdrv.c | 4 +-
drivers/platform/x86/intel/turbo_max_3.c | 4 +-
.../intel/uncore-frequency/uncore-frequency.c | 56 ++---
drivers/platform/x86/intel_ips.c | 3 +-
drivers/platform/x86/intel_scu_wdt.c | 2 +-
drivers/platform/x86/p2sb.c | 2 +-
drivers/powercap/intel_rapl_common.c | 118 +++++-----
drivers/powercap/intel_rapl_msr.c | 16 +-
drivers/thermal/intel/intel_soc_dts_thermal.c | 2 +-
drivers/thermal/intel/intel_tcc_cooling.c | 30 +--
sound/soc/intel/avs/boards/es8336.c | 7 +-
tools/power/x86/turbostat/turbostat.c | 161 +++++++------
74 files changed, 1261 insertions(+), 1146 deletions(-)
base-commit: 367dc2b68007e8ca00a0d8dc9afb69bff5451ae7
--
2.44.0
New CPU #defines encode vendor and family as well as model.
Update the example usage comment in arch/x86/kernel/cpu/match.c
Signed-off-by: Tony Luck <[email protected]>
Reviewed-by: Thomas Gleixner <[email protected]>
---
arch/x86/include/asm/intel-family.h | 84 +++++++++++++++++++++++++++++
arch/x86/kernel/cpu/match.c | 3 +-
2 files changed, 85 insertions(+), 2 deletions(-)
diff --git a/arch/x86/include/asm/intel-family.h b/arch/x86/include/asm/intel-family.h
index d0941f4c2724..f81a851c46dc 100644
--- a/arch/x86/include/asm/intel-family.h
+++ b/arch/x86/include/asm/intel-family.h
@@ -40,137 +40,221 @@
* their own names :-(
*/
+#define IFM(_fam, _model) VFM_MAKE(X86_VENDOR_INTEL, _fam, _model)
+
/* Wildcard match for FAM6 so X86_MATCH_INTEL_FAM6_MODEL(ANY) works */
#define INTEL_FAM6_ANY X86_MODEL_ANY
+/* Wildcard match for FAM6 so X86_MATCH_VFM(ANY) works */
+#define INTEL_ANY IFM(X86_FAMILY_ANY, X86_MODEL_ANY)
#define INTEL_FAM6_CORE_YONAH 0x0E
+#define INTEL_CORE_YONAH IFM(6, 0x0E)
#define INTEL_FAM6_CORE2_MEROM 0x0F
+#define INTEL_CORE2_MEROM IFM(6, 0x0F)
#define INTEL_FAM6_CORE2_MEROM_L 0x16
+#define INTEL_CORE2_MEROM_L IFM(6, 0x16)
#define INTEL_FAM6_CORE2_PENRYN 0x17
+#define INTEL_CORE2_PENRYN IFM(6, 0x17)
#define INTEL_FAM6_CORE2_DUNNINGTON 0x1D
+#define INTEL_CORE2_DUNNINGTON IFM(6, 0x1D)
#define INTEL_FAM6_NEHALEM 0x1E
+#define INTEL_NEHALEM IFM(6, 0x1E)
#define INTEL_FAM6_NEHALEM_G 0x1F /* Auburndale / Havendale */
+#define INTEL_NEHALEM_G IFM(6, 0x1F) /* Auburndale / Havendale */
#define INTEL_FAM6_NEHALEM_EP 0x1A
+#define INTEL_NEHALEM_EP IFM(6, 0x1A)
#define INTEL_FAM6_NEHALEM_EX 0x2E
+#define INTEL_NEHALEM_EX IFM(6, 0x2E)
#define INTEL_FAM6_WESTMERE 0x25
+#define INTEL_WESTMERE IFM(6, 0x25)
#define INTEL_FAM6_WESTMERE_EP 0x2C
+#define INTEL_WESTMERE_EP IFM(6, 0x2C)
#define INTEL_FAM6_WESTMERE_EX 0x2F
+#define INTEL_WESTMERE_EX IFM(6, 0x2F)
#define INTEL_FAM6_SANDYBRIDGE 0x2A
+#define INTEL_SANDYBRIDGE IFM(6, 0x2A)
#define INTEL_FAM6_SANDYBRIDGE_X 0x2D
+#define INTEL_SANDYBRIDGE_X IFM(6, 0x2D)
#define INTEL_FAM6_IVYBRIDGE 0x3A
+#define INTEL_IVYBRIDGE IFM(6, 0x3A)
#define INTEL_FAM6_IVYBRIDGE_X 0x3E
+#define INTEL_IVYBRIDGE_X IFM(6, 0x3E)
#define INTEL_FAM6_HASWELL 0x3C
+#define INTEL_HASWELL IFM(6, 0x3C)
#define INTEL_FAM6_HASWELL_X 0x3F
+#define INTEL_HASWELL_X IFM(6, 0x3F)
#define INTEL_FAM6_HASWELL_L 0x45
+#define INTEL_HASWELL_L IFM(6, 0x45)
#define INTEL_FAM6_HASWELL_G 0x46
+#define INTEL_HASWELL_G IFM(6, 0x46)
#define INTEL_FAM6_BROADWELL 0x3D
+#define INTEL_BROADWELL IFM(6, 0x3D)
#define INTEL_FAM6_BROADWELL_G 0x47
+#define INTEL_BROADWELL_G IFM(6, 0x47)
#define INTEL_FAM6_BROADWELL_X 0x4F
+#define INTEL_BROADWELL_X IFM(6, 0x4F)
#define INTEL_FAM6_BROADWELL_D 0x56
+#define INTEL_BROADWELL_D IFM(6, 0x56)
#define INTEL_FAM6_SKYLAKE_L 0x4E /* Sky Lake */
+#define INTEL_SKYLAKE_L IFM(6, 0x4E) /* Sky Lake */
#define INTEL_FAM6_SKYLAKE 0x5E /* Sky Lake */
+#define INTEL_SKYLAKE IFM(6, 0x5E) /* Sky Lake */
#define INTEL_FAM6_SKYLAKE_X 0x55 /* Sky Lake */
+#define INTEL_SKYLAKE_X IFM(6, 0x55) /* Sky Lake */
/* CASCADELAKE_X 0x55 Sky Lake -- s: 7 */
/* COOPERLAKE_X 0x55 Sky Lake -- s: 11 */
#define INTEL_FAM6_KABYLAKE_L 0x8E /* Sky Lake */
+#define INTEL_KABYLAKE_L IFM(6, 0x8E) /* Sky Lake */
/* AMBERLAKE_L 0x8E Sky Lake -- s: 9 */
/* COFFEELAKE_L 0x8E Sky Lake -- s: 10 */
/* WHISKEYLAKE_L 0x8E Sky Lake -- s: 11,12 */
#define INTEL_FAM6_KABYLAKE 0x9E /* Sky Lake */
+#define INTEL_KABYLAKE IFM(6, 0x9E) /* Sky Lake */
/* COFFEELAKE 0x9E Sky Lake -- s: 10-13 */
#define INTEL_FAM6_COMETLAKE 0xA5 /* Sky Lake */
+#define INTEL_COMETLAKE IFM(6, 0xA5) /* Sky Lake */
#define INTEL_FAM6_COMETLAKE_L 0xA6 /* Sky Lake */
+#define INTEL_COMETLAKE_L IFM(6, 0xA6) /* Sky Lake */
#define INTEL_FAM6_CANNONLAKE_L 0x66 /* Palm Cove */
+#define INTEL_CANNONLAKE_L IFM(6, 0x66) /* Palm Cove */
#define INTEL_FAM6_ICELAKE_X 0x6A /* Sunny Cove */
+#define INTEL_ICELAKE_X IFM(6, 0x6A) /* Sunny Cove */
#define INTEL_FAM6_ICELAKE_D 0x6C /* Sunny Cove */
+#define INTEL_ICELAKE_D IFM(6, 0x6C) /* Sunny Cove */
#define INTEL_FAM6_ICELAKE 0x7D /* Sunny Cove */
+#define INTEL_ICELAKE IFM(6, 0x7D) /* Sunny Cove */
#define INTEL_FAM6_ICELAKE_L 0x7E /* Sunny Cove */
+#define INTEL_ICELAKE_L IFM(6, 0x7E) /* Sunny Cove */
#define INTEL_FAM6_ICELAKE_NNPI 0x9D /* Sunny Cove */
+#define INTEL_ICELAKE_NNPI IFM(6, 0x9D) /* Sunny Cove */
#define INTEL_FAM6_ROCKETLAKE 0xA7 /* Cypress Cove */
+#define INTEL_ROCKETLAKE IFM(6, 0xA7) /* Cypress Cove */
#define INTEL_FAM6_TIGERLAKE_L 0x8C /* Willow Cove */
+#define INTEL_TIGERLAKE_L IFM(6, 0x8C) /* Willow Cove */
#define INTEL_FAM6_TIGERLAKE 0x8D /* Willow Cove */
+#define INTEL_TIGERLAKE IFM(6, 0x8D) /* Willow Cove */
#define INTEL_FAM6_SAPPHIRERAPIDS_X 0x8F /* Golden Cove */
+#define INTEL_SAPPHIRERAPIDS_X IFM(6, 0x8F) /* Golden Cove */
#define INTEL_FAM6_EMERALDRAPIDS_X 0xCF
+#define INTEL_EMERALDRAPIDS_X IFM(6, 0xCF)
#define INTEL_FAM6_GRANITERAPIDS_X 0xAD
+#define INTEL_GRANITERAPIDS_X IFM(6, 0xAD)
#define INTEL_FAM6_GRANITERAPIDS_D 0xAE
+#define INTEL_GRANITERAPIDS_D IFM(6, 0xAE)
/* "Hybrid" Processors (P-Core/E-Core) */
#define INTEL_FAM6_LAKEFIELD 0x8A /* Sunny Cove / Tremont */
+#define INTEL_LAKEFIELD IFM(6, 0x8A) /* Sunny Cove / Tremont */
#define INTEL_FAM6_ALDERLAKE 0x97 /* Golden Cove / Gracemont */
+#define INTEL_ALDERLAKE IFM(6, 0x97) /* Golden Cove / Gracemont */
#define INTEL_FAM6_ALDERLAKE_L 0x9A /* Golden Cove / Gracemont */
+#define INTEL_ALDERLAKE_L IFM(6, 0x9A) /* Golden Cove / Gracemont */
#define INTEL_FAM6_RAPTORLAKE 0xB7 /* Raptor Cove / Enhanced Gracemont */
+#define INTEL_RAPTORLAKE IFM(6, 0xB7) /* Raptor Cove / Enhanced Gracemont */
#define INTEL_FAM6_RAPTORLAKE_P 0xBA
+#define INTEL_RAPTORLAKE_P IFM(6, 0xBA)
#define INTEL_FAM6_RAPTORLAKE_S 0xBF
+#define INTEL_RAPTORLAKE_S IFM(6, 0xBF)
#define INTEL_FAM6_METEORLAKE 0xAC
+#define INTEL_METEORLAKE IFM(6, 0xAC)
#define INTEL_FAM6_METEORLAKE_L 0xAA
+#define INTEL_METEORLAKE_L IFM(6, 0xAA)
#define INTEL_FAM6_ARROWLAKE_H 0xC5
+#define INTEL_ARROWLAKE_H IFM(6, 0xC5)
#define INTEL_FAM6_ARROWLAKE 0xC6
+#define INTEL_ARROWLAKE IFM(6, 0xC6)
#define INTEL_FAM6_ARROWLAKE_U 0xB5
+#define INTEL_ARROWLAKE_U IFM(6, 0xB5)
#define INTEL_FAM6_LUNARLAKE_M 0xBD
+#define INTEL_LUNARLAKE_M IFM(6, 0xBD)
/* "Small Core" Processors (Atom/E-Core) */
#define INTEL_FAM6_ATOM_BONNELL 0x1C /* Diamondville, Pineview */
+#define INTEL_ATOM_BONNELL IFM(6, 0x1C) /* Diamondville, Pineview */
#define INTEL_FAM6_ATOM_BONNELL_MID 0x26 /* Silverthorne, Lincroft */
+#define INTEL_ATOM_BONNELL_MID IFM(6, 0x26) /* Silverthorne, Lincroft */
#define INTEL_FAM6_ATOM_SALTWELL 0x36 /* Cedarview */
+#define INTEL_ATOM_SALTWELL IFM(6, 0x36) /* Cedarview */
#define INTEL_FAM6_ATOM_SALTWELL_MID 0x27 /* Penwell */
+#define INTEL_ATOM_SALTWELL_MID IFM(6, 0x27) /* Penwell */
#define INTEL_FAM6_ATOM_SALTWELL_TABLET 0x35 /* Cloverview */
+#define INTEL_ATOM_SALTWELL_TABLET IFM(6, 0x35) /* Cloverview */
#define INTEL_FAM6_ATOM_SILVERMONT 0x37 /* Bay Trail, Valleyview */
+#define INTEL_ATOM_SILVERMONT IFM(6, 0x37) /* Bay Trail, Valleyview */
#define INTEL_FAM6_ATOM_SILVERMONT_D 0x4D /* Avaton, Rangely */
+#define INTEL_ATOM_SILVERMONT_D IFM(6, 0x4D) /* Avaton, Rangely */
#define INTEL_FAM6_ATOM_SILVERMONT_MID 0x4A /* Merriefield */
+#define INTEL_ATOM_SILVERMONT_MID IFM(6, 0x4A) /* Merriefield */
#define INTEL_FAM6_ATOM_AIRMONT 0x4C /* Cherry Trail, Braswell */
+#define INTEL_ATOM_AIRMONT IFM(6, 0x4C) /* Cherry Trail, Braswell */
#define INTEL_FAM6_ATOM_AIRMONT_MID 0x5A /* Moorefield */
+#define INTEL_ATOM_AIRMONT_MID IFM(6, 0x5A) /* Moorefield */
#define INTEL_FAM6_ATOM_AIRMONT_NP 0x75 /* Lightning Mountain */
+#define INTEL_ATOM_AIRMONT_NP IFM(6, 0x75) /* Lightning Mountain */
#define INTEL_FAM6_ATOM_GOLDMONT 0x5C /* Apollo Lake */
+#define INTEL_ATOM_GOLDMONT IFM(6, 0x5C) /* Apollo Lake */
#define INTEL_FAM6_ATOM_GOLDMONT_D 0x5F /* Denverton */
+#define INTEL_ATOM_GOLDMONT_D IFM(6, 0x5F) /* Denverton */
/* Note: the micro-architecture is "Goldmont Plus" */
#define INTEL_FAM6_ATOM_GOLDMONT_PLUS 0x7A /* Gemini Lake */
+#define INTEL_ATOM_GOLDMONT_PLUS IFM(6, 0x7A) /* Gemini Lake */
#define INTEL_FAM6_ATOM_TREMONT_D 0x86 /* Jacobsville */
+#define INTEL_ATOM_TREMONT_D IFM(6, 0x86) /* Jacobsville */
#define INTEL_FAM6_ATOM_TREMONT 0x96 /* Elkhart Lake */
+#define INTEL_ATOM_TREMONT IFM(6, 0x96) /* Elkhart Lake */
#define INTEL_FAM6_ATOM_TREMONT_L 0x9C /* Jasper Lake */
+#define INTEL_ATOM_TREMONT_L IFM(6, 0x9C) /* Jasper Lake */
#define INTEL_FAM6_ATOM_GRACEMONT 0xBE /* Alderlake N */
+#define INTEL_ATOM_GRACEMONT IFM(6, 0xBE) /* Alderlake N */
#define INTEL_FAM6_ATOM_CRESTMONT_X 0xAF /* Sierra Forest */
+#define INTEL_ATOM_CRESTMONT_X IFM(6, 0xAF) /* Sierra Forest */
#define INTEL_FAM6_ATOM_CRESTMONT 0xB6 /* Grand Ridge */
+#define INTEL_ATOM_CRESTMONT IFM(6, 0xB6) /* Grand Ridge */
#define INTEL_FAM6_ATOM_DARKMONT_X 0xDD /* Clearwater Forest */
+#define INTEL_ATOM_DARKMONT_X IFM(6, 0xDD) /* Clearwater Forest */
/* Xeon Phi */
#define INTEL_FAM6_XEON_PHI_KNL 0x57 /* Knights Landing */
+#define INTEL_XEON_PHI_KNL IFM(6, 0x57) /* Knights Landing */
#define INTEL_FAM6_XEON_PHI_KNM 0x85 /* Knights Mill */
+#define INTEL_XEON_PHI_KNM IFM(6, 0x85) /* Knights Mill */
/* Family 5 */
#define INTEL_FAM5_QUARK_X1000 0x09 /* Quark X1000 SoC */
+#define INTEL_QUARK_X1000 IFM(5, 0x09) /* Quark X1000 SoC */
#endif /* _ASM_X86_INTEL_FAMILY_H */
diff --git a/arch/x86/kernel/cpu/match.c b/arch/x86/kernel/cpu/match.c
index ad6776081e60..2243083f0bc2 100644
--- a/arch/x86/kernel/cpu/match.c
+++ b/arch/x86/kernel/cpu/match.c
@@ -17,8 +17,7 @@
*
* A typical table entry would be to match a specific CPU
*
- * X86_MATCH_VENDOR_FAM_MODEL_FEATURE(INTEL, 6, INTEL_FAM6_BROADWELL,
- * X86_FEATURE_ANY, NULL);
+ * X86_MATCH_VFM_FEATURE(INTEL_BROADWELL, X86_FEATURE_ANY, NULL);
*
* Fields can be wildcarded with %X86_VENDOR_ANY, %X86_FAMILY_ANY,
* %X86_MODEL_ANY, %X86_FEATURE_ANY (except for vendor)
--
2.44.0
To avoid adding a slew of new macros for each new Intel CPU family
switch over from providing CPU model number #defines to a new
scheme that encodes vendor, family, and model in a single number.
Signed-off-by: Tony Luck <[email protected]>
Reviewed-by: Thomas Gleixner <[email protected]>
---
arch/x86/include/asm/cpu_device_id.h | 93 ++++++++++++++++++++++++++++
1 file changed, 93 insertions(+)
diff --git a/arch/x86/include/asm/cpu_device_id.h b/arch/x86/include/asm/cpu_device_id.h
index bf4e065cf1e2..833f230aeafc 100644
--- a/arch/x86/include/asm/cpu_device_id.h
+++ b/arch/x86/include/asm/cpu_device_id.h
@@ -2,6 +2,39 @@
#ifndef _ASM_X86_CPU_DEVICE_ID
#define _ASM_X86_CPU_DEVICE_ID
+/*
+ * Can't use <linux/bitfield.h> because it generates expressions that
+ * cannot be used in structure initializers. Bitfield construction
+ * here must match the union in struct cpuinfo_86:
+ * union {
+ * struct {
+ * __u8 x86_model;
+ * __u8 x86;
+ * __u8 x86_vendor;
+ * __u8 x86_reserved;
+ * };
+ * __u32 x86_vfm;
+ * };
+ */
+#define VFM_MODEL_BIT 0
+#define VFM_FAMILY_BIT 8
+#define VFM_VENDOR_BIT 16
+#define VFM_RSVD_BIT 24
+
+#define VFM_MODEL_MASK GENMASK(VFM_FAMILY_BIT - 1, VFM_MODEL_BIT)
+#define VFM_FAMILY_MASK GENMASK(VFM_VENDOR_BIT - 1, VFM_FAMILY_BIT)
+#define VFM_VENDOR_MASK GENMASK(VFM_RSVD_BIT - 1, VFM_VENDOR_BIT)
+
+#define VFM_MODEL(vfm) (((vfm) & VFM_MODEL_MASK) >> VFM_MODEL_BIT)
+#define VFM_FAMILY(vfm) (((vfm) & VFM_FAMILY_MASK) >> VFM_FAMILY_BIT)
+#define VFM_VENDOR(vfm) (((vfm) & VFM_VENDOR_MASK) >> VFM_VENDOR_BIT)
+
+#define VFM_MAKE(_vendor, _family, _model) ( \
+ ((_model) << VFM_MODEL_BIT) | \
+ ((_family) << VFM_FAMILY_BIT) | \
+ ((_vendor) << VFM_VENDOR_BIT) \
+)
+
/*
* Declare drivers belonging to specific x86 CPUs
* Similar in spirit to pci_device_id and related PCI functions
@@ -49,6 +82,16 @@
.driver_data = (unsigned long) _data \
}
+#define X86_MATCH_VENDORID_FAM_MODEL_STEPPINGS_FEATURE(_vendor, _family, _model, \
+ _steppings, _feature, _data) { \
+ .vendor = _vendor, \
+ .family = _family, \
+ .model = _model, \
+ .steppings = _steppings, \
+ .feature = _feature, \
+ .driver_data = (unsigned long) _data \
+}
+
/**
* X86_MATCH_VENDOR_FAM_MODEL_FEATURE - Macro for CPU matching
* @_vendor: The vendor name, e.g. INTEL, AMD, HYGON, ..., ANY
@@ -164,6 +207,56 @@
X86_MATCH_VENDOR_FAM_MODEL_STEPPINGS_FEATURE(INTEL, 6, INTEL_FAM6_##model, \
steppings, X86_FEATURE_ANY, data)
+/**
+ * X86_MATCH_VFM - Match encoded vendor/family/model
+ * @vfm: Encoded 8-bits each for vendor, family, model
+ * @data: Driver specific data or NULL. The internal storage
+ * format is unsigned long. The supplied value, pointer
+ * etc. is casted to unsigned long internally.
+ *
+ * Stepping and feature are set to wildcards
+ */
+#define X86_MATCH_VFM(vfm, data) \
+ X86_MATCH_VENDORID_FAM_MODEL_STEPPINGS_FEATURE( \
+ VFM_VENDOR(vfm), \
+ VFM_FAMILY(vfm), \
+ VFM_MODEL(vfm), \
+ X86_STEPPING_ANY, X86_FEATURE_ANY, data)
+
+/**
+ * X86_MATCH_VFM_STEPPINGS - Match encoded vendor/family/model/stepping
+ * @vfm: Encoded 8-bits each for vendor, family, model
+ * @steppings: Bitmask of steppings to match
+ * @data: Driver specific data or NULL. The internal storage
+ * format is unsigned long. The supplied value, pointer
+ * etc. is casted to unsigned long internally.
+ *
+ * feature is set to wildcard
+ */
+#define X86_MATCH_VFM_STEPPINGS(vfm, steppings, data) \
+ X86_MATCH_VENDORID_FAM_MODEL_STEPPINGS_FEATURE( \
+ VFM_VENDOR(vfm), \
+ VFM_FAMILY(vfm), \
+ VFM_MODEL(vfm), \
+ steppings, X86_FEATURE_ANY, data)
+
+/**
+ * X86_MATCH_VFM_FEATURE - Match encoded vendor/family/model/feature
+ * @vfm: Encoded 8-bits each for vendor, family, model
+ * @feature: A X86_FEATURE bit
+ * @data: Driver specific data or NULL. The internal storage
+ * format is unsigned long. The supplied value, pointer
+ * etc. is casted to unsigned long internally.
+ *
+ * Steppings is set to wildcard
+ */
+#define X86_MATCH_VFM_FEATURE(vfm, feature, data) \
+ X86_MATCH_VENDORID_FAM_MODEL_STEPPINGS_FEATURE( \
+ VFM_VENDOR(vfm), \
+ VFM_FAMILY(vfm), \
+ VFM_MODEL(vfm), \
+ X86_STEPPING_ANY, feature, data)
+
/*
* Match specific microcode revisions.
*
--
2.44.0
New CPU #defines encode vendor and family as well as model.
Signed-off-by: Tony Luck <[email protected]>
---
arch/x86/events/intel/lbr.c | 3 ++-
1 file changed, 2 insertions(+), 1 deletion(-)
diff --git a/arch/x86/events/intel/lbr.c b/arch/x86/events/intel/lbr.c
index 78cd5084104e..86277196ffad 100644
--- a/arch/x86/events/intel/lbr.c
+++ b/arch/x86/events/intel/lbr.c
@@ -2,6 +2,7 @@
#include <linux/perf_event.h>
#include <linux/types.h>
+#include <asm/cpu_device_id.h>
#include <asm/perf_event.h>
#include <asm/msr.h>
@@ -1457,7 +1458,7 @@ void __init intel_pmu_lbr_init_atom(void)
* to have an operational LBR which can freeze
* on PMU interrupt
*/
- if (boot_cpu_data.x86_model == 28
+ if (boot_cpu_data.x86_vfm == INTEL_ATOM_BONNELL
&& boot_cpu_data.x86_stepping < 10) {
pr_cont("LBR disabled due to erratum");
return;
--
2.44.0
New CPU #defines encode vendor and family as well as model.
Signed-off-by: Tony Luck <[email protected]>
---
arch/x86/events/intel/cstate.c | 144 ++++++++++++++++-----------------
1 file changed, 72 insertions(+), 72 deletions(-)
diff --git a/arch/x86/events/intel/cstate.c b/arch/x86/events/intel/cstate.c
index 326c8cd5aa2d..54eb142810fb 100644
--- a/arch/x86/events/intel/cstate.c
+++ b/arch/x86/events/intel/cstate.c
@@ -696,78 +696,78 @@ static const struct cstate_model srf_cstates __initconst = {
static const struct x86_cpu_id intel_cstates_match[] __initconst = {
- X86_MATCH_INTEL_FAM6_MODEL(NEHALEM, &nhm_cstates),
- X86_MATCH_INTEL_FAM6_MODEL(NEHALEM_EP, &nhm_cstates),
- X86_MATCH_INTEL_FAM6_MODEL(NEHALEM_EX, &nhm_cstates),
-
- X86_MATCH_INTEL_FAM6_MODEL(WESTMERE, &nhm_cstates),
- X86_MATCH_INTEL_FAM6_MODEL(WESTMERE_EP, &nhm_cstates),
- X86_MATCH_INTEL_FAM6_MODEL(WESTMERE_EX, &nhm_cstates),
-
- X86_MATCH_INTEL_FAM6_MODEL(SANDYBRIDGE, &snb_cstates),
- X86_MATCH_INTEL_FAM6_MODEL(SANDYBRIDGE_X, &snb_cstates),
-
- X86_MATCH_INTEL_FAM6_MODEL(IVYBRIDGE, &snb_cstates),
- X86_MATCH_INTEL_FAM6_MODEL(IVYBRIDGE_X, &snb_cstates),
-
- X86_MATCH_INTEL_FAM6_MODEL(HASWELL, &snb_cstates),
- X86_MATCH_INTEL_FAM6_MODEL(HASWELL_X, &snb_cstates),
- X86_MATCH_INTEL_FAM6_MODEL(HASWELL_G, &snb_cstates),
-
- X86_MATCH_INTEL_FAM6_MODEL(HASWELL_L, &hswult_cstates),
-
- X86_MATCH_INTEL_FAM6_MODEL(ATOM_SILVERMONT, &slm_cstates),
- X86_MATCH_INTEL_FAM6_MODEL(ATOM_SILVERMONT_D, &slm_cstates),
- X86_MATCH_INTEL_FAM6_MODEL(ATOM_AIRMONT, &slm_cstates),
-
- X86_MATCH_INTEL_FAM6_MODEL(BROADWELL, &snb_cstates),
- X86_MATCH_INTEL_FAM6_MODEL(BROADWELL_D, &snb_cstates),
- X86_MATCH_INTEL_FAM6_MODEL(BROADWELL_G, &snb_cstates),
- X86_MATCH_INTEL_FAM6_MODEL(BROADWELL_X, &snb_cstates),
-
- X86_MATCH_INTEL_FAM6_MODEL(SKYLAKE_L, &snb_cstates),
- X86_MATCH_INTEL_FAM6_MODEL(SKYLAKE, &snb_cstates),
- X86_MATCH_INTEL_FAM6_MODEL(SKYLAKE_X, &snb_cstates),
-
- X86_MATCH_INTEL_FAM6_MODEL(KABYLAKE_L, &hswult_cstates),
- X86_MATCH_INTEL_FAM6_MODEL(KABYLAKE, &hswult_cstates),
- X86_MATCH_INTEL_FAM6_MODEL(COMETLAKE_L, &hswult_cstates),
- X86_MATCH_INTEL_FAM6_MODEL(COMETLAKE, &hswult_cstates),
-
- X86_MATCH_INTEL_FAM6_MODEL(CANNONLAKE_L, &cnl_cstates),
-
- X86_MATCH_INTEL_FAM6_MODEL(XEON_PHI_KNL, &knl_cstates),
- X86_MATCH_INTEL_FAM6_MODEL(XEON_PHI_KNM, &knl_cstates),
-
- X86_MATCH_INTEL_FAM6_MODEL(ATOM_GOLDMONT, &glm_cstates),
- X86_MATCH_INTEL_FAM6_MODEL(ATOM_GOLDMONT_D, &glm_cstates),
- X86_MATCH_INTEL_FAM6_MODEL(ATOM_GOLDMONT_PLUS, &glm_cstates),
- X86_MATCH_INTEL_FAM6_MODEL(ATOM_TREMONT_D, &glm_cstates),
- X86_MATCH_INTEL_FAM6_MODEL(ATOM_TREMONT, &glm_cstates),
- X86_MATCH_INTEL_FAM6_MODEL(ATOM_TREMONT_L, &glm_cstates),
- X86_MATCH_INTEL_FAM6_MODEL(ATOM_GRACEMONT, &adl_cstates),
- X86_MATCH_INTEL_FAM6_MODEL(ATOM_CRESTMONT_X, &srf_cstates),
- X86_MATCH_INTEL_FAM6_MODEL(ATOM_CRESTMONT, &grr_cstates),
-
- X86_MATCH_INTEL_FAM6_MODEL(ICELAKE_L, &icl_cstates),
- X86_MATCH_INTEL_FAM6_MODEL(ICELAKE, &icl_cstates),
- X86_MATCH_INTEL_FAM6_MODEL(ICELAKE_X, &icx_cstates),
- X86_MATCH_INTEL_FAM6_MODEL(ICELAKE_D, &icx_cstates),
- X86_MATCH_INTEL_FAM6_MODEL(SAPPHIRERAPIDS_X, &icx_cstates),
- X86_MATCH_INTEL_FAM6_MODEL(EMERALDRAPIDS_X, &icx_cstates),
- X86_MATCH_INTEL_FAM6_MODEL(GRANITERAPIDS_X, &icx_cstates),
- X86_MATCH_INTEL_FAM6_MODEL(GRANITERAPIDS_D, &icx_cstates),
-
- X86_MATCH_INTEL_FAM6_MODEL(TIGERLAKE_L, &icl_cstates),
- X86_MATCH_INTEL_FAM6_MODEL(TIGERLAKE, &icl_cstates),
- X86_MATCH_INTEL_FAM6_MODEL(ROCKETLAKE, &icl_cstates),
- X86_MATCH_INTEL_FAM6_MODEL(ALDERLAKE, &adl_cstates),
- X86_MATCH_INTEL_FAM6_MODEL(ALDERLAKE_L, &adl_cstates),
- X86_MATCH_INTEL_FAM6_MODEL(RAPTORLAKE, &adl_cstates),
- X86_MATCH_INTEL_FAM6_MODEL(RAPTORLAKE_P, &adl_cstates),
- X86_MATCH_INTEL_FAM6_MODEL(RAPTORLAKE_S, &adl_cstates),
- X86_MATCH_INTEL_FAM6_MODEL(METEORLAKE, &adl_cstates),
- X86_MATCH_INTEL_FAM6_MODEL(METEORLAKE_L, &adl_cstates),
+ X86_MATCH_VFM(INTEL_NEHALEM, &nhm_cstates),
+ X86_MATCH_VFM(INTEL_NEHALEM_EP, &nhm_cstates),
+ X86_MATCH_VFM(INTEL_NEHALEM_EX, &nhm_cstates),
+
+ X86_MATCH_VFM(INTEL_WESTMERE, &nhm_cstates),
+ X86_MATCH_VFM(INTEL_WESTMERE_EP, &nhm_cstates),
+ X86_MATCH_VFM(INTEL_WESTMERE_EX, &nhm_cstates),
+
+ X86_MATCH_VFM(INTEL_SANDYBRIDGE, &snb_cstates),
+ X86_MATCH_VFM(INTEL_SANDYBRIDGE_X, &snb_cstates),
+
+ X86_MATCH_VFM(INTEL_IVYBRIDGE, &snb_cstates),
+ X86_MATCH_VFM(INTEL_IVYBRIDGE_X, &snb_cstates),
+
+ X86_MATCH_VFM(INTEL_HASWELL, &snb_cstates),
+ X86_MATCH_VFM(INTEL_HASWELL_X, &snb_cstates),
+ X86_MATCH_VFM(INTEL_HASWELL_G, &snb_cstates),
+
+ X86_MATCH_VFM(INTEL_HASWELL_L, &hswult_cstates),
+
+ X86_MATCH_VFM(INTEL_ATOM_SILVERMONT, &slm_cstates),
+ X86_MATCH_VFM(INTEL_ATOM_SILVERMONT_D, &slm_cstates),
+ X86_MATCH_VFM(INTEL_ATOM_AIRMONT, &slm_cstates),
+
+ X86_MATCH_VFM(INTEL_BROADWELL, &snb_cstates),
+ X86_MATCH_VFM(INTEL_BROADWELL_D, &snb_cstates),
+ X86_MATCH_VFM(INTEL_BROADWELL_G, &snb_cstates),
+ X86_MATCH_VFM(INTEL_BROADWELL_X, &snb_cstates),
+
+ X86_MATCH_VFM(INTEL_SKYLAKE_L, &snb_cstates),
+ X86_MATCH_VFM(INTEL_SKYLAKE, &snb_cstates),
+ X86_MATCH_VFM(INTEL_SKYLAKE_X, &snb_cstates),
+
+ X86_MATCH_VFM(INTEL_KABYLAKE_L, &hswult_cstates),
+ X86_MATCH_VFM(INTEL_KABYLAKE, &hswult_cstates),
+ X86_MATCH_VFM(INTEL_COMETLAKE_L, &hswult_cstates),
+ X86_MATCH_VFM(INTEL_COMETLAKE, &hswult_cstates),
+
+ X86_MATCH_VFM(INTEL_CANNONLAKE_L, &cnl_cstates),
+
+ X86_MATCH_VFM(INTEL_XEON_PHI_KNL, &knl_cstates),
+ X86_MATCH_VFM(INTEL_XEON_PHI_KNM, &knl_cstates),
+
+ X86_MATCH_VFM(INTEL_ATOM_GOLDMONT, &glm_cstates),
+ X86_MATCH_VFM(INTEL_ATOM_GOLDMONT_D, &glm_cstates),
+ X86_MATCH_VFM(INTEL_ATOM_GOLDMONT_PLUS, &glm_cstates),
+ X86_MATCH_VFM(INTEL_ATOM_TREMONT_D, &glm_cstates),
+ X86_MATCH_VFM(INTEL_ATOM_TREMONT, &glm_cstates),
+ X86_MATCH_VFM(INTEL_ATOM_TREMONT_L, &glm_cstates),
+ X86_MATCH_VFM(INTEL_ATOM_GRACEMONT, &adl_cstates),
+ X86_MATCH_VFM(INTEL_ATOM_CRESTMONT_X, &srf_cstates),
+ X86_MATCH_VFM(INTEL_ATOM_CRESTMONT, &grr_cstates),
+
+ X86_MATCH_VFM(INTEL_ICELAKE_L, &icl_cstates),
+ X86_MATCH_VFM(INTEL_ICELAKE, &icl_cstates),
+ X86_MATCH_VFM(INTEL_ICELAKE_X, &icx_cstates),
+ X86_MATCH_VFM(INTEL_ICELAKE_D, &icx_cstates),
+ X86_MATCH_VFM(INTEL_SAPPHIRERAPIDS_X, &icx_cstates),
+ X86_MATCH_VFM(INTEL_EMERALDRAPIDS_X, &icx_cstates),
+ X86_MATCH_VFM(INTEL_GRANITERAPIDS_X, &icx_cstates),
+ X86_MATCH_VFM(INTEL_GRANITERAPIDS_D, &icx_cstates),
+
+ X86_MATCH_VFM(INTEL_TIGERLAKE_L, &icl_cstates),
+ X86_MATCH_VFM(INTEL_TIGERLAKE, &icl_cstates),
+ X86_MATCH_VFM(INTEL_ROCKETLAKE, &icl_cstates),
+ X86_MATCH_VFM(INTEL_ALDERLAKE, &adl_cstates),
+ X86_MATCH_VFM(INTEL_ALDERLAKE_L, &adl_cstates),
+ X86_MATCH_VFM(INTEL_RAPTORLAKE, &adl_cstates),
+ X86_MATCH_VFM(INTEL_RAPTORLAKE_P, &adl_cstates),
+ X86_MATCH_VFM(INTEL_RAPTORLAKE_S, &adl_cstates),
+ X86_MATCH_VFM(INTEL_METEORLAKE, &adl_cstates),
+ X86_MATCH_VFM(INTEL_METEORLAKE_L, &adl_cstates),
{ },
};
MODULE_DEVICE_TABLE(x86cpu, intel_cstates_match);
--
2.44.0
New CPU #defines encode vendor and family as well as model.
Signed-off-by: Tony Luck <[email protected]>
---
arch/x86/crypto/poly1305_glue.c | 3 ++-
1 file changed, 2 insertions(+), 1 deletion(-)
diff --git a/arch/x86/crypto/poly1305_glue.c b/arch/x86/crypto/poly1305_glue.c
index 1dfb8af48a3c..9738995080bc 100644
--- a/arch/x86/crypto/poly1305_glue.c
+++ b/arch/x86/crypto/poly1305_glue.c
@@ -12,6 +12,7 @@
#include <linux/kernel.h>
#include <linux/module.h>
#include <linux/sizes.h>
+#include <asm/cpu_device_id.h>
#include <asm/intel-family.h>
#include <asm/simd.h>
@@ -269,7 +270,7 @@ static int __init poly1305_simd_mod_init(void)
boot_cpu_has(X86_FEATURE_AVX2) && boot_cpu_has(X86_FEATURE_AVX512F) &&
cpu_has_xfeatures(XFEATURE_MASK_SSE | XFEATURE_MASK_YMM | XFEATURE_MASK_AVX512, NULL) &&
/* Skylake downclocks unacceptably much when using zmm, but later generations are fast. */
- boot_cpu_data.x86_model != INTEL_FAM6_SKYLAKE_X)
+ boot_cpu_data.x86_vfm != INTEL_SKYLAKE_X)
static_branch_enable(&poly1305_use_avx512);
return IS_REACHABLE(CONFIG_CRYPTO_HASH) ? crypto_register_shash(&alg) : 0;
}
--
2.44.0
New CPU #defines encode vendor and family as well as model.
Signed-off-by: Tony Luck <[email protected]>
---
arch/x86/events/intel/uncore.c | 100 ++++++++++++++++-----------------
1 file changed, 50 insertions(+), 50 deletions(-)
diff --git a/arch/x86/events/intel/uncore.c b/arch/x86/events/intel/uncore.c
index 258e2cdf28fa..419c517b8594 100644
--- a/arch/x86/events/intel/uncore.c
+++ b/arch/x86/events/intel/uncore.c
@@ -1829,56 +1829,56 @@ static const struct intel_uncore_init_fun generic_uncore_init __initconst = {
};
static const struct x86_cpu_id intel_uncore_match[] __initconst = {
- X86_MATCH_INTEL_FAM6_MODEL(NEHALEM_EP, &nhm_uncore_init),
- X86_MATCH_INTEL_FAM6_MODEL(NEHALEM, &nhm_uncore_init),
- X86_MATCH_INTEL_FAM6_MODEL(WESTMERE, &nhm_uncore_init),
- X86_MATCH_INTEL_FAM6_MODEL(WESTMERE_EP, &nhm_uncore_init),
- X86_MATCH_INTEL_FAM6_MODEL(SANDYBRIDGE, &snb_uncore_init),
- X86_MATCH_INTEL_FAM6_MODEL(IVYBRIDGE, &ivb_uncore_init),
- X86_MATCH_INTEL_FAM6_MODEL(HASWELL, &hsw_uncore_init),
- X86_MATCH_INTEL_FAM6_MODEL(HASWELL_L, &hsw_uncore_init),
- X86_MATCH_INTEL_FAM6_MODEL(HASWELL_G, &hsw_uncore_init),
- X86_MATCH_INTEL_FAM6_MODEL(BROADWELL, &bdw_uncore_init),
- X86_MATCH_INTEL_FAM6_MODEL(BROADWELL_G, &bdw_uncore_init),
- X86_MATCH_INTEL_FAM6_MODEL(SANDYBRIDGE_X, &snbep_uncore_init),
- X86_MATCH_INTEL_FAM6_MODEL(NEHALEM_EX, &nhmex_uncore_init),
- X86_MATCH_INTEL_FAM6_MODEL(WESTMERE_EX, &nhmex_uncore_init),
- X86_MATCH_INTEL_FAM6_MODEL(IVYBRIDGE_X, &ivbep_uncore_init),
- X86_MATCH_INTEL_FAM6_MODEL(HASWELL_X, &hswep_uncore_init),
- X86_MATCH_INTEL_FAM6_MODEL(BROADWELL_X, &bdx_uncore_init),
- X86_MATCH_INTEL_FAM6_MODEL(BROADWELL_D, &bdx_uncore_init),
- X86_MATCH_INTEL_FAM6_MODEL(XEON_PHI_KNL, &knl_uncore_init),
- X86_MATCH_INTEL_FAM6_MODEL(XEON_PHI_KNM, &knl_uncore_init),
- X86_MATCH_INTEL_FAM6_MODEL(SKYLAKE, &skl_uncore_init),
- X86_MATCH_INTEL_FAM6_MODEL(SKYLAKE_L, &skl_uncore_init),
- X86_MATCH_INTEL_FAM6_MODEL(SKYLAKE_X, &skx_uncore_init),
- X86_MATCH_INTEL_FAM6_MODEL(KABYLAKE_L, &skl_uncore_init),
- X86_MATCH_INTEL_FAM6_MODEL(KABYLAKE, &skl_uncore_init),
- X86_MATCH_INTEL_FAM6_MODEL(COMETLAKE_L, &skl_uncore_init),
- X86_MATCH_INTEL_FAM6_MODEL(COMETLAKE, &skl_uncore_init),
- X86_MATCH_INTEL_FAM6_MODEL(ICELAKE_L, &icl_uncore_init),
- X86_MATCH_INTEL_FAM6_MODEL(ICELAKE_NNPI, &icl_uncore_init),
- X86_MATCH_INTEL_FAM6_MODEL(ICELAKE, &icl_uncore_init),
- X86_MATCH_INTEL_FAM6_MODEL(ICELAKE_D, &icx_uncore_init),
- X86_MATCH_INTEL_FAM6_MODEL(ICELAKE_X, &icx_uncore_init),
- X86_MATCH_INTEL_FAM6_MODEL(TIGERLAKE_L, &tgl_l_uncore_init),
- X86_MATCH_INTEL_FAM6_MODEL(TIGERLAKE, &tgl_uncore_init),
- X86_MATCH_INTEL_FAM6_MODEL(ROCKETLAKE, &rkl_uncore_init),
- X86_MATCH_INTEL_FAM6_MODEL(ALDERLAKE, &adl_uncore_init),
- X86_MATCH_INTEL_FAM6_MODEL(ALDERLAKE_L, &adl_uncore_init),
- X86_MATCH_INTEL_FAM6_MODEL(RAPTORLAKE, &adl_uncore_init),
- X86_MATCH_INTEL_FAM6_MODEL(RAPTORLAKE_P, &adl_uncore_init),
- X86_MATCH_INTEL_FAM6_MODEL(RAPTORLAKE_S, &adl_uncore_init),
- X86_MATCH_INTEL_FAM6_MODEL(METEORLAKE, &mtl_uncore_init),
- X86_MATCH_INTEL_FAM6_MODEL(METEORLAKE_L, &mtl_uncore_init),
- X86_MATCH_INTEL_FAM6_MODEL(SAPPHIRERAPIDS_X, &spr_uncore_init),
- X86_MATCH_INTEL_FAM6_MODEL(EMERALDRAPIDS_X, &spr_uncore_init),
- X86_MATCH_INTEL_FAM6_MODEL(GRANITERAPIDS_X, &gnr_uncore_init),
- X86_MATCH_INTEL_FAM6_MODEL(GRANITERAPIDS_D, &gnr_uncore_init),
- X86_MATCH_INTEL_FAM6_MODEL(ATOM_TREMONT_D, &snr_uncore_init),
- X86_MATCH_INTEL_FAM6_MODEL(ATOM_GRACEMONT, &adl_uncore_init),
- X86_MATCH_INTEL_FAM6_MODEL(ATOM_CRESTMONT_X, &gnr_uncore_init),
- X86_MATCH_INTEL_FAM6_MODEL(ATOM_CRESTMONT, &gnr_uncore_init),
+ X86_MATCH_VFM(INTEL_NEHALEM_EP, &nhm_uncore_init),
+ X86_MATCH_VFM(INTEL_NEHALEM, &nhm_uncore_init),
+ X86_MATCH_VFM(INTEL_WESTMERE, &nhm_uncore_init),
+ X86_MATCH_VFM(INTEL_WESTMERE_EP, &nhm_uncore_init),
+ X86_MATCH_VFM(INTEL_SANDYBRIDGE, &snb_uncore_init),
+ X86_MATCH_VFM(INTEL_IVYBRIDGE, &ivb_uncore_init),
+ X86_MATCH_VFM(INTEL_HASWELL, &hsw_uncore_init),
+ X86_MATCH_VFM(INTEL_HASWELL_L, &hsw_uncore_init),
+ X86_MATCH_VFM(INTEL_HASWELL_G, &hsw_uncore_init),
+ X86_MATCH_VFM(INTEL_BROADWELL, &bdw_uncore_init),
+ X86_MATCH_VFM(INTEL_BROADWELL_G, &bdw_uncore_init),
+ X86_MATCH_VFM(INTEL_SANDYBRIDGE_X, &snbep_uncore_init),
+ X86_MATCH_VFM(INTEL_NEHALEM_EX, &nhmex_uncore_init),
+ X86_MATCH_VFM(INTEL_WESTMERE_EX, &nhmex_uncore_init),
+ X86_MATCH_VFM(INTEL_IVYBRIDGE_X, &ivbep_uncore_init),
+ X86_MATCH_VFM(INTEL_HASWELL_X, &hswep_uncore_init),
+ X86_MATCH_VFM(INTEL_BROADWELL_X, &bdx_uncore_init),
+ X86_MATCH_VFM(INTEL_BROADWELL_D, &bdx_uncore_init),
+ X86_MATCH_VFM(INTEL_XEON_PHI_KNL, &knl_uncore_init),
+ X86_MATCH_VFM(INTEL_XEON_PHI_KNM, &knl_uncore_init),
+ X86_MATCH_VFM(INTEL_SKYLAKE, &skl_uncore_init),
+ X86_MATCH_VFM(INTEL_SKYLAKE_L, &skl_uncore_init),
+ X86_MATCH_VFM(INTEL_SKYLAKE_X, &skx_uncore_init),
+ X86_MATCH_VFM(INTEL_KABYLAKE_L, &skl_uncore_init),
+ X86_MATCH_VFM(INTEL_KABYLAKE, &skl_uncore_init),
+ X86_MATCH_VFM(INTEL_COMETLAKE_L, &skl_uncore_init),
+ X86_MATCH_VFM(INTEL_COMETLAKE, &skl_uncore_init),
+ X86_MATCH_VFM(INTEL_ICELAKE_L, &icl_uncore_init),
+ X86_MATCH_VFM(INTEL_ICELAKE_NNPI, &icl_uncore_init),
+ X86_MATCH_VFM(INTEL_ICELAKE, &icl_uncore_init),
+ X86_MATCH_VFM(INTEL_ICELAKE_D, &icx_uncore_init),
+ X86_MATCH_VFM(INTEL_ICELAKE_X, &icx_uncore_init),
+ X86_MATCH_VFM(INTEL_TIGERLAKE_L, &tgl_l_uncore_init),
+ X86_MATCH_VFM(INTEL_TIGERLAKE, &tgl_uncore_init),
+ X86_MATCH_VFM(INTEL_ROCKETLAKE, &rkl_uncore_init),
+ X86_MATCH_VFM(INTEL_ALDERLAKE, &adl_uncore_init),
+ X86_MATCH_VFM(INTEL_ALDERLAKE_L, &adl_uncore_init),
+ X86_MATCH_VFM(INTEL_RAPTORLAKE, &adl_uncore_init),
+ X86_MATCH_VFM(INTEL_RAPTORLAKE_P, &adl_uncore_init),
+ X86_MATCH_VFM(INTEL_RAPTORLAKE_S, &adl_uncore_init),
+ X86_MATCH_VFM(INTEL_METEORLAKE, &mtl_uncore_init),
+ X86_MATCH_VFM(INTEL_METEORLAKE_L, &mtl_uncore_init),
+ X86_MATCH_VFM(INTEL_SAPPHIRERAPIDS_X, &spr_uncore_init),
+ X86_MATCH_VFM(INTEL_EMERALDRAPIDS_X, &spr_uncore_init),
+ X86_MATCH_VFM(INTEL_GRANITERAPIDS_X, &gnr_uncore_init),
+ X86_MATCH_VFM(INTEL_GRANITERAPIDS_D, &gnr_uncore_init),
+ X86_MATCH_VFM(INTEL_ATOM_TREMONT_D, &snr_uncore_init),
+ X86_MATCH_VFM(INTEL_ATOM_GRACEMONT, &adl_uncore_init),
+ X86_MATCH_VFM(INTEL_ATOM_CRESTMONT_X, &gnr_uncore_init),
+ X86_MATCH_VFM(INTEL_ATOM_CRESTMONT, &gnr_uncore_init),
{},
};
MODULE_DEVICE_TABLE(x86cpu, intel_uncore_match);
--
2.44.0
New CPU #defines encode vendor and family as well as model.
Signed-off-by: Tony Luck <[email protected]>
---
arch/x86/events/intel/pt.c | 11 ++++++-----
1 file changed, 6 insertions(+), 5 deletions(-)
diff --git a/arch/x86/events/intel/pt.c b/arch/x86/events/intel/pt.c
index 8e2a12235e62..e3320c2ee7c6 100644
--- a/arch/x86/events/intel/pt.c
+++ b/arch/x86/events/intel/pt.c
@@ -22,6 +22,7 @@
#include <asm/insn.h>
#include <asm/io.h>
#include <asm/intel_pt.h>
+#include <asm/cpu_device_id.h>
#include <asm/intel-family.h>
#include "../perf_event.h"
@@ -211,11 +212,11 @@ static int __init pt_pmu_hw_init(void)
}
/* model-specific quirks */
- switch (boot_cpu_data.x86_model) {
- case INTEL_FAM6_BROADWELL:
- case INTEL_FAM6_BROADWELL_D:
- case INTEL_FAM6_BROADWELL_G:
- case INTEL_FAM6_BROADWELL_X:
+ switch (boot_cpu_data.x86_vfm) {
+ case INTEL_BROADWELL:
+ case INTEL_BROADWELL_D:
+ case INTEL_BROADWELL_G:
+ case INTEL_BROADWELL_X:
/* not setting BRANCH_EN will #GP, erratum BDM106 */
pt_pmu.branch_en_always_on = true;
break;
--
2.44.0
New CPU #defines encode vendor and family as well as model.
Signed-off-by: Tony Luck <[email protected]>
---
arch/x86/crypto/twofish_glue_3way.c | 10 ++++++----
1 file changed, 6 insertions(+), 4 deletions(-)
diff --git a/arch/x86/crypto/twofish_glue_3way.c b/arch/x86/crypto/twofish_glue_3way.c
index 90454cf18e0d..82311249048f 100644
--- a/arch/x86/crypto/twofish_glue_3way.c
+++ b/arch/x86/crypto/twofish_glue_3way.c
@@ -12,6 +12,8 @@
#include <linux/module.h>
#include <linux/types.h>
+#include <asm/cpu_device_id.h>
+
#include "twofish.h"
#include "ecb_cbc_helpers.h"
@@ -107,10 +109,10 @@ static bool is_blacklisted_cpu(void)
if (boot_cpu_data.x86_vendor != X86_VENDOR_INTEL)
return false;
- if (boot_cpu_data.x86 == 0x06 &&
- (boot_cpu_data.x86_model == 0x1c ||
- boot_cpu_data.x86_model == 0x26 ||
- boot_cpu_data.x86_model == 0x36)) {
+ switch (boot_cpu_data.x86_vfm) {
+ case INTEL_ATOM_BONNELL:
+ case INTEL_ATOM_BONNELL_MID:
+ case INTEL_ATOM_SALTWELL:
/*
* On Atom, twofish-3way is slower than original assembler
* implementation. Twofish-3way trades off some performance in
--
2.44.0
New CPU #defines encode vendor and family as well as model.
Signed-off-by: Tony Luck <[email protected]>
---
arch/x86/events/intel/uncore_snbep.c | 5 +++--
1 file changed, 3 insertions(+), 2 deletions(-)
diff --git a/arch/x86/events/intel/uncore_snbep.c b/arch/x86/events/intel/uncore_snbep.c
index 2eaf0f339849..74b8b21e8990 100644
--- a/arch/x86/events/intel/uncore_snbep.c
+++ b/arch/x86/events/intel/uncore_snbep.c
@@ -1,5 +1,6 @@
// SPDX-License-Identifier: GPL-2.0
/* SandyBridge-EP/IvyTown uncore support */
+#include <asm/cpu_device_id.h>
#include "uncore.h"
#include "uncore_discovery.h"
@@ -3285,7 +3286,7 @@ void bdx_uncore_cpu_init(void)
uncore_msr_uncores = bdx_msr_uncores;
/* Detect systems with no SBOXes */
- if ((boot_cpu_data.x86_model == 86) || hswep_has_limit_sbox(BDX_PCU_DID))
+ if (boot_cpu_data.x86_vfm == INTEL_BROADWELL_D || hswep_has_limit_sbox(BDX_PCU_DID))
uncore_msr_uncores[BDX_MSR_UNCORE_SBOX] = NULL;
hswep_uncore_pcu.constraints = bdx_uncore_pcu_constraints;
@@ -5394,7 +5395,7 @@ static int icx_iio_get_topology(struct intel_uncore_type *type)
static void icx_iio_set_mapping(struct intel_uncore_type *type)
{
/* Detect ICX-D system. This case is not supported */
- if (boot_cpu_data.x86_model == INTEL_FAM6_ICELAKE_D) {
+ if (boot_cpu_data.x86_vfm == INTEL_ICELAKE_D) {
pmu_clear_mapping_attr(type->attr_update, &icx_iio_mapping_group);
return;
}
--
2.44.0
New CPU #defines encode vendor and family as well as model.
Signed-off-by: Tony Luck <[email protected]>
---
arch/x86/events/msr.c | 131 +++++++++++++++++++++---------------------
1 file changed, 66 insertions(+), 65 deletions(-)
diff --git a/arch/x86/events/msr.c b/arch/x86/events/msr.c
index 9e237b30f017..19de4cd26de2 100644
--- a/arch/x86/events/msr.c
+++ b/arch/x86/events/msr.c
@@ -2,6 +2,7 @@
#include <linux/perf_event.h>
#include <linux/sysfs.h>
#include <linux/nospec.h>
+#include <asm/cpu_device_id.h>
#include <asm/intel-family.h>
#include "probe.h"
@@ -43,75 +44,75 @@ static bool test_intel(int idx, void *data)
boot_cpu_data.x86 != 6)
return false;
- switch (boot_cpu_data.x86_model) {
- case INTEL_FAM6_NEHALEM:
- case INTEL_FAM6_NEHALEM_G:
- case INTEL_FAM6_NEHALEM_EP:
- case INTEL_FAM6_NEHALEM_EX:
-
- case INTEL_FAM6_WESTMERE:
- case INTEL_FAM6_WESTMERE_EP:
- case INTEL_FAM6_WESTMERE_EX:
-
- case INTEL_FAM6_SANDYBRIDGE:
- case INTEL_FAM6_SANDYBRIDGE_X:
-
- case INTEL_FAM6_IVYBRIDGE:
- case INTEL_FAM6_IVYBRIDGE_X:
-
- case INTEL_FAM6_HASWELL:
- case INTEL_FAM6_HASWELL_X:
- case INTEL_FAM6_HASWELL_L:
- case INTEL_FAM6_HASWELL_G:
-
- case INTEL_FAM6_BROADWELL:
- case INTEL_FAM6_BROADWELL_D:
- case INTEL_FAM6_BROADWELL_G:
- case INTEL_FAM6_BROADWELL_X:
- case INTEL_FAM6_SAPPHIRERAPIDS_X:
- case INTEL_FAM6_EMERALDRAPIDS_X:
- case INTEL_FAM6_GRANITERAPIDS_X:
- case INTEL_FAM6_GRANITERAPIDS_D:
-
- case INTEL_FAM6_ATOM_SILVERMONT:
- case INTEL_FAM6_ATOM_SILVERMONT_D:
- case INTEL_FAM6_ATOM_AIRMONT:
-
- case INTEL_FAM6_ATOM_GOLDMONT:
- case INTEL_FAM6_ATOM_GOLDMONT_D:
- case INTEL_FAM6_ATOM_GOLDMONT_PLUS:
- case INTEL_FAM6_ATOM_TREMONT_D:
- case INTEL_FAM6_ATOM_TREMONT:
- case INTEL_FAM6_ATOM_TREMONT_L:
-
- case INTEL_FAM6_XEON_PHI_KNL:
- case INTEL_FAM6_XEON_PHI_KNM:
+ switch (boot_cpu_data.x86_vfm) {
+ case INTEL_NEHALEM:
+ case INTEL_NEHALEM_G:
+ case INTEL_NEHALEM_EP:
+ case INTEL_NEHALEM_EX:
+
+ case INTEL_WESTMERE:
+ case INTEL_WESTMERE_EP:
+ case INTEL_WESTMERE_EX:
+
+ case INTEL_SANDYBRIDGE:
+ case INTEL_SANDYBRIDGE_X:
+
+ case INTEL_IVYBRIDGE:
+ case INTEL_IVYBRIDGE_X:
+
+ case INTEL_HASWELL:
+ case INTEL_HASWELL_X:
+ case INTEL_HASWELL_L:
+ case INTEL_HASWELL_G:
+
+ case INTEL_BROADWELL:
+ case INTEL_BROADWELL_D:
+ case INTEL_BROADWELL_G:
+ case INTEL_BROADWELL_X:
+ case INTEL_SAPPHIRERAPIDS_X:
+ case INTEL_EMERALDRAPIDS_X:
+ case INTEL_GRANITERAPIDS_X:
+ case INTEL_GRANITERAPIDS_D:
+
+ case INTEL_ATOM_SILVERMONT:
+ case INTEL_ATOM_SILVERMONT_D:
+ case INTEL_ATOM_AIRMONT:
+
+ case INTEL_ATOM_GOLDMONT:
+ case INTEL_ATOM_GOLDMONT_D:
+ case INTEL_ATOM_GOLDMONT_PLUS:
+ case INTEL_ATOM_TREMONT_D:
+ case INTEL_ATOM_TREMONT:
+ case INTEL_ATOM_TREMONT_L:
+
+ case INTEL_XEON_PHI_KNL:
+ case INTEL_XEON_PHI_KNM:
if (idx == PERF_MSR_SMI)
return true;
break;
- case INTEL_FAM6_SKYLAKE_L:
- case INTEL_FAM6_SKYLAKE:
- case INTEL_FAM6_SKYLAKE_X:
- case INTEL_FAM6_KABYLAKE_L:
- case INTEL_FAM6_KABYLAKE:
- case INTEL_FAM6_COMETLAKE_L:
- case INTEL_FAM6_COMETLAKE:
- case INTEL_FAM6_ICELAKE_L:
- case INTEL_FAM6_ICELAKE:
- case INTEL_FAM6_ICELAKE_X:
- case INTEL_FAM6_ICELAKE_D:
- case INTEL_FAM6_TIGERLAKE_L:
- case INTEL_FAM6_TIGERLAKE:
- case INTEL_FAM6_ROCKETLAKE:
- case INTEL_FAM6_ALDERLAKE:
- case INTEL_FAM6_ALDERLAKE_L:
- case INTEL_FAM6_ATOM_GRACEMONT:
- case INTEL_FAM6_RAPTORLAKE:
- case INTEL_FAM6_RAPTORLAKE_P:
- case INTEL_FAM6_RAPTORLAKE_S:
- case INTEL_FAM6_METEORLAKE:
- case INTEL_FAM6_METEORLAKE_L:
+ case INTEL_SKYLAKE_L:
+ case INTEL_SKYLAKE:
+ case INTEL_SKYLAKE_X:
+ case INTEL_KABYLAKE_L:
+ case INTEL_KABYLAKE:
+ case INTEL_COMETLAKE_L:
+ case INTEL_COMETLAKE:
+ case INTEL_ICELAKE_L:
+ case INTEL_ICELAKE:
+ case INTEL_ICELAKE_X:
+ case INTEL_ICELAKE_D:
+ case INTEL_TIGERLAKE_L:
+ case INTEL_TIGERLAKE:
+ case INTEL_ROCKETLAKE:
+ case INTEL_ALDERLAKE:
+ case INTEL_ALDERLAKE_L:
+ case INTEL_ATOM_GRACEMONT:
+ case INTEL_RAPTORLAKE:
+ case INTEL_RAPTORLAKE_P:
+ case INTEL_RAPTORLAKE_S:
+ case INTEL_METEORLAKE:
+ case INTEL_METEORLAKE_L:
if (idx == PERF_MSR_SMI || idx == PERF_MSR_PPERF)
return true;
break;
--
2.44.0
New CPU #defines encode vendor and family as well as model.
Signed-off-by: Tony Luck <[email protected]>
---
arch/x86/kernel/cpu/aperfmperf.c | 17 ++++++++---------
1 file changed, 8 insertions(+), 9 deletions(-)
diff --git a/arch/x86/kernel/cpu/aperfmperf.c b/arch/x86/kernel/cpu/aperfmperf.c
index fdbb5f07448f..f9a8c7b7943f 100644
--- a/arch/x86/kernel/cpu/aperfmperf.c
+++ b/arch/x86/kernel/cpu/aperfmperf.c
@@ -124,25 +124,24 @@ static bool __init slv_set_max_freq_ratio(u64 *base_freq, u64 *turbo_freq)
return true;
}
-#define X86_MATCH(model) \
- X86_MATCH_VENDOR_FAM_MODEL_FEATURE(INTEL, 6, \
- INTEL_FAM6_##model, X86_FEATURE_APERFMPERF, NULL)
+#define X86_MATCH(vfm) \
+ X86_MATCH_VFM_FEATURE(vfm, X86_FEATURE_APERFMPERF, NULL)
static const struct x86_cpu_id has_knl_turbo_ratio_limits[] __initconst = {
- X86_MATCH(XEON_PHI_KNL),
- X86_MATCH(XEON_PHI_KNM),
+ X86_MATCH(INTEL_XEON_PHI_KNL),
+ X86_MATCH(INTEL_XEON_PHI_KNM),
{}
};
static const struct x86_cpu_id has_skx_turbo_ratio_limits[] __initconst = {
- X86_MATCH(SKYLAKE_X),
+ X86_MATCH(INTEL_SKYLAKE_X),
{}
};
static const struct x86_cpu_id has_glm_turbo_ratio_limits[] __initconst = {
- X86_MATCH(ATOM_GOLDMONT),
- X86_MATCH(ATOM_GOLDMONT_D),
- X86_MATCH(ATOM_GOLDMONT_PLUS),
+ X86_MATCH(INTEL_ATOM_GOLDMONT),
+ X86_MATCH(INTEL_ATOM_GOLDMONT_D),
+ X86_MATCH(INTEL_ATOM_GOLDMONT_PLUS),
{}
};
--
2.44.0
New CPU #defines encode vendor and family as well as model.
Signed-off-by: Tony Luck <[email protected]>
---
arch/x86/kernel/cpu/bugs.c | 29 +++++++++++++++--------------
1 file changed, 15 insertions(+), 14 deletions(-)
diff --git a/arch/x86/kernel/cpu/bugs.c b/arch/x86/kernel/cpu/bugs.c
index ab18185894df..896d4e2150fe 100644
--- a/arch/x86/kernel/cpu/bugs.c
+++ b/arch/x86/kernel/cpu/bugs.c
@@ -26,6 +26,7 @@
#include <asm/msr.h>
#include <asm/vmx.h>
#include <asm/paravirt.h>
+#include <asm/cpu_device_id.h>
#include <asm/intel-family.h>
#include <asm/e820/api.h>
#include <asm/hypervisor.h>
@@ -2391,20 +2392,20 @@ static void override_cache_bits(struct cpuinfo_x86 *c)
if (c->x86 != 6)
return;
- switch (c->x86_model) {
- case INTEL_FAM6_NEHALEM:
- case INTEL_FAM6_WESTMERE:
- case INTEL_FAM6_SANDYBRIDGE:
- case INTEL_FAM6_IVYBRIDGE:
- case INTEL_FAM6_HASWELL:
- case INTEL_FAM6_HASWELL_L:
- case INTEL_FAM6_HASWELL_G:
- case INTEL_FAM6_BROADWELL:
- case INTEL_FAM6_BROADWELL_G:
- case INTEL_FAM6_SKYLAKE_L:
- case INTEL_FAM6_SKYLAKE:
- case INTEL_FAM6_KABYLAKE_L:
- case INTEL_FAM6_KABYLAKE:
+ switch (c->x86_vfm) {
+ case INTEL_NEHALEM:
+ case INTEL_WESTMERE:
+ case INTEL_SANDYBRIDGE:
+ case INTEL_IVYBRIDGE:
+ case INTEL_HASWELL:
+ case INTEL_HASWELL_L:
+ case INTEL_HASWELL_G:
+ case INTEL_BROADWELL:
+ case INTEL_BROADWELL_G:
+ case INTEL_SKYLAKE_L:
+ case INTEL_SKYLAKE:
+ case INTEL_KABYLAKE_L:
+ case INTEL_KABYLAKE:
if (c->x86_cache_bits < 44)
c->x86_cache_bits = 44;
break;
--
2.44.0
New CPU #defines encode vendor and family as well as model.
Signed-off-by: Tony Luck <[email protected]>
---
arch/x86/kernel/apic/apic.c | 38 ++++++++++++++++++-------------------
1 file changed, 19 insertions(+), 19 deletions(-)
diff --git a/arch/x86/kernel/apic/apic.c b/arch/x86/kernel/apic/apic.c
index c5f5561406bd..8e0514eb552b 100644
--- a/arch/x86/kernel/apic/apic.c
+++ b/arch/x86/kernel/apic/apic.c
@@ -497,32 +497,32 @@ static struct clock_event_device lapic_clockevent = {
static DEFINE_PER_CPU(struct clock_event_device, lapic_events);
static const struct x86_cpu_id deadline_match[] __initconst = {
- X86_MATCH_INTEL_FAM6_MODEL_STEPPINGS(HASWELL_X, X86_STEPPINGS(0x2, 0x2), 0x3a), /* EP */
- X86_MATCH_INTEL_FAM6_MODEL_STEPPINGS(HASWELL_X, X86_STEPPINGS(0x4, 0x4), 0x0f), /* EX */
+ X86_MATCH_VFM_STEPPINGS(INTEL_HASWELL_X, X86_STEPPINGS(0x2, 0x2), 0x3a), /* EP */
+ X86_MATCH_VFM_STEPPINGS(INTEL_HASWELL_X, X86_STEPPINGS(0x4, 0x4), 0x0f), /* EX */
- X86_MATCH_INTEL_FAM6_MODEL( BROADWELL_X, 0x0b000020),
+ X86_MATCH_VFM(INTEL_BROADWELL_X, 0x0b000020),
- X86_MATCH_INTEL_FAM6_MODEL_STEPPINGS(BROADWELL_D, X86_STEPPINGS(0x2, 0x2), 0x00000011),
- X86_MATCH_INTEL_FAM6_MODEL_STEPPINGS(BROADWELL_D, X86_STEPPINGS(0x3, 0x3), 0x0700000e),
- X86_MATCH_INTEL_FAM6_MODEL_STEPPINGS(BROADWELL_D, X86_STEPPINGS(0x4, 0x4), 0x0f00000c),
- X86_MATCH_INTEL_FAM6_MODEL_STEPPINGS(BROADWELL_D, X86_STEPPINGS(0x5, 0x5), 0x0e000003),
+ X86_MATCH_VFM_STEPPINGS(INTEL_BROADWELL_D, X86_STEPPINGS(0x2, 0x2), 0x00000011),
+ X86_MATCH_VFM_STEPPINGS(INTEL_BROADWELL_D, X86_STEPPINGS(0x3, 0x3), 0x0700000e),
+ X86_MATCH_VFM_STEPPINGS(INTEL_BROADWELL_D, X86_STEPPINGS(0x4, 0x4), 0x0f00000c),
+ X86_MATCH_VFM_STEPPINGS(INTEL_BROADWELL_D, X86_STEPPINGS(0x5, 0x5), 0x0e000003),
- X86_MATCH_INTEL_FAM6_MODEL_STEPPINGS(SKYLAKE_X, X86_STEPPINGS(0x3, 0x3), 0x01000136),
- X86_MATCH_INTEL_FAM6_MODEL_STEPPINGS(SKYLAKE_X, X86_STEPPINGS(0x4, 0x4), 0x02000014),
- X86_MATCH_INTEL_FAM6_MODEL_STEPPINGS(SKYLAKE_X, X86_STEPPINGS(0x5, 0xf), 0),
+ X86_MATCH_VFM_STEPPINGS(INTEL_SKYLAKE_X, X86_STEPPINGS(0x3, 0x3), 0x01000136),
+ X86_MATCH_VFM_STEPPINGS(INTEL_SKYLAKE_X, X86_STEPPINGS(0x4, 0x4), 0x02000014),
+ X86_MATCH_VFM_STEPPINGS(INTEL_SKYLAKE_X, X86_STEPPINGS(0x5, 0xf), 0),
- X86_MATCH_INTEL_FAM6_MODEL( HASWELL, 0x22),
- X86_MATCH_INTEL_FAM6_MODEL( HASWELL_L, 0x20),
- X86_MATCH_INTEL_FAM6_MODEL( HASWELL_G, 0x17),
+ X86_MATCH_VFM(INTEL_HASWELL, 0x22),
+ X86_MATCH_VFM(INTEL_HASWELL_L, 0x20),
+ X86_MATCH_VFM(INTEL_HASWELL_G, 0x17),
- X86_MATCH_INTEL_FAM6_MODEL( BROADWELL, 0x25),
- X86_MATCH_INTEL_FAM6_MODEL( BROADWELL_G, 0x17),
+ X86_MATCH_VFM(INTEL_BROADWELL, 0x25),
+ X86_MATCH_VFM(INTEL_BROADWELL_G, 0x17),
- X86_MATCH_INTEL_FAM6_MODEL( SKYLAKE_L, 0xb2),
- X86_MATCH_INTEL_FAM6_MODEL( SKYLAKE, 0xb2),
+ X86_MATCH_VFM(INTEL_SKYLAKE_L, 0xb2),
+ X86_MATCH_VFM(INTEL_SKYLAKE, 0xb2),
- X86_MATCH_INTEL_FAM6_MODEL( KABYLAKE_L, 0x52),
- X86_MATCH_INTEL_FAM6_MODEL( KABYLAKE, 0x52),
+ X86_MATCH_VFM(INTEL_KABYLAKE_L, 0x52),
+ X86_MATCH_VFM(INTEL_KABYLAKE, 0x52),
{},
};
--
2.44.0
New CPU #defines encode vendor and family as well as model.
Signed-off-by: Tony Luck <[email protected]>
---
arch/x86/events/rapl.c | 90 +++++++++++++++++++++---------------------
1 file changed, 45 insertions(+), 45 deletions(-)
diff --git a/arch/x86/events/rapl.c b/arch/x86/events/rapl.c
index ca5f687fa420..4ea6a0083795 100644
--- a/arch/x86/events/rapl.c
+++ b/arch/x86/events/rapl.c
@@ -764,51 +764,51 @@ static struct rapl_model model_amd_hygon = {
};
static const struct x86_cpu_id rapl_model_match[] __initconst = {
- X86_MATCH_FEATURE(X86_FEATURE_RAPL, &model_amd_hygon),
- X86_MATCH_INTEL_FAM6_MODEL(SANDYBRIDGE, &model_snb),
- X86_MATCH_INTEL_FAM6_MODEL(SANDYBRIDGE_X, &model_snbep),
- X86_MATCH_INTEL_FAM6_MODEL(IVYBRIDGE, &model_snb),
- X86_MATCH_INTEL_FAM6_MODEL(IVYBRIDGE_X, &model_snbep),
- X86_MATCH_INTEL_FAM6_MODEL(HASWELL, &model_hsw),
- X86_MATCH_INTEL_FAM6_MODEL(HASWELL_X, &model_hsx),
- X86_MATCH_INTEL_FAM6_MODEL(HASWELL_L, &model_hsw),
- X86_MATCH_INTEL_FAM6_MODEL(HASWELL_G, &model_hsw),
- X86_MATCH_INTEL_FAM6_MODEL(BROADWELL, &model_hsw),
- X86_MATCH_INTEL_FAM6_MODEL(BROADWELL_G, &model_hsw),
- X86_MATCH_INTEL_FAM6_MODEL(BROADWELL_X, &model_hsx),
- X86_MATCH_INTEL_FAM6_MODEL(BROADWELL_D, &model_hsx),
- X86_MATCH_INTEL_FAM6_MODEL(XEON_PHI_KNL, &model_knl),
- X86_MATCH_INTEL_FAM6_MODEL(XEON_PHI_KNM, &model_knl),
- X86_MATCH_INTEL_FAM6_MODEL(SKYLAKE_L, &model_skl),
- X86_MATCH_INTEL_FAM6_MODEL(SKYLAKE, &model_skl),
- X86_MATCH_INTEL_FAM6_MODEL(SKYLAKE_X, &model_hsx),
- X86_MATCH_INTEL_FAM6_MODEL(KABYLAKE_L, &model_skl),
- X86_MATCH_INTEL_FAM6_MODEL(KABYLAKE, &model_skl),
- X86_MATCH_INTEL_FAM6_MODEL(CANNONLAKE_L, &model_skl),
- X86_MATCH_INTEL_FAM6_MODEL(ATOM_GOLDMONT, &model_hsw),
- X86_MATCH_INTEL_FAM6_MODEL(ATOM_GOLDMONT_D, &model_hsw),
- X86_MATCH_INTEL_FAM6_MODEL(ATOM_GOLDMONT_PLUS, &model_hsw),
- X86_MATCH_INTEL_FAM6_MODEL(ICELAKE_L, &model_skl),
- X86_MATCH_INTEL_FAM6_MODEL(ICELAKE, &model_skl),
- X86_MATCH_INTEL_FAM6_MODEL(ICELAKE_D, &model_hsx),
- X86_MATCH_INTEL_FAM6_MODEL(ICELAKE_X, &model_hsx),
- X86_MATCH_INTEL_FAM6_MODEL(COMETLAKE_L, &model_skl),
- X86_MATCH_INTEL_FAM6_MODEL(COMETLAKE, &model_skl),
- X86_MATCH_INTEL_FAM6_MODEL(TIGERLAKE_L, &model_skl),
- X86_MATCH_INTEL_FAM6_MODEL(TIGERLAKE, &model_skl),
- X86_MATCH_INTEL_FAM6_MODEL(ALDERLAKE, &model_skl),
- X86_MATCH_INTEL_FAM6_MODEL(ALDERLAKE_L, &model_skl),
- X86_MATCH_INTEL_FAM6_MODEL(ATOM_GRACEMONT, &model_skl),
- X86_MATCH_INTEL_FAM6_MODEL(SAPPHIRERAPIDS_X, &model_spr),
- X86_MATCH_INTEL_FAM6_MODEL(EMERALDRAPIDS_X, &model_spr),
- X86_MATCH_INTEL_FAM6_MODEL(RAPTORLAKE, &model_skl),
- X86_MATCH_INTEL_FAM6_MODEL(RAPTORLAKE_P, &model_skl),
- X86_MATCH_INTEL_FAM6_MODEL(RAPTORLAKE_S, &model_skl),
- X86_MATCH_INTEL_FAM6_MODEL(METEORLAKE, &model_skl),
- X86_MATCH_INTEL_FAM6_MODEL(METEORLAKE_L, &model_skl),
- X86_MATCH_INTEL_FAM6_MODEL(ARROWLAKE_H, &model_skl),
- X86_MATCH_INTEL_FAM6_MODEL(ARROWLAKE, &model_skl),
- X86_MATCH_INTEL_FAM6_MODEL(LUNARLAKE_M, &model_skl),
+ X86_MATCH_FEATURE(X86_FEATURE_RAPL, &model_amd_hygon),
+ X86_MATCH_VFM(INTEL_SANDYBRIDGE, &model_snb),
+ X86_MATCH_VFM(INTEL_SANDYBRIDGE_X, &model_snbep),
+ X86_MATCH_VFM(INTEL_IVYBRIDGE, &model_snb),
+ X86_MATCH_VFM(INTEL_IVYBRIDGE_X, &model_snbep),
+ X86_MATCH_VFM(INTEL_HASWELL, &model_hsw),
+ X86_MATCH_VFM(INTEL_HASWELL_X, &model_hsx),
+ X86_MATCH_VFM(INTEL_HASWELL_L, &model_hsw),
+ X86_MATCH_VFM(INTEL_HASWELL_G, &model_hsw),
+ X86_MATCH_VFM(INTEL_BROADWELL, &model_hsw),
+ X86_MATCH_VFM(INTEL_BROADWELL_G, &model_hsw),
+ X86_MATCH_VFM(INTEL_BROADWELL_X, &model_hsx),
+ X86_MATCH_VFM(INTEL_BROADWELL_D, &model_hsx),
+ X86_MATCH_VFM(INTEL_XEON_PHI_KNL, &model_knl),
+ X86_MATCH_VFM(INTEL_XEON_PHI_KNM, &model_knl),
+ X86_MATCH_VFM(INTEL_SKYLAKE_L, &model_skl),
+ X86_MATCH_VFM(INTEL_SKYLAKE, &model_skl),
+ X86_MATCH_VFM(INTEL_SKYLAKE_X, &model_hsx),
+ X86_MATCH_VFM(INTEL_KABYLAKE_L, &model_skl),
+ X86_MATCH_VFM(INTEL_KABYLAKE, &model_skl),
+ X86_MATCH_VFM(INTEL_CANNONLAKE_L, &model_skl),
+ X86_MATCH_VFM(INTEL_ATOM_GOLDMONT, &model_hsw),
+ X86_MATCH_VFM(INTEL_ATOM_GOLDMONT_D, &model_hsw),
+ X86_MATCH_VFM(INTEL_ATOM_GOLDMONT_PLUS, &model_hsw),
+ X86_MATCH_VFM(INTEL_ICELAKE_L, &model_skl),
+ X86_MATCH_VFM(INTEL_ICELAKE, &model_skl),
+ X86_MATCH_VFM(INTEL_ICELAKE_D, &model_hsx),
+ X86_MATCH_VFM(INTEL_ICELAKE_X, &model_hsx),
+ X86_MATCH_VFM(INTEL_COMETLAKE_L, &model_skl),
+ X86_MATCH_VFM(INTEL_COMETLAKE, &model_skl),
+ X86_MATCH_VFM(INTEL_TIGERLAKE_L, &model_skl),
+ X86_MATCH_VFM(INTEL_TIGERLAKE, &model_skl),
+ X86_MATCH_VFM(INTEL_ALDERLAKE, &model_skl),
+ X86_MATCH_VFM(INTEL_ALDERLAKE_L, &model_skl),
+ X86_MATCH_VFM(INTEL_ATOM_GRACEMONT, &model_skl),
+ X86_MATCH_VFM(INTEL_SAPPHIRERAPIDS_X, &model_spr),
+ X86_MATCH_VFM(INTEL_EMERALDRAPIDS_X, &model_spr),
+ X86_MATCH_VFM(INTEL_RAPTORLAKE, &model_skl),
+ X86_MATCH_VFM(INTEL_RAPTORLAKE_P, &model_skl),
+ X86_MATCH_VFM(INTEL_RAPTORLAKE_S, &model_skl),
+ X86_MATCH_VFM(INTEL_METEORLAKE, &model_skl),
+ X86_MATCH_VFM(INTEL_METEORLAKE_L, &model_skl),
+ X86_MATCH_VFM(INTEL_ARROWLAKE_H, &model_skl),
+ X86_MATCH_VFM(INTEL_ARROWLAKE, &model_skl),
+ X86_MATCH_VFM(INTEL_LUNARLAKE_M, &model_skl),
{},
};
MODULE_DEVICE_TABLE(x86cpu, rapl_model_match);
--
2.44.0
New CPU #defines encode vendor and family as well as model.
Signed-off-by: Tony Luck <[email protected]>
---
arch/x86/kernel/cpu/intel_epb.c | 12 ++++++------
1 file changed, 6 insertions(+), 6 deletions(-)
diff --git a/arch/x86/kernel/cpu/intel_epb.c b/arch/x86/kernel/cpu/intel_epb.c
index f18d35fe27a9..30b1d63b97f3 100644
--- a/arch/x86/kernel/cpu/intel_epb.c
+++ b/arch/x86/kernel/cpu/intel_epb.c
@@ -204,12 +204,12 @@ static int intel_epb_offline(unsigned int cpu)
}
static const struct x86_cpu_id intel_epb_normal[] = {
- X86_MATCH_INTEL_FAM6_MODEL(ALDERLAKE_L,
- ENERGY_PERF_BIAS_NORMAL_POWERSAVE),
- X86_MATCH_INTEL_FAM6_MODEL(ATOM_GRACEMONT,
- ENERGY_PERF_BIAS_NORMAL_POWERSAVE),
- X86_MATCH_INTEL_FAM6_MODEL(RAPTORLAKE_P,
- ENERGY_PERF_BIAS_NORMAL_POWERSAVE),
+ X86_MATCH_VFM(INTEL_ALDERLAKE_L,
+ ENERGY_PERF_BIAS_NORMAL_POWERSAVE),
+ X86_MATCH_VFM(INTEL_ATOM_GRACEMONT,
+ ENERGY_PERF_BIAS_NORMAL_POWERSAVE),
+ X86_MATCH_VFM(INTEL_RAPTORLAKE_P,
+ ENERGY_PERF_BIAS_NORMAL_POWERSAVE),
{}
};
--
2.44.0
New CPU #defines encode vendor and family as well as model.
Signed-off-by: Tony Luck <[email protected]>
---
arch/x86/kernel/cpu/match.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/arch/x86/kernel/cpu/match.c b/arch/x86/kernel/cpu/match.c
index 2243083f0bc2..8651643bddae 100644
--- a/arch/x86/kernel/cpu/match.c
+++ b/arch/x86/kernel/cpu/match.c
@@ -25,7 +25,7 @@
* asm/cpu_device_id.h contains a set of useful macros which are shortcuts
* for various common selections. The above can be shortened to:
*
- * X86_MATCH_INTEL_FAM6_MODEL(BROADWELL, NULL);
+ * X86_MATCH_VFM(INTEL_BROADWELL, NULL);
*
* Arrays used to match for this should also be declared using
* MODULE_DEVICE_TABLE(x86cpu, ...)
--
2.44.0
New CPU #defines encode vendor and family as well as model.
Signed-off-by: Tony Luck <[email protected]>
---
arch/x86/kernel/cpu/common.c | 154 +++++++++++++++++------------------
1 file changed, 76 insertions(+), 78 deletions(-)
diff --git a/arch/x86/kernel/cpu/common.c b/arch/x86/kernel/cpu/common.c
index 2e70827c126f..cdaa795a9371 100644
--- a/arch/x86/kernel/cpu/common.c
+++ b/arch/x86/kernel/cpu/common.c
@@ -114,17 +114,17 @@ static const struct x86_cpu_id ppin_cpuids[] = {
X86_MATCH_FEATURE(X86_FEATURE_INTEL_PPIN, &ppin_info[X86_VENDOR_INTEL]),
/* Legacy models without CPUID enumeration */
- X86_MATCH_INTEL_FAM6_MODEL(IVYBRIDGE_X, &ppin_info[X86_VENDOR_INTEL]),
- X86_MATCH_INTEL_FAM6_MODEL(HASWELL_X, &ppin_info[X86_VENDOR_INTEL]),
- X86_MATCH_INTEL_FAM6_MODEL(BROADWELL_D, &ppin_info[X86_VENDOR_INTEL]),
- X86_MATCH_INTEL_FAM6_MODEL(BROADWELL_X, &ppin_info[X86_VENDOR_INTEL]),
- X86_MATCH_INTEL_FAM6_MODEL(SKYLAKE_X, &ppin_info[X86_VENDOR_INTEL]),
- X86_MATCH_INTEL_FAM6_MODEL(ICELAKE_X, &ppin_info[X86_VENDOR_INTEL]),
- X86_MATCH_INTEL_FAM6_MODEL(ICELAKE_D, &ppin_info[X86_VENDOR_INTEL]),
- X86_MATCH_INTEL_FAM6_MODEL(SAPPHIRERAPIDS_X, &ppin_info[X86_VENDOR_INTEL]),
- X86_MATCH_INTEL_FAM6_MODEL(EMERALDRAPIDS_X, &ppin_info[X86_VENDOR_INTEL]),
- X86_MATCH_INTEL_FAM6_MODEL(XEON_PHI_KNL, &ppin_info[X86_VENDOR_INTEL]),
- X86_MATCH_INTEL_FAM6_MODEL(XEON_PHI_KNM, &ppin_info[X86_VENDOR_INTEL]),
+ X86_MATCH_VFM(INTEL_IVYBRIDGE_X, &ppin_info[X86_VENDOR_INTEL]),
+ X86_MATCH_VFM(INTEL_HASWELL_X, &ppin_info[X86_VENDOR_INTEL]),
+ X86_MATCH_VFM(INTEL_BROADWELL_D, &ppin_info[X86_VENDOR_INTEL]),
+ X86_MATCH_VFM(INTEL_BROADWELL_X, &ppin_info[X86_VENDOR_INTEL]),
+ X86_MATCH_VFM(INTEL_SKYLAKE_X, &ppin_info[X86_VENDOR_INTEL]),
+ X86_MATCH_VFM(INTEL_ICELAKE_X, &ppin_info[X86_VENDOR_INTEL]),
+ X86_MATCH_VFM(INTEL_ICELAKE_D, &ppin_info[X86_VENDOR_INTEL]),
+ X86_MATCH_VFM(INTEL_SAPPHIRERAPIDS_X, &ppin_info[X86_VENDOR_INTEL]),
+ X86_MATCH_VFM(INTEL_EMERALDRAPIDS_X, &ppin_info[X86_VENDOR_INTEL]),
+ X86_MATCH_VFM(INTEL_XEON_PHI_KNL, &ppin_info[X86_VENDOR_INTEL]),
+ X86_MATCH_VFM(INTEL_XEON_PHI_KNM, &ppin_info[X86_VENDOR_INTEL]),
{}
};
@@ -1122,8 +1122,8 @@ static void identify_cpu_without_cpuid(struct cpuinfo_x86 *c)
#define VULNWL(vendor, family, model, whitelist) \
X86_MATCH_VENDOR_FAM_MODEL(vendor, family, model, whitelist)
-#define VULNWL_INTEL(model, whitelist) \
- VULNWL(INTEL, 6, INTEL_FAM6_##model, whitelist)
+#define VULNWL_INTEL(vfm, whitelist) \
+ X86_MATCH_VFM(vfm, whitelist)
#define VULNWL_AMD(family, whitelist) \
VULNWL(AMD, family, X86_MODEL_ANY, whitelist)
@@ -1140,32 +1140,32 @@ static const __initconst struct x86_cpu_id cpu_vuln_whitelist[] = {
VULNWL(VORTEX, 6, X86_MODEL_ANY, NO_SPECULATION),
/* Intel Family 6 */
- VULNWL_INTEL(TIGERLAKE, NO_MMIO),
- VULNWL_INTEL(TIGERLAKE_L, NO_MMIO),
- VULNWL_INTEL(ALDERLAKE, NO_MMIO),
- VULNWL_INTEL(ALDERLAKE_L, NO_MMIO),
+ VULNWL_INTEL(INTEL_TIGERLAKE, NO_MMIO),
+ VULNWL_INTEL(INTEL_TIGERLAKE_L, NO_MMIO),
+ VULNWL_INTEL(INTEL_ALDERLAKE, NO_MMIO),
+ VULNWL_INTEL(INTEL_ALDERLAKE_L, NO_MMIO),
- VULNWL_INTEL(ATOM_SALTWELL, NO_SPECULATION | NO_ITLB_MULTIHIT),
- VULNWL_INTEL(ATOM_SALTWELL_TABLET, NO_SPECULATION | NO_ITLB_MULTIHIT),
- VULNWL_INTEL(ATOM_SALTWELL_MID, NO_SPECULATION | NO_ITLB_MULTIHIT),
- VULNWL_INTEL(ATOM_BONNELL, NO_SPECULATION | NO_ITLB_MULTIHIT),
- VULNWL_INTEL(ATOM_BONNELL_MID, NO_SPECULATION | NO_ITLB_MULTIHIT),
+ VULNWL_INTEL(INTEL_ATOM_SALTWELL, NO_SPECULATION | NO_ITLB_MULTIHIT),
+ VULNWL_INTEL(INTEL_ATOM_SALTWELL_TABLET, NO_SPECULATION | NO_ITLB_MULTIHIT),
+ VULNWL_INTEL(INTEL_ATOM_SALTWELL_MID, NO_SPECULATION | NO_ITLB_MULTIHIT),
+ VULNWL_INTEL(INTEL_ATOM_BONNELL, NO_SPECULATION | NO_ITLB_MULTIHIT),
+ VULNWL_INTEL(INTEL_ATOM_BONNELL_MID, NO_SPECULATION | NO_ITLB_MULTIHIT),
- VULNWL_INTEL(ATOM_SILVERMONT, NO_SSB | NO_L1TF | MSBDS_ONLY | NO_SWAPGS | NO_ITLB_MULTIHIT),
- VULNWL_INTEL(ATOM_SILVERMONT_D, NO_SSB | NO_L1TF | MSBDS_ONLY | NO_SWAPGS | NO_ITLB_MULTIHIT),
- VULNWL_INTEL(ATOM_SILVERMONT_MID, NO_SSB | NO_L1TF | MSBDS_ONLY | NO_SWAPGS | NO_ITLB_MULTIHIT),
- VULNWL_INTEL(ATOM_AIRMONT, NO_SSB | NO_L1TF | MSBDS_ONLY | NO_SWAPGS | NO_ITLB_MULTIHIT),
- VULNWL_INTEL(XEON_PHI_KNL, NO_SSB | NO_L1TF | MSBDS_ONLY | NO_SWAPGS | NO_ITLB_MULTIHIT),
- VULNWL_INTEL(XEON_PHI_KNM, NO_SSB | NO_L1TF | MSBDS_ONLY | NO_SWAPGS | NO_ITLB_MULTIHIT),
+ VULNWL_INTEL(INTEL_ATOM_SILVERMONT, NO_SSB | NO_L1TF | MSBDS_ONLY | NO_SWAPGS | NO_ITLB_MULTIHIT),
+ VULNWL_INTEL(INTEL_ATOM_SILVERMONT_D, NO_SSB | NO_L1TF | MSBDS_ONLY | NO_SWAPGS | NO_ITLB_MULTIHIT),
+ VULNWL_INTEL(INTEL_ATOM_SILVERMONT_MID, NO_SSB | NO_L1TF | MSBDS_ONLY | NO_SWAPGS | NO_ITLB_MULTIHIT),
+ VULNWL_INTEL(INTEL_ATOM_AIRMONT, NO_SSB | NO_L1TF | MSBDS_ONLY | NO_SWAPGS | NO_ITLB_MULTIHIT),
+ VULNWL_INTEL(INTEL_XEON_PHI_KNL, NO_SSB | NO_L1TF | MSBDS_ONLY | NO_SWAPGS | NO_ITLB_MULTIHIT),
+ VULNWL_INTEL(INTEL_XEON_PHI_KNM, NO_SSB | NO_L1TF | MSBDS_ONLY | NO_SWAPGS | NO_ITLB_MULTIHIT),
- VULNWL_INTEL(CORE_YONAH, NO_SSB),
+ VULNWL_INTEL(INTEL_CORE_YONAH, NO_SSB),
- VULNWL_INTEL(ATOM_AIRMONT_MID, NO_L1TF | MSBDS_ONLY | NO_SWAPGS | NO_ITLB_MULTIHIT),
- VULNWL_INTEL(ATOM_AIRMONT_NP, NO_L1TF | NO_SWAPGS | NO_ITLB_MULTIHIT),
+ VULNWL_INTEL(INTEL_ATOM_AIRMONT_MID, NO_L1TF | MSBDS_ONLY | NO_SWAPGS | NO_ITLB_MULTIHIT),
+ VULNWL_INTEL(INTEL_ATOM_AIRMONT_NP, NO_L1TF | NO_SWAPGS | NO_ITLB_MULTIHIT),
- VULNWL_INTEL(ATOM_GOLDMONT, NO_MDS | NO_L1TF | NO_SWAPGS | NO_ITLB_MULTIHIT | NO_MMIO),
- VULNWL_INTEL(ATOM_GOLDMONT_D, NO_MDS | NO_L1TF | NO_SWAPGS | NO_ITLB_MULTIHIT | NO_MMIO),
- VULNWL_INTEL(ATOM_GOLDMONT_PLUS, NO_MDS | NO_L1TF | NO_SWAPGS | NO_ITLB_MULTIHIT | NO_MMIO | NO_EIBRS_PBRSB),
+ VULNWL_INTEL(INTEL_ATOM_GOLDMONT, NO_MDS | NO_L1TF | NO_SWAPGS | NO_ITLB_MULTIHIT | NO_MMIO),
+ VULNWL_INTEL(INTEL_ATOM_GOLDMONT_D, NO_MDS | NO_L1TF | NO_SWAPGS | NO_ITLB_MULTIHIT | NO_MMIO),
+ VULNWL_INTEL(INTEL_ATOM_GOLDMONT_PLUS, NO_MDS | NO_L1TF | NO_SWAPGS | NO_ITLB_MULTIHIT | NO_MMIO | NO_EIBRS_PBRSB),
/*
* Technically, swapgs isn't serializing on AMD (despite it previously
@@ -1175,9 +1175,9 @@ static const __initconst struct x86_cpu_id cpu_vuln_whitelist[] = {
* good enough for our purposes.
*/
- VULNWL_INTEL(ATOM_TREMONT, NO_EIBRS_PBRSB),
- VULNWL_INTEL(ATOM_TREMONT_L, NO_EIBRS_PBRSB),
- VULNWL_INTEL(ATOM_TREMONT_D, NO_ITLB_MULTIHIT | NO_EIBRS_PBRSB),
+ VULNWL_INTEL(INTEL_ATOM_TREMONT, NO_EIBRS_PBRSB),
+ VULNWL_INTEL(INTEL_ATOM_TREMONT_L, NO_EIBRS_PBRSB),
+ VULNWL_INTEL(INTEL_ATOM_TREMONT_D, NO_ITLB_MULTIHIT | NO_EIBRS_PBRSB),
/* AMD Family 0xf - 0x12 */
VULNWL_AMD(0x0f, NO_MELTDOWN | NO_SSB | NO_L1TF | NO_MDS | NO_SWAPGS | NO_ITLB_MULTIHIT | NO_MMIO | NO_BHI),
@@ -1198,10 +1198,8 @@ static const __initconst struct x86_cpu_id cpu_vuln_whitelist[] = {
#define VULNBL(vendor, family, model, blacklist) \
X86_MATCH_VENDOR_FAM_MODEL(vendor, family, model, blacklist)
-#define VULNBL_INTEL_STEPPINGS(model, steppings, issues) \
- X86_MATCH_VENDOR_FAM_MODEL_STEPPINGS_FEATURE(INTEL, 6, \
- INTEL_FAM6_##model, steppings, \
- X86_FEATURE_ANY, issues)
+#define VULNBL_INTEL_STEPPINGS(vfm, steppings, issues) \
+ X86_MATCH_VFM_STEPPINGS(vfm, steppings, issues)
#define VULNBL_AMD(family, blacklist) \
VULNBL(AMD, family, X86_MODEL_ANY, blacklist)
@@ -1226,43 +1224,43 @@ static const __initconst struct x86_cpu_id cpu_vuln_whitelist[] = {
#define RFDS BIT(7)
static const struct x86_cpu_id cpu_vuln_blacklist[] __initconst = {
- VULNBL_INTEL_STEPPINGS(IVYBRIDGE, X86_STEPPING_ANY, SRBDS),
- VULNBL_INTEL_STEPPINGS(HASWELL, X86_STEPPING_ANY, SRBDS),
- VULNBL_INTEL_STEPPINGS(HASWELL_L, X86_STEPPING_ANY, SRBDS),
- VULNBL_INTEL_STEPPINGS(HASWELL_G, X86_STEPPING_ANY, SRBDS),
- VULNBL_INTEL_STEPPINGS(HASWELL_X, X86_STEPPING_ANY, MMIO),
- VULNBL_INTEL_STEPPINGS(BROADWELL_D, X86_STEPPING_ANY, MMIO),
- VULNBL_INTEL_STEPPINGS(BROADWELL_G, X86_STEPPING_ANY, SRBDS),
- VULNBL_INTEL_STEPPINGS(BROADWELL_X, X86_STEPPING_ANY, MMIO),
- VULNBL_INTEL_STEPPINGS(BROADWELL, X86_STEPPING_ANY, SRBDS),
- VULNBL_INTEL_STEPPINGS(SKYLAKE_X, X86_STEPPING_ANY, MMIO | RETBLEED | GDS),
- VULNBL_INTEL_STEPPINGS(SKYLAKE_L, X86_STEPPING_ANY, MMIO | RETBLEED | GDS | SRBDS),
- VULNBL_INTEL_STEPPINGS(SKYLAKE, X86_STEPPING_ANY, MMIO | RETBLEED | GDS | SRBDS),
- VULNBL_INTEL_STEPPINGS(KABYLAKE_L, X86_STEPPING_ANY, MMIO | RETBLEED | GDS | SRBDS),
- VULNBL_INTEL_STEPPINGS(KABYLAKE, X86_STEPPING_ANY, MMIO | RETBLEED | GDS | SRBDS),
- VULNBL_INTEL_STEPPINGS(CANNONLAKE_L, X86_STEPPING_ANY, RETBLEED),
- VULNBL_INTEL_STEPPINGS(ICELAKE_L, X86_STEPPING_ANY, MMIO | MMIO_SBDS | RETBLEED | GDS),
- VULNBL_INTEL_STEPPINGS(ICELAKE_D, X86_STEPPING_ANY, MMIO | GDS),
- VULNBL_INTEL_STEPPINGS(ICELAKE_X, X86_STEPPING_ANY, MMIO | GDS),
- VULNBL_INTEL_STEPPINGS(COMETLAKE, X86_STEPPING_ANY, MMIO | MMIO_SBDS | RETBLEED | GDS),
- VULNBL_INTEL_STEPPINGS(COMETLAKE_L, X86_STEPPINGS(0x0, 0x0), MMIO | RETBLEED),
- VULNBL_INTEL_STEPPINGS(COMETLAKE_L, X86_STEPPING_ANY, MMIO | MMIO_SBDS | RETBLEED | GDS),
- VULNBL_INTEL_STEPPINGS(TIGERLAKE_L, X86_STEPPING_ANY, GDS),
- VULNBL_INTEL_STEPPINGS(TIGERLAKE, X86_STEPPING_ANY, GDS),
- VULNBL_INTEL_STEPPINGS(LAKEFIELD, X86_STEPPING_ANY, MMIO | MMIO_SBDS | RETBLEED),
- VULNBL_INTEL_STEPPINGS(ROCKETLAKE, X86_STEPPING_ANY, MMIO | RETBLEED | GDS),
- VULNBL_INTEL_STEPPINGS(ALDERLAKE, X86_STEPPING_ANY, RFDS),
- VULNBL_INTEL_STEPPINGS(ALDERLAKE_L, X86_STEPPING_ANY, RFDS),
- VULNBL_INTEL_STEPPINGS(RAPTORLAKE, X86_STEPPING_ANY, RFDS),
- VULNBL_INTEL_STEPPINGS(RAPTORLAKE_P, X86_STEPPING_ANY, RFDS),
- VULNBL_INTEL_STEPPINGS(RAPTORLAKE_S, X86_STEPPING_ANY, RFDS),
- VULNBL_INTEL_STEPPINGS(ATOM_GRACEMONT, X86_STEPPING_ANY, RFDS),
- VULNBL_INTEL_STEPPINGS(ATOM_TREMONT, X86_STEPPING_ANY, MMIO | MMIO_SBDS | RFDS),
- VULNBL_INTEL_STEPPINGS(ATOM_TREMONT_D, X86_STEPPING_ANY, MMIO | RFDS),
- VULNBL_INTEL_STEPPINGS(ATOM_TREMONT_L, X86_STEPPING_ANY, MMIO | MMIO_SBDS | RFDS),
- VULNBL_INTEL_STEPPINGS(ATOM_GOLDMONT, X86_STEPPING_ANY, RFDS),
- VULNBL_INTEL_STEPPINGS(ATOM_GOLDMONT_D, X86_STEPPING_ANY, RFDS),
- VULNBL_INTEL_STEPPINGS(ATOM_GOLDMONT_PLUS, X86_STEPPING_ANY, RFDS),
+ VULNBL_INTEL_STEPPINGS(INTEL_IVYBRIDGE, X86_STEPPING_ANY, SRBDS),
+ VULNBL_INTEL_STEPPINGS(INTEL_HASWELL, X86_STEPPING_ANY, SRBDS),
+ VULNBL_INTEL_STEPPINGS(INTEL_HASWELL_L, X86_STEPPING_ANY, SRBDS),
+ VULNBL_INTEL_STEPPINGS(INTEL_HASWELL_G, X86_STEPPING_ANY, SRBDS),
+ VULNBL_INTEL_STEPPINGS(INTEL_HASWELL_X, X86_STEPPING_ANY, MMIO),
+ VULNBL_INTEL_STEPPINGS(INTEL_BROADWELL_D, X86_STEPPING_ANY, MMIO),
+ VULNBL_INTEL_STEPPINGS(INTEL_BROADWELL_G, X86_STEPPING_ANY, SRBDS),
+ VULNBL_INTEL_STEPPINGS(INTEL_BROADWELL_X, X86_STEPPING_ANY, MMIO),
+ VULNBL_INTEL_STEPPINGS(INTEL_BROADWELL, X86_STEPPING_ANY, SRBDS),
+ VULNBL_INTEL_STEPPINGS(INTEL_SKYLAKE_X, X86_STEPPING_ANY, MMIO | RETBLEED | GDS),
+ VULNBL_INTEL_STEPPINGS(INTEL_SKYLAKE_L, X86_STEPPING_ANY, MMIO | RETBLEED | GDS | SRBDS),
+ VULNBL_INTEL_STEPPINGS(INTEL_SKYLAKE, X86_STEPPING_ANY, MMIO | RETBLEED | GDS | SRBDS),
+ VULNBL_INTEL_STEPPINGS(INTEL_KABYLAKE_L, X86_STEPPING_ANY, MMIO | RETBLEED | GDS | SRBDS),
+ VULNBL_INTEL_STEPPINGS(INTEL_KABYLAKE, X86_STEPPING_ANY, MMIO | RETBLEED | GDS | SRBDS),
+ VULNBL_INTEL_STEPPINGS(INTEL_CANNONLAKE_L, X86_STEPPING_ANY, RETBLEED),
+ VULNBL_INTEL_STEPPINGS(INTEL_ICELAKE_L, X86_STEPPING_ANY, MMIO | MMIO_SBDS | RETBLEED | GDS),
+ VULNBL_INTEL_STEPPINGS(INTEL_ICELAKE_D, X86_STEPPING_ANY, MMIO | GDS),
+ VULNBL_INTEL_STEPPINGS(INTEL_ICELAKE_X, X86_STEPPING_ANY, MMIO | GDS),
+ VULNBL_INTEL_STEPPINGS(INTEL_COMETLAKE, X86_STEPPING_ANY, MMIO | MMIO_SBDS | RETBLEED | GDS),
+ VULNBL_INTEL_STEPPINGS(INTEL_COMETLAKE_L, X86_STEPPINGS(0x0, 0x0), MMIO | RETBLEED),
+ VULNBL_INTEL_STEPPINGS(INTEL_COMETLAKE_L, X86_STEPPING_ANY, MMIO | MMIO_SBDS | RETBLEED | GDS),
+ VULNBL_INTEL_STEPPINGS(INTEL_TIGERLAKE_L, X86_STEPPING_ANY, GDS),
+ VULNBL_INTEL_STEPPINGS(INTEL_TIGERLAKE, X86_STEPPING_ANY, GDS),
+ VULNBL_INTEL_STEPPINGS(INTEL_LAKEFIELD, X86_STEPPING_ANY, MMIO | MMIO_SBDS | RETBLEED),
+ VULNBL_INTEL_STEPPINGS(INTEL_ROCKETLAKE, X86_STEPPING_ANY, MMIO | RETBLEED | GDS),
+ VULNBL_INTEL_STEPPINGS(INTEL_ALDERLAKE, X86_STEPPING_ANY, RFDS),
+ VULNBL_INTEL_STEPPINGS(INTEL_ALDERLAKE_L, X86_STEPPING_ANY, RFDS),
+ VULNBL_INTEL_STEPPINGS(INTEL_RAPTORLAKE, X86_STEPPING_ANY, RFDS),
+ VULNBL_INTEL_STEPPINGS(INTEL_RAPTORLAKE_P, X86_STEPPING_ANY, RFDS),
+ VULNBL_INTEL_STEPPINGS(INTEL_RAPTORLAKE_S, X86_STEPPING_ANY, RFDS),
+ VULNBL_INTEL_STEPPINGS(INTEL_ATOM_GRACEMONT, X86_STEPPING_ANY, RFDS),
+ VULNBL_INTEL_STEPPINGS(INTEL_ATOM_TREMONT, X86_STEPPING_ANY, MMIO | MMIO_SBDS | RFDS),
+ VULNBL_INTEL_STEPPINGS(INTEL_ATOM_TREMONT_D, X86_STEPPING_ANY, MMIO | RFDS),
+ VULNBL_INTEL_STEPPINGS(INTEL_ATOM_TREMONT_L, X86_STEPPING_ANY, MMIO | MMIO_SBDS | RFDS),
+ VULNBL_INTEL_STEPPINGS(INTEL_ATOM_GOLDMONT, X86_STEPPING_ANY, RFDS),
+ VULNBL_INTEL_STEPPINGS(INTEL_ATOM_GOLDMONT_D, X86_STEPPING_ANY, RFDS),
+ VULNBL_INTEL_STEPPINGS(INTEL_ATOM_GOLDMONT_PLUS, X86_STEPPING_ANY, RFDS),
VULNBL_AMD(0x15, RETBLEED),
VULNBL_AMD(0x16, RETBLEED),
--
2.44.0
New CPU #defines encode vendor and family as well as model.
Signed-off-by: Tony Luck <[email protected]>
---
arch/x86/kernel/cpu/mce/intel.c | 20 ++++++++++----------
1 file changed, 10 insertions(+), 10 deletions(-)
diff --git a/arch/x86/kernel/cpu/mce/intel.c b/arch/x86/kernel/cpu/mce/intel.c
index 399b62e223d2..a73e3ff847aa 100644
--- a/arch/x86/kernel/cpu/mce/intel.c
+++ b/arch/x86/kernel/cpu/mce/intel.c
@@ -13,6 +13,7 @@
#include <linux/cpumask.h>
#include <asm/apic.h>
#include <asm/cpufeature.h>
+#include <asm/cpu_device_id.h>
#include <asm/intel-family.h>
#include <asm/processor.h>
#include <asm/msr.h>
@@ -455,10 +456,10 @@ static void intel_imc_init(struct cpuinfo_x86 *c)
{
u64 error_control;
- switch (c->x86_model) {
- case INTEL_FAM6_SANDYBRIDGE_X:
- case INTEL_FAM6_IVYBRIDGE_X:
- case INTEL_FAM6_HASWELL_X:
+ switch (c->x86_vfm) {
+ case INTEL_SANDYBRIDGE_X:
+ case INTEL_IVYBRIDGE_X:
+ case INTEL_HASWELL_X:
if (rdmsrl_safe(MSR_ERROR_CONTROL, &error_control))
return;
error_control |= 2;
@@ -484,12 +485,11 @@ bool intel_filter_mce(struct mce *m)
struct cpuinfo_x86 *c = &boot_cpu_data;
/* MCE errata HSD131, HSM142, HSW131, BDM48, HSM142 and SKX37 */
- if ((c->x86 == 6) &&
- ((c->x86_model == INTEL_FAM6_HASWELL) ||
- (c->x86_model == INTEL_FAM6_HASWELL_L) ||
- (c->x86_model == INTEL_FAM6_BROADWELL) ||
- (c->x86_model == INTEL_FAM6_HASWELL_G) ||
- (c->x86_model == INTEL_FAM6_SKYLAKE_X)) &&
+ if ((c->x86_vfm == INTEL_HASWELL ||
+ c->x86_vfm == INTEL_HASWELL_L ||
+ c->x86_vfm == INTEL_BROADWELL ||
+ c->x86_vfm == INTEL_HASWELL_G ||
+ c->x86_vfm == INTEL_SKYLAKE_X) &&
(m->bank == 0) &&
((m->status & 0xa0000000ffffffff) == 0x80000000000f0005))
return true;
--
2.44.0
New CPU #defines encode vendor and family as well as model.
Signed-off-by: Tony Luck <[email protected]>
---
arch/x86/kernel/cpu/mce/severity.c | 9 +++++----
1 file changed, 5 insertions(+), 4 deletions(-)
diff --git a/arch/x86/kernel/cpu/mce/severity.c b/arch/x86/kernel/cpu/mce/severity.c
index ee85fe2ccf65..85f5de718725 100644
--- a/arch/x86/kernel/cpu/mce/severity.c
+++ b/arch/x86/kernel/cpu/mce/severity.c
@@ -12,6 +12,7 @@
#include <linux/uaccess.h>
#include <asm/mce.h>
+#include <asm/cpu_device_id.h>
#include <asm/intel-family.h>
#include <asm/traps.h>
#include <asm/insn.h>
@@ -45,14 +46,14 @@ static struct severity {
unsigned char context;
unsigned char excp;
unsigned char covered;
- unsigned char cpu_model;
+ unsigned int cpu_vfm;
unsigned char cpu_minstepping;
unsigned char bank_lo, bank_hi;
char *msg;
} severities[] = {
#define MCESEV(s, m, c...) { .sev = MCE_ ## s ## _SEVERITY, .msg = m, ## c }
#define BANK_RANGE(l, h) .bank_lo = l, .bank_hi = h
-#define MODEL_STEPPING(m, s) .cpu_model = m, .cpu_minstepping = s
+#define VFM_STEPPING(m, s) .cpu_vfm = m, .cpu_minstepping = s
#define KERNEL .context = IN_KERNEL
#define USER .context = IN_USER
#define KERNEL_RECOV .context = IN_KERNEL_RECOV
@@ -128,7 +129,7 @@ static struct severity {
MCESEV(
AO, "Uncorrected Patrol Scrub Error",
SER, MASK(MCI_STATUS_UC|MCI_ADDR|0xffffeff0, MCI_ADDR|0x001000c0),
- MODEL_STEPPING(INTEL_FAM6_SKYLAKE_X, 4), BANK_RANGE(13, 18)
+ VFM_STEPPING(INTEL_SKYLAKE_X, 4), BANK_RANGE(13, 18)
),
/* ignore OVER for UCNA */
@@ -397,7 +398,7 @@ static noinstr int mce_severity_intel(struct mce *m, struct pt_regs *regs, char
continue;
if (s->excp && excp != s->excp)
continue;
- if (s->cpu_model && boot_cpu_data.x86_model != s->cpu_model)
+ if (s->cpu_vfm && boot_cpu_data.x86_model != s->cpu_vfm)
continue;
if (s->cpu_minstepping && boot_cpu_data.x86_stepping < s->cpu_minstepping)
continue;
--
2.44.0
New CPU #defines encode vendor and family as well as model.
Signed-off-by: Tony Luck <[email protected]>
---
arch/x86/kernel/cpu/microcode/intel.c | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/arch/x86/kernel/cpu/microcode/intel.c b/arch/x86/kernel/cpu/microcode/intel.c
index 5f0414452b67..64809f3271b0 100644
--- a/arch/x86/kernel/cpu/microcode/intel.c
+++ b/arch/x86/kernel/cpu/microcode/intel.c
@@ -21,6 +21,7 @@
#include <linux/uio.h>
#include <linux/mm.h>
+#include <asm/cpu_device_id.h>
#include <asm/intel-family.h>
#include <asm/processor.h>
#include <asm/tlbflush.h>
@@ -577,8 +578,7 @@ static bool is_blacklisted(unsigned int cpu)
* This behavior is documented in item BDF90, #334165 (Intel Xeon
* Processor E7-8800/4800 v4 Product Family).
*/
- if (c->x86 == 6 &&
- c->x86_model == INTEL_FAM6_BROADWELL_X &&
+ if (c->x86_vfm == INTEL_BROADWELL_X &&
c->x86_stepping == 0x01 &&
llc_size_per_core > 2621440 &&
c->microcode < 0x0b000021) {
--
2.44.0
New CPU #defines encode vendor and family as well as model.
Signed-off-by: Tony Luck <[email protected]>
---
arch/x86/kernel/cpu/resctrl/core.c | 9 +++++----
1 file changed, 5 insertions(+), 4 deletions(-)
diff --git a/arch/x86/kernel/cpu/resctrl/core.c b/arch/x86/kernel/cpu/resctrl/core.c
index 83e40341583e..863fef5e55a4 100644
--- a/arch/x86/kernel/cpu/resctrl/core.c
+++ b/arch/x86/kernel/cpu/resctrl/core.c
@@ -22,6 +22,7 @@
#include <linux/cacheinfo.h>
#include <linux/cpuhotplug.h>
+#include <asm/cpu_device_id.h>
#include <asm/intel-family.h>
#include <asm/resctrl.h>
#include "internal.h"
@@ -821,18 +822,18 @@ static __init bool get_rdt_mon_resources(void)
static __init void __check_quirks_intel(void)
{
- switch (boot_cpu_data.x86_model) {
- case INTEL_FAM6_HASWELL_X:
+ switch (boot_cpu_data.x86_vfm) {
+ case INTEL_HASWELL_X:
if (!rdt_options[RDT_FLAG_L3_CAT].force_off)
cache_alloc_hsw_probe();
break;
- case INTEL_FAM6_SKYLAKE_X:
+ case INTEL_SKYLAKE_X:
if (boot_cpu_data.x86_stepping <= 4)
set_rdt_options("!cmt,!mbmtotal,!mbmlocal,!l3cat");
else
set_rdt_options("!l3cat");
fallthrough;
- case INTEL_FAM6_BROADWELL_X:
+ case INTEL_BROADWELL_X:
intel_rdt_mbm_apply_quirk();
break;
}
--
2.44.0
New CPU #defines encode vendor and family as well as model.
Signed-off-by: Tony Luck <[email protected]>
---
arch/x86/kernel/cpu/resctrl/pseudo_lock.c | 21 +++++++++++----------
1 file changed, 11 insertions(+), 10 deletions(-)
diff --git a/arch/x86/kernel/cpu/resctrl/pseudo_lock.c b/arch/x86/kernel/cpu/resctrl/pseudo_lock.c
index 884b88e25141..a068f0c3bc20 100644
--- a/arch/x86/kernel/cpu/resctrl/pseudo_lock.c
+++ b/arch/x86/kernel/cpu/resctrl/pseudo_lock.c
@@ -23,6 +23,7 @@
#include <linux/uaccess.h>
#include <asm/cacheflush.h>
+#include <asm/cpu_device_id.h>
#include <asm/intel-family.h>
#include <asm/resctrl.h>
#include <asm/perf_event.h>
@@ -88,8 +89,8 @@ static u64 get_prefetch_disable_bits(void)
boot_cpu_data.x86 != 6)
return 0;
- switch (boot_cpu_data.x86_model) {
- case INTEL_FAM6_BROADWELL_X:
+ switch (boot_cpu_data.x86_vfm) {
+ case INTEL_BROADWELL_X:
/*
* SDM defines bits of MSR_MISC_FEATURE_CONTROL register
* as:
@@ -100,8 +101,8 @@ static u64 get_prefetch_disable_bits(void)
* 63:4 Reserved
*/
return 0xF;
- case INTEL_FAM6_ATOM_GOLDMONT:
- case INTEL_FAM6_ATOM_GOLDMONT_PLUS:
+ case INTEL_ATOM_GOLDMONT:
+ case INTEL_ATOM_GOLDMONT_PLUS:
/*
* SDM defines bits of MSR_MISC_FEATURE_CONTROL register
* as:
@@ -1084,9 +1085,9 @@ static int measure_l2_residency(void *_plr)
* L2_HIT 02H
* L2_MISS 10H
*/
- switch (boot_cpu_data.x86_model) {
- case INTEL_FAM6_ATOM_GOLDMONT:
- case INTEL_FAM6_ATOM_GOLDMONT_PLUS:
+ switch (boot_cpu_data.x86_vfm) {
+ case INTEL_ATOM_GOLDMONT:
+ case INTEL_ATOM_GOLDMONT_PLUS:
perf_miss_attr.config = X86_CONFIG(.event = 0xd1,
.umask = 0x10);
perf_hit_attr.config = X86_CONFIG(.event = 0xd1,
@@ -1123,8 +1124,8 @@ static int measure_l3_residency(void *_plr)
* MISS 41H
*/
- switch (boot_cpu_data.x86_model) {
- case INTEL_FAM6_BROADWELL_X:
+ switch (boot_cpu_data.x86_vfm) {
+ case INTEL_BROADWELL_X:
/* On BDW the hit event counts references, not hits */
perf_hit_attr.config = X86_CONFIG(.event = 0x2e,
.umask = 0x4f);
@@ -1142,7 +1143,7 @@ static int measure_l3_residency(void *_plr)
*/
counts.miss_after -= counts.miss_before;
- if (boot_cpu_data.x86_model == INTEL_FAM6_BROADWELL_X) {
+ if (boot_cpu_data.x86_vfm == INTEL_BROADWELL_X) {
/*
* On BDW references and misses are counted, need to adjust.
* Sometimes the "hits" counter is a bit more than the
--
2.44.0
New CPU #defines encode vendor and family as well as model.
Signed-off-by: Tony Luck <[email protected]>
---
arch/x86/kernel/smpboot.c | 6 +++---
1 file changed, 3 insertions(+), 3 deletions(-)
diff --git a/arch/x86/kernel/smpboot.c b/arch/x86/kernel/smpboot.c
index a58109583c47..8dc83b16845b 100644
--- a/arch/x86/kernel/smpboot.c
+++ b/arch/x86/kernel/smpboot.c
@@ -438,9 +438,9 @@ static bool match_pkg(struct cpuinfo_x86 *c, struct cpuinfo_x86 *o)
*/
static const struct x86_cpu_id intel_cod_cpu[] = {
- X86_MATCH_INTEL_FAM6_MODEL(HASWELL_X, 0), /* COD */
- X86_MATCH_INTEL_FAM6_MODEL(BROADWELL_X, 0), /* COD */
- X86_MATCH_INTEL_FAM6_MODEL(ANY, 1), /* SNC */
+ X86_MATCH_VFM(INTEL_HASWELL_X, 0), /* COD */
+ X86_MATCH_VFM(INTEL_BROADWELL_X, 0), /* COD */
+ X86_MATCH_VFM(INTEL_ANY, 1), /* SNC */
{}
};
--
2.44.0
New CPU #defines encode vendor and family as well as model.
Signed-off-by: Tony Luck <[email protected]>
---
arch/x86/kernel/tsc.c | 5 +++--
1 file changed, 3 insertions(+), 2 deletions(-)
diff --git a/arch/x86/kernel/tsc.c b/arch/x86/kernel/tsc.c
index 0f7624ed1d1d..a0ad786b4aac 100644
--- a/arch/x86/kernel/tsc.c
+++ b/arch/x86/kernel/tsc.c
@@ -26,6 +26,7 @@
#include <asm/x86_init.h>
#include <asm/geode.h>
#include <asm/apic.h>
+#include <asm/cpu_device_id.h>
#include <asm/intel-family.h>
#include <asm/i8259.h>
#include <asm/uv/uv.h>
@@ -682,7 +683,7 @@ unsigned long native_calibrate_tsc(void)
* clock.
*/
if (crystal_khz == 0 &&
- boot_cpu_data.x86_model == INTEL_FAM6_ATOM_GOLDMONT_D)
+ boot_cpu_data.x86_vfm == INTEL_ATOM_GOLDMONT_D)
crystal_khz = 25000;
/*
@@ -713,7 +714,7 @@ unsigned long native_calibrate_tsc(void)
* For Atom SoCs TSC is the only reliable clocksource.
* Mark TSC reliable so no watchdog on it.
*/
- if (boot_cpu_data.x86_model == INTEL_FAM6_ATOM_GOLDMONT)
+ if (boot_cpu_data.x86_vfm == INTEL_ATOM_GOLDMONT)
setup_force_cpu_cap(X86_FEATURE_TSC_RELIABLE);
#ifdef CONFIG_X86_LOCAL_APIC
--
2.44.0
New CPU #defines encode vendor and family as well as model.
Signed-off-by: Tony Luck <[email protected]>
---
arch/x86/events/intel/uncore_nhmex.c | 3 ++-
1 file changed, 2 insertions(+), 1 deletion(-)
diff --git a/arch/x86/events/intel/uncore_nhmex.c b/arch/x86/events/intel/uncore_nhmex.c
index 92da8aaa5966..466833478e81 100644
--- a/arch/x86/events/intel/uncore_nhmex.c
+++ b/arch/x86/events/intel/uncore_nhmex.c
@@ -1,5 +1,6 @@
// SPDX-License-Identifier: GPL-2.0
/* Nehalem-EX/Westmere-EX uncore support */
+#include <asm/cpu_device_id.h>
#include "uncore.h"
/* NHM-EX event control */
@@ -1217,7 +1218,7 @@ static struct intel_uncore_type *nhmex_msr_uncores[] = {
void nhmex_uncore_cpu_init(void)
{
- if (boot_cpu_data.x86_model == 46)
+ if (boot_cpu_data.x86_vfm == INTEL_NEHALEM_EX)
uncore_nhmex = true;
else
nhmex_uncore_mbox.event_descs = wsmex_uncore_mbox_events;
--
2.44.0
New CPU #defines encode vendor and family as well as model.
Signed-off-by: Tony Luck <[email protected]>
---
arch/x86/kernel/tsc_msr.c | 14 +++++++-------
1 file changed, 7 insertions(+), 7 deletions(-)
diff --git a/arch/x86/kernel/tsc_msr.c b/arch/x86/kernel/tsc_msr.c
index 6555a857a1e6..deeb02825670 100644
--- a/arch/x86/kernel/tsc_msr.c
+++ b/arch/x86/kernel/tsc_msr.c
@@ -147,13 +147,13 @@ static const struct freq_desc freq_desc_lgm = {
};
static const struct x86_cpu_id tsc_msr_cpu_ids[] = {
- X86_MATCH_INTEL_FAM6_MODEL(ATOM_SALTWELL_MID, &freq_desc_pnw),
- X86_MATCH_INTEL_FAM6_MODEL(ATOM_SALTWELL_TABLET,&freq_desc_clv),
- X86_MATCH_INTEL_FAM6_MODEL(ATOM_SILVERMONT, &freq_desc_byt),
- X86_MATCH_INTEL_FAM6_MODEL(ATOM_SILVERMONT_MID, &freq_desc_tng),
- X86_MATCH_INTEL_FAM6_MODEL(ATOM_AIRMONT, &freq_desc_cht),
- X86_MATCH_INTEL_FAM6_MODEL(ATOM_AIRMONT_MID, &freq_desc_ann),
- X86_MATCH_INTEL_FAM6_MODEL(ATOM_AIRMONT_NP, &freq_desc_lgm),
+ X86_MATCH_VFM(INTEL_ATOM_SALTWELL_MID, &freq_desc_pnw),
+ X86_MATCH_VFM(INTEL_ATOM_SALTWELL_TABLET, &freq_desc_clv),
+ X86_MATCH_VFM(INTEL_ATOM_SILVERMONT, &freq_desc_byt),
+ X86_MATCH_VFM(INTEL_ATOM_SILVERMONT_MID, &freq_desc_tng),
+ X86_MATCH_VFM(INTEL_ATOM_AIRMONT, &freq_desc_cht),
+ X86_MATCH_VFM(INTEL_ATOM_AIRMONT_MID, &freq_desc_ann),
+ X86_MATCH_VFM(INTEL_ATOM_AIRMONT_NP, &freq_desc_lgm),
{}
};
--
2.44.0
New CPU #defines encode vendor and family as well as model.
Signed-off-by: Tony Luck <[email protected]>
---
arch/x86/kvm/pmu.c | 8 ++++----
1 file changed, 4 insertions(+), 4 deletions(-)
diff --git a/arch/x86/kvm/pmu.c b/arch/x86/kvm/pmu.c
index c397b28e3d1b..2faa67a4bfb6 100644
--- a/arch/x86/kvm/pmu.c
+++ b/arch/x86/kvm/pmu.c
@@ -34,16 +34,16 @@ EXPORT_SYMBOL_GPL(kvm_pmu_eventsel);
/* Precise Distribution of Instructions Retired (PDIR) */
static const struct x86_cpu_id vmx_pebs_pdir_cpu[] = {
- X86_MATCH_INTEL_FAM6_MODEL(ICELAKE_D, NULL),
- X86_MATCH_INTEL_FAM6_MODEL(ICELAKE_X, NULL),
+ X86_MATCH_VFM(INTEL_ICELAKE_D, NULL),
+ X86_MATCH_VFM(INTEL_ICELAKE_X, NULL),
/* Instruction-Accurate PDIR (PDIR++) */
- X86_MATCH_INTEL_FAM6_MODEL(SAPPHIRERAPIDS_X, NULL),
+ X86_MATCH_VFM(INTEL_SAPPHIRERAPIDS_X, NULL),
{}
};
/* Precise Distribution (PDist) */
static const struct x86_cpu_id vmx_pebs_pdist_cpu[] = {
- X86_MATCH_INTEL_FAM6_MODEL(SAPPHIRERAPIDS_X, NULL),
+ X86_MATCH_VFM(INTEL_SAPPHIRERAPIDS_X, NULL),
{}
};
--
2.44.0
New CPU #defines encode vendor and family as well as model.
Signed-off-by: Tony Luck <[email protected]>
---
arch/x86/kvm/vmx/vmx.c | 20 +++++++++-----------
1 file changed, 9 insertions(+), 11 deletions(-)
diff --git a/arch/x86/kvm/vmx/vmx.c b/arch/x86/kvm/vmx/vmx.c
index c37a89eda90f..2c747f2642c6 100644
--- a/arch/x86/kvm/vmx/vmx.c
+++ b/arch/x86/kvm/vmx/vmx.c
@@ -2518,17 +2518,15 @@ static bool cpu_has_sgx(void)
*/
static bool cpu_has_perf_global_ctrl_bug(void)
{
- if (boot_cpu_data.x86 == 0x6) {
- switch (boot_cpu_data.x86_model) {
- case INTEL_FAM6_NEHALEM_EP: /* AAK155 */
- case INTEL_FAM6_NEHALEM: /* AAP115 */
- case INTEL_FAM6_WESTMERE: /* AAT100 */
- case INTEL_FAM6_WESTMERE_EP: /* BC86,AAY89,BD102 */
- case INTEL_FAM6_NEHALEM_EX: /* BA97 */
- return true;
- default:
- break;
- }
+ switch (boot_cpu_data.x86_vfm) {
+ case INTEL_NEHALEM_EP: /* AAK155 */
+ case INTEL_NEHALEM: /* AAP115 */
+ case INTEL_WESTMERE: /* AAT100 */
+ case INTEL_WESTMERE_EP: /* BC86,AAY89,BD102 */
+ case INTEL_NEHALEM_EX: /* BA97 */
+ return true;
+ default:
+ break;
}
return false;
--
2.44.0
New CPU #defines encode vendor and family as well as model.
Signed-off-by: Tony Luck <[email protected]>
---
arch/x86/mm/init.c | 16 ++++++----------
1 file changed, 6 insertions(+), 10 deletions(-)
diff --git a/arch/x86/mm/init.c b/arch/x86/mm/init.c
index 679893ea5e68..fadc3fc3ee41 100644
--- a/arch/x86/mm/init.c
+++ b/arch/x86/mm/init.c
@@ -261,21 +261,17 @@ static void __init probe_page_size_mask(void)
}
}
-#define INTEL_MATCH(_model) { .vendor = X86_VENDOR_INTEL, \
- .family = 6, \
- .model = _model, \
- }
/*
* INVLPG may not properly flush Global entries
* on these CPUs when PCIDs are enabled.
*/
static const struct x86_cpu_id invlpg_miss_ids[] = {
- INTEL_MATCH(INTEL_FAM6_ALDERLAKE ),
- INTEL_MATCH(INTEL_FAM6_ALDERLAKE_L ),
- INTEL_MATCH(INTEL_FAM6_ATOM_GRACEMONT ),
- INTEL_MATCH(INTEL_FAM6_RAPTORLAKE ),
- INTEL_MATCH(INTEL_FAM6_RAPTORLAKE_P),
- INTEL_MATCH(INTEL_FAM6_RAPTORLAKE_S),
+ X86_MATCH_VFM(INTEL_ALDERLAKE, 0),
+ X86_MATCH_VFM(INTEL_ALDERLAKE_L, 0),
+ X86_MATCH_VFM(INTEL_ATOM_GRACEMONT, 0),
+ X86_MATCH_VFM(INTEL_RAPTORLAKE, 0),
+ X86_MATCH_VFM(INTEL_RAPTORLAKE_P, 0),
+ X86_MATCH_VFM(INTEL_RAPTORLAKE_S, 0),
{}
};
--
2.44.0
New CPU #defines encode vendor and family as well as model.
Signed-off-by: Tony Luck <[email protected]>
---
arch/x86/pci/intel_mid_pci.c | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/arch/x86/pci/intel_mid_pci.c b/arch/x86/pci/intel_mid_pci.c
index 8edd62206604..933ff795e53e 100644
--- a/arch/x86/pci/intel_mid_pci.c
+++ b/arch/x86/pci/intel_mid_pci.c
@@ -216,7 +216,7 @@ static int pci_write(struct pci_bus *bus, unsigned int devfn, int where,
}
static const struct x86_cpu_id intel_mid_cpu_ids[] = {
- X86_MATCH_INTEL_FAM6_MODEL(ATOM_SILVERMONT_MID, NULL),
+ X86_MATCH_VFM(INTEL_ATOM_SILVERMONT_MID, NULL),
{}
};
@@ -243,7 +243,7 @@ static int intel_mid_pci_irq_enable(struct pci_dev *dev)
model = id->model;
switch (model) {
- case INTEL_FAM6_ATOM_SILVERMONT_MID:
+ case VFM_MODEL(INTEL_ATOM_SILVERMONT_MID):
polarity_low = false;
/* Special treatment for IRQ0 */
--
2.44.0
New CPU #defines encode vendor and family as well as model.
Signed-off-by: Tony Luck <[email protected]>
---
arch/x86/virt/vmx/tdx/tdx.c | 7 ++++---
1 file changed, 4 insertions(+), 3 deletions(-)
diff --git a/arch/x86/virt/vmx/tdx/tdx.c b/arch/x86/virt/vmx/tdx/tdx.c
index 49a1c6890b55..3d22566c9b55 100644
--- a/arch/x86/virt/vmx/tdx/tdx.c
+++ b/arch/x86/virt/vmx/tdx/tdx.c
@@ -33,6 +33,7 @@
#include <asm/msr.h>
#include <asm/cpufeature.h>
#include <asm/tdx.h>
+#include <asm/cpu_device_id.h>
#include <asm/intel-family.h>
#include <asm/processor.h>
#include <asm/mce.h>
@@ -1426,9 +1427,9 @@ static void __init check_tdx_erratum(void)
* private memory poisons that memory, and a subsequent read of
* that memory triggers #MC.
*/
- switch (boot_cpu_data.x86_model) {
- case INTEL_FAM6_SAPPHIRERAPIDS_X:
- case INTEL_FAM6_EMERALDRAPIDS_X:
+ switch (boot_cpu_data.x86_vfm) {
+ case INTEL_SAPPHIRERAPIDS_X:
+ case INTEL_EMERALDRAPIDS_X:
setup_force_cpu_bug(X86_BUG_TDX_PW_MCE);
}
}
--
2.44.0
New CPU #defines encode vendor and family as well as model.
Signed-off-by: Tony Luck <[email protected]>
---
arch/x86/platform/atom/punit_atom_debug.c | 11 +++++------
1 file changed, 5 insertions(+), 6 deletions(-)
diff --git a/arch/x86/platform/atom/punit_atom_debug.c b/arch/x86/platform/atom/punit_atom_debug.c
index 6b9c6deca8ba..44c30ce6360a 100644
--- a/arch/x86/platform/atom/punit_atom_debug.c
+++ b/arch/x86/platform/atom/punit_atom_debug.c
@@ -165,14 +165,13 @@ static void punit_s2idle_check_register(struct punit_device *punit_device) {}
static void punit_s2idle_check_unregister(void) {}
#endif
-#define X86_MATCH(model, data) \
- X86_MATCH_VENDOR_FAM_MODEL_FEATURE(INTEL, 6, INTEL_FAM6_##model, \
- X86_FEATURE_MWAIT, data)
+#define X86_MATCH(vfm, data) \
+ X86_MATCH_VFM_FEATURE(vfm, X86_FEATURE_MWAIT, data)
static const struct x86_cpu_id intel_punit_cpu_ids[] = {
- X86_MATCH(ATOM_SILVERMONT, &punit_device_byt),
- X86_MATCH(ATOM_SILVERMONT_MID, &punit_device_tng),
- X86_MATCH(ATOM_AIRMONT, &punit_device_cht),
+ X86_MATCH(INTEL_ATOM_SILVERMONT, &punit_device_byt),
+ X86_MATCH(INTEL_ATOM_SILVERMONT_MID, &punit_device_tng),
+ X86_MATCH(INTEL_ATOM_AIRMONT, &punit_device_cht),
{}
};
MODULE_DEVICE_TABLE(x86cpu, intel_punit_cpu_ids);
--
2.44.0
New CPU #defines encode vendor and family as well as model.
Signed-off-by: Tony Luck <[email protected]>
---
arch/x86/platform/intel-mid/intel-mid.c | 7 ++++---
1 file changed, 4 insertions(+), 3 deletions(-)
diff --git a/arch/x86/platform/intel-mid/intel-mid.c b/arch/x86/platform/intel-mid/intel-mid.c
index 7be71c2cdc83..8b8173fb0a43 100644
--- a/arch/x86/platform/intel-mid/intel-mid.c
+++ b/arch/x86/platform/intel-mid/intel-mid.c
@@ -22,6 +22,7 @@
#include <asm/mpspec_def.h>
#include <asm/hw_irq.h>
#include <asm/apic.h>
+#include <asm/cpu_device_id.h>
#include <asm/io_apic.h>
#include <asm/intel-mid.h>
#include <asm/io.h>
@@ -55,9 +56,9 @@ static void __init intel_mid_time_init(void)
static void intel_mid_arch_setup(void)
{
- switch (boot_cpu_data.x86_model) {
- case 0x3C:
- case 0x4A:
+ switch (boot_cpu_data.x86_vfm) {
+ case INTEL_HASWELL:
+ case INTEL_ATOM_SILVERMONT_MID:
x86_platform.legacy.rtc = 1;
break;
default:
--
2.44.0
New CPU #defines encode vendor and family as well as model.
Signed-off-by: Tony Luck <[email protected]>
---
arch/x86/boot/cpucheck.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/arch/x86/boot/cpucheck.c b/arch/x86/boot/cpucheck.c
index fed8d13ce252..0aae4d4ed615 100644
--- a/arch/x86/boot/cpucheck.c
+++ b/arch/x86/boot/cpucheck.c
@@ -203,7 +203,7 @@ int check_knl_erratum(void)
*/
if (!is_intel() ||
cpu.family != 6 ||
- cpu.model != INTEL_FAM6_XEON_PHI_KNL)
+ cpu.model != 0x57 /*INTEL_XEON_PHI_KNL*/)
return 0;
/*
--
2.44.0
New CPU #defines encode vendor and family as well as model.
Update INTEL_CPU_DESC() to work with vendor/family/model.
Signed-off-by: Tony Luck <[email protected]>
---
arch/x86/include/asm/cpu_device_id.h | 8 ++--
arch/x86/events/intel/core.c | 64 ++++++++++++++--------------
2 files changed, 36 insertions(+), 36 deletions(-)
diff --git a/arch/x86/include/asm/cpu_device_id.h b/arch/x86/include/asm/cpu_device_id.h
index 833f230aeafc..71bda84c20c3 100644
--- a/arch/x86/include/asm/cpu_device_id.h
+++ b/arch/x86/include/asm/cpu_device_id.h
@@ -275,10 +275,10 @@ struct x86_cpu_desc {
u32 x86_microcode_rev;
};
-#define INTEL_CPU_DESC(model, stepping, revision) { \
- .x86_family = 6, \
- .x86_vendor = X86_VENDOR_INTEL, \
- .x86_model = (model), \
+#define INTEL_CPU_DESC(vfm, stepping, revision) { \
+ .x86_family = VFM_FAMILY(vfm), \
+ .x86_vendor = VFM_VENDOR(vfm), \
+ .x86_model = VFM_MODEL(vfm), \
.x86_stepping = (stepping), \
.x86_microcode_rev = (revision), \
}
diff --git a/arch/x86/events/intel/core.c b/arch/x86/events/intel/core.c
index 94206f8cd371..d3294ef18aef 100644
--- a/arch/x86/events/intel/core.c
+++ b/arch/x86/events/intel/core.c
@@ -5187,35 +5187,35 @@ static __init void intel_clovertown_quirk(void)
}
static const struct x86_cpu_desc isolation_ucodes[] = {
- INTEL_CPU_DESC(INTEL_FAM6_HASWELL, 3, 0x0000001f),
- INTEL_CPU_DESC(INTEL_FAM6_HASWELL_L, 1, 0x0000001e),
- INTEL_CPU_DESC(INTEL_FAM6_HASWELL_G, 1, 0x00000015),
- INTEL_CPU_DESC(INTEL_FAM6_HASWELL_X, 2, 0x00000037),
- INTEL_CPU_DESC(INTEL_FAM6_HASWELL_X, 4, 0x0000000a),
- INTEL_CPU_DESC(INTEL_FAM6_BROADWELL, 4, 0x00000023),
- INTEL_CPU_DESC(INTEL_FAM6_BROADWELL_G, 1, 0x00000014),
- INTEL_CPU_DESC(INTEL_FAM6_BROADWELL_D, 2, 0x00000010),
- INTEL_CPU_DESC(INTEL_FAM6_BROADWELL_D, 3, 0x07000009),
- INTEL_CPU_DESC(INTEL_FAM6_BROADWELL_D, 4, 0x0f000009),
- INTEL_CPU_DESC(INTEL_FAM6_BROADWELL_D, 5, 0x0e000002),
- INTEL_CPU_DESC(INTEL_FAM6_BROADWELL_X, 1, 0x0b000014),
- INTEL_CPU_DESC(INTEL_FAM6_SKYLAKE_X, 3, 0x00000021),
- INTEL_CPU_DESC(INTEL_FAM6_SKYLAKE_X, 4, 0x00000000),
- INTEL_CPU_DESC(INTEL_FAM6_SKYLAKE_X, 5, 0x00000000),
- INTEL_CPU_DESC(INTEL_FAM6_SKYLAKE_X, 6, 0x00000000),
- INTEL_CPU_DESC(INTEL_FAM6_SKYLAKE_X, 7, 0x00000000),
- INTEL_CPU_DESC(INTEL_FAM6_SKYLAKE_X, 11, 0x00000000),
- INTEL_CPU_DESC(INTEL_FAM6_SKYLAKE_L, 3, 0x0000007c),
- INTEL_CPU_DESC(INTEL_FAM6_SKYLAKE, 3, 0x0000007c),
- INTEL_CPU_DESC(INTEL_FAM6_KABYLAKE, 9, 0x0000004e),
- INTEL_CPU_DESC(INTEL_FAM6_KABYLAKE_L, 9, 0x0000004e),
- INTEL_CPU_DESC(INTEL_FAM6_KABYLAKE_L, 10, 0x0000004e),
- INTEL_CPU_DESC(INTEL_FAM6_KABYLAKE_L, 11, 0x0000004e),
- INTEL_CPU_DESC(INTEL_FAM6_KABYLAKE_L, 12, 0x0000004e),
- INTEL_CPU_DESC(INTEL_FAM6_KABYLAKE, 10, 0x0000004e),
- INTEL_CPU_DESC(INTEL_FAM6_KABYLAKE, 11, 0x0000004e),
- INTEL_CPU_DESC(INTEL_FAM6_KABYLAKE, 12, 0x0000004e),
- INTEL_CPU_DESC(INTEL_FAM6_KABYLAKE, 13, 0x0000004e),
+ INTEL_CPU_DESC(INTEL_HASWELL, 3, 0x0000001f),
+ INTEL_CPU_DESC(INTEL_HASWELL_L, 1, 0x0000001e),
+ INTEL_CPU_DESC(INTEL_HASWELL_G, 1, 0x00000015),
+ INTEL_CPU_DESC(INTEL_HASWELL_X, 2, 0x00000037),
+ INTEL_CPU_DESC(INTEL_HASWELL_X, 4, 0x0000000a),
+ INTEL_CPU_DESC(INTEL_BROADWELL, 4, 0x00000023),
+ INTEL_CPU_DESC(INTEL_BROADWELL_G, 1, 0x00000014),
+ INTEL_CPU_DESC(INTEL_BROADWELL_D, 2, 0x00000010),
+ INTEL_CPU_DESC(INTEL_BROADWELL_D, 3, 0x07000009),
+ INTEL_CPU_DESC(INTEL_BROADWELL_D, 4, 0x0f000009),
+ INTEL_CPU_DESC(INTEL_BROADWELL_D, 5, 0x0e000002),
+ INTEL_CPU_DESC(INTEL_BROADWELL_X, 1, 0x0b000014),
+ INTEL_CPU_DESC(INTEL_SKYLAKE_X, 3, 0x00000021),
+ INTEL_CPU_DESC(INTEL_SKYLAKE_X, 4, 0x00000000),
+ INTEL_CPU_DESC(INTEL_SKYLAKE_X, 5, 0x00000000),
+ INTEL_CPU_DESC(INTEL_SKYLAKE_X, 6, 0x00000000),
+ INTEL_CPU_DESC(INTEL_SKYLAKE_X, 7, 0x00000000),
+ INTEL_CPU_DESC(INTEL_SKYLAKE_X, 11, 0x00000000),
+ INTEL_CPU_DESC(INTEL_SKYLAKE_L, 3, 0x0000007c),
+ INTEL_CPU_DESC(INTEL_SKYLAKE, 3, 0x0000007c),
+ INTEL_CPU_DESC(INTEL_KABYLAKE, 9, 0x0000004e),
+ INTEL_CPU_DESC(INTEL_KABYLAKE_L, 9, 0x0000004e),
+ INTEL_CPU_DESC(INTEL_KABYLAKE_L, 10, 0x0000004e),
+ INTEL_CPU_DESC(INTEL_KABYLAKE_L, 11, 0x0000004e),
+ INTEL_CPU_DESC(INTEL_KABYLAKE_L, 12, 0x0000004e),
+ INTEL_CPU_DESC(INTEL_KABYLAKE, 10, 0x0000004e),
+ INTEL_CPU_DESC(INTEL_KABYLAKE, 11, 0x0000004e),
+ INTEL_CPU_DESC(INTEL_KABYLAKE, 12, 0x0000004e),
+ INTEL_CPU_DESC(INTEL_KABYLAKE, 13, 0x0000004e),
{}
};
@@ -5232,9 +5232,9 @@ static __init void intel_pebs_isolation_quirk(void)
}
static const struct x86_cpu_desc pebs_ucodes[] = {
- INTEL_CPU_DESC(INTEL_FAM6_SANDYBRIDGE, 7, 0x00000028),
- INTEL_CPU_DESC(INTEL_FAM6_SANDYBRIDGE_X, 6, 0x00000618),
- INTEL_CPU_DESC(INTEL_FAM6_SANDYBRIDGE_X, 7, 0x0000070c),
+ INTEL_CPU_DESC(INTEL_SANDYBRIDGE, 7, 0x00000028),
+ INTEL_CPU_DESC(INTEL_SANDYBRIDGE_X, 6, 0x00000618),
+ INTEL_CPU_DESC(INTEL_SANDYBRIDGE_X, 7, 0x0000070c),
{}
};
--
2.44.0
New CPU #defines encode vendor and family as well as model.
Signed-off-by: Tony Luck <[email protected]>
---
arch/x86/kernel/cpu/mce/core.c | 5 +++--
1 file changed, 3 insertions(+), 2 deletions(-)
diff --git a/arch/x86/kernel/cpu/mce/core.c b/arch/x86/kernel/cpu/mce/core.c
index 771a9f183260..fe9d141672ef 100644
--- a/arch/x86/kernel/cpu/mce/core.c
+++ b/arch/x86/kernel/cpu/mce/core.c
@@ -47,6 +47,7 @@
#include <linux/kexec.h>
#include <asm/fred.h>
+#include <asm/cpu_device_id.h>
#include <asm/intel-family.h>
#include <asm/processor.h>
#include <asm/traps.h>
@@ -1948,14 +1949,14 @@ static int __mcheck_cpu_apply_quirks(struct cpuinfo_x86 *c)
if (c->x86 == 6 && c->x86_model <= 13 && cfg->bootlog < 0)
cfg->bootlog = 0;
- if (c->x86 == 6 && c->x86_model == 45)
+ if (c->x86_vfm == INTEL_SANDYBRIDGE_X)
mce_flags.snb_ifu_quirk = 1;
/*
* Skylake, Cascacde Lake and Cooper Lake require a quirk on
* rep movs.
*/
- if (c->x86 == 6 && c->x86_model == INTEL_FAM6_SKYLAKE_X)
+ if (c->x86_vfm == INTEL_SKYLAKE_X)
mce_flags.skx_repmov_quirk = 1;
}
--
2.44.0
New CPU #defines encode vendor and family as well as model.
Signed-off-by: Tony Luck <[email protected]>
---
arch/x86/kernel/cpu/intel.c | 115 +++++++++++++++++++-----------------
1 file changed, 60 insertions(+), 55 deletions(-)
diff --git a/arch/x86/kernel/cpu/intel.c b/arch/x86/kernel/cpu/intel.c
index 3c3e7e5695ba..b85afd5d6128 100644
--- a/arch/x86/kernel/cpu/intel.c
+++ b/arch/x86/kernel/cpu/intel.c
@@ -72,19 +72,19 @@ static bool cpu_model_supports_sld __ro_after_init;
*/
static void check_memory_type_self_snoop_errata(struct cpuinfo_x86 *c)
{
- switch (c->x86_model) {
- case INTEL_FAM6_CORE_YONAH:
- case INTEL_FAM6_CORE2_MEROM:
- case INTEL_FAM6_CORE2_MEROM_L:
- case INTEL_FAM6_CORE2_PENRYN:
- case INTEL_FAM6_CORE2_DUNNINGTON:
- case INTEL_FAM6_NEHALEM:
- case INTEL_FAM6_NEHALEM_G:
- case INTEL_FAM6_NEHALEM_EP:
- case INTEL_FAM6_NEHALEM_EX:
- case INTEL_FAM6_WESTMERE:
- case INTEL_FAM6_WESTMERE_EP:
- case INTEL_FAM6_SANDYBRIDGE:
+ switch (c->x86_vfm) {
+ case INTEL_CORE_YONAH:
+ case INTEL_CORE2_MEROM:
+ case INTEL_CORE2_MEROM_L:
+ case INTEL_CORE2_PENRYN:
+ case INTEL_CORE2_DUNNINGTON:
+ case INTEL_NEHALEM:
+ case INTEL_NEHALEM_G:
+ case INTEL_NEHALEM_EP:
+ case INTEL_NEHALEM_EX:
+ case INTEL_WESTMERE:
+ case INTEL_WESTMERE_EP:
+ case INTEL_SANDYBRIDGE:
setup_clear_cpu_cap(X86_FEATURE_SELFSNOOP);
}
}
@@ -106,9 +106,9 @@ static void probe_xeon_phi_r3mwait(struct cpuinfo_x86 *c)
*/
if (c->x86 != 6)
return;
- switch (c->x86_model) {
- case INTEL_FAM6_XEON_PHI_KNL:
- case INTEL_FAM6_XEON_PHI_KNM:
+ switch (c->x86_vfm) {
+ case INTEL_XEON_PHI_KNL:
+ case INTEL_XEON_PHI_KNM:
break;
default:
return;
@@ -134,34 +134,41 @@ static void probe_xeon_phi_r3mwait(struct cpuinfo_x86 *c)
* - Release note from 20180108 microcode release
*/
struct sku_microcode {
- u8 model;
+ u32 vfm;
u8 stepping;
u32 microcode;
};
static const struct sku_microcode spectre_bad_microcodes[] = {
- { INTEL_FAM6_KABYLAKE, 0x0B, 0x80 },
- { INTEL_FAM6_KABYLAKE, 0x0A, 0x80 },
- { INTEL_FAM6_KABYLAKE, 0x09, 0x80 },
- { INTEL_FAM6_KABYLAKE_L, 0x0A, 0x80 },
- { INTEL_FAM6_KABYLAKE_L, 0x09, 0x80 },
- { INTEL_FAM6_SKYLAKE_X, 0x03, 0x0100013e },
- { INTEL_FAM6_SKYLAKE_X, 0x04, 0x0200003c },
- { INTEL_FAM6_BROADWELL, 0x04, 0x28 },
- { INTEL_FAM6_BROADWELL_G, 0x01, 0x1b },
- { INTEL_FAM6_BROADWELL_D, 0x02, 0x14 },
- { INTEL_FAM6_BROADWELL_D, 0x03, 0x07000011 },
- { INTEL_FAM6_BROADWELL_X, 0x01, 0x0b000025 },
- { INTEL_FAM6_HASWELL_L, 0x01, 0x21 },
- { INTEL_FAM6_HASWELL_G, 0x01, 0x18 },
- { INTEL_FAM6_HASWELL, 0x03, 0x23 },
- { INTEL_FAM6_HASWELL_X, 0x02, 0x3b },
- { INTEL_FAM6_HASWELL_X, 0x04, 0x10 },
- { INTEL_FAM6_IVYBRIDGE_X, 0x04, 0x42a },
+ { INTEL_KABYLAKE, 0x0B, 0x80 },
+ { INTEL_KABYLAKE, 0x0A, 0x80 },
+ { INTEL_KABYLAKE, 0x09, 0x80 },
+ { INTEL_KABYLAKE_L, 0x0A, 0x80 },
+ { INTEL_KABYLAKE_L, 0x09, 0x80 },
+ { INTEL_SKYLAKE_X, 0x03, 0x0100013e },
+ { INTEL_SKYLAKE_X, 0x04, 0x0200003c },
+ { INTEL_BROADWELL, 0x04, 0x28 },
+ { INTEL_BROADWELL_G, 0x01, 0x1b },
+ { INTEL_BROADWELL_D, 0x02, 0x14 },
+ { INTEL_BROADWELL_D, 0x03, 0x07000011 },
+ { INTEL_BROADWELL_X, 0x01, 0x0b000025 },
+ { INTEL_HASWELL_L, 0x01, 0x21 },
+ { INTEL_HASWELL_G, 0x01, 0x18 },
+ { INTEL_HASWELL, 0x03, 0x23 },
+ { INTEL_HASWELL_X, 0x02, 0x3b },
+ { INTEL_HASWELL_X, 0x04, 0x10 },
+ { INTEL_IVYBRIDGE_X, 0x04, 0x42a },
/* Observed in the wild */
- { INTEL_FAM6_SANDYBRIDGE_X, 0x06, 0x61b },
- { INTEL_FAM6_SANDYBRIDGE_X, 0x07, 0x712 },
+ { INTEL_SANDYBRIDGE_X, 0x06, 0x61b },
+ { INTEL_SANDYBRIDGE_X, 0x07, 0x712 },
};
+static bool vfm_match(struct cpuinfo_x86 *c, u32 vfm)
+{
+ return c->x86_vendor == VFM_VENDOR(vfm) &&
+ c->x86 == VFM_FAMILY(vfm) &&
+ c->x86_model == VFM_MODEL(vfm);
+}
+
static bool bad_spectre_microcode(struct cpuinfo_x86 *c)
{
int i;
@@ -173,11 +180,8 @@ static bool bad_spectre_microcode(struct cpuinfo_x86 *c)
if (cpu_has(c, X86_FEATURE_HYPERVISOR))
return false;
- if (c->x86 != 6)
- return false;
-
for (i = 0; i < ARRAY_SIZE(spectre_bad_microcodes); i++) {
- if (c->x86_model == spectre_bad_microcodes[i].model &&
+ if (vfm_match(c, spectre_bad_microcodes[i].vfm) &&
c->x86_stepping == spectre_bad_microcodes[i].stepping)
return (c->microcode <= spectre_bad_microcodes[i].microcode);
}
@@ -313,7 +317,7 @@ static void early_init_intel(struct cpuinfo_x86 *c)
* need the microcode to have already been loaded... so if it is
* not, recommend a BIOS update and disable large pages.
*/
- if (c->x86 == 6 && c->x86_model == 0x1c && c->x86_stepping <= 2 &&
+ if (c->x86_vfm == INTEL_ATOM_BONNELL && c->x86_stepping <= 2 &&
c->microcode < 0x20e) {
pr_warn("Atom PSE erratum detected, BIOS microcode update recommended\n");
clear_cpu_cap(c, X86_FEATURE_PSE);
@@ -346,11 +350,11 @@ static void early_init_intel(struct cpuinfo_x86 *c)
/* Penwell and Cloverview have the TSC which doesn't sleep on S3 */
if (c->x86 == 6) {
- switch (c->x86_model) {
- case INTEL_FAM6_ATOM_SALTWELL_MID:
- case INTEL_FAM6_ATOM_SALTWELL_TABLET:
- case INTEL_FAM6_ATOM_SILVERMONT_MID:
- case INTEL_FAM6_ATOM_AIRMONT_NP:
+ switch (c->x86_vfm) {
+ case INTEL_ATOM_SALTWELL_MID:
+ case INTEL_ATOM_SALTWELL_TABLET:
+ case INTEL_ATOM_SILVERMONT_MID:
+ case INTEL_ATOM_AIRMONT_NP:
set_cpu_cap(c, X86_FEATURE_NONSTOP_TSC_S3);
break;
default:
@@ -394,7 +398,7 @@ static void early_init_intel(struct cpuinfo_x86 *c)
* should be false so that __flush_tlb_all() causes CR3 instead of CR4.PGE
* to be modified.
*/
- if (c->x86 == 5 && c->x86_model == 9) {
+ if (c->x86_vfm == INTEL_QUARK_X1000) {
pr_info("Disabling PGE capability bit\n");
setup_clear_cpu_cap(X86_FEATURE_PGE);
}
@@ -626,12 +630,13 @@ static void init_intel(struct cpuinfo_x86 *c)
set_cpu_cap(c, X86_FEATURE_PEBS);
}
- if (c->x86 == 6 && boot_cpu_has(X86_FEATURE_CLFLUSH) &&
- (c->x86_model == 29 || c->x86_model == 46 || c->x86_model == 47))
+ if (boot_cpu_has(X86_FEATURE_CLFLUSH) &&
+ (c->x86_vfm == INTEL_CORE2_DUNNINGTON ||
+ c->x86_vfm == INTEL_NEHALEM_EX ||
+ c->x86_vfm == INTEL_WESTMERE_EX))
set_cpu_bug(c, X86_BUG_CLFLUSH_MONITOR);
- if (c->x86 == 6 && boot_cpu_has(X86_FEATURE_MWAIT) &&
- ((c->x86_model == INTEL_FAM6_ATOM_GOLDMONT)))
+ if (boot_cpu_has(X86_FEATURE_MWAIT) && c->x86_vfm == INTEL_ATOM_GOLDMONT)
set_cpu_bug(c, X86_BUG_MONITOR);
#ifdef CONFIG_X86_64
@@ -1247,9 +1252,9 @@ void handle_bus_lock(struct pt_regs *regs)
* feature even though they do not enumerate IA32_CORE_CAPABILITIES.
*/
static const struct x86_cpu_id split_lock_cpu_ids[] __initconst = {
- X86_MATCH_INTEL_FAM6_MODEL(ICELAKE_X, 0),
- X86_MATCH_INTEL_FAM6_MODEL(ICELAKE_L, 0),
- X86_MATCH_INTEL_FAM6_MODEL(ICELAKE_D, 0),
+ X86_MATCH_VFM(INTEL_ICELAKE_X, 0),
+ X86_MATCH_VFM(INTEL_ICELAKE_L, 0),
+ X86_MATCH_VFM(INTEL_ICELAKE_D, 0),
{}
};
--
2.44.0
New CPU #defines encode vendor and family as well as model.
Signed-off-by: Tony Luck <[email protected]>
---
drivers/acpi/x86/utils.c | 42 ++++++++++++++++++++--------------------
1 file changed, 21 insertions(+), 21 deletions(-)
diff --git a/drivers/acpi/x86/utils.c b/drivers/acpi/x86/utils.c
index 90c3d2eab9e9..2d8203f7bd98 100644
--- a/drivers/acpi/x86/utils.c
+++ b/drivers/acpi/x86/utils.c
@@ -45,37 +45,37 @@ struct override_status_id {
unsigned long long status;
};
-#define ENTRY(status, hid, uid, path, cpu_model, dmi...) { \
+#define ENTRY(status, hid, uid, path, cpu_vfm, dmi...) { \
{ { hid, }, {} }, \
- { X86_MATCH_INTEL_FAM6_MODEL(cpu_model, NULL), {} }, \
+ { X86_MATCH_VFM(cpu_vfm, NULL), {} }, \
{ { .matches = dmi }, {} }, \
uid, \
path, \
status, \
}
-#define PRESENT_ENTRY_HID(hid, uid, cpu_model, dmi...) \
- ENTRY(ACPI_STA_DEFAULT, hid, uid, NULL, cpu_model, dmi)
+#define PRESENT_ENTRY_HID(hid, uid, cpu_vfm, dmi...) \
+ ENTRY(ACPI_STA_DEFAULT, hid, uid, NULL, cpu_vfm, dmi)
-#define NOT_PRESENT_ENTRY_HID(hid, uid, cpu_model, dmi...) \
- ENTRY(0, hid, uid, NULL, cpu_model, dmi)
+#define NOT_PRESENT_ENTRY_HID(hid, uid, cpu_vfm, dmi...) \
+ ENTRY(0, hid, uid, NULL, cpu_vfm, dmi)
-#define PRESENT_ENTRY_PATH(path, cpu_model, dmi...) \
- ENTRY(ACPI_STA_DEFAULT, "", NULL, path, cpu_model, dmi)
+#define PRESENT_ENTRY_PATH(path, cpu_vfm, dmi...) \
+ ENTRY(ACPI_STA_DEFAULT, "", NULL, path, cpu_vfm, dmi)
-#define NOT_PRESENT_ENTRY_PATH(path, cpu_model, dmi...) \
- ENTRY(0, "", NULL, path, cpu_model, dmi)
+#define NOT_PRESENT_ENTRY_PATH(path, cpu_vfm, dmi...) \
+ ENTRY(0, "", NULL, path, cpu_vfm, dmi)
static const struct override_status_id override_status_ids[] = {
/*
* Bay / Cherry Trail PWM directly poked by GPU driver in win10,
* but Linux uses a separate PWM driver, harmless if not used.
*/
- PRESENT_ENTRY_HID("80860F09", "1", ATOM_SILVERMONT, {}),
- PRESENT_ENTRY_HID("80862288", "1", ATOM_AIRMONT, {}),
+ PRESENT_ENTRY_HID("80860F09", "1", INTEL_ATOM_SILVERMONT, {}),
+ PRESENT_ENTRY_HID("80862288", "1", INTEL_ATOM_AIRMONT, {}),
/* The Xiaomi Mi Pad 2 uses PWM2 for touchkeys backlight control */
- PRESENT_ENTRY_HID("80862289", "2", ATOM_AIRMONT, {
+ PRESENT_ENTRY_HID("80862289", "2", INTEL_ATOM_AIRMONT, {
DMI_MATCH(DMI_SYS_VENDOR, "Xiaomi Inc"),
DMI_MATCH(DMI_PRODUCT_NAME, "Mipad2"),
}),
@@ -84,18 +84,18 @@ static const struct override_status_id override_status_ids[] = {
* The INT0002 device is necessary to clear wakeup interrupt sources
* on Cherry Trail devices, without it we get nobody cared IRQ msgs.
*/
- PRESENT_ENTRY_HID("INT0002", "1", ATOM_AIRMONT, {}),
+ PRESENT_ENTRY_HID("INT0002", "1", INTEL_ATOM_AIRMONT, {}),
/*
* On the Dell Venue 11 Pro 7130 and 7139, the DSDT hides
* the touchscreen ACPI device until a certain time
* after _SB.PCI0.GFX0.LCD.LCD1._ON gets called has passed
* *and* _STA has been called at least 3 times since.
*/
- PRESENT_ENTRY_HID("SYNA7500", "1", HASWELL_L, {
+ PRESENT_ENTRY_HID("SYNA7500", "1", INTEL_HASWELL_L, {
DMI_MATCH(DMI_SYS_VENDOR, "Dell Inc."),
DMI_MATCH(DMI_PRODUCT_NAME, "Venue 11 Pro 7130"),
}),
- PRESENT_ENTRY_HID("SYNA7500", "1", HASWELL_L, {
+ PRESENT_ENTRY_HID("SYNA7500", "1", INTEL_HASWELL_L, {
DMI_MATCH(DMI_SYS_VENDOR, "Dell Inc."),
DMI_MATCH(DMI_PRODUCT_NAME, "Venue 11 Pro 7139"),
}),
@@ -112,19 +112,19 @@ static const struct override_status_id override_status_ids[] = {
* was copy-pasted from the GPD win, so it has a disabled KIOX000A
* node which we should not enable, thus we also check the BIOS date.
*/
- PRESENT_ENTRY_HID("KIOX000A", "1", ATOM_AIRMONT, {
+ PRESENT_ENTRY_HID("KIOX000A", "1", INTEL_ATOM_AIRMONT, {
DMI_MATCH(DMI_BOARD_VENDOR, "AMI Corporation"),
DMI_MATCH(DMI_BOARD_NAME, "Default string"),
DMI_MATCH(DMI_PRODUCT_NAME, "Default string"),
DMI_MATCH(DMI_BIOS_DATE, "02/21/2017")
}),
- PRESENT_ENTRY_HID("KIOX000A", "1", ATOM_AIRMONT, {
+ PRESENT_ENTRY_HID("KIOX000A", "1", INTEL_ATOM_AIRMONT, {
DMI_MATCH(DMI_BOARD_VENDOR, "AMI Corporation"),
DMI_MATCH(DMI_BOARD_NAME, "Default string"),
DMI_MATCH(DMI_PRODUCT_NAME, "Default string"),
DMI_MATCH(DMI_BIOS_DATE, "03/20/2017")
}),
- PRESENT_ENTRY_HID("KIOX000A", "1", ATOM_AIRMONT, {
+ PRESENT_ENTRY_HID("KIOX000A", "1", INTEL_ATOM_AIRMONT, {
DMI_MATCH(DMI_BOARD_VENDOR, "AMI Corporation"),
DMI_MATCH(DMI_BOARD_NAME, "Default string"),
DMI_MATCH(DMI_PRODUCT_NAME, "Default string"),
@@ -137,7 +137,7 @@ static const struct override_status_id override_status_ids[] = {
* method sets a GPIO causing the PCI wifi card to turn off.
* See above remark about uniqueness of the DMI match.
*/
- NOT_PRESENT_ENTRY_PATH("\\_SB_.PCI0.SDHB.BRC1", ATOM_AIRMONT, {
+ NOT_PRESENT_ENTRY_PATH("\\_SB_.PCI0.SDHB.BRC1", INTEL_ATOM_AIRMONT, {
DMI_EXACT_MATCH(DMI_BOARD_VENDOR, "AMI Corporation"),
DMI_EXACT_MATCH(DMI_BOARD_NAME, "Default string"),
DMI_EXACT_MATCH(DMI_BOARD_SERIAL, "Default string"),
@@ -149,7 +149,7 @@ static const struct override_status_id override_status_ids[] = {
* as both ACCL0001 and MAGN0001. As we can only ever register an
* i2c client for one of them, ignore MAGN0001.
*/
- NOT_PRESENT_ENTRY_HID("MAGN0001", "1", ATOM_SILVERMONT, {
+ NOT_PRESENT_ENTRY_HID("MAGN0001", "1", INTEL_ATOM_SILVERMONT, {
DMI_MATCH(DMI_SYS_VENDOR, "LENOVO"),
DMI_MATCH(DMI_PRODUCT_FAMILY, "YOGATablet2"),
}),
--
2.44.0
New CPU #defines encode vendor and family as well as model.
Signed-off-by: Tony Luck <[email protected]>
---
drivers/char/tpm/tpm.h | 1 +
drivers/char/tpm/tpm_tis_core.h | 2 +-
2 files changed, 2 insertions(+), 1 deletion(-)
diff --git a/drivers/char/tpm/tpm.h b/drivers/char/tpm/tpm.h
index 61445f1dc46d..895f2dba266c 100644
--- a/drivers/char/tpm/tpm.h
+++ b/drivers/char/tpm/tpm.h
@@ -28,6 +28,7 @@
#include <linux/tpm_eventlog.h>
#ifdef CONFIG_X86
+#include <asm/cpu_device_id.h>
#include <asm/intel-family.h>
#endif
diff --git a/drivers/char/tpm/tpm_tis_core.h b/drivers/char/tpm/tpm_tis_core.h
index 13e99cf65efe..c940fd18988e 100644
--- a/drivers/char/tpm/tpm_tis_core.h
+++ b/drivers/char/tpm/tpm_tis_core.h
@@ -210,7 +210,7 @@ static inline int tpm_tis_verify_crc(struct tpm_tis_data *data, size_t len,
static inline bool is_bsw(void)
{
#ifdef CONFIG_X86
- return ((boot_cpu_data.x86_model == INTEL_FAM6_ATOM_AIRMONT) ? 1 : 0);
+ return ((boot_cpu_data.x86_vfm == INTEL_ATOM_AIRMONT) ? 1 : 0);
#else
return false;
#endif
--
2.44.0
New CPU #defines encode vendor and family as well as model.
Signed-off-by: Tony Luck <[email protected]>
---
drivers/cpufreq/intel_pstate.c | 90 +++++++++++++++++-----------------
1 file changed, 44 insertions(+), 46 deletions(-)
diff --git a/drivers/cpufreq/intel_pstate.c b/drivers/cpufreq/intel_pstate.c
index dbbf299f4219..685ec80e0af5 100644
--- a/drivers/cpufreq/intel_pstate.c
+++ b/drivers/cpufreq/intel_pstate.c
@@ -2402,52 +2402,51 @@ static const struct pstate_funcs knl_funcs = {
.get_val = core_get_val,
};
-#define X86_MATCH(model, policy) \
- X86_MATCH_VENDOR_FAM_MODEL_FEATURE(INTEL, 6, INTEL_FAM6_##model, \
- X86_FEATURE_APERFMPERF, &policy)
+#define X86_MATCH(vfm, policy) \
+ X86_MATCH_VFM_FEATURE(vfm, X86_FEATURE_APERFMPERF, &policy)
static const struct x86_cpu_id intel_pstate_cpu_ids[] = {
- X86_MATCH(SANDYBRIDGE, core_funcs),
- X86_MATCH(SANDYBRIDGE_X, core_funcs),
- X86_MATCH(ATOM_SILVERMONT, silvermont_funcs),
- X86_MATCH(IVYBRIDGE, core_funcs),
- X86_MATCH(HASWELL, core_funcs),
- X86_MATCH(BROADWELL, core_funcs),
- X86_MATCH(IVYBRIDGE_X, core_funcs),
- X86_MATCH(HASWELL_X, core_funcs),
- X86_MATCH(HASWELL_L, core_funcs),
- X86_MATCH(HASWELL_G, core_funcs),
- X86_MATCH(BROADWELL_G, core_funcs),
- X86_MATCH(ATOM_AIRMONT, airmont_funcs),
- X86_MATCH(SKYLAKE_L, core_funcs),
- X86_MATCH(BROADWELL_X, core_funcs),
- X86_MATCH(SKYLAKE, core_funcs),
- X86_MATCH(BROADWELL_D, core_funcs),
- X86_MATCH(XEON_PHI_KNL, knl_funcs),
- X86_MATCH(XEON_PHI_KNM, knl_funcs),
- X86_MATCH(ATOM_GOLDMONT, core_funcs),
- X86_MATCH(ATOM_GOLDMONT_PLUS, core_funcs),
- X86_MATCH(SKYLAKE_X, core_funcs),
- X86_MATCH(COMETLAKE, core_funcs),
- X86_MATCH(ICELAKE_X, core_funcs),
- X86_MATCH(TIGERLAKE, core_funcs),
- X86_MATCH(SAPPHIRERAPIDS_X, core_funcs),
- X86_MATCH(EMERALDRAPIDS_X, core_funcs),
+ X86_MATCH(INTEL_SANDYBRIDGE, core_funcs),
+ X86_MATCH(INTEL_SANDYBRIDGE_X, core_funcs),
+ X86_MATCH(INTEL_ATOM_SILVERMONT, silvermont_funcs),
+ X86_MATCH(INTEL_IVYBRIDGE, core_funcs),
+ X86_MATCH(INTEL_HASWELL, core_funcs),
+ X86_MATCH(INTEL_BROADWELL, core_funcs),
+ X86_MATCH(INTEL_IVYBRIDGE_X, core_funcs),
+ X86_MATCH(INTEL_HASWELL_X, core_funcs),
+ X86_MATCH(INTEL_HASWELL_L, core_funcs),
+ X86_MATCH(INTEL_HASWELL_G, core_funcs),
+ X86_MATCH(INTEL_BROADWELL_G, core_funcs),
+ X86_MATCH(INTEL_ATOM_AIRMONT, airmont_funcs),
+ X86_MATCH(INTEL_SKYLAKE_L, core_funcs),
+ X86_MATCH(INTEL_BROADWELL_X, core_funcs),
+ X86_MATCH(INTEL_SKYLAKE, core_funcs),
+ X86_MATCH(INTEL_BROADWELL_D, core_funcs),
+ X86_MATCH(INTEL_XEON_PHI_KNL, knl_funcs),
+ X86_MATCH(INTEL_XEON_PHI_KNM, knl_funcs),
+ X86_MATCH(INTEL_ATOM_GOLDMONT, core_funcs),
+ X86_MATCH(INTEL_ATOM_GOLDMONT_PLUS, core_funcs),
+ X86_MATCH(INTEL_SKYLAKE_X, core_funcs),
+ X86_MATCH(INTEL_COMETLAKE, core_funcs),
+ X86_MATCH(INTEL_ICELAKE_X, core_funcs),
+ X86_MATCH(INTEL_TIGERLAKE, core_funcs),
+ X86_MATCH(INTEL_SAPPHIRERAPIDS_X, core_funcs),
+ X86_MATCH(INTEL_EMERALDRAPIDS_X, core_funcs),
{}
};
MODULE_DEVICE_TABLE(x86cpu, intel_pstate_cpu_ids);
static const struct x86_cpu_id intel_pstate_cpu_oob_ids[] __initconst = {
- X86_MATCH(BROADWELL_D, core_funcs),
- X86_MATCH(BROADWELL_X, core_funcs),
- X86_MATCH(SKYLAKE_X, core_funcs),
- X86_MATCH(ICELAKE_X, core_funcs),
- X86_MATCH(SAPPHIRERAPIDS_X, core_funcs),
+ X86_MATCH(INTEL_BROADWELL_D, core_funcs),
+ X86_MATCH(INTEL_BROADWELL_X, core_funcs),
+ X86_MATCH(INTEL_SKYLAKE_X, core_funcs),
+ X86_MATCH(INTEL_ICELAKE_X, core_funcs),
+ X86_MATCH(INTEL_SAPPHIRERAPIDS_X, core_funcs),
{}
};
static const struct x86_cpu_id intel_pstate_cpu_ee_disable_ids[] = {
- X86_MATCH(KABYLAKE, core_funcs),
+ X86_MATCH(INTEL_KABYLAKE, core_funcs),
{}
};
@@ -3386,14 +3385,13 @@ static inline void intel_pstate_request_control_from_smm(void) {}
#define INTEL_PSTATE_HWP_BROADWELL 0x01
-#define X86_MATCH_HWP(model, hwp_mode) \
- X86_MATCH_VENDOR_FAM_MODEL_FEATURE(INTEL, 6, INTEL_FAM6_##model, \
- X86_FEATURE_HWP, hwp_mode)
+#define X86_MATCH_HWP(vfm, hwp_mode) \
+ X86_MATCH_VFM_FEATURE(vfm, X86_FEATURE_HWP, hwp_mode)
static const struct x86_cpu_id hwp_support_ids[] __initconst = {
- X86_MATCH_HWP(BROADWELL_X, INTEL_PSTATE_HWP_BROADWELL),
- X86_MATCH_HWP(BROADWELL_D, INTEL_PSTATE_HWP_BROADWELL),
- X86_MATCH_HWP(ANY, 0),
+ X86_MATCH_HWP(INTEL_BROADWELL_X, INTEL_PSTATE_HWP_BROADWELL),
+ X86_MATCH_HWP(INTEL_BROADWELL_D, INTEL_PSTATE_HWP_BROADWELL),
+ X86_MATCH_HWP(INTEL_ANY, 0),
{}
};
@@ -3426,15 +3424,15 @@ static const struct x86_cpu_id intel_epp_default[] = {
* which can result in one core turbo frequency for
* AlderLake Mobile CPUs.
*/
- X86_MATCH_INTEL_FAM6_MODEL(ALDERLAKE_L, HWP_SET_DEF_BALANCE_PERF_EPP(102)),
- X86_MATCH_INTEL_FAM6_MODEL(SAPPHIRERAPIDS_X, HWP_SET_DEF_BALANCE_PERF_EPP(32)),
- X86_MATCH_INTEL_FAM6_MODEL(METEORLAKE_L, HWP_SET_EPP_VALUES(HWP_EPP_POWERSAVE,
- HWP_EPP_BALANCE_POWERSAVE, 115, 16)),
+ X86_MATCH_VFM(INTEL_ALDERLAKE_L, HWP_SET_DEF_BALANCE_PERF_EPP(102)),
+ X86_MATCH_VFM(INTEL_SAPPHIRERAPIDS_X, HWP_SET_DEF_BALANCE_PERF_EPP(32)),
+ X86_MATCH_VFM(INTEL_METEORLAKE_L, HWP_SET_EPP_VALUES(HWP_EPP_POWERSAVE,
+ HWP_EPP_BALANCE_POWERSAVE, 115, 16)),
{}
};
static const struct x86_cpu_id intel_hybrid_scaling_factor[] = {
- X86_MATCH_INTEL_FAM6_MODEL(METEORLAKE_L, HYBRID_SCALING_FACTOR_MTL),
+ X86_MATCH_VFM(INTEL_METEORLAKE_L, HYBRID_SCALING_FACTOR_MTL),
{}
};
--
2.44.0
New CPU #defines encode vendor and family as well as model.
Signed-off-by: Tony Luck <[email protected]>
---
drivers/edac/i10nm_base.c | 20 ++++++++++----------
1 file changed, 10 insertions(+), 10 deletions(-)
diff --git a/drivers/edac/i10nm_base.c b/drivers/edac/i10nm_base.c
index 3fd22a1eb1a9..24dd896d9a9d 100644
--- a/drivers/edac/i10nm_base.c
+++ b/drivers/edac/i10nm_base.c
@@ -942,16 +942,16 @@ static struct res_config gnr_cfg = {
};
static const struct x86_cpu_id i10nm_cpuids[] = {
- X86_MATCH_INTEL_FAM6_MODEL_STEPPINGS(ATOM_TREMONT_D, X86_STEPPINGS(0x0, 0x3), &i10nm_cfg0),
- X86_MATCH_INTEL_FAM6_MODEL_STEPPINGS(ATOM_TREMONT_D, X86_STEPPINGS(0x4, 0xf), &i10nm_cfg1),
- X86_MATCH_INTEL_FAM6_MODEL_STEPPINGS(ICELAKE_X, X86_STEPPINGS(0x0, 0x3), &i10nm_cfg0),
- X86_MATCH_INTEL_FAM6_MODEL_STEPPINGS(ICELAKE_X, X86_STEPPINGS(0x4, 0xf), &i10nm_cfg1),
- X86_MATCH_INTEL_FAM6_MODEL_STEPPINGS(ICELAKE_D, X86_STEPPINGS(0x0, 0xf), &i10nm_cfg1),
- X86_MATCH_INTEL_FAM6_MODEL_STEPPINGS(SAPPHIRERAPIDS_X, X86_STEPPINGS(0x0, 0xf), &spr_cfg),
- X86_MATCH_INTEL_FAM6_MODEL_STEPPINGS(EMERALDRAPIDS_X, X86_STEPPINGS(0x0, 0xf), &spr_cfg),
- X86_MATCH_INTEL_FAM6_MODEL_STEPPINGS(GRANITERAPIDS_X, X86_STEPPINGS(0x0, 0xf), &gnr_cfg),
- X86_MATCH_INTEL_FAM6_MODEL_STEPPINGS(ATOM_CRESTMONT_X, X86_STEPPINGS(0x0, 0xf), &gnr_cfg),
- X86_MATCH_INTEL_FAM6_MODEL_STEPPINGS(ATOM_CRESTMONT, X86_STEPPINGS(0x0, 0xf), &gnr_cfg),
+ X86_MATCH_VFM_STEPPINGS(INTEL_ATOM_TREMONT_D, X86_STEPPINGS(0x0, 0x3), &i10nm_cfg0),
+ X86_MATCH_VFM_STEPPINGS(INTEL_ATOM_TREMONT_D, X86_STEPPINGS(0x4, 0xf), &i10nm_cfg1),
+ X86_MATCH_VFM_STEPPINGS(INTEL_ICELAKE_X, X86_STEPPINGS(0x0, 0x3), &i10nm_cfg0),
+ X86_MATCH_VFM_STEPPINGS(INTEL_ICELAKE_X, X86_STEPPINGS(0x4, 0xf), &i10nm_cfg1),
+ X86_MATCH_VFM_STEPPINGS(INTEL_ICELAKE_D, X86_STEPPINGS(0x0, 0xf), &i10nm_cfg1),
+ X86_MATCH_VFM_STEPPINGS(INTEL_SAPPHIRERAPIDS_X, X86_STEPPINGS(0x0, 0xf), &spr_cfg),
+ X86_MATCH_VFM_STEPPINGS(INTEL_EMERALDRAPIDS_X, X86_STEPPINGS(0x0, 0xf), &spr_cfg),
+ X86_MATCH_VFM_STEPPINGS(INTEL_GRANITERAPIDS_X, X86_STEPPINGS(0x0, 0xf), &gnr_cfg),
+ X86_MATCH_VFM_STEPPINGS(INTEL_ATOM_CRESTMONT_X, X86_STEPPINGS(0x0, 0xf), &gnr_cfg),
+ X86_MATCH_VFM_STEPPINGS(INTEL_ATOM_CRESTMONT, X86_STEPPINGS(0x0, 0xf), &gnr_cfg),
{}
};
MODULE_DEVICE_TABLE(x86cpu, i10nm_cpuids);
--
2.44.0
New CPU #defines encode vendor and family as well as model.
Signed-off-by: Tony Luck <[email protected]>
---
drivers/edac/sb_edac.c | 14 +++++++-------
1 file changed, 7 insertions(+), 7 deletions(-)
diff --git a/drivers/edac/sb_edac.c b/drivers/edac/sb_edac.c
index 26cca5a9322d..cbc92d3683e6 100644
--- a/drivers/edac/sb_edac.c
+++ b/drivers/edac/sb_edac.c
@@ -3546,13 +3546,13 @@ static int sbridge_register_mci(struct sbridge_dev *sbridge_dev, enum type type)
}
static const struct x86_cpu_id sbridge_cpuids[] = {
- X86_MATCH_INTEL_FAM6_MODEL(SANDYBRIDGE_X, &pci_dev_descr_sbridge_table),
- X86_MATCH_INTEL_FAM6_MODEL(IVYBRIDGE_X, &pci_dev_descr_ibridge_table),
- X86_MATCH_INTEL_FAM6_MODEL(HASWELL_X, &pci_dev_descr_haswell_table),
- X86_MATCH_INTEL_FAM6_MODEL(BROADWELL_X, &pci_dev_descr_broadwell_table),
- X86_MATCH_INTEL_FAM6_MODEL(BROADWELL_D, &pci_dev_descr_broadwell_table),
- X86_MATCH_INTEL_FAM6_MODEL(XEON_PHI_KNL, &pci_dev_descr_knl_table),
- X86_MATCH_INTEL_FAM6_MODEL(XEON_PHI_KNM, &pci_dev_descr_knl_table),
+ X86_MATCH_VFM(INTEL_SANDYBRIDGE_X, &pci_dev_descr_sbridge_table),
+ X86_MATCH_VFM(INTEL_IVYBRIDGE_X, &pci_dev_descr_ibridge_table),
+ X86_MATCH_VFM(INTEL_HASWELL_X, &pci_dev_descr_haswell_table),
+ X86_MATCH_VFM(INTEL_BROADWELL_X, &pci_dev_descr_broadwell_table),
+ X86_MATCH_VFM(INTEL_BROADWELL_D, &pci_dev_descr_broadwell_table),
+ X86_MATCH_VFM(INTEL_XEON_PHI_KNL, &pci_dev_descr_knl_table),
+ X86_MATCH_VFM(INTEL_XEON_PHI_KNM, &pci_dev_descr_knl_table),
{ }
};
MODULE_DEVICE_TABLE(x86cpu, sbridge_cpuids);
--
2.44.0
New CPU #defines encode vendor and family as well as model.
Signed-off-by: Tony Luck <[email protected]>
---
drivers/edac/skx_base.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/edac/skx_base.c b/drivers/edac/skx_base.c
index 0a862336a7ce..af3fa807acdb 100644
--- a/drivers/edac/skx_base.c
+++ b/drivers/edac/skx_base.c
@@ -164,7 +164,7 @@ static struct res_config skx_cfg = {
};
static const struct x86_cpu_id skx_cpuids[] = {
- X86_MATCH_INTEL_FAM6_MODEL_STEPPINGS(SKYLAKE_X, X86_STEPPINGS(0x0, 0xf), &skx_cfg),
+ X86_MATCH_VFM_STEPPINGS(INTEL_SKYLAKE_X, X86_STEPPINGS(0x0, 0xf), &skx_cfg),
{ }
};
MODULE_DEVICE_TABLE(x86cpu, skx_cpuids);
--
2.44.0
New CPU #defines encode vendor and family as well as model.
Signed-off-by: Tony Luck <[email protected]>
---
drivers/extcon/extcon-axp288.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/extcon/extcon-axp288.c b/drivers/extcon/extcon-axp288.c
index a703a8315634..d3bcbe839c09 100644
--- a/drivers/extcon/extcon-axp288.c
+++ b/drivers/extcon/extcon-axp288.c
@@ -108,7 +108,7 @@ struct axp288_extcon_info {
};
static const struct x86_cpu_id cherry_trail_cpu_ids[] = {
- X86_MATCH_INTEL_FAM6_MODEL(ATOM_AIRMONT, NULL),
+ X86_MATCH_VFM(INTEL_ATOM_AIRMONT, NULL),
{}
};
--
2.44.0
New CPU #defines encode vendor and family as well as model.
Signed-off-by: Tony Luck <[email protected]>
---
drivers/hwmon/peci/cputemp.c | 7 ++++---
1 file changed, 4 insertions(+), 3 deletions(-)
diff --git a/drivers/hwmon/peci/cputemp.c b/drivers/hwmon/peci/cputemp.c
index a812c15948d9..28cec5c318d4 100644
--- a/drivers/hwmon/peci/cputemp.c
+++ b/drivers/hwmon/peci/cputemp.c
@@ -11,6 +11,7 @@
#include <linux/peci-cpu.h>
#include <linux/units.h>
+#include <asm/cpu_device_id.h>
#include "common.h"
#define CORE_NUMS_MAX 64
@@ -361,9 +362,9 @@ static int init_core_mask(struct peci_cputemp *priv)
/* Get the RESOLVED_CORES register value */
switch (peci_dev->info.model) {
- case INTEL_FAM6_ICELAKE_X:
- case INTEL_FAM6_ICELAKE_D:
- case INTEL_FAM6_SAPPHIRERAPIDS_X:
+ case VFM_MODEL(INTEL_ICELAKE_X):
+ case VFM_MODEL(INTEL_ICELAKE_D):
+ case VFM_MODEL(INTEL_SAPPHIRERAPIDS_X):
ret = peci_ep_pci_local_read(peci_dev, 0, reg->bus, reg->dev,
reg->func, reg->offset + 4, &data);
if (ret)
--
2.44.0
New CPU #defines encode vendor and family as well as model.
Signed-off-by: Tony Luck <[email protected]>
---
drivers/idle/intel_idle.c | 116 +++++++++++++++++++-------------------
1 file changed, 58 insertions(+), 58 deletions(-)
diff --git a/drivers/idle/intel_idle.c b/drivers/idle/intel_idle.c
index e486027f8b07..9aab7abc2ae9 100644
--- a/drivers/idle/intel_idle.c
+++ b/drivers/idle/intel_idle.c
@@ -1494,53 +1494,53 @@ static const struct idle_cpu idle_cpu_srf __initconst = {
};
static const struct x86_cpu_id intel_idle_ids[] __initconst = {
- X86_MATCH_INTEL_FAM6_MODEL(NEHALEM_EP, &idle_cpu_nhx),
- X86_MATCH_INTEL_FAM6_MODEL(NEHALEM, &idle_cpu_nehalem),
- X86_MATCH_INTEL_FAM6_MODEL(NEHALEM_G, &idle_cpu_nehalem),
- X86_MATCH_INTEL_FAM6_MODEL(WESTMERE, &idle_cpu_nehalem),
- X86_MATCH_INTEL_FAM6_MODEL(WESTMERE_EP, &idle_cpu_nhx),
- X86_MATCH_INTEL_FAM6_MODEL(NEHALEM_EX, &idle_cpu_nhx),
- X86_MATCH_INTEL_FAM6_MODEL(ATOM_BONNELL, &idle_cpu_atom),
- X86_MATCH_INTEL_FAM6_MODEL(ATOM_BONNELL_MID, &idle_cpu_lincroft),
- X86_MATCH_INTEL_FAM6_MODEL(WESTMERE_EX, &idle_cpu_nhx),
- X86_MATCH_INTEL_FAM6_MODEL(SANDYBRIDGE, &idle_cpu_snb),
- X86_MATCH_INTEL_FAM6_MODEL(SANDYBRIDGE_X, &idle_cpu_snx),
- X86_MATCH_INTEL_FAM6_MODEL(ATOM_SALTWELL, &idle_cpu_atom),
- X86_MATCH_INTEL_FAM6_MODEL(ATOM_SILVERMONT, &idle_cpu_byt),
- X86_MATCH_INTEL_FAM6_MODEL(ATOM_SILVERMONT_MID, &idle_cpu_tangier),
- X86_MATCH_INTEL_FAM6_MODEL(ATOM_AIRMONT, &idle_cpu_cht),
- X86_MATCH_INTEL_FAM6_MODEL(IVYBRIDGE, &idle_cpu_ivb),
- X86_MATCH_INTEL_FAM6_MODEL(IVYBRIDGE_X, &idle_cpu_ivt),
- X86_MATCH_INTEL_FAM6_MODEL(HASWELL, &idle_cpu_hsw),
- X86_MATCH_INTEL_FAM6_MODEL(HASWELL_X, &idle_cpu_hsx),
- X86_MATCH_INTEL_FAM6_MODEL(HASWELL_L, &idle_cpu_hsw),
- X86_MATCH_INTEL_FAM6_MODEL(HASWELL_G, &idle_cpu_hsw),
- X86_MATCH_INTEL_FAM6_MODEL(ATOM_SILVERMONT_D, &idle_cpu_avn),
- X86_MATCH_INTEL_FAM6_MODEL(BROADWELL, &idle_cpu_bdw),
- X86_MATCH_INTEL_FAM6_MODEL(BROADWELL_G, &idle_cpu_bdw),
- X86_MATCH_INTEL_FAM6_MODEL(BROADWELL_X, &idle_cpu_bdx),
- X86_MATCH_INTEL_FAM6_MODEL(BROADWELL_D, &idle_cpu_bdx),
- X86_MATCH_INTEL_FAM6_MODEL(SKYLAKE_L, &idle_cpu_skl),
- X86_MATCH_INTEL_FAM6_MODEL(SKYLAKE, &idle_cpu_skl),
- X86_MATCH_INTEL_FAM6_MODEL(KABYLAKE_L, &idle_cpu_skl),
- X86_MATCH_INTEL_FAM6_MODEL(KABYLAKE, &idle_cpu_skl),
- X86_MATCH_INTEL_FAM6_MODEL(SKYLAKE_X, &idle_cpu_skx),
- X86_MATCH_INTEL_FAM6_MODEL(ICELAKE_X, &idle_cpu_icx),
- X86_MATCH_INTEL_FAM6_MODEL(ICELAKE_D, &idle_cpu_icx),
- X86_MATCH_INTEL_FAM6_MODEL(ALDERLAKE, &idle_cpu_adl),
- X86_MATCH_INTEL_FAM6_MODEL(ALDERLAKE_L, &idle_cpu_adl_l),
- X86_MATCH_INTEL_FAM6_MODEL(METEORLAKE_L, &idle_cpu_mtl_l),
- X86_MATCH_INTEL_FAM6_MODEL(ATOM_GRACEMONT, &idle_cpu_gmt),
- X86_MATCH_INTEL_FAM6_MODEL(SAPPHIRERAPIDS_X, &idle_cpu_spr),
- X86_MATCH_INTEL_FAM6_MODEL(EMERALDRAPIDS_X, &idle_cpu_spr),
- X86_MATCH_INTEL_FAM6_MODEL(XEON_PHI_KNL, &idle_cpu_knl),
- X86_MATCH_INTEL_FAM6_MODEL(XEON_PHI_KNM, &idle_cpu_knl),
- X86_MATCH_INTEL_FAM6_MODEL(ATOM_GOLDMONT, &idle_cpu_bxt),
- X86_MATCH_INTEL_FAM6_MODEL(ATOM_GOLDMONT_PLUS, &idle_cpu_bxt),
- X86_MATCH_INTEL_FAM6_MODEL(ATOM_GOLDMONT_D, &idle_cpu_dnv),
- X86_MATCH_INTEL_FAM6_MODEL(ATOM_TREMONT_D, &idle_cpu_snr),
- X86_MATCH_INTEL_FAM6_MODEL(ATOM_CRESTMONT, &idle_cpu_grr),
- X86_MATCH_INTEL_FAM6_MODEL(ATOM_CRESTMONT_X, &idle_cpu_srf),
+ X86_MATCH_VFM(INTEL_NEHALEM_EP, &idle_cpu_nhx),
+ X86_MATCH_VFM(INTEL_NEHALEM, &idle_cpu_nehalem),
+ X86_MATCH_VFM(INTEL_NEHALEM_G, &idle_cpu_nehalem),
+ X86_MATCH_VFM(INTEL_WESTMERE, &idle_cpu_nehalem),
+ X86_MATCH_VFM(INTEL_WESTMERE_EP, &idle_cpu_nhx),
+ X86_MATCH_VFM(INTEL_NEHALEM_EX, &idle_cpu_nhx),
+ X86_MATCH_VFM(INTEL_ATOM_BONNELL, &idle_cpu_atom),
+ X86_MATCH_VFM(INTEL_ATOM_BONNELL_MID, &idle_cpu_lincroft),
+ X86_MATCH_VFM(INTEL_WESTMERE_EX, &idle_cpu_nhx),
+ X86_MATCH_VFM(INTEL_SANDYBRIDGE, &idle_cpu_snb),
+ X86_MATCH_VFM(INTEL_SANDYBRIDGE_X, &idle_cpu_snx),
+ X86_MATCH_VFM(INTEL_ATOM_SALTWELL, &idle_cpu_atom),
+ X86_MATCH_VFM(INTEL_ATOM_SILVERMONT, &idle_cpu_byt),
+ X86_MATCH_VFM(INTEL_ATOM_SILVERMONT_MID, &idle_cpu_tangier),
+ X86_MATCH_VFM(INTEL_ATOM_AIRMONT, &idle_cpu_cht),
+ X86_MATCH_VFM(INTEL_IVYBRIDGE, &idle_cpu_ivb),
+ X86_MATCH_VFM(INTEL_IVYBRIDGE_X, &idle_cpu_ivt),
+ X86_MATCH_VFM(INTEL_HASWELL, &idle_cpu_hsw),
+ X86_MATCH_VFM(INTEL_HASWELL_X, &idle_cpu_hsx),
+ X86_MATCH_VFM(INTEL_HASWELL_L, &idle_cpu_hsw),
+ X86_MATCH_VFM(INTEL_HASWELL_G, &idle_cpu_hsw),
+ X86_MATCH_VFM(INTEL_ATOM_SILVERMONT_D, &idle_cpu_avn),
+ X86_MATCH_VFM(INTEL_BROADWELL, &idle_cpu_bdw),
+ X86_MATCH_VFM(INTEL_BROADWELL_G, &idle_cpu_bdw),
+ X86_MATCH_VFM(INTEL_BROADWELL_X, &idle_cpu_bdx),
+ X86_MATCH_VFM(INTEL_BROADWELL_D, &idle_cpu_bdx),
+ X86_MATCH_VFM(INTEL_SKYLAKE_L, &idle_cpu_skl),
+ X86_MATCH_VFM(INTEL_SKYLAKE, &idle_cpu_skl),
+ X86_MATCH_VFM(INTEL_KABYLAKE_L, &idle_cpu_skl),
+ X86_MATCH_VFM(INTEL_KABYLAKE, &idle_cpu_skl),
+ X86_MATCH_VFM(INTEL_SKYLAKE_X, &idle_cpu_skx),
+ X86_MATCH_VFM(INTEL_ICELAKE_X, &idle_cpu_icx),
+ X86_MATCH_VFM(INTEL_ICELAKE_D, &idle_cpu_icx),
+ X86_MATCH_VFM(INTEL_ALDERLAKE, &idle_cpu_adl),
+ X86_MATCH_VFM(INTEL_ALDERLAKE_L, &idle_cpu_adl_l),
+ X86_MATCH_VFM(INTEL_METEORLAKE_L, &idle_cpu_mtl_l),
+ X86_MATCH_VFM(INTEL_ATOM_GRACEMONT, &idle_cpu_gmt),
+ X86_MATCH_VFM(INTEL_SAPPHIRERAPIDS_X, &idle_cpu_spr),
+ X86_MATCH_VFM(INTEL_EMERALDRAPIDS_X, &idle_cpu_spr),
+ X86_MATCH_VFM(INTEL_XEON_PHI_KNL, &idle_cpu_knl),
+ X86_MATCH_VFM(INTEL_XEON_PHI_KNM, &idle_cpu_knl),
+ X86_MATCH_VFM(INTEL_ATOM_GOLDMONT, &idle_cpu_bxt),
+ X86_MATCH_VFM(INTEL_ATOM_GOLDMONT_PLUS, &idle_cpu_bxt),
+ X86_MATCH_VFM(INTEL_ATOM_GOLDMONT_D, &idle_cpu_dnv),
+ X86_MATCH_VFM(INTEL_ATOM_TREMONT_D, &idle_cpu_snr),
+ X86_MATCH_VFM(INTEL_ATOM_CRESTMONT, &idle_cpu_grr),
+ X86_MATCH_VFM(INTEL_ATOM_CRESTMONT_X, &idle_cpu_srf),
{}
};
@@ -1990,27 +1990,27 @@ static void __init intel_idle_init_cstates_icpu(struct cpuidle_driver *drv)
{
int cstate;
- switch (boot_cpu_data.x86_model) {
- case INTEL_FAM6_IVYBRIDGE_X:
+ switch (boot_cpu_data.x86_vfm) {
+ case INTEL_IVYBRIDGE_X:
ivt_idle_state_table_update();
break;
- case INTEL_FAM6_ATOM_GOLDMONT:
- case INTEL_FAM6_ATOM_GOLDMONT_PLUS:
+ case INTEL_ATOM_GOLDMONT:
+ case INTEL_ATOM_GOLDMONT_PLUS:
bxt_idle_state_table_update();
break;
- case INTEL_FAM6_SKYLAKE:
+ case INTEL_SKYLAKE:
sklh_idle_state_table_update();
break;
- case INTEL_FAM6_SKYLAKE_X:
+ case INTEL_SKYLAKE_X:
skx_idle_state_table_update();
break;
- case INTEL_FAM6_SAPPHIRERAPIDS_X:
- case INTEL_FAM6_EMERALDRAPIDS_X:
+ case INTEL_SAPPHIRERAPIDS_X:
+ case INTEL_EMERALDRAPIDS_X:
spr_idle_state_table_update();
break;
- case INTEL_FAM6_ALDERLAKE:
- case INTEL_FAM6_ALDERLAKE_L:
- case INTEL_FAM6_ATOM_GRACEMONT:
+ case INTEL_ALDERLAKE:
+ case INTEL_ALDERLAKE_L:
+ case INTEL_ATOM_GRACEMONT:
adl_idle_state_table_update();
break;
}
--
2.44.0
New CPU #defines encode vendor and family as well as model.
Signed-off-by: Tony Luck <[email protected]>
---
drivers/pci/pci-mid.c | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/drivers/pci/pci-mid.c b/drivers/pci/pci-mid.c
index fbfd78127123..bed9f0755271 100644
--- a/drivers/pci/pci-mid.c
+++ b/drivers/pci/pci-mid.c
@@ -38,8 +38,8 @@ pci_power_t mid_pci_get_power_state(struct pci_dev *pdev)
* arch/x86/platform/intel-mid/pwr.c.
*/
static const struct x86_cpu_id lpss_cpu_ids[] = {
- X86_MATCH_INTEL_FAM6_MODEL(ATOM_SALTWELL_MID, NULL),
- X86_MATCH_INTEL_FAM6_MODEL(ATOM_SILVERMONT_MID, NULL),
+ X86_MATCH_VFM(INTEL_ATOM_SALTWELL_MID, NULL),
+ X86_MATCH_VFM(INTEL_ATOM_SILVERMONT_MID, NULL),
{}
};
--
2.44.0
New CPU #defines encode vendor and family as well as model.
Signed-off-by: Tony Luck <[email protected]>
---
drivers/platform/x86/intel/ifs/core.c | 15 +++++++--------
1 file changed, 7 insertions(+), 8 deletions(-)
diff --git a/drivers/platform/x86/intel/ifs/core.c b/drivers/platform/x86/intel/ifs/core.c
index 7b11198d85a1..33412a584836 100644
--- a/drivers/platform/x86/intel/ifs/core.c
+++ b/drivers/platform/x86/intel/ifs/core.c
@@ -11,16 +11,15 @@
#include "ifs.h"
-#define X86_MATCH(model, array_gen) \
- X86_MATCH_VENDOR_FAM_MODEL_FEATURE(INTEL, 6, \
- INTEL_FAM6_##model, X86_FEATURE_CORE_CAPABILITIES, array_gen)
+#define X86_MATCH(vfm, array_gen) \
+ X86_MATCH_VFM_FEATURE(vfm, X86_FEATURE_CORE_CAPABILITIES, array_gen)
static const struct x86_cpu_id ifs_cpu_ids[] __initconst = {
- X86_MATCH(SAPPHIRERAPIDS_X, ARRAY_GEN0),
- X86_MATCH(EMERALDRAPIDS_X, ARRAY_GEN0),
- X86_MATCH(GRANITERAPIDS_X, ARRAY_GEN0),
- X86_MATCH(GRANITERAPIDS_D, ARRAY_GEN0),
- X86_MATCH(ATOM_CRESTMONT_X, ARRAY_GEN1),
+ X86_MATCH(INTEL_SAPPHIRERAPIDS_X, ARRAY_GEN0),
+ X86_MATCH(INTEL_EMERALDRAPIDS_X, ARRAY_GEN0),
+ X86_MATCH(INTEL_GRANITERAPIDS_X, ARRAY_GEN0),
+ X86_MATCH(INTEL_GRANITERAPIDS_D, ARRAY_GEN0),
+ X86_MATCH(INTEL_ATOM_CRESTMONT_X, ARRAY_GEN1),
{}
};
MODULE_DEVICE_TABLE(x86cpu, ifs_cpu_ids);
--
2.44.0
New CPU #defines encode vendor and family as well as model.
Signed-off-by: Tony Luck <[email protected]>
---
drivers/platform/x86/intel/pmc/pltdrv.c | 16 ++++++++--------
1 file changed, 8 insertions(+), 8 deletions(-)
diff --git a/drivers/platform/x86/intel/pmc/pltdrv.c b/drivers/platform/x86/intel/pmc/pltdrv.c
index ddfba38c2104..22cfcd431987 100644
--- a/drivers/platform/x86/intel/pmc/pltdrv.c
+++ b/drivers/platform/x86/intel/pmc/pltdrv.c
@@ -35,14 +35,14 @@ static struct platform_device *pmc_core_device;
* other list may grow, but this list should not.
*/
static const struct x86_cpu_id intel_pmc_core_platform_ids[] = {
- X86_MATCH_INTEL_FAM6_MODEL(SKYLAKE_L, &pmc_core_device),
- X86_MATCH_INTEL_FAM6_MODEL(SKYLAKE, &pmc_core_device),
- X86_MATCH_INTEL_FAM6_MODEL(KABYLAKE_L, &pmc_core_device),
- X86_MATCH_INTEL_FAM6_MODEL(KABYLAKE, &pmc_core_device),
- X86_MATCH_INTEL_FAM6_MODEL(CANNONLAKE_L, &pmc_core_device),
- X86_MATCH_INTEL_FAM6_MODEL(ICELAKE_L, &pmc_core_device),
- X86_MATCH_INTEL_FAM6_MODEL(COMETLAKE, &pmc_core_device),
- X86_MATCH_INTEL_FAM6_MODEL(COMETLAKE_L, &pmc_core_device),
+ X86_MATCH_VFM(INTEL_SKYLAKE_L, &pmc_core_device),
+ X86_MATCH_VFM(INTEL_SKYLAKE, &pmc_core_device),
+ X86_MATCH_VFM(INTEL_KABYLAKE_L, &pmc_core_device),
+ X86_MATCH_VFM(INTEL_KABYLAKE, &pmc_core_device),
+ X86_MATCH_VFM(INTEL_CANNONLAKE_L, &pmc_core_device),
+ X86_MATCH_VFM(INTEL_ICELAKE_L, &pmc_core_device),
+ X86_MATCH_VFM(INTEL_COMETLAKE, &pmc_core_device),
+ X86_MATCH_VFM(INTEL_COMETLAKE_L, &pmc_core_device),
{}
};
MODULE_DEVICE_TABLE(x86cpu, intel_pmc_core_platform_ids);
--
2.44.0
New CPU #defines encode vendor and family as well as model.
Signed-off-by: Tony Luck <[email protected]>
---
drivers/platform/x86/intel/pmc/core.c | 46 +++++++++++++--------------
1 file changed, 23 insertions(+), 23 deletions(-)
diff --git a/drivers/platform/x86/intel/pmc/core.c b/drivers/platform/x86/intel/pmc/core.c
index 10c96c1a850a..054a56532e23 100644
--- a/drivers/platform/x86/intel/pmc/core.c
+++ b/drivers/platform/x86/intel/pmc/core.c
@@ -1255,29 +1255,29 @@ static void pmc_core_dbgfs_register(struct pmc_dev *pmcdev)
}
static const struct x86_cpu_id intel_pmc_core_ids[] = {
- X86_MATCH_INTEL_FAM6_MODEL(SKYLAKE_L, spt_core_init),
- X86_MATCH_INTEL_FAM6_MODEL(SKYLAKE, spt_core_init),
- X86_MATCH_INTEL_FAM6_MODEL(KABYLAKE_L, spt_core_init),
- X86_MATCH_INTEL_FAM6_MODEL(KABYLAKE, spt_core_init),
- X86_MATCH_INTEL_FAM6_MODEL(CANNONLAKE_L, cnp_core_init),
- X86_MATCH_INTEL_FAM6_MODEL(ICELAKE_L, icl_core_init),
- X86_MATCH_INTEL_FAM6_MODEL(ICELAKE_NNPI, icl_core_init),
- X86_MATCH_INTEL_FAM6_MODEL(COMETLAKE, cnp_core_init),
- X86_MATCH_INTEL_FAM6_MODEL(COMETLAKE_L, cnp_core_init),
- X86_MATCH_INTEL_FAM6_MODEL(TIGERLAKE_L, tgl_l_core_init),
- X86_MATCH_INTEL_FAM6_MODEL(TIGERLAKE, tgl_core_init),
- X86_MATCH_INTEL_FAM6_MODEL(ATOM_TREMONT, tgl_l_core_init),
- X86_MATCH_INTEL_FAM6_MODEL(ATOM_TREMONT_L, icl_core_init),
- X86_MATCH_INTEL_FAM6_MODEL(ROCKETLAKE, tgl_core_init),
- X86_MATCH_INTEL_FAM6_MODEL(ALDERLAKE_L, tgl_l_core_init),
- X86_MATCH_INTEL_FAM6_MODEL(ATOM_GRACEMONT, tgl_l_core_init),
- X86_MATCH_INTEL_FAM6_MODEL(ALDERLAKE, adl_core_init),
- X86_MATCH_INTEL_FAM6_MODEL(RAPTORLAKE_P, tgl_l_core_init),
- X86_MATCH_INTEL_FAM6_MODEL(RAPTORLAKE, adl_core_init),
- X86_MATCH_INTEL_FAM6_MODEL(RAPTORLAKE_S, adl_core_init),
- X86_MATCH_INTEL_FAM6_MODEL(METEORLAKE_L, mtl_core_init),
- X86_MATCH_INTEL_FAM6_MODEL(ARROWLAKE, arl_core_init),
- X86_MATCH_INTEL_FAM6_MODEL(LUNARLAKE_M, lnl_core_init),
+ X86_MATCH_VFM(INTEL_SKYLAKE_L, spt_core_init),
+ X86_MATCH_VFM(INTEL_SKYLAKE, spt_core_init),
+ X86_MATCH_VFM(INTEL_KABYLAKE_L, spt_core_init),
+ X86_MATCH_VFM(INTEL_KABYLAKE, spt_core_init),
+ X86_MATCH_VFM(INTEL_CANNONLAKE_L, cnp_core_init),
+ X86_MATCH_VFM(INTEL_ICELAKE_L, icl_core_init),
+ X86_MATCH_VFM(INTEL_ICELAKE_NNPI, icl_core_init),
+ X86_MATCH_VFM(INTEL_COMETLAKE, cnp_core_init),
+ X86_MATCH_VFM(INTEL_COMETLAKE_L, cnp_core_init),
+ X86_MATCH_VFM(INTEL_TIGERLAKE_L, tgl_l_core_init),
+ X86_MATCH_VFM(INTEL_TIGERLAKE, tgl_core_init),
+ X86_MATCH_VFM(INTEL_ATOM_TREMONT, tgl_l_core_init),
+ X86_MATCH_VFM(INTEL_ATOM_TREMONT_L, icl_core_init),
+ X86_MATCH_VFM(INTEL_ROCKETLAKE, tgl_core_init),
+ X86_MATCH_VFM(INTEL_ALDERLAKE_L, tgl_l_core_init),
+ X86_MATCH_VFM(INTEL_ATOM_GRACEMONT, tgl_l_core_init),
+ X86_MATCH_VFM(INTEL_ALDERLAKE, adl_core_init),
+ X86_MATCH_VFM(INTEL_RAPTORLAKE_P, tgl_l_core_init),
+ X86_MATCH_VFM(INTEL_RAPTORLAKE, adl_core_init),
+ X86_MATCH_VFM(INTEL_RAPTORLAKE_S, adl_core_init),
+ X86_MATCH_VFM(INTEL_METEORLAKE_L, mtl_core_init),
+ X86_MATCH_VFM(INTEL_ARROWLAKE, arl_core_init),
+ X86_MATCH_VFM(INTEL_LUNARLAKE_M, lnl_core_init),
{}
};
--
2.44.0
New CPU #defines encode vendor and family as well as model.
Signed-off-by: Tony Luck <[email protected]>
---
drivers/platform/x86/intel_scu_wdt.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/platform/x86/intel_scu_wdt.c b/drivers/platform/x86/intel_scu_wdt.c
index a5031a25632e..d0b6637861d3 100644
--- a/drivers/platform/x86/intel_scu_wdt.c
+++ b/drivers/platform/x86/intel_scu_wdt.c
@@ -50,7 +50,7 @@ static struct intel_mid_wdt_pdata tangier_pdata = {
};
static const struct x86_cpu_id intel_mid_cpu_ids[] = {
- X86_MATCH_INTEL_FAM6_MODEL(ATOM_SILVERMONT_MID, &tangier_pdata),
+ X86_MATCH_VFM(INTEL_ATOM_SILVERMONT_MID, &tangier_pdata),
{}
};
--
2.44.0
New CPU #defines encode vendor and family as well as model.
Signed-off-by: Tony Luck <[email protected]>
---
drivers/platform/x86/intel/telemetry/debugfs.c | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/drivers/platform/x86/intel/telemetry/debugfs.c b/drivers/platform/x86/intel/telemetry/debugfs.c
index 1d4d0fbfd63c..70e5736c44c7 100644
--- a/drivers/platform/x86/intel/telemetry/debugfs.c
+++ b/drivers/platform/x86/intel/telemetry/debugfs.c
@@ -308,8 +308,8 @@ static struct telemetry_debugfs_conf telem_apl_debugfs_conf = {
};
static const struct x86_cpu_id telemetry_debugfs_cpu_ids[] = {
- X86_MATCH_INTEL_FAM6_MODEL(ATOM_GOLDMONT, &telem_apl_debugfs_conf),
- X86_MATCH_INTEL_FAM6_MODEL(ATOM_GOLDMONT_PLUS, &telem_apl_debugfs_conf),
+ X86_MATCH_VFM(INTEL_ATOM_GOLDMONT, &telem_apl_debugfs_conf),
+ X86_MATCH_VFM(INTEL_ATOM_GOLDMONT_PLUS, &telem_apl_debugfs_conf),
{}
};
MODULE_DEVICE_TABLE(x86cpu, telemetry_debugfs_cpu_ids);
--
2.44.0
New CPU #defines encode vendor and family as well as model.
Signed-off-by: Tony Luck <[email protected]>
---
drivers/platform/x86/intel/telemetry/pltdrv.c | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/drivers/platform/x86/intel/telemetry/pltdrv.c b/drivers/platform/x86/intel/telemetry/pltdrv.c
index 06311d0e9451..767a0bc6c7ad 100644
--- a/drivers/platform/x86/intel/telemetry/pltdrv.c
+++ b/drivers/platform/x86/intel/telemetry/pltdrv.c
@@ -177,8 +177,8 @@ static struct telemetry_plt_config telem_glk_config = {
};
static const struct x86_cpu_id telemetry_cpu_ids[] = {
- X86_MATCH_INTEL_FAM6_MODEL(ATOM_GOLDMONT, &telem_apl_config),
- X86_MATCH_INTEL_FAM6_MODEL(ATOM_GOLDMONT_PLUS, &telem_glk_config),
+ X86_MATCH_VFM(INTEL_ATOM_GOLDMONT, &telem_apl_config),
+ X86_MATCH_VFM(INTEL_ATOM_GOLDMONT_PLUS, &telem_glk_config),
{}
};
--
2.44.0
New CPU #defines encode vendor and family as well as model.
Signed-off-by: Tony Luck <[email protected]>
---
arch/x86/events/intel/core.c | 148 +++++++++++++++++------------------
1 file changed, 74 insertions(+), 74 deletions(-)
diff --git a/arch/x86/events/intel/core.c b/arch/x86/events/intel/core.c
index 768d1414897f..94206f8cd371 100644
--- a/arch/x86/events/intel/core.c
+++ b/arch/x86/events/intel/core.c
@@ -4698,8 +4698,8 @@ static void intel_pmu_check_extra_regs(struct extra_reg *extra_regs);
static inline bool intel_pmu_broken_perf_cap(void)
{
/* The Perf Metric (Bit 15) is always cleared */
- if ((boot_cpu_data.x86_model == INTEL_FAM6_METEORLAKE) ||
- (boot_cpu_data.x86_model == INTEL_FAM6_METEORLAKE_L))
+ if (boot_cpu_data.x86_vfm == INTEL_METEORLAKE ||
+ boot_cpu_data.x86_vfm == INTEL_METEORLAKE_L)
return true;
return false;
@@ -6245,19 +6245,19 @@ __init int intel_pmu_init(void)
/*
* Install the hw-cache-events table:
*/
- switch (boot_cpu_data.x86_model) {
- case INTEL_FAM6_CORE_YONAH:
+ switch (boot_cpu_data.x86_vfm) {
+ case INTEL_CORE_YONAH:
pr_cont("Core events, ");
name = "core";
break;
- case INTEL_FAM6_CORE2_MEROM:
+ case INTEL_CORE2_MEROM:
x86_add_quirk(intel_clovertown_quirk);
fallthrough;
- case INTEL_FAM6_CORE2_MEROM_L:
- case INTEL_FAM6_CORE2_PENRYN:
- case INTEL_FAM6_CORE2_DUNNINGTON:
+ case INTEL_CORE2_MEROM_L:
+ case INTEL_CORE2_PENRYN:
+ case INTEL_CORE2_DUNNINGTON:
memcpy(hw_cache_event_ids, core2_hw_cache_event_ids,
sizeof(hw_cache_event_ids));
@@ -6269,9 +6269,9 @@ __init int intel_pmu_init(void)
name = "core2";
break;
- case INTEL_FAM6_NEHALEM:
- case INTEL_FAM6_NEHALEM_EP:
- case INTEL_FAM6_NEHALEM_EX:
+ case INTEL_NEHALEM:
+ case INTEL_NEHALEM_EP:
+ case INTEL_NEHALEM_EX:
memcpy(hw_cache_event_ids, nehalem_hw_cache_event_ids,
sizeof(hw_cache_event_ids));
memcpy(hw_cache_extra_regs, nehalem_hw_cache_extra_regs,
@@ -6303,11 +6303,11 @@ __init int intel_pmu_init(void)
name = "nehalem";
break;
- case INTEL_FAM6_ATOM_BONNELL:
- case INTEL_FAM6_ATOM_BONNELL_MID:
- case INTEL_FAM6_ATOM_SALTWELL:
- case INTEL_FAM6_ATOM_SALTWELL_MID:
- case INTEL_FAM6_ATOM_SALTWELL_TABLET:
+ case INTEL_ATOM_BONNELL:
+ case INTEL_ATOM_BONNELL_MID:
+ case INTEL_ATOM_SALTWELL:
+ case INTEL_ATOM_SALTWELL_MID:
+ case INTEL_ATOM_SALTWELL_TABLET:
memcpy(hw_cache_event_ids, atom_hw_cache_event_ids,
sizeof(hw_cache_event_ids));
@@ -6320,11 +6320,11 @@ __init int intel_pmu_init(void)
name = "bonnell";
break;
- case INTEL_FAM6_ATOM_SILVERMONT:
- case INTEL_FAM6_ATOM_SILVERMONT_D:
- case INTEL_FAM6_ATOM_SILVERMONT_MID:
- case INTEL_FAM6_ATOM_AIRMONT:
- case INTEL_FAM6_ATOM_AIRMONT_MID:
+ case INTEL_ATOM_SILVERMONT:
+ case INTEL_ATOM_SILVERMONT_D:
+ case INTEL_ATOM_SILVERMONT_MID:
+ case INTEL_ATOM_AIRMONT:
+ case INTEL_ATOM_AIRMONT_MID:
memcpy(hw_cache_event_ids, slm_hw_cache_event_ids,
sizeof(hw_cache_event_ids));
memcpy(hw_cache_extra_regs, slm_hw_cache_extra_regs,
@@ -6342,8 +6342,8 @@ __init int intel_pmu_init(void)
name = "silvermont";
break;
- case INTEL_FAM6_ATOM_GOLDMONT:
- case INTEL_FAM6_ATOM_GOLDMONT_D:
+ case INTEL_ATOM_GOLDMONT:
+ case INTEL_ATOM_GOLDMONT_D:
memcpy(hw_cache_event_ids, glm_hw_cache_event_ids,
sizeof(hw_cache_event_ids));
memcpy(hw_cache_extra_regs, glm_hw_cache_extra_regs,
@@ -6369,7 +6369,7 @@ __init int intel_pmu_init(void)
name = "goldmont";
break;
- case INTEL_FAM6_ATOM_GOLDMONT_PLUS:
+ case INTEL_ATOM_GOLDMONT_PLUS:
memcpy(hw_cache_event_ids, glp_hw_cache_event_ids,
sizeof(hw_cache_event_ids));
memcpy(hw_cache_extra_regs, glp_hw_cache_extra_regs,
@@ -6398,9 +6398,9 @@ __init int intel_pmu_init(void)
name = "goldmont_plus";
break;
- case INTEL_FAM6_ATOM_TREMONT_D:
- case INTEL_FAM6_ATOM_TREMONT:
- case INTEL_FAM6_ATOM_TREMONT_L:
+ case INTEL_ATOM_TREMONT_D:
+ case INTEL_ATOM_TREMONT:
+ case INTEL_ATOM_TREMONT_L:
x86_pmu.late_ack = true;
memcpy(hw_cache_event_ids, glp_hw_cache_event_ids,
sizeof(hw_cache_event_ids));
@@ -6427,7 +6427,7 @@ __init int intel_pmu_init(void)
name = "Tremont";
break;
- case INTEL_FAM6_ATOM_GRACEMONT:
+ case INTEL_ATOM_GRACEMONT:
intel_pmu_init_grt(NULL);
intel_pmu_pebs_data_source_grt();
x86_pmu.pebs_latency_data = adl_latency_data_small;
@@ -6439,8 +6439,8 @@ __init int intel_pmu_init(void)
name = "gracemont";
break;
- case INTEL_FAM6_ATOM_CRESTMONT:
- case INTEL_FAM6_ATOM_CRESTMONT_X:
+ case INTEL_ATOM_CRESTMONT:
+ case INTEL_ATOM_CRESTMONT_X:
intel_pmu_init_grt(NULL);
x86_pmu.extra_regs = intel_cmt_extra_regs;
intel_pmu_pebs_data_source_cmt();
@@ -6453,9 +6453,9 @@ __init int intel_pmu_init(void)
name = "crestmont";
break;
- case INTEL_FAM6_WESTMERE:
- case INTEL_FAM6_WESTMERE_EP:
- case INTEL_FAM6_WESTMERE_EX:
+ case INTEL_WESTMERE:
+ case INTEL_WESTMERE_EP:
+ case INTEL_WESTMERE_EX:
memcpy(hw_cache_event_ids, westmere_hw_cache_event_ids,
sizeof(hw_cache_event_ids));
memcpy(hw_cache_extra_regs, nehalem_hw_cache_extra_regs,
@@ -6484,8 +6484,8 @@ __init int intel_pmu_init(void)
name = "westmere";
break;
- case INTEL_FAM6_SANDYBRIDGE:
- case INTEL_FAM6_SANDYBRIDGE_X:
+ case INTEL_SANDYBRIDGE:
+ case INTEL_SANDYBRIDGE_X:
x86_add_quirk(intel_sandybridge_quirk);
x86_add_quirk(intel_ht_bug);
memcpy(hw_cache_event_ids, snb_hw_cache_event_ids,
@@ -6498,7 +6498,7 @@ __init int intel_pmu_init(void)
x86_pmu.event_constraints = intel_snb_event_constraints;
x86_pmu.pebs_constraints = intel_snb_pebs_event_constraints;
x86_pmu.pebs_aliases = intel_pebs_aliases_snb;
- if (boot_cpu_data.x86_model == INTEL_FAM6_SANDYBRIDGE_X)
+ if (boot_cpu_data.x86_vfm == INTEL_SANDYBRIDGE_X)
x86_pmu.extra_regs = intel_snbep_extra_regs;
else
x86_pmu.extra_regs = intel_snb_extra_regs;
@@ -6524,8 +6524,8 @@ __init int intel_pmu_init(void)
name = "sandybridge";
break;
- case INTEL_FAM6_IVYBRIDGE:
- case INTEL_FAM6_IVYBRIDGE_X:
+ case INTEL_IVYBRIDGE:
+ case INTEL_IVYBRIDGE_X:
x86_add_quirk(intel_ht_bug);
memcpy(hw_cache_event_ids, snb_hw_cache_event_ids,
sizeof(hw_cache_event_ids));
@@ -6541,7 +6541,7 @@ __init int intel_pmu_init(void)
x86_pmu.pebs_constraints = intel_ivb_pebs_event_constraints;
x86_pmu.pebs_aliases = intel_pebs_aliases_ivb;
x86_pmu.pebs_prec_dist = true;
- if (boot_cpu_data.x86_model == INTEL_FAM6_IVYBRIDGE_X)
+ if (boot_cpu_data.x86_vfm == INTEL_IVYBRIDGE_X)
x86_pmu.extra_regs = intel_snbep_extra_regs;
else
x86_pmu.extra_regs = intel_snb_extra_regs;
@@ -6563,10 +6563,10 @@ __init int intel_pmu_init(void)
break;
- case INTEL_FAM6_HASWELL:
- case INTEL_FAM6_HASWELL_X:
- case INTEL_FAM6_HASWELL_L:
- case INTEL_FAM6_HASWELL_G:
+ case INTEL_HASWELL:
+ case INTEL_HASWELL_X:
+ case INTEL_HASWELL_L:
+ case INTEL_HASWELL_G:
x86_add_quirk(intel_ht_bug);
x86_add_quirk(intel_pebs_isolation_quirk);
x86_pmu.late_ack = true;
@@ -6596,10 +6596,10 @@ __init int intel_pmu_init(void)
name = "haswell";
break;
- case INTEL_FAM6_BROADWELL:
- case INTEL_FAM6_BROADWELL_D:
- case INTEL_FAM6_BROADWELL_G:
- case INTEL_FAM6_BROADWELL_X:
+ case INTEL_BROADWELL:
+ case INTEL_BROADWELL_D:
+ case INTEL_BROADWELL_G:
+ case INTEL_BROADWELL_X:
x86_add_quirk(intel_pebs_isolation_quirk);
x86_pmu.late_ack = true;
memcpy(hw_cache_event_ids, hsw_hw_cache_event_ids, sizeof(hw_cache_event_ids));
@@ -6638,8 +6638,8 @@ __init int intel_pmu_init(void)
name = "broadwell";
break;
- case INTEL_FAM6_XEON_PHI_KNL:
- case INTEL_FAM6_XEON_PHI_KNM:
+ case INTEL_XEON_PHI_KNL:
+ case INTEL_XEON_PHI_KNM:
memcpy(hw_cache_event_ids,
slm_hw_cache_event_ids, sizeof(hw_cache_event_ids));
memcpy(hw_cache_extra_regs,
@@ -6658,15 +6658,15 @@ __init int intel_pmu_init(void)
name = "knights-landing";
break;
- case INTEL_FAM6_SKYLAKE_X:
+ case INTEL_SKYLAKE_X:
pmem = true;
fallthrough;
- case INTEL_FAM6_SKYLAKE_L:
- case INTEL_FAM6_SKYLAKE:
- case INTEL_FAM6_KABYLAKE_L:
- case INTEL_FAM6_KABYLAKE:
- case INTEL_FAM6_COMETLAKE_L:
- case INTEL_FAM6_COMETLAKE:
+ case INTEL_SKYLAKE_L:
+ case INTEL_SKYLAKE:
+ case INTEL_KABYLAKE_L:
+ case INTEL_KABYLAKE:
+ case INTEL_COMETLAKE_L:
+ case INTEL_COMETLAKE:
x86_add_quirk(intel_pebs_isolation_quirk);
x86_pmu.late_ack = true;
memcpy(hw_cache_event_ids, skl_hw_cache_event_ids, sizeof(hw_cache_event_ids));
@@ -6715,16 +6715,16 @@ __init int intel_pmu_init(void)
name = "skylake";
break;
- case INTEL_FAM6_ICELAKE_X:
- case INTEL_FAM6_ICELAKE_D:
+ case INTEL_ICELAKE_X:
+ case INTEL_ICELAKE_D:
x86_pmu.pebs_ept = 1;
pmem = true;
fallthrough;
- case INTEL_FAM6_ICELAKE_L:
- case INTEL_FAM6_ICELAKE:
- case INTEL_FAM6_TIGERLAKE_L:
- case INTEL_FAM6_TIGERLAKE:
- case INTEL_FAM6_ROCKETLAKE:
+ case INTEL_ICELAKE_L:
+ case INTEL_ICELAKE:
+ case INTEL_TIGERLAKE_L:
+ case INTEL_TIGERLAKE:
+ case INTEL_ROCKETLAKE:
x86_pmu.late_ack = true;
memcpy(hw_cache_event_ids, skl_hw_cache_event_ids, sizeof(hw_cache_event_ids));
memcpy(hw_cache_extra_regs, skl_hw_cache_extra_regs, sizeof(hw_cache_extra_regs));
@@ -6759,13 +6759,13 @@ __init int intel_pmu_init(void)
name = "icelake";
break;
- case INTEL_FAM6_SAPPHIRERAPIDS_X:
- case INTEL_FAM6_EMERALDRAPIDS_X:
+ case INTEL_SAPPHIRERAPIDS_X:
+ case INTEL_EMERALDRAPIDS_X:
x86_pmu.flags |= PMU_FL_MEM_LOADS_AUX;
x86_pmu.extra_regs = intel_glc_extra_regs;
fallthrough;
- case INTEL_FAM6_GRANITERAPIDS_X:
- case INTEL_FAM6_GRANITERAPIDS_D:
+ case INTEL_GRANITERAPIDS_X:
+ case INTEL_GRANITERAPIDS_D:
intel_pmu_init_glc(NULL);
if (!x86_pmu.extra_regs)
x86_pmu.extra_regs = intel_rwc_extra_regs;
@@ -6783,11 +6783,11 @@ __init int intel_pmu_init(void)
name = "sapphire_rapids";
break;
- case INTEL_FAM6_ALDERLAKE:
- case INTEL_FAM6_ALDERLAKE_L:
- case INTEL_FAM6_RAPTORLAKE:
- case INTEL_FAM6_RAPTORLAKE_P:
- case INTEL_FAM6_RAPTORLAKE_S:
+ case INTEL_ALDERLAKE:
+ case INTEL_ALDERLAKE_L:
+ case INTEL_RAPTORLAKE:
+ case INTEL_RAPTORLAKE_P:
+ case INTEL_RAPTORLAKE_S:
/*
* Alder Lake has 2 types of CPU, core and atom.
*
@@ -6845,8 +6845,8 @@ __init int intel_pmu_init(void)
name = "alderlake_hybrid";
break;
- case INTEL_FAM6_METEORLAKE:
- case INTEL_FAM6_METEORLAKE_L:
+ case INTEL_METEORLAKE:
+ case INTEL_METEORLAKE_L:
intel_pmu_init_hybrid(hybrid_big_small);
x86_pmu.pebs_latency_data = mtl_latency_data_small;
--
2.44.0
New CPU #defines encode vendor and family as well as model.
Signed-off-by: Tony Luck <[email protected]>
---
drivers/platform/x86/intel/turbo_max_3.c | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/drivers/platform/x86/intel/turbo_max_3.c b/drivers/platform/x86/intel/turbo_max_3.c
index 892140b62898..79a0bcdeffb8 100644
--- a/drivers/platform/x86/intel/turbo_max_3.c
+++ b/drivers/platform/x86/intel/turbo_max_3.c
@@ -114,8 +114,8 @@ static int itmt_legacy_cpu_online(unsigned int cpu)
}
static const struct x86_cpu_id itmt_legacy_cpu_ids[] = {
- X86_MATCH_INTEL_FAM6_MODEL(BROADWELL_X, NULL),
- X86_MATCH_INTEL_FAM6_MODEL(SKYLAKE_X, NULL),
+ X86_MATCH_VFM(INTEL_BROADWELL_X, NULL),
+ X86_MATCH_VFM(INTEL_SKYLAKE_X, NULL),
{}
};
--
2.44.0
New CPU #defines encode vendor and family as well as model.
Signed-off-by: Tony Luck <[email protected]>
---
.../intel/uncore-frequency/uncore-frequency.c | 56 +++++++++----------
1 file changed, 28 insertions(+), 28 deletions(-)
diff --git a/drivers/platform/x86/intel/uncore-frequency/uncore-frequency.c b/drivers/platform/x86/intel/uncore-frequency/uncore-frequency.c
index b89c0dda9e5d..b80feaf5828f 100644
--- a/drivers/platform/x86/intel/uncore-frequency/uncore-frequency.c
+++ b/drivers/platform/x86/intel/uncore-frequency/uncore-frequency.c
@@ -197,34 +197,34 @@ static struct notifier_block uncore_pm_nb = {
};
static const struct x86_cpu_id intel_uncore_cpu_ids[] = {
- X86_MATCH_INTEL_FAM6_MODEL(BROADWELL_G, NULL),
- X86_MATCH_INTEL_FAM6_MODEL(BROADWELL_X, NULL),
- X86_MATCH_INTEL_FAM6_MODEL(BROADWELL_D, NULL),
- X86_MATCH_INTEL_FAM6_MODEL(SKYLAKE_X, NULL),
- X86_MATCH_INTEL_FAM6_MODEL(ICELAKE_X, NULL),
- X86_MATCH_INTEL_FAM6_MODEL(ICELAKE_D, NULL),
- X86_MATCH_INTEL_FAM6_MODEL(SAPPHIRERAPIDS_X, NULL),
- X86_MATCH_INTEL_FAM6_MODEL(EMERALDRAPIDS_X, NULL),
- X86_MATCH_INTEL_FAM6_MODEL(KABYLAKE, NULL),
- X86_MATCH_INTEL_FAM6_MODEL(KABYLAKE_L, NULL),
- X86_MATCH_INTEL_FAM6_MODEL(COMETLAKE, NULL),
- X86_MATCH_INTEL_FAM6_MODEL(COMETLAKE_L, NULL),
- X86_MATCH_INTEL_FAM6_MODEL(CANNONLAKE_L, NULL),
- X86_MATCH_INTEL_FAM6_MODEL(ICELAKE, NULL),
- X86_MATCH_INTEL_FAM6_MODEL(ICELAKE_L, NULL),
- X86_MATCH_INTEL_FAM6_MODEL(ROCKETLAKE, NULL),
- X86_MATCH_INTEL_FAM6_MODEL(TIGERLAKE, NULL),
- X86_MATCH_INTEL_FAM6_MODEL(TIGERLAKE_L, NULL),
- X86_MATCH_INTEL_FAM6_MODEL(ALDERLAKE, NULL),
- X86_MATCH_INTEL_FAM6_MODEL(ALDERLAKE_L, NULL),
- X86_MATCH_INTEL_FAM6_MODEL(RAPTORLAKE, NULL),
- X86_MATCH_INTEL_FAM6_MODEL(RAPTORLAKE_P, NULL),
- X86_MATCH_INTEL_FAM6_MODEL(RAPTORLAKE_S, NULL),
- X86_MATCH_INTEL_FAM6_MODEL(METEORLAKE, NULL),
- X86_MATCH_INTEL_FAM6_MODEL(METEORLAKE_L, NULL),
- X86_MATCH_INTEL_FAM6_MODEL(ARROWLAKE, NULL),
- X86_MATCH_INTEL_FAM6_MODEL(ARROWLAKE_H, NULL),
- X86_MATCH_INTEL_FAM6_MODEL(LUNARLAKE_M, NULL),
+ X86_MATCH_VFM(INTEL_BROADWELL_G, NULL),
+ X86_MATCH_VFM(INTEL_BROADWELL_X, NULL),
+ X86_MATCH_VFM(INTEL_BROADWELL_D, NULL),
+ X86_MATCH_VFM(INTEL_SKYLAKE_X, NULL),
+ X86_MATCH_VFM(INTEL_ICELAKE_X, NULL),
+ X86_MATCH_VFM(INTEL_ICELAKE_D, NULL),
+ X86_MATCH_VFM(INTEL_SAPPHIRERAPIDS_X, NULL),
+ X86_MATCH_VFM(INTEL_EMERALDRAPIDS_X, NULL),
+ X86_MATCH_VFM(INTEL_KABYLAKE, NULL),
+ X86_MATCH_VFM(INTEL_KABYLAKE_L, NULL),
+ X86_MATCH_VFM(INTEL_COMETLAKE, NULL),
+ X86_MATCH_VFM(INTEL_COMETLAKE_L, NULL),
+ X86_MATCH_VFM(INTEL_CANNONLAKE_L, NULL),
+ X86_MATCH_VFM(INTEL_ICELAKE, NULL),
+ X86_MATCH_VFM(INTEL_ICELAKE_L, NULL),
+ X86_MATCH_VFM(INTEL_ROCKETLAKE, NULL),
+ X86_MATCH_VFM(INTEL_TIGERLAKE, NULL),
+ X86_MATCH_VFM(INTEL_TIGERLAKE_L, NULL),
+ X86_MATCH_VFM(INTEL_ALDERLAKE, NULL),
+ X86_MATCH_VFM(INTEL_ALDERLAKE_L, NULL),
+ X86_MATCH_VFM(INTEL_RAPTORLAKE, NULL),
+ X86_MATCH_VFM(INTEL_RAPTORLAKE_P, NULL),
+ X86_MATCH_VFM(INTEL_RAPTORLAKE_S, NULL),
+ X86_MATCH_VFM(INTEL_METEORLAKE, NULL),
+ X86_MATCH_VFM(INTEL_METEORLAKE_L, NULL),
+ X86_MATCH_VFM(INTEL_ARROWLAKE, NULL),
+ X86_MATCH_VFM(INTEL_ARROWLAKE_H, NULL),
+ X86_MATCH_VFM(INTEL_LUNARLAKE_M, NULL),
{}
};
MODULE_DEVICE_TABLE(x86cpu, intel_uncore_cpu_ids);
--
2.44.0
New CPU #defines encode vendor and family as well as model.
Signed-off-by: Tony Luck <[email protected]>
---
drivers/platform/x86/p2sb.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/platform/x86/p2sb.c b/drivers/platform/x86/p2sb.c
index 3d66e1d4eb1f..8cfbf0bbd346 100644
--- a/drivers/platform/x86/p2sb.c
+++ b/drivers/platform/x86/p2sb.c
@@ -24,7 +24,7 @@
#define SPI_DEVFN_GOLDMONT PCI_DEVFN(13, 2)
static const struct x86_cpu_id p2sb_cpu_ids[] = {
- X86_MATCH_INTEL_FAM6_MODEL(ATOM_GOLDMONT, P2SB_DEVFN_GOLDMONT),
+ X86_MATCH_VFM(INTEL_ATOM_GOLDMONT, P2SB_DEVFN_GOLDMONT),
{}
};
--
2.44.0
New CPU #defines encode vendor and family as well as model.
Signed-off-by: Tony Luck <[email protected]>
---
drivers/powercap/intel_rapl_common.c | 118 +++++++++++++--------------
1 file changed, 59 insertions(+), 59 deletions(-)
diff --git a/drivers/powercap/intel_rapl_common.c b/drivers/powercap/intel_rapl_common.c
index a28d54fd5222..59c36ea55712 100644
--- a/drivers/powercap/intel_rapl_common.c
+++ b/drivers/powercap/intel_rapl_common.c
@@ -1220,65 +1220,65 @@ static const struct rapl_defaults rapl_defaults_amd = {
};
static const struct x86_cpu_id rapl_ids[] __initconst = {
- X86_MATCH_INTEL_FAM6_MODEL(SANDYBRIDGE, &rapl_defaults_core),
- X86_MATCH_INTEL_FAM6_MODEL(SANDYBRIDGE_X, &rapl_defaults_core),
-
- X86_MATCH_INTEL_FAM6_MODEL(IVYBRIDGE, &rapl_defaults_core),
- X86_MATCH_INTEL_FAM6_MODEL(IVYBRIDGE_X, &rapl_defaults_core),
-
- X86_MATCH_INTEL_FAM6_MODEL(HASWELL, &rapl_defaults_core),
- X86_MATCH_INTEL_FAM6_MODEL(HASWELL_L, &rapl_defaults_core),
- X86_MATCH_INTEL_FAM6_MODEL(HASWELL_G, &rapl_defaults_core),
- X86_MATCH_INTEL_FAM6_MODEL(HASWELL_X, &rapl_defaults_hsw_server),
-
- X86_MATCH_INTEL_FAM6_MODEL(BROADWELL, &rapl_defaults_core),
- X86_MATCH_INTEL_FAM6_MODEL(BROADWELL_G, &rapl_defaults_core),
- X86_MATCH_INTEL_FAM6_MODEL(BROADWELL_D, &rapl_defaults_core),
- X86_MATCH_INTEL_FAM6_MODEL(BROADWELL_X, &rapl_defaults_hsw_server),
-
- X86_MATCH_INTEL_FAM6_MODEL(SKYLAKE, &rapl_defaults_core),
- X86_MATCH_INTEL_FAM6_MODEL(SKYLAKE_L, &rapl_defaults_core),
- X86_MATCH_INTEL_FAM6_MODEL(SKYLAKE_X, &rapl_defaults_hsw_server),
- X86_MATCH_INTEL_FAM6_MODEL(KABYLAKE_L, &rapl_defaults_core),
- X86_MATCH_INTEL_FAM6_MODEL(KABYLAKE, &rapl_defaults_core),
- X86_MATCH_INTEL_FAM6_MODEL(CANNONLAKE_L, &rapl_defaults_core),
- X86_MATCH_INTEL_FAM6_MODEL(ICELAKE_L, &rapl_defaults_core),
- X86_MATCH_INTEL_FAM6_MODEL(ICELAKE, &rapl_defaults_core),
- X86_MATCH_INTEL_FAM6_MODEL(ICELAKE_NNPI, &rapl_defaults_core),
- X86_MATCH_INTEL_FAM6_MODEL(ICELAKE_X, &rapl_defaults_hsw_server),
- X86_MATCH_INTEL_FAM6_MODEL(ICELAKE_D, &rapl_defaults_hsw_server),
- X86_MATCH_INTEL_FAM6_MODEL(COMETLAKE_L, &rapl_defaults_core),
- X86_MATCH_INTEL_FAM6_MODEL(COMETLAKE, &rapl_defaults_core),
- X86_MATCH_INTEL_FAM6_MODEL(TIGERLAKE_L, &rapl_defaults_core),
- X86_MATCH_INTEL_FAM6_MODEL(TIGERLAKE, &rapl_defaults_core),
- X86_MATCH_INTEL_FAM6_MODEL(ROCKETLAKE, &rapl_defaults_core),
- X86_MATCH_INTEL_FAM6_MODEL(ALDERLAKE, &rapl_defaults_core),
- X86_MATCH_INTEL_FAM6_MODEL(ALDERLAKE_L, &rapl_defaults_core),
- X86_MATCH_INTEL_FAM6_MODEL(ATOM_GRACEMONT, &rapl_defaults_core),
- X86_MATCH_INTEL_FAM6_MODEL(RAPTORLAKE, &rapl_defaults_core),
- X86_MATCH_INTEL_FAM6_MODEL(RAPTORLAKE_P, &rapl_defaults_core),
- X86_MATCH_INTEL_FAM6_MODEL(RAPTORLAKE_S, &rapl_defaults_core),
- X86_MATCH_INTEL_FAM6_MODEL(METEORLAKE, &rapl_defaults_core),
- X86_MATCH_INTEL_FAM6_MODEL(METEORLAKE_L, &rapl_defaults_core),
- X86_MATCH_INTEL_FAM6_MODEL(SAPPHIRERAPIDS_X, &rapl_defaults_spr_server),
- X86_MATCH_INTEL_FAM6_MODEL(EMERALDRAPIDS_X, &rapl_defaults_spr_server),
- X86_MATCH_INTEL_FAM6_MODEL(LUNARLAKE_M, &rapl_defaults_core),
- X86_MATCH_INTEL_FAM6_MODEL(ARROWLAKE, &rapl_defaults_core),
- X86_MATCH_INTEL_FAM6_MODEL(LAKEFIELD, &rapl_defaults_core),
-
- X86_MATCH_INTEL_FAM6_MODEL(ATOM_SILVERMONT, &rapl_defaults_byt),
- X86_MATCH_INTEL_FAM6_MODEL(ATOM_AIRMONT, &rapl_defaults_cht),
- X86_MATCH_INTEL_FAM6_MODEL(ATOM_SILVERMONT_MID, &rapl_defaults_tng),
- X86_MATCH_INTEL_FAM6_MODEL(ATOM_AIRMONT_MID, &rapl_defaults_ann),
- X86_MATCH_INTEL_FAM6_MODEL(ATOM_GOLDMONT, &rapl_defaults_core),
- X86_MATCH_INTEL_FAM6_MODEL(ATOM_GOLDMONT_PLUS, &rapl_defaults_core),
- X86_MATCH_INTEL_FAM6_MODEL(ATOM_GOLDMONT_D, &rapl_defaults_core),
- X86_MATCH_INTEL_FAM6_MODEL(ATOM_TREMONT, &rapl_defaults_core),
- X86_MATCH_INTEL_FAM6_MODEL(ATOM_TREMONT_D, &rapl_defaults_core),
- X86_MATCH_INTEL_FAM6_MODEL(ATOM_TREMONT_L, &rapl_defaults_core),
-
- X86_MATCH_INTEL_FAM6_MODEL(XEON_PHI_KNL, &rapl_defaults_hsw_server),
- X86_MATCH_INTEL_FAM6_MODEL(XEON_PHI_KNM, &rapl_defaults_hsw_server),
+ X86_MATCH_VFM(INTEL_SANDYBRIDGE, &rapl_defaults_core),
+ X86_MATCH_VFM(INTEL_SANDYBRIDGE_X, &rapl_defaults_core),
+
+ X86_MATCH_VFM(INTEL_IVYBRIDGE, &rapl_defaults_core),
+ X86_MATCH_VFM(INTEL_IVYBRIDGE_X, &rapl_defaults_core),
+
+ X86_MATCH_VFM(INTEL_HASWELL, &rapl_defaults_core),
+ X86_MATCH_VFM(INTEL_HASWELL_L, &rapl_defaults_core),
+ X86_MATCH_VFM(INTEL_HASWELL_G, &rapl_defaults_core),
+ X86_MATCH_VFM(INTEL_HASWELL_X, &rapl_defaults_hsw_server),
+
+ X86_MATCH_VFM(INTEL_BROADWELL, &rapl_defaults_core),
+ X86_MATCH_VFM(INTEL_BROADWELL_G, &rapl_defaults_core),
+ X86_MATCH_VFM(INTEL_BROADWELL_D, &rapl_defaults_core),
+ X86_MATCH_VFM(INTEL_BROADWELL_X, &rapl_defaults_hsw_server),
+
+ X86_MATCH_VFM(INTEL_SKYLAKE, &rapl_defaults_core),
+ X86_MATCH_VFM(INTEL_SKYLAKE_L, &rapl_defaults_core),
+ X86_MATCH_VFM(INTEL_SKYLAKE_X, &rapl_defaults_hsw_server),
+ X86_MATCH_VFM(INTEL_KABYLAKE_L, &rapl_defaults_core),
+ X86_MATCH_VFM(INTEL_KABYLAKE, &rapl_defaults_core),
+ X86_MATCH_VFM(INTEL_CANNONLAKE_L, &rapl_defaults_core),
+ X86_MATCH_VFM(INTEL_ICELAKE_L, &rapl_defaults_core),
+ X86_MATCH_VFM(INTEL_ICELAKE, &rapl_defaults_core),
+ X86_MATCH_VFM(INTEL_ICELAKE_NNPI, &rapl_defaults_core),
+ X86_MATCH_VFM(INTEL_ICELAKE_X, &rapl_defaults_hsw_server),
+ X86_MATCH_VFM(INTEL_ICELAKE_D, &rapl_defaults_hsw_server),
+ X86_MATCH_VFM(INTEL_COMETLAKE_L, &rapl_defaults_core),
+ X86_MATCH_VFM(INTEL_COMETLAKE, &rapl_defaults_core),
+ X86_MATCH_VFM(INTEL_TIGERLAKE_L, &rapl_defaults_core),
+ X86_MATCH_VFM(INTEL_TIGERLAKE, &rapl_defaults_core),
+ X86_MATCH_VFM(INTEL_ROCKETLAKE, &rapl_defaults_core),
+ X86_MATCH_VFM(INTEL_ALDERLAKE, &rapl_defaults_core),
+ X86_MATCH_VFM(INTEL_ALDERLAKE_L, &rapl_defaults_core),
+ X86_MATCH_VFM(INTEL_ATOM_GRACEMONT, &rapl_defaults_core),
+ X86_MATCH_VFM(INTEL_RAPTORLAKE, &rapl_defaults_core),
+ X86_MATCH_VFM(INTEL_RAPTORLAKE_P, &rapl_defaults_core),
+ X86_MATCH_VFM(INTEL_RAPTORLAKE_S, &rapl_defaults_core),
+ X86_MATCH_VFM(INTEL_METEORLAKE, &rapl_defaults_core),
+ X86_MATCH_VFM(INTEL_METEORLAKE_L, &rapl_defaults_core),
+ X86_MATCH_VFM(INTEL_SAPPHIRERAPIDS_X, &rapl_defaults_spr_server),
+ X86_MATCH_VFM(INTEL_EMERALDRAPIDS_X, &rapl_defaults_spr_server),
+ X86_MATCH_VFM(INTEL_LUNARLAKE_M, &rapl_defaults_core),
+ X86_MATCH_VFM(INTEL_ARROWLAKE, &rapl_defaults_core),
+ X86_MATCH_VFM(INTEL_LAKEFIELD, &rapl_defaults_core),
+
+ X86_MATCH_VFM(INTEL_ATOM_SILVERMONT, &rapl_defaults_byt),
+ X86_MATCH_VFM(INTEL_ATOM_AIRMONT, &rapl_defaults_cht),
+ X86_MATCH_VFM(INTEL_ATOM_SILVERMONT_MID, &rapl_defaults_tng),
+ X86_MATCH_VFM(INTEL_ATOM_AIRMONT_MID, &rapl_defaults_ann),
+ X86_MATCH_VFM(INTEL_ATOM_GOLDMONT, &rapl_defaults_core),
+ X86_MATCH_VFM(INTEL_ATOM_GOLDMONT_PLUS, &rapl_defaults_core),
+ X86_MATCH_VFM(INTEL_ATOM_GOLDMONT_D, &rapl_defaults_core),
+ X86_MATCH_VFM(INTEL_ATOM_TREMONT, &rapl_defaults_core),
+ X86_MATCH_VFM(INTEL_ATOM_TREMONT_D, &rapl_defaults_core),
+ X86_MATCH_VFM(INTEL_ATOM_TREMONT_L, &rapl_defaults_core),
+
+ X86_MATCH_VFM(INTEL_XEON_PHI_KNL, &rapl_defaults_hsw_server),
+ X86_MATCH_VFM(INTEL_XEON_PHI_KNM, &rapl_defaults_hsw_server),
X86_MATCH_VENDOR_FAM(AMD, 0x17, &rapl_defaults_amd),
X86_MATCH_VENDOR_FAM(AMD, 0x19, &rapl_defaults_amd),
--
2.44.0
New CPU #defines encode vendor and family as well as model.
Signed-off-by: Tony Luck <[email protected]>
---
.../atomisp/include/linux/atomisp_platform.h | 26 ++++++++-----------
1 file changed, 11 insertions(+), 15 deletions(-)
diff --git a/drivers/staging/media/atomisp/include/linux/atomisp_platform.h b/drivers/staging/media/atomisp/include/linux/atomisp_platform.h
index 487ef5846c24..59f71659b2d8 100644
--- a/drivers/staging/media/atomisp/include/linux/atomisp_platform.h
+++ b/drivers/staging/media/atomisp/include/linux/atomisp_platform.h
@@ -18,6 +18,7 @@
#ifndef ATOMISP_PLATFORM_H_
#define ATOMISP_PLATFORM_H_
+#include <asm/cpu_device_id.h>
#include <asm/intel-family.h>
#include <asm/processor.h>
@@ -217,22 +218,17 @@ void atomisp_unregister_subdev(struct v4l2_subdev *subdev);
int v4l2_get_acpi_sensor_info(struct device *dev, char **module_id_str);
/* API from old platform_camera.h, new CPUID implementation */
-#define __IS_SOC(x) (boot_cpu_data.x86_vendor == X86_VENDOR_INTEL && \
- boot_cpu_data.x86 == 6 && \
- boot_cpu_data.x86_model == (x))
-#define __IS_SOCS(x,y) (boot_cpu_data.x86_vendor == X86_VENDOR_INTEL && \
- boot_cpu_data.x86 == 6 && \
- (boot_cpu_data.x86_model == (x) || \
- boot_cpu_data.x86_model == (y)))
-
-#define IS_MFLD __IS_SOC(INTEL_FAM6_ATOM_SALTWELL_MID)
-#define IS_BYT __IS_SOC(INTEL_FAM6_ATOM_SILVERMONT)
-#define IS_CHT __IS_SOC(INTEL_FAM6_ATOM_AIRMONT)
-#define IS_MRFD __IS_SOC(INTEL_FAM6_ATOM_SILVERMONT_MID)
-#define IS_MOFD __IS_SOC(INTEL_FAM6_ATOM_AIRMONT_MID)
+#define __IS_SOC(x) (boot_cpu_data.x86_vfm == x)
+#define __IS_SOCS(x, y) (boot_cpu_data.x86_vfm == x || boot_cpu_data.x86_vfm == y)
+
+#define IS_MFLD __IS_SOC(INTEL_ATOM_SALTWELL_MID)
+#define IS_BYT __IS_SOC(INTEL_ATOM_SILVERMONT)
+#define IS_CHT __IS_SOC(INTEL_ATOM_AIRMONT)
+#define IS_MRFD __IS_SOC(INTEL_ATOM_SILVERMONT_MID)
+#define IS_MOFD __IS_SOC(INTEL_ATOM_AIRMONT_MID)
/* Both CHT and MOFD come with ISP2401 */
-#define IS_ISP2401 __IS_SOCS(INTEL_FAM6_ATOM_AIRMONT, \
- INTEL_FAM6_ATOM_AIRMONT_MID)
+#define IS_ISP2401 __IS_SOCS(INTEL_ATOM_AIRMONT, \
+ INTEL_ATOM_AIRMONT_MID)
#endif /* ATOMISP_PLATFORM_H_ */
--
2.44.0
New CPU #defines encode vendor and family as well as model.
Signed-off-by: Tony Luck <[email protected]>
---
include/linux/platform_data/x86/soc.h | 12 ++++++------
drivers/thermal/intel/intel_soc_dts_thermal.c | 2 +-
2 files changed, 7 insertions(+), 7 deletions(-)
diff --git a/include/linux/platform_data/x86/soc.h b/include/linux/platform_data/x86/soc.h
index a5705189e2ac..f981907a5cb0 100644
--- a/include/linux/platform_data/x86/soc.h
+++ b/include/linux/platform_data/x86/soc.h
@@ -20,7 +20,7 @@
static inline bool soc_intel_is_##soc(void) \
{ \
static const struct x86_cpu_id soc##_cpu_ids[] = { \
- X86_MATCH_INTEL_FAM6_MODEL(type, NULL), \
+ X86_MATCH_VFM(type, NULL), \
{} \
}; \
const struct x86_cpu_id *id; \
@@ -31,11 +31,11 @@ static inline bool soc_intel_is_##soc(void) \
return false; \
}
-SOC_INTEL_IS_CPU(byt, ATOM_SILVERMONT);
-SOC_INTEL_IS_CPU(cht, ATOM_AIRMONT);
-SOC_INTEL_IS_CPU(apl, ATOM_GOLDMONT);
-SOC_INTEL_IS_CPU(glk, ATOM_GOLDMONT_PLUS);
-SOC_INTEL_IS_CPU(cml, KABYLAKE_L);
+SOC_INTEL_IS_CPU(byt, INTEL_ATOM_SILVERMONT);
+SOC_INTEL_IS_CPU(cht, INTEL_ATOM_AIRMONT);
+SOC_INTEL_IS_CPU(apl, INTEL_ATOM_GOLDMONT);
+SOC_INTEL_IS_CPU(glk, INTEL_ATOM_GOLDMONT_PLUS);
+SOC_INTEL_IS_CPU(cml, INTEL_KABYLAKE_L);
#undef SOC_INTEL_IS_CPU
diff --git a/drivers/thermal/intel/intel_soc_dts_thermal.c b/drivers/thermal/intel/intel_soc_dts_thermal.c
index 9c825c6e1f38..718c6326eaf4 100644
--- a/drivers/thermal/intel/intel_soc_dts_thermal.c
+++ b/drivers/thermal/intel/intel_soc_dts_thermal.c
@@ -36,7 +36,7 @@ static irqreturn_t soc_irq_thread_fn(int irq, void *dev_data)
}
static const struct x86_cpu_id soc_thermal_ids[] = {
- X86_MATCH_INTEL_FAM6_MODEL(ATOM_SILVERMONT, BYT_SOC_DTS_APIC_IRQ),
+ X86_MATCH_VFM(INTEL_ATOM_SILVERMONT, BYT_SOC_DTS_APIC_IRQ),
{}
};
MODULE_DEVICE_TABLE(x86cpu, soc_thermal_ids);
--
2.44.0
New CPU #defines encode vendor and family as well as model.
Signed-off-by: Tony Luck <[email protected]>
---
drivers/thermal/intel/intel_tcc_cooling.c | 30 +++++++++++------------
1 file changed, 15 insertions(+), 15 deletions(-)
diff --git a/drivers/thermal/intel/intel_tcc_cooling.c b/drivers/thermal/intel/intel_tcc_cooling.c
index 6c392147e6d1..63696e7d7b3c 100644
--- a/drivers/thermal/intel/intel_tcc_cooling.c
+++ b/drivers/thermal/intel/intel_tcc_cooling.c
@@ -49,21 +49,21 @@ static const struct thermal_cooling_device_ops tcc_cooling_ops = {
};
static const struct x86_cpu_id tcc_ids[] __initconst = {
- X86_MATCH_INTEL_FAM6_MODEL(SKYLAKE, NULL),
- X86_MATCH_INTEL_FAM6_MODEL(SKYLAKE_L, NULL),
- X86_MATCH_INTEL_FAM6_MODEL(KABYLAKE, NULL),
- X86_MATCH_INTEL_FAM6_MODEL(KABYLAKE_L, NULL),
- X86_MATCH_INTEL_FAM6_MODEL(ICELAKE, NULL),
- X86_MATCH_INTEL_FAM6_MODEL(ICELAKE_L, NULL),
- X86_MATCH_INTEL_FAM6_MODEL(TIGERLAKE, NULL),
- X86_MATCH_INTEL_FAM6_MODEL(TIGERLAKE_L, NULL),
- X86_MATCH_INTEL_FAM6_MODEL(COMETLAKE, NULL),
- X86_MATCH_INTEL_FAM6_MODEL(ALDERLAKE, NULL),
- X86_MATCH_INTEL_FAM6_MODEL(ALDERLAKE_L, NULL),
- X86_MATCH_INTEL_FAM6_MODEL(ATOM_GRACEMONT, NULL),
- X86_MATCH_INTEL_FAM6_MODEL(RAPTORLAKE, NULL),
- X86_MATCH_INTEL_FAM6_MODEL(RAPTORLAKE_P, NULL),
- X86_MATCH_INTEL_FAM6_MODEL(RAPTORLAKE_S, NULL),
+ X86_MATCH_VFM(INTEL_SKYLAKE, NULL),
+ X86_MATCH_VFM(INTEL_SKYLAKE_L, NULL),
+ X86_MATCH_VFM(INTEL_KABYLAKE, NULL),
+ X86_MATCH_VFM(INTEL_KABYLAKE_L, NULL),
+ X86_MATCH_VFM(INTEL_ICELAKE, NULL),
+ X86_MATCH_VFM(INTEL_ICELAKE_L, NULL),
+ X86_MATCH_VFM(INTEL_TIGERLAKE, NULL),
+ X86_MATCH_VFM(INTEL_TIGERLAKE_L, NULL),
+ X86_MATCH_VFM(INTEL_COMETLAKE, NULL),
+ X86_MATCH_VFM(INTEL_ALDERLAKE, NULL),
+ X86_MATCH_VFM(INTEL_ALDERLAKE_L, NULL),
+ X86_MATCH_VFM(INTEL_ATOM_GRACEMONT, NULL),
+ X86_MATCH_VFM(INTEL_RAPTORLAKE, NULL),
+ X86_MATCH_VFM(INTEL_RAPTORLAKE_P, NULL),
+ X86_MATCH_VFM(INTEL_RAPTORLAKE_S, NULL),
{}
};
--
2.44.0
New CPU #defines encode vendor and family as well as model.
Signed-off-by: Tony Luck <[email protected]>
---
sound/soc/intel/avs/boards/es8336.c | 7 ++++---
1 file changed, 4 insertions(+), 3 deletions(-)
diff --git a/sound/soc/intel/avs/boards/es8336.c b/sound/soc/intel/avs/boards/es8336.c
index 5c90a6007577..6c86c581877e 100644
--- a/sound/soc/intel/avs/boards/es8336.c
+++ b/sound/soc/intel/avs/boards/es8336.c
@@ -18,6 +18,7 @@
#include <sound/pcm_params.h>
#include <sound/soc.h>
#include <sound/soc-acpi.h>
+#include <asm/cpu_device_id.h>
#include <asm/intel-family.h>
#include "../utils.h"
@@ -153,9 +154,9 @@ static int avs_es8336_hw_params(struct snd_pcm_substream *substream,
int clk_freq;
int ret;
- switch (boot_cpu_data.x86_model) {
- case INTEL_FAM6_KABYLAKE_L:
- case INTEL_FAM6_KABYLAKE:
+ switch (boot_cpu_data.x86_vfm) {
+ case INTEL_KABYLAKE_L:
+ case INTEL_KABYLAKE:
clk_freq = 24000000;
break;
default:
--
2.44.0
New CPU #defines encode vendor and family as well as model.
Signed-off-by: Tony Luck <[email protected]>
---
tools/power/x86/turbostat/turbostat.c | 161 +++++++++++++++-----------
1 file changed, 93 insertions(+), 68 deletions(-)
diff --git a/tools/power/x86/turbostat/turbostat.c b/tools/power/x86/turbostat/turbostat.c
index 98256468e248..80dc3bdaa5fc 100644
--- a/tools/power/x86/turbostat/turbostat.c
+++ b/tools/power/x86/turbostat/turbostat.c
@@ -9,6 +9,30 @@
#define _GNU_SOURCE
#include MSRHEADER
+
+// copied from arch/x86/include/asm/cpu_device_id.h
+#define VFM_MODEL_BIT 0
+#define VFM_FAMILY_BIT 8
+#define VFM_VENDOR_BIT 16
+#define VFM_RSVD_BIT 24
+
+#define VFM_MODEL_MASK GENMASK(VFM_FAMILY_BIT - 1, VFM_MODEL_BIT)
+#define VFM_FAMILY_MASK GENMASK(VFM_VENDOR_BIT - 1, VFM_FAMILY_BIT)
+#define VFM_VENDOR_MASK GENMASK(VFM_RSVD_BIT - 1, VFM_VENDOR_BIT)
+
+#define VFM_MODEL(vfm) (((vfm) & VFM_MODEL_MASK) >> VFM_MODEL_BIT)
+#define VFM_FAMILY(vfm) (((vfm) & VFM_FAMILY_MASK) >> VFM_FAMILY_BIT)
+#define VFM_VENDOR(vfm) (((vfm) & VFM_VENDOR_MASK) >> VFM_VENDOR_BIT)
+
+#define VFM_MAKE(_vendor, _family, _model) ( \
+ ((_model) << VFM_MODEL_BIT) | \
+ ((_family) << VFM_FAMILY_BIT) | \
+ ((_vendor) << VFM_VENDOR_BIT) \
+)
+// end copied section
+
+#define X86_VENDOR_INTEL 0
+
#include INTEL_FAMILY_HEADER
#include <stdarg.h>
#include <stdio.h>
@@ -334,7 +358,7 @@ struct platform_features {
};
struct platform_data {
- unsigned int model;
+ unsigned int vfm;
const struct platform_features *features;
};
@@ -860,73 +884,73 @@ static const struct platform_features amd_features_with_rapl = {
};
static const struct platform_data turbostat_pdata[] = {
- { INTEL_FAM6_NEHALEM, &nhm_features },
- { INTEL_FAM6_NEHALEM_G, &nhm_features },
- { INTEL_FAM6_NEHALEM_EP, &nhm_features },
- { INTEL_FAM6_NEHALEM_EX, &nhx_features },
- { INTEL_FAM6_WESTMERE, &nhm_features },
- { INTEL_FAM6_WESTMERE_EP, &nhm_features },
- { INTEL_FAM6_WESTMERE_EX, &nhx_features },
- { INTEL_FAM6_SANDYBRIDGE, &snb_features },
- { INTEL_FAM6_SANDYBRIDGE_X, &snx_features },
- { INTEL_FAM6_IVYBRIDGE, &ivb_features },
- { INTEL_FAM6_IVYBRIDGE_X, &ivx_features },
- { INTEL_FAM6_HASWELL, &hsw_features },
- { INTEL_FAM6_HASWELL_X, &hsx_features },
- { INTEL_FAM6_HASWELL_L, &hswl_features },
- { INTEL_FAM6_HASWELL_G, &hswg_features },
- { INTEL_FAM6_BROADWELL, &bdw_features },
- { INTEL_FAM6_BROADWELL_G, &bdwg_features },
- { INTEL_FAM6_BROADWELL_X, &bdx_features },
- { INTEL_FAM6_BROADWELL_D, &bdx_features },
- { INTEL_FAM6_SKYLAKE_L, &skl_features },
- { INTEL_FAM6_SKYLAKE, &skl_features },
- { INTEL_FAM6_SKYLAKE_X, &skx_features },
- { INTEL_FAM6_KABYLAKE_L, &skl_features },
- { INTEL_FAM6_KABYLAKE, &skl_features },
- { INTEL_FAM6_COMETLAKE, &skl_features },
- { INTEL_FAM6_COMETLAKE_L, &skl_features },
- { INTEL_FAM6_CANNONLAKE_L, &cnl_features },
- { INTEL_FAM6_ICELAKE_X, &icx_features },
- { INTEL_FAM6_ICELAKE_D, &icx_features },
- { INTEL_FAM6_ICELAKE_L, &cnl_features },
- { INTEL_FAM6_ICELAKE_NNPI, &cnl_features },
- { INTEL_FAM6_ROCKETLAKE, &cnl_features },
- { INTEL_FAM6_TIGERLAKE_L, &cnl_features },
- { INTEL_FAM6_TIGERLAKE, &cnl_features },
- { INTEL_FAM6_SAPPHIRERAPIDS_X, &spr_features },
- { INTEL_FAM6_EMERALDRAPIDS_X, &spr_features },
- { INTEL_FAM6_GRANITERAPIDS_X, &spr_features },
- { INTEL_FAM6_LAKEFIELD, &cnl_features },
- { INTEL_FAM6_ALDERLAKE, &adl_features },
- { INTEL_FAM6_ALDERLAKE_L, &adl_features },
- { INTEL_FAM6_RAPTORLAKE, &adl_features },
- { INTEL_FAM6_RAPTORLAKE_P, &adl_features },
- { INTEL_FAM6_RAPTORLAKE_S, &adl_features },
- { INTEL_FAM6_METEORLAKE, &cnl_features },
- { INTEL_FAM6_METEORLAKE_L, &cnl_features },
- { INTEL_FAM6_ARROWLAKE, &cnl_features },
- { INTEL_FAM6_LUNARLAKE_M, &cnl_features },
- { INTEL_FAM6_ATOM_SILVERMONT, &slv_features },
- { INTEL_FAM6_ATOM_SILVERMONT_D, &slvd_features },
- { INTEL_FAM6_ATOM_AIRMONT, &amt_features },
- { INTEL_FAM6_ATOM_GOLDMONT, &gmt_features },
- { INTEL_FAM6_ATOM_GOLDMONT_D, &gmtd_features },
- { INTEL_FAM6_ATOM_GOLDMONT_PLUS, &gmtp_features },
- { INTEL_FAM6_ATOM_TREMONT_D, &tmtd_features },
- { INTEL_FAM6_ATOM_TREMONT, &tmt_features },
- { INTEL_FAM6_ATOM_TREMONT_L, &tmt_features },
- { INTEL_FAM6_ATOM_GRACEMONT, &adl_features },
- { INTEL_FAM6_ATOM_CRESTMONT_X, &srf_features },
- { INTEL_FAM6_ATOM_CRESTMONT, &grr_features },
- { INTEL_FAM6_XEON_PHI_KNL, &knl_features },
- { INTEL_FAM6_XEON_PHI_KNM, &knl_features },
+ { INTEL_NEHALEM, &nhm_features },
+ { INTEL_NEHALEM_G, &nhm_features },
+ { INTEL_NEHALEM_EP, &nhm_features },
+ { INTEL_NEHALEM_EX, &nhx_features },
+ { INTEL_WESTMERE, &nhm_features },
+ { INTEL_WESTMERE_EP, &nhm_features },
+ { INTEL_WESTMERE_EX, &nhx_features },
+ { INTEL_SANDYBRIDGE, &snb_features },
+ { INTEL_SANDYBRIDGE_X, &snx_features },
+ { INTEL_IVYBRIDGE, &ivb_features },
+ { INTEL_IVYBRIDGE_X, &ivx_features },
+ { INTEL_HASWELL, &hsw_features },
+ { INTEL_HASWELL_X, &hsx_features },
+ { INTEL_HASWELL_L, &hswl_features },
+ { INTEL_HASWELL_G, &hswg_features },
+ { INTEL_BROADWELL, &bdw_features },
+ { INTEL_BROADWELL_G, &bdwg_features },
+ { INTEL_BROADWELL_X, &bdx_features },
+ { INTEL_BROADWELL_D, &bdx_features },
+ { INTEL_SKYLAKE_L, &skl_features },
+ { INTEL_SKYLAKE, &skl_features },
+ { INTEL_SKYLAKE_X, &skx_features },
+ { INTEL_KABYLAKE_L, &skl_features },
+ { INTEL_KABYLAKE, &skl_features },
+ { INTEL_COMETLAKE, &skl_features },
+ { INTEL_COMETLAKE_L, &skl_features },
+ { INTEL_CANNONLAKE_L, &cnl_features },
+ { INTEL_ICELAKE_X, &icx_features },
+ { INTEL_ICELAKE_D, &icx_features },
+ { INTEL_ICELAKE_L, &cnl_features },
+ { INTEL_ICELAKE_NNPI, &cnl_features },
+ { INTEL_ROCKETLAKE, &cnl_features },
+ { INTEL_TIGERLAKE_L, &cnl_features },
+ { INTEL_TIGERLAKE, &cnl_features },
+ { INTEL_SAPPHIRERAPIDS_X, &spr_features },
+ { INTEL_EMERALDRAPIDS_X, &spr_features },
+ { INTEL_GRANITERAPIDS_X, &spr_features },
+ { INTEL_LAKEFIELD, &cnl_features },
+ { INTEL_ALDERLAKE, &adl_features },
+ { INTEL_ALDERLAKE_L, &adl_features },
+ { INTEL_RAPTORLAKE, &adl_features },
+ { INTEL_RAPTORLAKE_P, &adl_features },
+ { INTEL_RAPTORLAKE_S, &adl_features },
+ { INTEL_METEORLAKE, &cnl_features },
+ { INTEL_METEORLAKE_L, &cnl_features },
+ { INTEL_ARROWLAKE, &cnl_features },
+ { INTEL_LUNARLAKE_M, &cnl_features },
+ { INTEL_ATOM_SILVERMONT, &slv_features },
+ { INTEL_ATOM_SILVERMONT_D, &slvd_features },
+ { INTEL_ATOM_AIRMONT, &amt_features },
+ { INTEL_ATOM_GOLDMONT, &gmt_features },
+ { INTEL_ATOM_GOLDMONT_D, &gmtd_features },
+ { INTEL_ATOM_GOLDMONT_PLUS, &gmtp_features },
+ { INTEL_ATOM_TREMONT_D, &tmtd_features },
+ { INTEL_ATOM_TREMONT, &tmt_features },
+ { INTEL_ATOM_TREMONT_L, &tmt_features },
+ { INTEL_ATOM_GRACEMONT, &adl_features },
+ { INTEL_ATOM_CRESTMONT_X, &srf_features },
+ { INTEL_ATOM_CRESTMONT, &grr_features },
+ { INTEL_XEON_PHI_KNL, &knl_features },
+ { INTEL_XEON_PHI_KNM, &knl_features },
/*
* Missing support for
- * INTEL_FAM6_ICELAKE
- * INTEL_FAM6_ATOM_SILVERMONT_MID
- * INTEL_FAM6_ATOM_AIRMONT_MID
- * INTEL_FAM6_ATOM_AIRMONT_NP
+ * INTEL_ICELAKE
+ * INTEL_ATOM_SILVERMONT_MID
+ * INTEL_ATOM_AIRMONT_MID
+ * INTEL_ATOM_AIRMONT_NP
*/
{ 0, NULL },
};
@@ -951,11 +975,12 @@ void probe_platform_features(unsigned int family, unsigned int model)
return;
}
- if (!genuine_intel || family != 6)
+ if (!genuine_intel)
return;
for (i = 0; turbostat_pdata[i].features; i++) {
- if (turbostat_pdata[i].model == model) {
+ if (VFM_FAMILY(turbostat_pdata[i].vfm) == family &&
+ VFM_MODEL(turbostat_pdata[i].vfm) == model) {
platform = turbostat_pdata[i].features;
return;
}
--
2.44.0
New CPU #defines encode vendor and family as well as model.
Signed-off-by: Tony Luck <[email protected]>
---
drivers/acpi/acpi_lpss.c | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/drivers/acpi/acpi_lpss.c b/drivers/acpi/acpi_lpss.c
index 04e273167e92..e7b57dcce146 100644
--- a/drivers/acpi/acpi_lpss.c
+++ b/drivers/acpi/acpi_lpss.c
@@ -337,8 +337,8 @@ static const struct lpss_device_desc bsw_spi_dev_desc = {
};
static const struct x86_cpu_id lpss_cpu_ids[] = {
- X86_MATCH_INTEL_FAM6_MODEL(ATOM_SILVERMONT, NULL),
- X86_MATCH_INTEL_FAM6_MODEL(ATOM_AIRMONT, NULL),
+ X86_MATCH_VFM(INTEL_ATOM_SILVERMONT, NULL),
+ X86_MATCH_VFM(INTEL_ATOM_AIRMONT, NULL),
{}
};
--
2.44.0
These macros have been replaced by X86_MATCH_VFM[_STEPPING]()
Signed-off-by: Tony Luck <[email protected]>
---
arch/x86/include/asm/cpu_device_id.h | 20 --------------------
1 file changed, 20 deletions(-)
diff --git a/arch/x86/include/asm/cpu_device_id.h b/arch/x86/include/asm/cpu_device_id.h
index 71bda84c20c3..1d4e977e64ca 100644
--- a/arch/x86/include/asm/cpu_device_id.h
+++ b/arch/x86/include/asm/cpu_device_id.h
@@ -187,26 +187,6 @@
#define X86_MATCH_VENDOR_FAM(vendor, family, data) \
X86_MATCH_VENDOR_FAM_MODEL(vendor, family, X86_MODEL_ANY, data)
-/**
- * X86_MATCH_INTEL_FAM6_MODEL - Match vendor INTEL, family 6 and model
- * @model: The model name without the INTEL_FAM6_ prefix or ANY
- * The model name is expanded to INTEL_FAM6_@model internally
- * @data: Driver specific data or NULL. The internal storage
- * format is unsigned long. The supplied value, pointer
- * etc. is casted to unsigned long internally.
- *
- * The vendor is set to INTEL, the family to 6 and all other missing
- * arguments of X86_MATCH_VENDOR_FAM_MODEL_FEATURE() are set to wildcards.
- *
- * See X86_MATCH_VENDOR_FAM_MODEL_FEATURE() for further information.
- */
-#define X86_MATCH_INTEL_FAM6_MODEL(model, data) \
- X86_MATCH_VENDOR_FAM_MODEL(INTEL, 6, INTEL_FAM6_##model, data)
-
-#define X86_MATCH_INTEL_FAM6_MODEL_STEPPINGS(model, steppings, data) \
- X86_MATCH_VENDOR_FAM_MODEL_STEPPINGS_FEATURE(INTEL, 6, INTEL_FAM6_##model, \
- steppings, X86_FEATURE_ANY, data)
-
/**
* X86_MATCH_VFM - Match encoded vendor/family/model
* @vfm: Encoded 8-bits each for vendor, family, model
--
2.44.0
New CPU #defines encode vendor and family as well as model.
Signed-off-by: Tony Luck <[email protected]>
---
drivers/cpufreq/speedstep-centrino.c | 8 ++++----
1 file changed, 4 insertions(+), 4 deletions(-)
diff --git a/drivers/cpufreq/speedstep-centrino.c b/drivers/cpufreq/speedstep-centrino.c
index 75b10ecdb60f..ddd6f53bfd2a 100644
--- a/drivers/cpufreq/speedstep-centrino.c
+++ b/drivers/cpufreq/speedstep-centrino.c
@@ -520,10 +520,10 @@ static struct cpufreq_driver centrino_driver = {
* or ASCII model IDs.
*/
static const struct x86_cpu_id centrino_ids[] = {
- X86_MATCH_VENDOR_FAM_MODEL_FEATURE(INTEL, 6, 9, X86_FEATURE_EST, NULL),
- X86_MATCH_VENDOR_FAM_MODEL_FEATURE(INTEL, 6, 13, X86_FEATURE_EST, NULL),
- X86_MATCH_VENDOR_FAM_MODEL_FEATURE(INTEL, 15, 3, X86_FEATURE_EST, NULL),
- X86_MATCH_VENDOR_FAM_MODEL_FEATURE(INTEL, 15, 4, X86_FEATURE_EST, NULL),
+ X86_MATCH_VFM_FEATURE(IFM( 6, 9), X86_FEATURE_EST, NULL),
+ X86_MATCH_VFM_FEATURE(IFM( 6, 13), X86_FEATURE_EST, NULL),
+ X86_MATCH_VFM_FEATURE(IFM(15, 3), X86_FEATURE_EST, NULL),
+ X86_MATCH_VFM_FEATURE(IFM(15, 4), X86_FEATURE_EST, NULL),
{}
};
--
2.44.0
New CPU #defines encode vendor and family as well as model.
Signed-off-by: Tony Luck <[email protected]>
---
drivers/edac/pnd2_edac.c | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/drivers/edac/pnd2_edac.c b/drivers/edac/pnd2_edac.c
index 2afcd148fcf8..f93f2f2b1cf2 100644
--- a/drivers/edac/pnd2_edac.c
+++ b/drivers/edac/pnd2_edac.c
@@ -1511,8 +1511,8 @@ static struct dunit_ops dnv_ops = {
};
static const struct x86_cpu_id pnd2_cpuids[] = {
- X86_MATCH_INTEL_FAM6_MODEL(ATOM_GOLDMONT, &apl_ops),
- X86_MATCH_INTEL_FAM6_MODEL(ATOM_GOLDMONT_D, &dnv_ops),
+ X86_MATCH_VFM(INTEL_ATOM_GOLDMONT, &apl_ops),
+ X86_MATCH_VFM(INTEL_ATOM_GOLDMONT_D, &dnv_ops),
{ }
};
MODULE_DEVICE_TABLE(x86cpu, pnd2_cpuids);
--
2.44.0
[+cc Andy]
On Tue, Apr 16, 2024 at 02:22:19PM -0700, Tony Luck wrote:
> New CPU #defines encode vendor and family as well as model.
>
> Signed-off-by: Tony Luck <[email protected]>
Acked-by: Bjorn Helgaas <[email protected]>
Possibly consider updating subject line with a hint about what
"update" refers to, since every commit is an update. I guess "vfm" is
some kind of a hint, but I don't know what it means. I suppose it is
for "vendor, family, model".
> ---
> drivers/pci/pci-mid.c | 4 ++--
> 1 file changed, 2 insertions(+), 2 deletions(-)
>
> diff --git a/drivers/pci/pci-mid.c b/drivers/pci/pci-mid.c
> index fbfd78127123..bed9f0755271 100644
> --- a/drivers/pci/pci-mid.c
> +++ b/drivers/pci/pci-mid.c
> @@ -38,8 +38,8 @@ pci_power_t mid_pci_get_power_state(struct pci_dev *pdev)
> * arch/x86/platform/intel-mid/pwr.c.
> */
> static const struct x86_cpu_id lpss_cpu_ids[] = {
> - X86_MATCH_INTEL_FAM6_MODEL(ATOM_SALTWELL_MID, NULL),
> - X86_MATCH_INTEL_FAM6_MODEL(ATOM_SILVERMONT_MID, NULL),
> + X86_MATCH_VFM(INTEL_ATOM_SALTWELL_MID, NULL),
> + X86_MATCH_VFM(INTEL_ATOM_SILVERMONT_MID, NULL),
> {}
> };
>
> --
> 2.44.0
>
New CPU #defines encode vendor and family as well as model.
Signed-off-by: Tony Luck <[email protected]>
---
include/linux/peci-cpu.h | 1 +
drivers/peci/cpu.c | 28 ++++++++++++++--------------
2 files changed, 15 insertions(+), 14 deletions(-)
diff --git a/include/linux/peci-cpu.h b/include/linux/peci-cpu.h
index ff8ae9c26c80..2c972b728524 100644
--- a/include/linux/peci-cpu.h
+++ b/include/linux/peci-cpu.h
@@ -6,6 +6,7 @@
#include <linux/types.h>
+#include "../../arch/x86/include/asm/cpu_device_id.h"
#include "../../arch/x86/include/asm/intel-family.h"
#define PECI_PCS_PKG_ID 0 /* Package Identifier Read */
diff --git a/drivers/peci/cpu.c b/drivers/peci/cpu.c
index bd990acd92b8..8e8292c05551 100644
--- a/drivers/peci/cpu.c
+++ b/drivers/peci/cpu.c
@@ -294,38 +294,38 @@ peci_cpu_probe(struct peci_device *device, const struct peci_device_id *id)
static const struct peci_device_id peci_cpu_device_ids[] = {
{ /* Haswell Xeon */
- .family = 6,
- .model = INTEL_FAM6_HASWELL_X,
+ .family = VFM_FAMILY(INTEL_HASWELL_X),
+ .model = VFM_MODEL(INTEL_HASWELL_X),
.data = "hsx",
},
{ /* Broadwell Xeon */
- .family = 6,
- .model = INTEL_FAM6_BROADWELL_X,
+ .family = VFM_FAMILY(INTEL_BROADWELL_X),
+ .model = VFM_MODEL(INTEL_BROADWELL_X),
.data = "bdx",
},
{ /* Broadwell Xeon D */
- .family = 6,
- .model = INTEL_FAM6_BROADWELL_D,
+ .family = VFM_FAMILY(INTEL_BROADWELL_D),
+ .model = VFM_MODEL(INTEL_BROADWELL_D),
.data = "bdxd",
},
{ /* Skylake Xeon */
- .family = 6,
- .model = INTEL_FAM6_SKYLAKE_X,
+ .family = VFM_FAMILY(INTEL_SKYLAKE_X),
+ .model = VFM_MODEL(INTEL_SKYLAKE_X),
.data = "skx",
},
{ /* Icelake Xeon */
- .family = 6,
- .model = INTEL_FAM6_ICELAKE_X,
+ .family = VFM_FAMILY(INTEL_ICELAKE_X),
+ .model = VFM_MODEL(INTEL_ICELAKE_X),
.data = "icx",
},
{ /* Icelake Xeon D */
- .family = 6,
- .model = INTEL_FAM6_ICELAKE_D,
+ .family = VFM_FAMILY(INTEL_ICELAKE_D),
+ .model = VFM_MODEL(INTEL_ICELAKE_D),
.data = "icxd",
},
{ /* Sapphire Rapids Xeon */
- .family = 6,
- .model = INTEL_FAM6_SAPPHIRERAPIDS_X,
+ .family = VFM_FAMILY(INTEL_SAPPHIRERAPIDS_X),
+ .model = VFM_MODEL(INTEL_SAPPHIRERAPIDS_X),
.data = "spr",
},
{ }
--
2.44.0
New CPU #defines encode vendor and family as well as model.
Signed-off-by: Tony Luck <[email protected]>
---
drivers/platform/x86/intel_ips.c | 3 ++-
1 file changed, 2 insertions(+), 1 deletion(-)
diff --git a/drivers/platform/x86/intel_ips.c b/drivers/platform/x86/intel_ips.c
index ba38649cc142..d95f686e0515 100644
--- a/drivers/platform/x86/intel_ips.c
+++ b/drivers/platform/x86/intel_ips.c
@@ -62,6 +62,7 @@
#include <drm/i915_drm.h>
#include <asm/msr.h>
#include <asm/processor.h>
+#include <asm/cpu_device_id.h>
#include "intel_ips.h"
#include <linux/io-64-nonatomic-lo-hi.h>
@@ -1284,7 +1285,7 @@ static struct ips_mcp_limits *ips_detect_cpu(struct ips_driver *ips)
struct ips_mcp_limits *limits = NULL;
u16 tdp;
- if (!(boot_cpu_data.x86 == 6 && boot_cpu_data.x86_model == 37)) {
+ if (!(boot_cpu_data.x86_vfm == INTEL_WESTMERE)) {
dev_info(ips->dev, "Non-IPS CPU detected.\n");
return NULL;
}
--
2.44.0
New CPU #defines encode vendor and family as well as model.
Signed-off-by: Tony Luck <[email protected]>
---
drivers/platform/x86/intel/speed_select_if/isst_if_common.c | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/drivers/platform/x86/intel/speed_select_if/isst_if_common.c b/drivers/platform/x86/intel/speed_select_if/isst_if_common.c
index 08df9494603c..96f3b221b6c8 100644
--- a/drivers/platform/x86/intel/speed_select_if/isst_if_common.c
+++ b/drivers/platform/x86/intel/speed_select_if/isst_if_common.c
@@ -719,8 +719,8 @@ static struct miscdevice isst_if_char_driver = {
};
static const struct x86_cpu_id hpm_cpu_ids[] = {
- X86_MATCH_INTEL_FAM6_MODEL(GRANITERAPIDS_X, NULL),
- X86_MATCH_INTEL_FAM6_MODEL(ATOM_CRESTMONT_X, NULL),
+ X86_MATCH_VFM(INTEL_GRANITERAPIDS_X, NULL),
+ X86_MATCH_VFM(INTEL_ATOM_CRESTMONT_X, NULL),
{}
};
--
2.44.0
New CPU #defines encode vendor and family as well as model.
Signed-off-by: Tony Luck <[email protected]>
---
drivers/platform/x86/intel/speed_select_if/isst_if_mbox_msr.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/platform/x86/intel/speed_select_if/isst_if_mbox_msr.c b/drivers/platform/x86/intel/speed_select_if/isst_if_mbox_msr.c
index 1b6eab071068..6c36f7704fe7 100644
--- a/drivers/platform/x86/intel/speed_select_if/isst_if_mbox_msr.c
+++ b/drivers/platform/x86/intel/speed_select_if/isst_if_mbox_msr.c
@@ -161,7 +161,7 @@ static struct notifier_block isst_pm_nb = {
};
static const struct x86_cpu_id isst_if_cpu_ids[] = {
- X86_MATCH_INTEL_FAM6_MODEL(SKYLAKE_X, NULL),
+ X86_MATCH_VFM(INTEL_SKYLAKE_X, NULL),
{}
};
MODULE_DEVICE_TABLE(x86cpu, isst_if_cpu_ids);
--
2.44.0
New CPU #defines encode vendor and family as well as model.
Signed-off-by: Tony Luck <[email protected]>
---
drivers/powercap/intel_rapl_msr.c | 16 ++++++++--------
1 file changed, 8 insertions(+), 8 deletions(-)
diff --git a/drivers/powercap/intel_rapl_msr.c b/drivers/powercap/intel_rapl_msr.c
index 35cb152fa9aa..733a36f67fbc 100644
--- a/drivers/powercap/intel_rapl_msr.c
+++ b/drivers/powercap/intel_rapl_msr.c
@@ -139,14 +139,14 @@ static int rapl_msr_write_raw(int cpu, struct reg_action *ra)
/* List of verified CPUs. */
static const struct x86_cpu_id pl4_support_ids[] = {
- X86_MATCH_INTEL_FAM6_MODEL(TIGERLAKE_L, NULL),
- X86_MATCH_INTEL_FAM6_MODEL(ALDERLAKE, NULL),
- X86_MATCH_INTEL_FAM6_MODEL(ALDERLAKE_L, NULL),
- X86_MATCH_INTEL_FAM6_MODEL(ATOM_GRACEMONT, NULL),
- X86_MATCH_INTEL_FAM6_MODEL(RAPTORLAKE, NULL),
- X86_MATCH_INTEL_FAM6_MODEL(RAPTORLAKE_P, NULL),
- X86_MATCH_INTEL_FAM6_MODEL(METEORLAKE, NULL),
- X86_MATCH_INTEL_FAM6_MODEL(METEORLAKE_L, NULL),
+ X86_MATCH_VFM(INTEL_TIGERLAKE_L, NULL),
+ X86_MATCH_VFM(INTEL_ALDERLAKE, NULL),
+ X86_MATCH_VFM(INTEL_ALDERLAKE_L, NULL),
+ X86_MATCH_VFM(INTEL_ATOM_GRACEMONT, NULL),
+ X86_MATCH_VFM(INTEL_RAPTORLAKE, NULL),
+ X86_MATCH_VFM(INTEL_RAPTORLAKE_P, NULL),
+ X86_MATCH_VFM(INTEL_METEORLAKE, NULL),
+ X86_MATCH_VFM(INTEL_METEORLAKE_L, NULL),
{}
};
--
2.44.0
All code has been converted to use the vendor/family/model versions.
Signed-off-by: Tony Luck <[email protected]>
---
arch/x86/include/asm/intel-family.h | 85 +----------------------------
1 file changed, 2 insertions(+), 83 deletions(-)
diff --git a/arch/x86/include/asm/intel-family.h b/arch/x86/include/asm/intel-family.h
index f81a851c46dc..f7289094a483 100644
--- a/arch/x86/include/asm/intel-family.h
+++ b/arch/x86/include/asm/intel-family.h
@@ -10,7 +10,7 @@
* that group keep the CPUID for the variants sorted by model number.
*
* The defined symbol names have the following form:
- * INTEL_FAM6{OPTFAMILY}_{MICROARCH}{OPTDIFF}
+ * INTEL_{OPTFAMILY}_{MICROARCH}{OPTDIFF}
* where:
* OPTFAMILY Describes the family of CPUs that this belongs to. Default
* is assumed to be "_CORE" (and should be omitted). Other values
@@ -42,215 +42,134 @@
#define IFM(_fam, _model) VFM_MAKE(X86_VENDOR_INTEL, _fam, _model)
-/* Wildcard match for FAM6 so X86_MATCH_INTEL_FAM6_MODEL(ANY) works */
-#define INTEL_FAM6_ANY X86_MODEL_ANY
-/* Wildcard match for FAM6 so X86_MATCH_VFM(ANY) works */
+/* Wildcard match so X86_MATCH_VFM(ANY) works */
#define INTEL_ANY IFM(X86_FAMILY_ANY, X86_MODEL_ANY)
-#define INTEL_FAM6_CORE_YONAH 0x0E
#define INTEL_CORE_YONAH IFM(6, 0x0E)
-#define INTEL_FAM6_CORE2_MEROM 0x0F
#define INTEL_CORE2_MEROM IFM(6, 0x0F)
-#define INTEL_FAM6_CORE2_MEROM_L 0x16
#define INTEL_CORE2_MEROM_L IFM(6, 0x16)
-#define INTEL_FAM6_CORE2_PENRYN 0x17
#define INTEL_CORE2_PENRYN IFM(6, 0x17)
-#define INTEL_FAM6_CORE2_DUNNINGTON 0x1D
#define INTEL_CORE2_DUNNINGTON IFM(6, 0x1D)
-#define INTEL_FAM6_NEHALEM 0x1E
#define INTEL_NEHALEM IFM(6, 0x1E)
-#define INTEL_FAM6_NEHALEM_G 0x1F /* Auburndale / Havendale */
#define INTEL_NEHALEM_G IFM(6, 0x1F) /* Auburndale / Havendale */
-#define INTEL_FAM6_NEHALEM_EP 0x1A
#define INTEL_NEHALEM_EP IFM(6, 0x1A)
-#define INTEL_FAM6_NEHALEM_EX 0x2E
#define INTEL_NEHALEM_EX IFM(6, 0x2E)
-#define INTEL_FAM6_WESTMERE 0x25
#define INTEL_WESTMERE IFM(6, 0x25)
-#define INTEL_FAM6_WESTMERE_EP 0x2C
#define INTEL_WESTMERE_EP IFM(6, 0x2C)
-#define INTEL_FAM6_WESTMERE_EX 0x2F
#define INTEL_WESTMERE_EX IFM(6, 0x2F)
-#define INTEL_FAM6_SANDYBRIDGE 0x2A
#define INTEL_SANDYBRIDGE IFM(6, 0x2A)
-#define INTEL_FAM6_SANDYBRIDGE_X 0x2D
#define INTEL_SANDYBRIDGE_X IFM(6, 0x2D)
-#define INTEL_FAM6_IVYBRIDGE 0x3A
#define INTEL_IVYBRIDGE IFM(6, 0x3A)
-#define INTEL_FAM6_IVYBRIDGE_X 0x3E
#define INTEL_IVYBRIDGE_X IFM(6, 0x3E)
-#define INTEL_FAM6_HASWELL 0x3C
#define INTEL_HASWELL IFM(6, 0x3C)
-#define INTEL_FAM6_HASWELL_X 0x3F
#define INTEL_HASWELL_X IFM(6, 0x3F)
-#define INTEL_FAM6_HASWELL_L 0x45
#define INTEL_HASWELL_L IFM(6, 0x45)
-#define INTEL_FAM6_HASWELL_G 0x46
#define INTEL_HASWELL_G IFM(6, 0x46)
-#define INTEL_FAM6_BROADWELL 0x3D
#define INTEL_BROADWELL IFM(6, 0x3D)
-#define INTEL_FAM6_BROADWELL_G 0x47
#define INTEL_BROADWELL_G IFM(6, 0x47)
-#define INTEL_FAM6_BROADWELL_X 0x4F
#define INTEL_BROADWELL_X IFM(6, 0x4F)
-#define INTEL_FAM6_BROADWELL_D 0x56
#define INTEL_BROADWELL_D IFM(6, 0x56)
-#define INTEL_FAM6_SKYLAKE_L 0x4E /* Sky Lake */
#define INTEL_SKYLAKE_L IFM(6, 0x4E) /* Sky Lake */
-#define INTEL_FAM6_SKYLAKE 0x5E /* Sky Lake */
#define INTEL_SKYLAKE IFM(6, 0x5E) /* Sky Lake */
-#define INTEL_FAM6_SKYLAKE_X 0x55 /* Sky Lake */
#define INTEL_SKYLAKE_X IFM(6, 0x55) /* Sky Lake */
/* CASCADELAKE_X 0x55 Sky Lake -- s: 7 */
/* COOPERLAKE_X 0x55 Sky Lake -- s: 11 */
-#define INTEL_FAM6_KABYLAKE_L 0x8E /* Sky Lake */
#define INTEL_KABYLAKE_L IFM(6, 0x8E) /* Sky Lake */
/* AMBERLAKE_L 0x8E Sky Lake -- s: 9 */
/* COFFEELAKE_L 0x8E Sky Lake -- s: 10 */
/* WHISKEYLAKE_L 0x8E Sky Lake -- s: 11,12 */
-#define INTEL_FAM6_KABYLAKE 0x9E /* Sky Lake */
#define INTEL_KABYLAKE IFM(6, 0x9E) /* Sky Lake */
/* COFFEELAKE 0x9E Sky Lake -- s: 10-13 */
-#define INTEL_FAM6_COMETLAKE 0xA5 /* Sky Lake */
#define INTEL_COMETLAKE IFM(6, 0xA5) /* Sky Lake */
-#define INTEL_FAM6_COMETLAKE_L 0xA6 /* Sky Lake */
#define INTEL_COMETLAKE_L IFM(6, 0xA6) /* Sky Lake */
-#define INTEL_FAM6_CANNONLAKE_L 0x66 /* Palm Cove */
#define INTEL_CANNONLAKE_L IFM(6, 0x66) /* Palm Cove */
-#define INTEL_FAM6_ICELAKE_X 0x6A /* Sunny Cove */
#define INTEL_ICELAKE_X IFM(6, 0x6A) /* Sunny Cove */
-#define INTEL_FAM6_ICELAKE_D 0x6C /* Sunny Cove */
#define INTEL_ICELAKE_D IFM(6, 0x6C) /* Sunny Cove */
-#define INTEL_FAM6_ICELAKE 0x7D /* Sunny Cove */
#define INTEL_ICELAKE IFM(6, 0x7D) /* Sunny Cove */
-#define INTEL_FAM6_ICELAKE_L 0x7E /* Sunny Cove */
#define INTEL_ICELAKE_L IFM(6, 0x7E) /* Sunny Cove */
-#define INTEL_FAM6_ICELAKE_NNPI 0x9D /* Sunny Cove */
#define INTEL_ICELAKE_NNPI IFM(6, 0x9D) /* Sunny Cove */
-#define INTEL_FAM6_ROCKETLAKE 0xA7 /* Cypress Cove */
#define INTEL_ROCKETLAKE IFM(6, 0xA7) /* Cypress Cove */
-#define INTEL_FAM6_TIGERLAKE_L 0x8C /* Willow Cove */
#define INTEL_TIGERLAKE_L IFM(6, 0x8C) /* Willow Cove */
-#define INTEL_FAM6_TIGERLAKE 0x8D /* Willow Cove */
#define INTEL_TIGERLAKE IFM(6, 0x8D) /* Willow Cove */
-#define INTEL_FAM6_SAPPHIRERAPIDS_X 0x8F /* Golden Cove */
#define INTEL_SAPPHIRERAPIDS_X IFM(6, 0x8F) /* Golden Cove */
-#define INTEL_FAM6_EMERALDRAPIDS_X 0xCF
#define INTEL_EMERALDRAPIDS_X IFM(6, 0xCF)
-#define INTEL_FAM6_GRANITERAPIDS_X 0xAD
#define INTEL_GRANITERAPIDS_X IFM(6, 0xAD)
-#define INTEL_FAM6_GRANITERAPIDS_D 0xAE
#define INTEL_GRANITERAPIDS_D IFM(6, 0xAE)
/* "Hybrid" Processors (P-Core/E-Core) */
-#define INTEL_FAM6_LAKEFIELD 0x8A /* Sunny Cove / Tremont */
#define INTEL_LAKEFIELD IFM(6, 0x8A) /* Sunny Cove / Tremont */
-#define INTEL_FAM6_ALDERLAKE 0x97 /* Golden Cove / Gracemont */
#define INTEL_ALDERLAKE IFM(6, 0x97) /* Golden Cove / Gracemont */
-#define INTEL_FAM6_ALDERLAKE_L 0x9A /* Golden Cove / Gracemont */
#define INTEL_ALDERLAKE_L IFM(6, 0x9A) /* Golden Cove / Gracemont */
-#define INTEL_FAM6_RAPTORLAKE 0xB7 /* Raptor Cove / Enhanced Gracemont */
#define INTEL_RAPTORLAKE IFM(6, 0xB7) /* Raptor Cove / Enhanced Gracemont */
-#define INTEL_FAM6_RAPTORLAKE_P 0xBA
#define INTEL_RAPTORLAKE_P IFM(6, 0xBA)
-#define INTEL_FAM6_RAPTORLAKE_S 0xBF
#define INTEL_RAPTORLAKE_S IFM(6, 0xBF)
-#define INTEL_FAM6_METEORLAKE 0xAC
#define INTEL_METEORLAKE IFM(6, 0xAC)
-#define INTEL_FAM6_METEORLAKE_L 0xAA
#define INTEL_METEORLAKE_L IFM(6, 0xAA)
-#define INTEL_FAM6_ARROWLAKE_H 0xC5
#define INTEL_ARROWLAKE_H IFM(6, 0xC5)
-#define INTEL_FAM6_ARROWLAKE 0xC6
#define INTEL_ARROWLAKE IFM(6, 0xC6)
-#define INTEL_FAM6_ARROWLAKE_U 0xB5
#define INTEL_ARROWLAKE_U IFM(6, 0xB5)
-#define INTEL_FAM6_LUNARLAKE_M 0xBD
#define INTEL_LUNARLAKE_M IFM(6, 0xBD)
/* "Small Core" Processors (Atom/E-Core) */
-#define INTEL_FAM6_ATOM_BONNELL 0x1C /* Diamondville, Pineview */
#define INTEL_ATOM_BONNELL IFM(6, 0x1C) /* Diamondville, Pineview */
-#define INTEL_FAM6_ATOM_BONNELL_MID 0x26 /* Silverthorne, Lincroft */
#define INTEL_ATOM_BONNELL_MID IFM(6, 0x26) /* Silverthorne, Lincroft */
-#define INTEL_FAM6_ATOM_SALTWELL 0x36 /* Cedarview */
#define INTEL_ATOM_SALTWELL IFM(6, 0x36) /* Cedarview */
-#define INTEL_FAM6_ATOM_SALTWELL_MID 0x27 /* Penwell */
#define INTEL_ATOM_SALTWELL_MID IFM(6, 0x27) /* Penwell */
-#define INTEL_FAM6_ATOM_SALTWELL_TABLET 0x35 /* Cloverview */
#define INTEL_ATOM_SALTWELL_TABLET IFM(6, 0x35) /* Cloverview */
-#define INTEL_FAM6_ATOM_SILVERMONT 0x37 /* Bay Trail, Valleyview */
#define INTEL_ATOM_SILVERMONT IFM(6, 0x37) /* Bay Trail, Valleyview */
-#define INTEL_FAM6_ATOM_SILVERMONT_D 0x4D /* Avaton, Rangely */
#define INTEL_ATOM_SILVERMONT_D IFM(6, 0x4D) /* Avaton, Rangely */
-#define INTEL_FAM6_ATOM_SILVERMONT_MID 0x4A /* Merriefield */
#define INTEL_ATOM_SILVERMONT_MID IFM(6, 0x4A) /* Merriefield */
-#define INTEL_FAM6_ATOM_AIRMONT 0x4C /* Cherry Trail, Braswell */
#define INTEL_ATOM_AIRMONT IFM(6, 0x4C) /* Cherry Trail, Braswell */
-#define INTEL_FAM6_ATOM_AIRMONT_MID 0x5A /* Moorefield */
#define INTEL_ATOM_AIRMONT_MID IFM(6, 0x5A) /* Moorefield */
-#define INTEL_FAM6_ATOM_AIRMONT_NP 0x75 /* Lightning Mountain */
#define INTEL_ATOM_AIRMONT_NP IFM(6, 0x75) /* Lightning Mountain */
-#define INTEL_FAM6_ATOM_GOLDMONT 0x5C /* Apollo Lake */
#define INTEL_ATOM_GOLDMONT IFM(6, 0x5C) /* Apollo Lake */
-#define INTEL_FAM6_ATOM_GOLDMONT_D 0x5F /* Denverton */
#define INTEL_ATOM_GOLDMONT_D IFM(6, 0x5F) /* Denverton */
/* Note: the micro-architecture is "Goldmont Plus" */
-#define INTEL_FAM6_ATOM_GOLDMONT_PLUS 0x7A /* Gemini Lake */
#define INTEL_ATOM_GOLDMONT_PLUS IFM(6, 0x7A) /* Gemini Lake */
-#define INTEL_FAM6_ATOM_TREMONT_D 0x86 /* Jacobsville */
#define INTEL_ATOM_TREMONT_D IFM(6, 0x86) /* Jacobsville */
-#define INTEL_FAM6_ATOM_TREMONT 0x96 /* Elkhart Lake */
#define INTEL_ATOM_TREMONT IFM(6, 0x96) /* Elkhart Lake */
-#define INTEL_FAM6_ATOM_TREMONT_L 0x9C /* Jasper Lake */
#define INTEL_ATOM_TREMONT_L IFM(6, 0x9C) /* Jasper Lake */
-#define INTEL_FAM6_ATOM_GRACEMONT 0xBE /* Alderlake N */
#define INTEL_ATOM_GRACEMONT IFM(6, 0xBE) /* Alderlake N */
-#define INTEL_FAM6_ATOM_CRESTMONT_X 0xAF /* Sierra Forest */
#define INTEL_ATOM_CRESTMONT_X IFM(6, 0xAF) /* Sierra Forest */
-#define INTEL_FAM6_ATOM_CRESTMONT 0xB6 /* Grand Ridge */
#define INTEL_ATOM_CRESTMONT IFM(6, 0xB6) /* Grand Ridge */
-#define INTEL_FAM6_ATOM_DARKMONT_X 0xDD /* Clearwater Forest */
#define INTEL_ATOM_DARKMONT_X IFM(6, 0xDD) /* Clearwater Forest */
/* Xeon Phi */
-#define INTEL_FAM6_XEON_PHI_KNL 0x57 /* Knights Landing */
#define INTEL_XEON_PHI_KNL IFM(6, 0x57) /* Knights Landing */
-#define INTEL_FAM6_XEON_PHI_KNM 0x85 /* Knights Mill */
#define INTEL_XEON_PHI_KNM IFM(6, 0x85) /* Knights Mill */
/* Family 5 */
--
2.44.0
> > New CPU #defines encode vendor and family as well as model.
> >
> > Signed-off-by: Tony Luck <[email protected]>
>
> Acked-by: Bjorn Helgaas <[email protected]>
Thanks. You win the medal for the fastest turnaround!
> Possibly consider updating subject line with a hint about what
> "update" refers to, since every commit is an update. I guess "vfm" is
> some kind of a hint, but I don't know what it means. I suppose it is
> for "vendor, family, model".
Yes. vfm is indeed vendor-family-model. Agreed the commit comment
is lacking details without the context of the cover letter and the other
patches in this series.
-Tony
On Tue, Apr 16, 2024 at 02:22:16PM -0700, Tony Luck wrote:
> New CPU #defines encode vendor and family as well as model.
>
> Signed-off-by: Tony Luck <[email protected]>
> ---
> drivers/hwmon/peci/cputemp.c | 7 ++++---
> 1 file changed, 4 insertions(+), 3 deletions(-)
>
> diff --git a/drivers/hwmon/peci/cputemp.c b/drivers/hwmon/peci/cputemp.c
> index a812c15948d9..28cec5c318d4 100644
> --- a/drivers/hwmon/peci/cputemp.c
> +++ b/drivers/hwmon/peci/cputemp.c
> @@ -11,6 +11,7 @@
> #include <linux/peci-cpu.h>
> #include <linux/units.h>
>
> +#include <asm/cpu_device_id.h>
> #include "common.h"
>
> #define CORE_NUMS_MAX 64
> @@ -361,9 +362,9 @@ static int init_core_mask(struct peci_cputemp *priv)
>
> /* Get the RESOLVED_CORES register value */
> switch (peci_dev->info.model) {
> - case INTEL_FAM6_ICELAKE_X:
> - case INTEL_FAM6_ICELAKE_D:
> - case INTEL_FAM6_SAPPHIRERAPIDS_X:
> + case VFM_MODEL(INTEL_ICELAKE_X):
> + case VFM_MODEL(INTEL_ICELAKE_D):
> + case VFM_MODEL(INTEL_SAPPHIRERAPIDS_X):
$ git describe
v6.9-rc4-31-g96fca68c4fbf
$ git grep VFM_MODEL
$
So I guess this depends on some other patch ?
That might be worth mentioning, especially since
$ git describe
next-20240416
$ git grep VFM_MODEL
$
doesn't find it either.
On top of that, it looks like
#include <asm/cpu_device_id.h>
introduces a dependency on X86 which is not currently the case.
CONFIG_PECI is typically used on BMCs. Many of those do not use
Intel CPUs. It does not seem appropriate to make support for PECI
based hardware monitoring dependent on it running on an Intel CPU.
Thanks,
Guenter
Guenter,
Thanks for taking a look at this patch.
> > + case VFM_MODEL(INTEL_ICELAKE_X):
> > + case VFM_MODEL(INTEL_ICELAKE_D):
> > + case VFM_MODEL(INTEL_SAPPHIRERAPIDS_X):
>
> $ git describe
> v6.9-rc4-31-g96fca68c4fbf
> $ git grep VFM_MODEL
> $
>
> So I guess this depends on some other patch ?
> That might be worth mentioning, especially since
>
> $ git describe
> next-20240416
> $ git grep VFM_MODEL
> $
>
> doesn't find it either.
Yes. This depends on parts 1,2,3 of this series. I should have added
that to the "---" meta comment part of these patches that I'm spraying
out to maintainers of random subsystems that use INTEL_FAM6 defines.
> On top of that, it looks like
>
> #include <asm/cpu_device_id.h>
>
> introduces a dependency on X86 which is not currently the case.
> CONFIG_PECI is typically used on BMCs. Many of those do not use
> Intel CPUs. It does not seem appropriate to make support for PECI
> based hardware monitoring dependent on it running on an Intel CPU.
It seems that some use (or need to know about) Icelake and Sapphire Rapids.
How does this code get the value "peci_dev->info.model" used in this switch?
Given that it is doing some magic just for some recent Intel CPUs, it seems
plausible that when non-family 6 CPUs appear in the market, it might have
to grab both the family and the model to reliably determine what to do?
Simple options to avoid including <asm/cpu_device_id.h> would be
to either:
1) provide a copy of the VFM_MODEL macro here.
or
2) Keep using the old INTEL_FAM6_* #define names, but define those for
the three CPU models peci needs locally instead of getting them from
<asm/intel-family.h>. It looks like there is a somewhat convoluted path to
include that. I see in <linux/peci.cpu.h>
#include "../../arch/x86/include/asm/intel-family.h"
Or maybe some better option?
-Tony
On 4/16/2024 2:22 PM, Tony Luck wrote:
> New CPU #defines encode vendor and family as well as model.
>
> Signed-off-by: Tony Luck <[email protected]>
> ---
> drivers/platform/x86/intel/ifs/core.c | 15 +++++++--------
> 1 file changed, 7 insertions(+), 8 deletions(-)
>
> diff --git a/drivers/platform/x86/intel/ifs/core.c b/drivers/platform/x86/intel/ifs/core.c
> index 7b11198d85a1..33412a584836 100644
> --- a/drivers/platform/x86/intel/ifs/core.c
> +++ b/drivers/platform/x86/intel/ifs/core.c
> @@ -11,16 +11,15 @@
>
> #include "ifs.h"
>
> -#define X86_MATCH(model, array_gen) \
> - X86_MATCH_VENDOR_FAM_MODEL_FEATURE(INTEL, 6, \
> - INTEL_FAM6_##model, X86_FEATURE_CORE_CAPABILITIES, array_gen)
> +#define X86_MATCH(vfm, array_gen) \
> + X86_MATCH_VFM_FEATURE(vfm, X86_FEATURE_CORE_CAPABILITIES, array_gen)
>
> static const struct x86_cpu_id ifs_cpu_ids[] __initconst = {
> - X86_MATCH(SAPPHIRERAPIDS_X, ARRAY_GEN0),
> - X86_MATCH(EMERALDRAPIDS_X, ARRAY_GEN0),
> - X86_MATCH(GRANITERAPIDS_X, ARRAY_GEN0),
> - X86_MATCH(GRANITERAPIDS_D, ARRAY_GEN0),
> - X86_MATCH(ATOM_CRESTMONT_X, ARRAY_GEN1),
> + X86_MATCH(INTEL_SAPPHIRERAPIDS_X, ARRAY_GEN0),
> + X86_MATCH(INTEL_EMERALDRAPIDS_X, ARRAY_GEN0),
> + X86_MATCH(INTEL_GRANITERAPIDS_X, ARRAY_GEN0),
> + X86_MATCH(INTEL_GRANITERAPIDS_D, ARRAY_GEN0),
> + X86_MATCH(INTEL_ATOM_CRESTMONT_X, ARRAY_GEN1),
> {}
> };
> MODULE_DEVICE_TABLE(x86cpu, ifs_cpu_ids);
Looks good to me:
Reviewed-by: Jithu Joseph <[email protected]>
Jithu
> Patches on tip/master as of April 16th.
Ful series also available from GIT at:
git://git.kernel.org/pub/scm/linux/kernel/git/aegl/linux.git new_families
-Tony
On Tue, Apr 16, 2024 at 11:05:15PM +0000, Luck, Tony wrote:
> Guenter,
>
> Thanks for taking a look at this patch.
>
> > > + case VFM_MODEL(INTEL_ICELAKE_X):
> > > + case VFM_MODEL(INTEL_ICELAKE_D):
> > > + case VFM_MODEL(INTEL_SAPPHIRERAPIDS_X):
> >
> > $ git describe
> > v6.9-rc4-31-g96fca68c4fbf
> > $ git grep VFM_MODEL
> > $
> >
> > So I guess this depends on some other patch ?
> > That might be worth mentioning, especially since
> >
> > $ git describe
> > next-20240416
> > $ git grep VFM_MODEL
> > $
> >
> > doesn't find it either.
>
>
> Yes. This depends on parts 1,2,3 of this series. I should have added
> that to the "---" meta comment part of these patches that I'm spraying
> out to maintainers of random subsystems that use INTEL_FAM6 defines.
>
> > On top of that, it looks like
> >
> > #include <asm/cpu_device_id.h>
> >
> > introduces a dependency on X86 which is not currently the case.
> > CONFIG_PECI is typically used on BMCs. Many of those do not use
> > Intel CPUs. It does not seem appropriate to make support for PECI
> > based hardware monitoring dependent on it running on an Intel CPU.
>
> It seems that some use (or need to know about) Icelake and Sapphire Rapids.
>
> How does this code get the value "peci_dev->info.model" used in this switch?
>
My understanding is that the PECI protocol provides that information.
> Given that it is doing some magic just for some recent Intel CPUs, it seems
> plausible that when non-family 6 CPUs appear in the market, it might have
> to grab both the family and the model to reliably determine what to do?
>
> Simple options to avoid including <asm/cpu_device_id.h> would be
> to either:
>
> 1) provide a copy of the VFM_MODEL macro here.
>
> or
>
> 2) Keep using the old INTEL_FAM6_* #define names, but define those for
> the three CPU models peci needs locally instead of getting them from
> <asm/intel-family.h>. It looks like there is a somewhat convoluted path to
> include that. I see in <linux/peci.cpu.h>
>
> #include "../../arch/x86/include/asm/intel-family.h"
>
>
> Or maybe some better option?
>
If the CPU defines and the new macro are to be kept in architecture code,
maybe include arch/x86/include/asm/cpu_device_id.h from linux/peci.cpu.h.
That would not be worse than today's include of intel-family.h.
Guenter
> If the CPU defines and the new macro are to be kept in architecture code,
> maybe include arch/x86/include/asm/cpu_device_id.h from linux/peci.cpu.h.
> That would not be worse than today's include of intel-family.h.
Guenter,
Looks like I did that to resolve one of the other peci problems. Because I
already have:
#include "../../arch/x86/include/asm/cpu_device_id.h"
#include "../../arch/x86/include/asm/intel-family.h"
in <linux/peci_cpu.h>
Simply deleting the include from cputemp.c builds OK in the
context of all the other changes in my patch series.
-Tony
On Wed, Apr 17, 2024 at 12:22 AM Tony Luck <[email protected]> wrote:
>
> New CPU #defines encode vendor and family as well as model.
Thanks, but I would rather see this using the following
https://elixir.bootlin.com/linux/v6.9-rc4/source/include/linux/platform_data/x86/soc.h
--
With Best Regards,
Andy Shevchenko
On Tue, Apr 16, 2024 at 11:22 PM Tony Luck <[email protected]> wrote:
>
> New CPU #defines encode vendor and family as well as model.
>
> Signed-off-by: Tony Luck <[email protected]>
Acked-by: Rafael J. Wysocki <[email protected]>
> ---
> drivers/cpufreq/intel_pstate.c | 90 +++++++++++++++++-----------------
> 1 file changed, 44 insertions(+), 46 deletions(-)
>
> diff --git a/drivers/cpufreq/intel_pstate.c b/drivers/cpufreq/intel_pstate.c
> index dbbf299f4219..685ec80e0af5 100644
> --- a/drivers/cpufreq/intel_pstate.c
> +++ b/drivers/cpufreq/intel_pstate.c
> @@ -2402,52 +2402,51 @@ static const struct pstate_funcs knl_funcs = {
> .get_val = core_get_val,
> };
>
> -#define X86_MATCH(model, policy) \
> - X86_MATCH_VENDOR_FAM_MODEL_FEATURE(INTEL, 6, INTEL_FAM6_##model, \
> - X86_FEATURE_APERFMPERF, &policy)
> +#define X86_MATCH(vfm, policy) \
> + X86_MATCH_VFM_FEATURE(vfm, X86_FEATURE_APERFMPERF, &policy)
>
> static const struct x86_cpu_id intel_pstate_cpu_ids[] = {
> - X86_MATCH(SANDYBRIDGE, core_funcs),
> - X86_MATCH(SANDYBRIDGE_X, core_funcs),
> - X86_MATCH(ATOM_SILVERMONT, silvermont_funcs),
> - X86_MATCH(IVYBRIDGE, core_funcs),
> - X86_MATCH(HASWELL, core_funcs),
> - X86_MATCH(BROADWELL, core_funcs),
> - X86_MATCH(IVYBRIDGE_X, core_funcs),
> - X86_MATCH(HASWELL_X, core_funcs),
> - X86_MATCH(HASWELL_L, core_funcs),
> - X86_MATCH(HASWELL_G, core_funcs),
> - X86_MATCH(BROADWELL_G, core_funcs),
> - X86_MATCH(ATOM_AIRMONT, airmont_funcs),
> - X86_MATCH(SKYLAKE_L, core_funcs),
> - X86_MATCH(BROADWELL_X, core_funcs),
> - X86_MATCH(SKYLAKE, core_funcs),
> - X86_MATCH(BROADWELL_D, core_funcs),
> - X86_MATCH(XEON_PHI_KNL, knl_funcs),
> - X86_MATCH(XEON_PHI_KNM, knl_funcs),
> - X86_MATCH(ATOM_GOLDMONT, core_funcs),
> - X86_MATCH(ATOM_GOLDMONT_PLUS, core_funcs),
> - X86_MATCH(SKYLAKE_X, core_funcs),
> - X86_MATCH(COMETLAKE, core_funcs),
> - X86_MATCH(ICELAKE_X, core_funcs),
> - X86_MATCH(TIGERLAKE, core_funcs),
> - X86_MATCH(SAPPHIRERAPIDS_X, core_funcs),
> - X86_MATCH(EMERALDRAPIDS_X, core_funcs),
> + X86_MATCH(INTEL_SANDYBRIDGE, core_funcs),
> + X86_MATCH(INTEL_SANDYBRIDGE_X, core_funcs),
> + X86_MATCH(INTEL_ATOM_SILVERMONT, silvermont_funcs),
> + X86_MATCH(INTEL_IVYBRIDGE, core_funcs),
> + X86_MATCH(INTEL_HASWELL, core_funcs),
> + X86_MATCH(INTEL_BROADWELL, core_funcs),
> + X86_MATCH(INTEL_IVYBRIDGE_X, core_funcs),
> + X86_MATCH(INTEL_HASWELL_X, core_funcs),
> + X86_MATCH(INTEL_HASWELL_L, core_funcs),
> + X86_MATCH(INTEL_HASWELL_G, core_funcs),
> + X86_MATCH(INTEL_BROADWELL_G, core_funcs),
> + X86_MATCH(INTEL_ATOM_AIRMONT, airmont_funcs),
> + X86_MATCH(INTEL_SKYLAKE_L, core_funcs),
> + X86_MATCH(INTEL_BROADWELL_X, core_funcs),
> + X86_MATCH(INTEL_SKYLAKE, core_funcs),
> + X86_MATCH(INTEL_BROADWELL_D, core_funcs),
> + X86_MATCH(INTEL_XEON_PHI_KNL, knl_funcs),
> + X86_MATCH(INTEL_XEON_PHI_KNM, knl_funcs),
> + X86_MATCH(INTEL_ATOM_GOLDMONT, core_funcs),
> + X86_MATCH(INTEL_ATOM_GOLDMONT_PLUS, core_funcs),
> + X86_MATCH(INTEL_SKYLAKE_X, core_funcs),
> + X86_MATCH(INTEL_COMETLAKE, core_funcs),
> + X86_MATCH(INTEL_ICELAKE_X, core_funcs),
> + X86_MATCH(INTEL_TIGERLAKE, core_funcs),
> + X86_MATCH(INTEL_SAPPHIRERAPIDS_X, core_funcs),
> + X86_MATCH(INTEL_EMERALDRAPIDS_X, core_funcs),
> {}
> };
> MODULE_DEVICE_TABLE(x86cpu, intel_pstate_cpu_ids);
>
> static const struct x86_cpu_id intel_pstate_cpu_oob_ids[] __initconst = {
> - X86_MATCH(BROADWELL_D, core_funcs),
> - X86_MATCH(BROADWELL_X, core_funcs),
> - X86_MATCH(SKYLAKE_X, core_funcs),
> - X86_MATCH(ICELAKE_X, core_funcs),
> - X86_MATCH(SAPPHIRERAPIDS_X, core_funcs),
> + X86_MATCH(INTEL_BROADWELL_D, core_funcs),
> + X86_MATCH(INTEL_BROADWELL_X, core_funcs),
> + X86_MATCH(INTEL_SKYLAKE_X, core_funcs),
> + X86_MATCH(INTEL_ICELAKE_X, core_funcs),
> + X86_MATCH(INTEL_SAPPHIRERAPIDS_X, core_funcs),
> {}
> };
>
> static const struct x86_cpu_id intel_pstate_cpu_ee_disable_ids[] = {
> - X86_MATCH(KABYLAKE, core_funcs),
> + X86_MATCH(INTEL_KABYLAKE, core_funcs),
> {}
> };
>
> @@ -3386,14 +3385,13 @@ static inline void intel_pstate_request_control_from_smm(void) {}
>
> #define INTEL_PSTATE_HWP_BROADWELL 0x01
>
> -#define X86_MATCH_HWP(model, hwp_mode) \
> - X86_MATCH_VENDOR_FAM_MODEL_FEATURE(INTEL, 6, INTEL_FAM6_##model, \
> - X86_FEATURE_HWP, hwp_mode)
> +#define X86_MATCH_HWP(vfm, hwp_mode) \
> + X86_MATCH_VFM_FEATURE(vfm, X86_FEATURE_HWP, hwp_mode)
>
> static const struct x86_cpu_id hwp_support_ids[] __initconst = {
> - X86_MATCH_HWP(BROADWELL_X, INTEL_PSTATE_HWP_BROADWELL),
> - X86_MATCH_HWP(BROADWELL_D, INTEL_PSTATE_HWP_BROADWELL),
> - X86_MATCH_HWP(ANY, 0),
> + X86_MATCH_HWP(INTEL_BROADWELL_X, INTEL_PSTATE_HWP_BROADWELL),
> + X86_MATCH_HWP(INTEL_BROADWELL_D, INTEL_PSTATE_HWP_BROADWELL),
> + X86_MATCH_HWP(INTEL_ANY, 0),
> {}
> };
>
> @@ -3426,15 +3424,15 @@ static const struct x86_cpu_id intel_epp_default[] = {
> * which can result in one core turbo frequency for
> * AlderLake Mobile CPUs.
> */
> - X86_MATCH_INTEL_FAM6_MODEL(ALDERLAKE_L, HWP_SET_DEF_BALANCE_PERF_EPP(102)),
> - X86_MATCH_INTEL_FAM6_MODEL(SAPPHIRERAPIDS_X, HWP_SET_DEF_BALANCE_PERF_EPP(32)),
> - X86_MATCH_INTEL_FAM6_MODEL(METEORLAKE_L, HWP_SET_EPP_VALUES(HWP_EPP_POWERSAVE,
> - HWP_EPP_BALANCE_POWERSAVE, 115, 16)),
> + X86_MATCH_VFM(INTEL_ALDERLAKE_L, HWP_SET_DEF_BALANCE_PERF_EPP(102)),
> + X86_MATCH_VFM(INTEL_SAPPHIRERAPIDS_X, HWP_SET_DEF_BALANCE_PERF_EPP(32)),
> + X86_MATCH_VFM(INTEL_METEORLAKE_L, HWP_SET_EPP_VALUES(HWP_EPP_POWERSAVE,
> + HWP_EPP_BALANCE_POWERSAVE, 115, 16)),
> {}
> };
>
> static const struct x86_cpu_id intel_hybrid_scaling_factor[] = {
> - X86_MATCH_INTEL_FAM6_MODEL(METEORLAKE_L, HYBRID_SCALING_FACTOR_MTL),
> + X86_MATCH_VFM(INTEL_METEORLAKE_L, HYBRID_SCALING_FACTOR_MTL),
> {}
> };
>
> --
> 2.44.0
>
On Tue, Apr 16, 2024 at 11:22 PM Tony Luck <[email protected]> wrote:
>
> New CPU #defines encode vendor and family as well as model.
>
> Signed-off-by: Tony Luck <[email protected]>
Acked-by: Rafael J. Wysocki <[email protected]>
> ---
> drivers/cpufreq/speedstep-centrino.c | 8 ++++----
> 1 file changed, 4 insertions(+), 4 deletions(-)
>
> diff --git a/drivers/cpufreq/speedstep-centrino.c b/drivers/cpufreq/speedstep-centrino.c
> index 75b10ecdb60f..ddd6f53bfd2a 100644
> --- a/drivers/cpufreq/speedstep-centrino.c
> +++ b/drivers/cpufreq/speedstep-centrino.c
> @@ -520,10 +520,10 @@ static struct cpufreq_driver centrino_driver = {
> * or ASCII model IDs.
> */
> static const struct x86_cpu_id centrino_ids[] = {
> - X86_MATCH_VENDOR_FAM_MODEL_FEATURE(INTEL, 6, 9, X86_FEATURE_EST, NULL),
> - X86_MATCH_VENDOR_FAM_MODEL_FEATURE(INTEL, 6, 13, X86_FEATURE_EST, NULL),
> - X86_MATCH_VENDOR_FAM_MODEL_FEATURE(INTEL, 15, 3, X86_FEATURE_EST, NULL),
> - X86_MATCH_VENDOR_FAM_MODEL_FEATURE(INTEL, 15, 4, X86_FEATURE_EST, NULL),
> + X86_MATCH_VFM_FEATURE(IFM( 6, 9), X86_FEATURE_EST, NULL),
> + X86_MATCH_VFM_FEATURE(IFM( 6, 13), X86_FEATURE_EST, NULL),
> + X86_MATCH_VFM_FEATURE(IFM(15, 3), X86_FEATURE_EST, NULL),
> + X86_MATCH_VFM_FEATURE(IFM(15, 4), X86_FEATURE_EST, NULL),
> {}
> };
>
> --
> 2.44.0
>
On Tue, Apr 16, 2024 at 11:22 PM Tony Luck <[email protected]> wrote:
>
> New CPU #defines encode vendor and family as well as model.
>
> Signed-off-by: Tony Luck <[email protected]>
Acked-by: Rafael J. Wysocki <[email protected]>
> ---
> drivers/powercap/intel_rapl_common.c | 118 +++++++++++++--------------
> 1 file changed, 59 insertions(+), 59 deletions(-)
>
> diff --git a/drivers/powercap/intel_rapl_common.c b/drivers/powercap/intel_rapl_common.c
> index a28d54fd5222..59c36ea55712 100644
> --- a/drivers/powercap/intel_rapl_common.c
> +++ b/drivers/powercap/intel_rapl_common.c
> @@ -1220,65 +1220,65 @@ static const struct rapl_defaults rapl_defaults_amd = {
> };
>
> static const struct x86_cpu_id rapl_ids[] __initconst = {
> - X86_MATCH_INTEL_FAM6_MODEL(SANDYBRIDGE, &rapl_defaults_core),
> - X86_MATCH_INTEL_FAM6_MODEL(SANDYBRIDGE_X, &rapl_defaults_core),
> -
> - X86_MATCH_INTEL_FAM6_MODEL(IVYBRIDGE, &rapl_defaults_core),
> - X86_MATCH_INTEL_FAM6_MODEL(IVYBRIDGE_X, &rapl_defaults_core),
> -
> - X86_MATCH_INTEL_FAM6_MODEL(HASWELL, &rapl_defaults_core),
> - X86_MATCH_INTEL_FAM6_MODEL(HASWELL_L, &rapl_defaults_core),
> - X86_MATCH_INTEL_FAM6_MODEL(HASWELL_G, &rapl_defaults_core),
> - X86_MATCH_INTEL_FAM6_MODEL(HASWELL_X, &rapl_defaults_hsw_server),
> -
> - X86_MATCH_INTEL_FAM6_MODEL(BROADWELL, &rapl_defaults_core),
> - X86_MATCH_INTEL_FAM6_MODEL(BROADWELL_G, &rapl_defaults_core),
> - X86_MATCH_INTEL_FAM6_MODEL(BROADWELL_D, &rapl_defaults_core),
> - X86_MATCH_INTEL_FAM6_MODEL(BROADWELL_X, &rapl_defaults_hsw_server),
> -
> - X86_MATCH_INTEL_FAM6_MODEL(SKYLAKE, &rapl_defaults_core),
> - X86_MATCH_INTEL_FAM6_MODEL(SKYLAKE_L, &rapl_defaults_core),
> - X86_MATCH_INTEL_FAM6_MODEL(SKYLAKE_X, &rapl_defaults_hsw_server),
> - X86_MATCH_INTEL_FAM6_MODEL(KABYLAKE_L, &rapl_defaults_core),
> - X86_MATCH_INTEL_FAM6_MODEL(KABYLAKE, &rapl_defaults_core),
> - X86_MATCH_INTEL_FAM6_MODEL(CANNONLAKE_L, &rapl_defaults_core),
> - X86_MATCH_INTEL_FAM6_MODEL(ICELAKE_L, &rapl_defaults_core),
> - X86_MATCH_INTEL_FAM6_MODEL(ICELAKE, &rapl_defaults_core),
> - X86_MATCH_INTEL_FAM6_MODEL(ICELAKE_NNPI, &rapl_defaults_core),
> - X86_MATCH_INTEL_FAM6_MODEL(ICELAKE_X, &rapl_defaults_hsw_server),
> - X86_MATCH_INTEL_FAM6_MODEL(ICELAKE_D, &rapl_defaults_hsw_server),
> - X86_MATCH_INTEL_FAM6_MODEL(COMETLAKE_L, &rapl_defaults_core),
> - X86_MATCH_INTEL_FAM6_MODEL(COMETLAKE, &rapl_defaults_core),
> - X86_MATCH_INTEL_FAM6_MODEL(TIGERLAKE_L, &rapl_defaults_core),
> - X86_MATCH_INTEL_FAM6_MODEL(TIGERLAKE, &rapl_defaults_core),
> - X86_MATCH_INTEL_FAM6_MODEL(ROCKETLAKE, &rapl_defaults_core),
> - X86_MATCH_INTEL_FAM6_MODEL(ALDERLAKE, &rapl_defaults_core),
> - X86_MATCH_INTEL_FAM6_MODEL(ALDERLAKE_L, &rapl_defaults_core),
> - X86_MATCH_INTEL_FAM6_MODEL(ATOM_GRACEMONT, &rapl_defaults_core),
> - X86_MATCH_INTEL_FAM6_MODEL(RAPTORLAKE, &rapl_defaults_core),
> - X86_MATCH_INTEL_FAM6_MODEL(RAPTORLAKE_P, &rapl_defaults_core),
> - X86_MATCH_INTEL_FAM6_MODEL(RAPTORLAKE_S, &rapl_defaults_core),
> - X86_MATCH_INTEL_FAM6_MODEL(METEORLAKE, &rapl_defaults_core),
> - X86_MATCH_INTEL_FAM6_MODEL(METEORLAKE_L, &rapl_defaults_core),
> - X86_MATCH_INTEL_FAM6_MODEL(SAPPHIRERAPIDS_X, &rapl_defaults_spr_server),
> - X86_MATCH_INTEL_FAM6_MODEL(EMERALDRAPIDS_X, &rapl_defaults_spr_server),
> - X86_MATCH_INTEL_FAM6_MODEL(LUNARLAKE_M, &rapl_defaults_core),
> - X86_MATCH_INTEL_FAM6_MODEL(ARROWLAKE, &rapl_defaults_core),
> - X86_MATCH_INTEL_FAM6_MODEL(LAKEFIELD, &rapl_defaults_core),
> -
> - X86_MATCH_INTEL_FAM6_MODEL(ATOM_SILVERMONT, &rapl_defaults_byt),
> - X86_MATCH_INTEL_FAM6_MODEL(ATOM_AIRMONT, &rapl_defaults_cht),
> - X86_MATCH_INTEL_FAM6_MODEL(ATOM_SILVERMONT_MID, &rapl_defaults_tng),
> - X86_MATCH_INTEL_FAM6_MODEL(ATOM_AIRMONT_MID, &rapl_defaults_ann),
> - X86_MATCH_INTEL_FAM6_MODEL(ATOM_GOLDMONT, &rapl_defaults_core),
> - X86_MATCH_INTEL_FAM6_MODEL(ATOM_GOLDMONT_PLUS, &rapl_defaults_core),
> - X86_MATCH_INTEL_FAM6_MODEL(ATOM_GOLDMONT_D, &rapl_defaults_core),
> - X86_MATCH_INTEL_FAM6_MODEL(ATOM_TREMONT, &rapl_defaults_core),
> - X86_MATCH_INTEL_FAM6_MODEL(ATOM_TREMONT_D, &rapl_defaults_core),
> - X86_MATCH_INTEL_FAM6_MODEL(ATOM_TREMONT_L, &rapl_defaults_core),
> -
> - X86_MATCH_INTEL_FAM6_MODEL(XEON_PHI_KNL, &rapl_defaults_hsw_server),
> - X86_MATCH_INTEL_FAM6_MODEL(XEON_PHI_KNM, &rapl_defaults_hsw_server),
> + X86_MATCH_VFM(INTEL_SANDYBRIDGE, &rapl_defaults_core),
> + X86_MATCH_VFM(INTEL_SANDYBRIDGE_X, &rapl_defaults_core),
> +
> + X86_MATCH_VFM(INTEL_IVYBRIDGE, &rapl_defaults_core),
> + X86_MATCH_VFM(INTEL_IVYBRIDGE_X, &rapl_defaults_core),
> +
> + X86_MATCH_VFM(INTEL_HASWELL, &rapl_defaults_core),
> + X86_MATCH_VFM(INTEL_HASWELL_L, &rapl_defaults_core),
> + X86_MATCH_VFM(INTEL_HASWELL_G, &rapl_defaults_core),
> + X86_MATCH_VFM(INTEL_HASWELL_X, &rapl_defaults_hsw_server),
> +
> + X86_MATCH_VFM(INTEL_BROADWELL, &rapl_defaults_core),
> + X86_MATCH_VFM(INTEL_BROADWELL_G, &rapl_defaults_core),
> + X86_MATCH_VFM(INTEL_BROADWELL_D, &rapl_defaults_core),
> + X86_MATCH_VFM(INTEL_BROADWELL_X, &rapl_defaults_hsw_server),
> +
> + X86_MATCH_VFM(INTEL_SKYLAKE, &rapl_defaults_core),
> + X86_MATCH_VFM(INTEL_SKYLAKE_L, &rapl_defaults_core),
> + X86_MATCH_VFM(INTEL_SKYLAKE_X, &rapl_defaults_hsw_server),
> + X86_MATCH_VFM(INTEL_KABYLAKE_L, &rapl_defaults_core),
> + X86_MATCH_VFM(INTEL_KABYLAKE, &rapl_defaults_core),
> + X86_MATCH_VFM(INTEL_CANNONLAKE_L, &rapl_defaults_core),
> + X86_MATCH_VFM(INTEL_ICELAKE_L, &rapl_defaults_core),
> + X86_MATCH_VFM(INTEL_ICELAKE, &rapl_defaults_core),
> + X86_MATCH_VFM(INTEL_ICELAKE_NNPI, &rapl_defaults_core),
> + X86_MATCH_VFM(INTEL_ICELAKE_X, &rapl_defaults_hsw_server),
> + X86_MATCH_VFM(INTEL_ICELAKE_D, &rapl_defaults_hsw_server),
> + X86_MATCH_VFM(INTEL_COMETLAKE_L, &rapl_defaults_core),
> + X86_MATCH_VFM(INTEL_COMETLAKE, &rapl_defaults_core),
> + X86_MATCH_VFM(INTEL_TIGERLAKE_L, &rapl_defaults_core),
> + X86_MATCH_VFM(INTEL_TIGERLAKE, &rapl_defaults_core),
> + X86_MATCH_VFM(INTEL_ROCKETLAKE, &rapl_defaults_core),
> + X86_MATCH_VFM(INTEL_ALDERLAKE, &rapl_defaults_core),
> + X86_MATCH_VFM(INTEL_ALDERLAKE_L, &rapl_defaults_core),
> + X86_MATCH_VFM(INTEL_ATOM_GRACEMONT, &rapl_defaults_core),
> + X86_MATCH_VFM(INTEL_RAPTORLAKE, &rapl_defaults_core),
> + X86_MATCH_VFM(INTEL_RAPTORLAKE_P, &rapl_defaults_core),
> + X86_MATCH_VFM(INTEL_RAPTORLAKE_S, &rapl_defaults_core),
> + X86_MATCH_VFM(INTEL_METEORLAKE, &rapl_defaults_core),
> + X86_MATCH_VFM(INTEL_METEORLAKE_L, &rapl_defaults_core),
> + X86_MATCH_VFM(INTEL_SAPPHIRERAPIDS_X, &rapl_defaults_spr_server),
> + X86_MATCH_VFM(INTEL_EMERALDRAPIDS_X, &rapl_defaults_spr_server),
> + X86_MATCH_VFM(INTEL_LUNARLAKE_M, &rapl_defaults_core),
> + X86_MATCH_VFM(INTEL_ARROWLAKE, &rapl_defaults_core),
> + X86_MATCH_VFM(INTEL_LAKEFIELD, &rapl_defaults_core),
> +
> + X86_MATCH_VFM(INTEL_ATOM_SILVERMONT, &rapl_defaults_byt),
> + X86_MATCH_VFM(INTEL_ATOM_AIRMONT, &rapl_defaults_cht),
> + X86_MATCH_VFM(INTEL_ATOM_SILVERMONT_MID, &rapl_defaults_tng),
> + X86_MATCH_VFM(INTEL_ATOM_AIRMONT_MID, &rapl_defaults_ann),
> + X86_MATCH_VFM(INTEL_ATOM_GOLDMONT, &rapl_defaults_core),
> + X86_MATCH_VFM(INTEL_ATOM_GOLDMONT_PLUS, &rapl_defaults_core),
> + X86_MATCH_VFM(INTEL_ATOM_GOLDMONT_D, &rapl_defaults_core),
> + X86_MATCH_VFM(INTEL_ATOM_TREMONT, &rapl_defaults_core),
> + X86_MATCH_VFM(INTEL_ATOM_TREMONT_D, &rapl_defaults_core),
> + X86_MATCH_VFM(INTEL_ATOM_TREMONT_L, &rapl_defaults_core),
> +
> + X86_MATCH_VFM(INTEL_XEON_PHI_KNL, &rapl_defaults_hsw_server),
> + X86_MATCH_VFM(INTEL_XEON_PHI_KNM, &rapl_defaults_hsw_server),
>
> X86_MATCH_VENDOR_FAM(AMD, 0x17, &rapl_defaults_amd),
> X86_MATCH_VENDOR_FAM(AMD, 0x19, &rapl_defaults_amd),
> --
> 2.44.0
>
On Tue, Apr 16, 2024 at 11:22 PM Tony Luck <[email protected]> wrote:
>
> New CPU #defines encode vendor and family as well as model.
>
> Signed-off-by: Tony Luck <[email protected]>
Acked-by: Rafael J. Wysocki <[email protected]>
> ---
> drivers/powercap/intel_rapl_msr.c | 16 ++++++++--------
> 1 file changed, 8 insertions(+), 8 deletions(-)
>
> diff --git a/drivers/powercap/intel_rapl_msr.c b/drivers/powercap/intel_rapl_msr.c
> index 35cb152fa9aa..733a36f67fbc 100644
> --- a/drivers/powercap/intel_rapl_msr.c
> +++ b/drivers/powercap/intel_rapl_msr.c
> @@ -139,14 +139,14 @@ static int rapl_msr_write_raw(int cpu, struct reg_action *ra)
>
> /* List of verified CPUs. */
> static const struct x86_cpu_id pl4_support_ids[] = {
> - X86_MATCH_INTEL_FAM6_MODEL(TIGERLAKE_L, NULL),
> - X86_MATCH_INTEL_FAM6_MODEL(ALDERLAKE, NULL),
> - X86_MATCH_INTEL_FAM6_MODEL(ALDERLAKE_L, NULL),
> - X86_MATCH_INTEL_FAM6_MODEL(ATOM_GRACEMONT, NULL),
> - X86_MATCH_INTEL_FAM6_MODEL(RAPTORLAKE, NULL),
> - X86_MATCH_INTEL_FAM6_MODEL(RAPTORLAKE_P, NULL),
> - X86_MATCH_INTEL_FAM6_MODEL(METEORLAKE, NULL),
> - X86_MATCH_INTEL_FAM6_MODEL(METEORLAKE_L, NULL),
> + X86_MATCH_VFM(INTEL_TIGERLAKE_L, NULL),
> + X86_MATCH_VFM(INTEL_ALDERLAKE, NULL),
> + X86_MATCH_VFM(INTEL_ALDERLAKE_L, NULL),
> + X86_MATCH_VFM(INTEL_ATOM_GRACEMONT, NULL),
> + X86_MATCH_VFM(INTEL_RAPTORLAKE, NULL),
> + X86_MATCH_VFM(INTEL_RAPTORLAKE_P, NULL),
> + X86_MATCH_VFM(INTEL_METEORLAKE, NULL),
> + X86_MATCH_VFM(INTEL_METEORLAKE_L, NULL),
> {}
> };
>
> --
> 2.44.0
>
On Tue, Apr 16, 2024 at 11:22 PM Tony Luck <[email protected]> wrote:
>
> New CPU #defines encode vendor and family as well as model.
>
> Signed-off-by: Tony Luck <[email protected]>
Acked-by: Rafael J. Wysocki <[email protected]>
> ---
> include/linux/platform_data/x86/soc.h | 12 ++++++------
> drivers/thermal/intel/intel_soc_dts_thermal.c | 2 +-
> 2 files changed, 7 insertions(+), 7 deletions(-)
>
> diff --git a/include/linux/platform_data/x86/soc.h b/include/linux/platform_data/x86/soc.h
> index a5705189e2ac..f981907a5cb0 100644
> --- a/include/linux/platform_data/x86/soc.h
> +++ b/include/linux/platform_data/x86/soc.h
> @@ -20,7 +20,7 @@
> static inline bool soc_intel_is_##soc(void) \
> { \
> static const struct x86_cpu_id soc##_cpu_ids[] = { \
> - X86_MATCH_INTEL_FAM6_MODEL(type, NULL), \
> + X86_MATCH_VFM(type, NULL), \
> {} \
> }; \
> const struct x86_cpu_id *id; \
> @@ -31,11 +31,11 @@ static inline bool soc_intel_is_##soc(void) \
> return false; \
> }
>
> -SOC_INTEL_IS_CPU(byt, ATOM_SILVERMONT);
> -SOC_INTEL_IS_CPU(cht, ATOM_AIRMONT);
> -SOC_INTEL_IS_CPU(apl, ATOM_GOLDMONT);
> -SOC_INTEL_IS_CPU(glk, ATOM_GOLDMONT_PLUS);
> -SOC_INTEL_IS_CPU(cml, KABYLAKE_L);
> +SOC_INTEL_IS_CPU(byt, INTEL_ATOM_SILVERMONT);
> +SOC_INTEL_IS_CPU(cht, INTEL_ATOM_AIRMONT);
> +SOC_INTEL_IS_CPU(apl, INTEL_ATOM_GOLDMONT);
> +SOC_INTEL_IS_CPU(glk, INTEL_ATOM_GOLDMONT_PLUS);
> +SOC_INTEL_IS_CPU(cml, INTEL_KABYLAKE_L);
>
> #undef SOC_INTEL_IS_CPU
>
> diff --git a/drivers/thermal/intel/intel_soc_dts_thermal.c b/drivers/thermal/intel/intel_soc_dts_thermal.c
> index 9c825c6e1f38..718c6326eaf4 100644
> --- a/drivers/thermal/intel/intel_soc_dts_thermal.c
> +++ b/drivers/thermal/intel/intel_soc_dts_thermal.c
> @@ -36,7 +36,7 @@ static irqreturn_t soc_irq_thread_fn(int irq, void *dev_data)
> }
>
> static const struct x86_cpu_id soc_thermal_ids[] = {
> - X86_MATCH_INTEL_FAM6_MODEL(ATOM_SILVERMONT, BYT_SOC_DTS_APIC_IRQ),
> + X86_MATCH_VFM(INTEL_ATOM_SILVERMONT, BYT_SOC_DTS_APIC_IRQ),
> {}
> };
> MODULE_DEVICE_TABLE(x86cpu, soc_thermal_ids);
> --
> 2.44.0
>
On Tue, Apr 16, 2024 at 11:22 PM Tony Luck <[email protected]> wrote:
>
> New CPU #defines encode vendor and family as well as model.
>
> Signed-off-by: Tony Luck <[email protected]>
Acked-by: Rafael J. Wysocki <[email protected]>
> ---
> drivers/thermal/intel/intel_tcc_cooling.c | 30 +++++++++++------------
> 1 file changed, 15 insertions(+), 15 deletions(-)
>
> diff --git a/drivers/thermal/intel/intel_tcc_cooling.c b/drivers/thermal/intel/intel_tcc_cooling.c
> index 6c392147e6d1..63696e7d7b3c 100644
> --- a/drivers/thermal/intel/intel_tcc_cooling.c
> +++ b/drivers/thermal/intel/intel_tcc_cooling.c
> @@ -49,21 +49,21 @@ static const struct thermal_cooling_device_ops tcc_cooling_ops = {
> };
>
> static const struct x86_cpu_id tcc_ids[] __initconst = {
> - X86_MATCH_INTEL_FAM6_MODEL(SKYLAKE, NULL),
> - X86_MATCH_INTEL_FAM6_MODEL(SKYLAKE_L, NULL),
> - X86_MATCH_INTEL_FAM6_MODEL(KABYLAKE, NULL),
> - X86_MATCH_INTEL_FAM6_MODEL(KABYLAKE_L, NULL),
> - X86_MATCH_INTEL_FAM6_MODEL(ICELAKE, NULL),
> - X86_MATCH_INTEL_FAM6_MODEL(ICELAKE_L, NULL),
> - X86_MATCH_INTEL_FAM6_MODEL(TIGERLAKE, NULL),
> - X86_MATCH_INTEL_FAM6_MODEL(TIGERLAKE_L, NULL),
> - X86_MATCH_INTEL_FAM6_MODEL(COMETLAKE, NULL),
> - X86_MATCH_INTEL_FAM6_MODEL(ALDERLAKE, NULL),
> - X86_MATCH_INTEL_FAM6_MODEL(ALDERLAKE_L, NULL),
> - X86_MATCH_INTEL_FAM6_MODEL(ATOM_GRACEMONT, NULL),
> - X86_MATCH_INTEL_FAM6_MODEL(RAPTORLAKE, NULL),
> - X86_MATCH_INTEL_FAM6_MODEL(RAPTORLAKE_P, NULL),
> - X86_MATCH_INTEL_FAM6_MODEL(RAPTORLAKE_S, NULL),
> + X86_MATCH_VFM(INTEL_SKYLAKE, NULL),
> + X86_MATCH_VFM(INTEL_SKYLAKE_L, NULL),
> + X86_MATCH_VFM(INTEL_KABYLAKE, NULL),
> + X86_MATCH_VFM(INTEL_KABYLAKE_L, NULL),
> + X86_MATCH_VFM(INTEL_ICELAKE, NULL),
> + X86_MATCH_VFM(INTEL_ICELAKE_L, NULL),
> + X86_MATCH_VFM(INTEL_TIGERLAKE, NULL),
> + X86_MATCH_VFM(INTEL_TIGERLAKE_L, NULL),
> + X86_MATCH_VFM(INTEL_COMETLAKE, NULL),
> + X86_MATCH_VFM(INTEL_ALDERLAKE, NULL),
> + X86_MATCH_VFM(INTEL_ALDERLAKE_L, NULL),
> + X86_MATCH_VFM(INTEL_ATOM_GRACEMONT, NULL),
> + X86_MATCH_VFM(INTEL_RAPTORLAKE, NULL),
> + X86_MATCH_VFM(INTEL_RAPTORLAKE_P, NULL),
> + X86_MATCH_VFM(INTEL_RAPTORLAKE_S, NULL),
> {}
> };
>
> --
> 2.44.0
>
On Tue, Apr 16, 2024 at 11:31 PM Tony Luck <[email protected]> wrote:
>
> New CPU #defines encode vendor and family as well as model.
>
> Signed-off-by: Tony Luck <[email protected]>
Acked-by: Rafael J. Wysocki <[email protected]>
> ---
> drivers/idle/intel_idle.c | 116 +++++++++++++++++++-------------------
> 1 file changed, 58 insertions(+), 58 deletions(-)
>
> diff --git a/drivers/idle/intel_idle.c b/drivers/idle/intel_idle.c
> index e486027f8b07..9aab7abc2ae9 100644
> --- a/drivers/idle/intel_idle.c
> +++ b/drivers/idle/intel_idle.c
> @@ -1494,53 +1494,53 @@ static const struct idle_cpu idle_cpu_srf __initconst = {
> };
>
> static const struct x86_cpu_id intel_idle_ids[] __initconst = {
> - X86_MATCH_INTEL_FAM6_MODEL(NEHALEM_EP, &idle_cpu_nhx),
> - X86_MATCH_INTEL_FAM6_MODEL(NEHALEM, &idle_cpu_nehalem),
> - X86_MATCH_INTEL_FAM6_MODEL(NEHALEM_G, &idle_cpu_nehalem),
> - X86_MATCH_INTEL_FAM6_MODEL(WESTMERE, &idle_cpu_nehalem),
> - X86_MATCH_INTEL_FAM6_MODEL(WESTMERE_EP, &idle_cpu_nhx),
> - X86_MATCH_INTEL_FAM6_MODEL(NEHALEM_EX, &idle_cpu_nhx),
> - X86_MATCH_INTEL_FAM6_MODEL(ATOM_BONNELL, &idle_cpu_atom),
> - X86_MATCH_INTEL_FAM6_MODEL(ATOM_BONNELL_MID, &idle_cpu_lincroft),
> - X86_MATCH_INTEL_FAM6_MODEL(WESTMERE_EX, &idle_cpu_nhx),
> - X86_MATCH_INTEL_FAM6_MODEL(SANDYBRIDGE, &idle_cpu_snb),
> - X86_MATCH_INTEL_FAM6_MODEL(SANDYBRIDGE_X, &idle_cpu_snx),
> - X86_MATCH_INTEL_FAM6_MODEL(ATOM_SALTWELL, &idle_cpu_atom),
> - X86_MATCH_INTEL_FAM6_MODEL(ATOM_SILVERMONT, &idle_cpu_byt),
> - X86_MATCH_INTEL_FAM6_MODEL(ATOM_SILVERMONT_MID, &idle_cpu_tangier),
> - X86_MATCH_INTEL_FAM6_MODEL(ATOM_AIRMONT, &idle_cpu_cht),
> - X86_MATCH_INTEL_FAM6_MODEL(IVYBRIDGE, &idle_cpu_ivb),
> - X86_MATCH_INTEL_FAM6_MODEL(IVYBRIDGE_X, &idle_cpu_ivt),
> - X86_MATCH_INTEL_FAM6_MODEL(HASWELL, &idle_cpu_hsw),
> - X86_MATCH_INTEL_FAM6_MODEL(HASWELL_X, &idle_cpu_hsx),
> - X86_MATCH_INTEL_FAM6_MODEL(HASWELL_L, &idle_cpu_hsw),
> - X86_MATCH_INTEL_FAM6_MODEL(HASWELL_G, &idle_cpu_hsw),
> - X86_MATCH_INTEL_FAM6_MODEL(ATOM_SILVERMONT_D, &idle_cpu_avn),
> - X86_MATCH_INTEL_FAM6_MODEL(BROADWELL, &idle_cpu_bdw),
> - X86_MATCH_INTEL_FAM6_MODEL(BROADWELL_G, &idle_cpu_bdw),
> - X86_MATCH_INTEL_FAM6_MODEL(BROADWELL_X, &idle_cpu_bdx),
> - X86_MATCH_INTEL_FAM6_MODEL(BROADWELL_D, &idle_cpu_bdx),
> - X86_MATCH_INTEL_FAM6_MODEL(SKYLAKE_L, &idle_cpu_skl),
> - X86_MATCH_INTEL_FAM6_MODEL(SKYLAKE, &idle_cpu_skl),
> - X86_MATCH_INTEL_FAM6_MODEL(KABYLAKE_L, &idle_cpu_skl),
> - X86_MATCH_INTEL_FAM6_MODEL(KABYLAKE, &idle_cpu_skl),
> - X86_MATCH_INTEL_FAM6_MODEL(SKYLAKE_X, &idle_cpu_skx),
> - X86_MATCH_INTEL_FAM6_MODEL(ICELAKE_X, &idle_cpu_icx),
> - X86_MATCH_INTEL_FAM6_MODEL(ICELAKE_D, &idle_cpu_icx),
> - X86_MATCH_INTEL_FAM6_MODEL(ALDERLAKE, &idle_cpu_adl),
> - X86_MATCH_INTEL_FAM6_MODEL(ALDERLAKE_L, &idle_cpu_adl_l),
> - X86_MATCH_INTEL_FAM6_MODEL(METEORLAKE_L, &idle_cpu_mtl_l),
> - X86_MATCH_INTEL_FAM6_MODEL(ATOM_GRACEMONT, &idle_cpu_gmt),
> - X86_MATCH_INTEL_FAM6_MODEL(SAPPHIRERAPIDS_X, &idle_cpu_spr),
> - X86_MATCH_INTEL_FAM6_MODEL(EMERALDRAPIDS_X, &idle_cpu_spr),
> - X86_MATCH_INTEL_FAM6_MODEL(XEON_PHI_KNL, &idle_cpu_knl),
> - X86_MATCH_INTEL_FAM6_MODEL(XEON_PHI_KNM, &idle_cpu_knl),
> - X86_MATCH_INTEL_FAM6_MODEL(ATOM_GOLDMONT, &idle_cpu_bxt),
> - X86_MATCH_INTEL_FAM6_MODEL(ATOM_GOLDMONT_PLUS, &idle_cpu_bxt),
> - X86_MATCH_INTEL_FAM6_MODEL(ATOM_GOLDMONT_D, &idle_cpu_dnv),
> - X86_MATCH_INTEL_FAM6_MODEL(ATOM_TREMONT_D, &idle_cpu_snr),
> - X86_MATCH_INTEL_FAM6_MODEL(ATOM_CRESTMONT, &idle_cpu_grr),
> - X86_MATCH_INTEL_FAM6_MODEL(ATOM_CRESTMONT_X, &idle_cpu_srf),
> + X86_MATCH_VFM(INTEL_NEHALEM_EP, &idle_cpu_nhx),
> + X86_MATCH_VFM(INTEL_NEHALEM, &idle_cpu_nehalem),
> + X86_MATCH_VFM(INTEL_NEHALEM_G, &idle_cpu_nehalem),
> + X86_MATCH_VFM(INTEL_WESTMERE, &idle_cpu_nehalem),
> + X86_MATCH_VFM(INTEL_WESTMERE_EP, &idle_cpu_nhx),
> + X86_MATCH_VFM(INTEL_NEHALEM_EX, &idle_cpu_nhx),
> + X86_MATCH_VFM(INTEL_ATOM_BONNELL, &idle_cpu_atom),
> + X86_MATCH_VFM(INTEL_ATOM_BONNELL_MID, &idle_cpu_lincroft),
> + X86_MATCH_VFM(INTEL_WESTMERE_EX, &idle_cpu_nhx),
> + X86_MATCH_VFM(INTEL_SANDYBRIDGE, &idle_cpu_snb),
> + X86_MATCH_VFM(INTEL_SANDYBRIDGE_X, &idle_cpu_snx),
> + X86_MATCH_VFM(INTEL_ATOM_SALTWELL, &idle_cpu_atom),
> + X86_MATCH_VFM(INTEL_ATOM_SILVERMONT, &idle_cpu_byt),
> + X86_MATCH_VFM(INTEL_ATOM_SILVERMONT_MID, &idle_cpu_tangier),
> + X86_MATCH_VFM(INTEL_ATOM_AIRMONT, &idle_cpu_cht),
> + X86_MATCH_VFM(INTEL_IVYBRIDGE, &idle_cpu_ivb),
> + X86_MATCH_VFM(INTEL_IVYBRIDGE_X, &idle_cpu_ivt),
> + X86_MATCH_VFM(INTEL_HASWELL, &idle_cpu_hsw),
> + X86_MATCH_VFM(INTEL_HASWELL_X, &idle_cpu_hsx),
> + X86_MATCH_VFM(INTEL_HASWELL_L, &idle_cpu_hsw),
> + X86_MATCH_VFM(INTEL_HASWELL_G, &idle_cpu_hsw),
> + X86_MATCH_VFM(INTEL_ATOM_SILVERMONT_D, &idle_cpu_avn),
> + X86_MATCH_VFM(INTEL_BROADWELL, &idle_cpu_bdw),
> + X86_MATCH_VFM(INTEL_BROADWELL_G, &idle_cpu_bdw),
> + X86_MATCH_VFM(INTEL_BROADWELL_X, &idle_cpu_bdx),
> + X86_MATCH_VFM(INTEL_BROADWELL_D, &idle_cpu_bdx),
> + X86_MATCH_VFM(INTEL_SKYLAKE_L, &idle_cpu_skl),
> + X86_MATCH_VFM(INTEL_SKYLAKE, &idle_cpu_skl),
> + X86_MATCH_VFM(INTEL_KABYLAKE_L, &idle_cpu_skl),
> + X86_MATCH_VFM(INTEL_KABYLAKE, &idle_cpu_skl),
> + X86_MATCH_VFM(INTEL_SKYLAKE_X, &idle_cpu_skx),
> + X86_MATCH_VFM(INTEL_ICELAKE_X, &idle_cpu_icx),
> + X86_MATCH_VFM(INTEL_ICELAKE_D, &idle_cpu_icx),
> + X86_MATCH_VFM(INTEL_ALDERLAKE, &idle_cpu_adl),
> + X86_MATCH_VFM(INTEL_ALDERLAKE_L, &idle_cpu_adl_l),
> + X86_MATCH_VFM(INTEL_METEORLAKE_L, &idle_cpu_mtl_l),
> + X86_MATCH_VFM(INTEL_ATOM_GRACEMONT, &idle_cpu_gmt),
> + X86_MATCH_VFM(INTEL_SAPPHIRERAPIDS_X, &idle_cpu_spr),
> + X86_MATCH_VFM(INTEL_EMERALDRAPIDS_X, &idle_cpu_spr),
> + X86_MATCH_VFM(INTEL_XEON_PHI_KNL, &idle_cpu_knl),
> + X86_MATCH_VFM(INTEL_XEON_PHI_KNM, &idle_cpu_knl),
> + X86_MATCH_VFM(INTEL_ATOM_GOLDMONT, &idle_cpu_bxt),
> + X86_MATCH_VFM(INTEL_ATOM_GOLDMONT_PLUS, &idle_cpu_bxt),
> + X86_MATCH_VFM(INTEL_ATOM_GOLDMONT_D, &idle_cpu_dnv),
> + X86_MATCH_VFM(INTEL_ATOM_TREMONT_D, &idle_cpu_snr),
> + X86_MATCH_VFM(INTEL_ATOM_CRESTMONT, &idle_cpu_grr),
> + X86_MATCH_VFM(INTEL_ATOM_CRESTMONT_X, &idle_cpu_srf),
> {}
> };
>
> @@ -1990,27 +1990,27 @@ static void __init intel_idle_init_cstates_icpu(struct cpuidle_driver *drv)
> {
> int cstate;
>
> - switch (boot_cpu_data.x86_model) {
> - case INTEL_FAM6_IVYBRIDGE_X:
> + switch (boot_cpu_data.x86_vfm) {
> + case INTEL_IVYBRIDGE_X:
> ivt_idle_state_table_update();
> break;
> - case INTEL_FAM6_ATOM_GOLDMONT:
> - case INTEL_FAM6_ATOM_GOLDMONT_PLUS:
> + case INTEL_ATOM_GOLDMONT:
> + case INTEL_ATOM_GOLDMONT_PLUS:
> bxt_idle_state_table_update();
> break;
> - case INTEL_FAM6_SKYLAKE:
> + case INTEL_SKYLAKE:
> sklh_idle_state_table_update();
> break;
> - case INTEL_FAM6_SKYLAKE_X:
> + case INTEL_SKYLAKE_X:
> skx_idle_state_table_update();
> break;
> - case INTEL_FAM6_SAPPHIRERAPIDS_X:
> - case INTEL_FAM6_EMERALDRAPIDS_X:
> + case INTEL_SAPPHIRERAPIDS_X:
> + case INTEL_EMERALDRAPIDS_X:
> spr_idle_state_table_update();
> break;
> - case INTEL_FAM6_ALDERLAKE:
> - case INTEL_FAM6_ALDERLAKE_L:
> - case INTEL_FAM6_ATOM_GRACEMONT:
> + case INTEL_ALDERLAKE:
> + case INTEL_ALDERLAKE_L:
> + case INTEL_ATOM_GRACEMONT:
> adl_idle_state_table_update();
> break;
> }
> --
> 2.44.0
>
>
On Tue, Apr 16, 2024 at 11:35 PM Tony Luck <[email protected]> wrote:
>
> New CPU #defines encode vendor and family as well as model.
>
> Signed-off-by: Tony Luck <[email protected]>
Acked-by: Rafael J. Wysocki <[email protected]>
> ---
> tools/power/x86/turbostat/turbostat.c | 161 +++++++++++++++-----------
> 1 file changed, 93 insertions(+), 68 deletions(-)
>
> diff --git a/tools/power/x86/turbostat/turbostat.c b/tools/power/x86/turbostat/turbostat.c
> index 98256468e248..80dc3bdaa5fc 100644
> --- a/tools/power/x86/turbostat/turbostat.c
> +++ b/tools/power/x86/turbostat/turbostat.c
> @@ -9,6 +9,30 @@
>
> #define _GNU_SOURCE
> #include MSRHEADER
> +
> +// copied from arch/x86/include/asm/cpu_device_id.h
> +#define VFM_MODEL_BIT 0
> +#define VFM_FAMILY_BIT 8
> +#define VFM_VENDOR_BIT 16
> +#define VFM_RSVD_BIT 24
> +
> +#define VFM_MODEL_MASK GENMASK(VFM_FAMILY_BIT - 1, VFM_MODEL_BIT)
> +#define VFM_FAMILY_MASK GENMASK(VFM_VENDOR_BIT - 1, VFM_FAMILY_BIT)
> +#define VFM_VENDOR_MASK GENMASK(VFM_RSVD_BIT - 1, VFM_VENDOR_BIT)
> +
> +#define VFM_MODEL(vfm) (((vfm) & VFM_MODEL_MASK) >> VFM_MODEL_BIT)
> +#define VFM_FAMILY(vfm) (((vfm) & VFM_FAMILY_MASK) >> VFM_FAMILY_BIT)
> +#define VFM_VENDOR(vfm) (((vfm) & VFM_VENDOR_MASK) >> VFM_VENDOR_BIT)
> +
> +#define VFM_MAKE(_vendor, _family, _model) ( \
> + ((_model) << VFM_MODEL_BIT) | \
> + ((_family) << VFM_FAMILY_BIT) | \
> + ((_vendor) << VFM_VENDOR_BIT) \
> +)
> +// end copied section
> +
> +#define X86_VENDOR_INTEL 0
> +
> #include INTEL_FAMILY_HEADER
> #include <stdarg.h>
> #include <stdio.h>
> @@ -334,7 +358,7 @@ struct platform_features {
> };
>
> struct platform_data {
> - unsigned int model;
> + unsigned int vfm;
> const struct platform_features *features;
> };
>
> @@ -860,73 +884,73 @@ static const struct platform_features amd_features_with_rapl = {
> };
>
> static const struct platform_data turbostat_pdata[] = {
> - { INTEL_FAM6_NEHALEM, &nhm_features },
> - { INTEL_FAM6_NEHALEM_G, &nhm_features },
> - { INTEL_FAM6_NEHALEM_EP, &nhm_features },
> - { INTEL_FAM6_NEHALEM_EX, &nhx_features },
> - { INTEL_FAM6_WESTMERE, &nhm_features },
> - { INTEL_FAM6_WESTMERE_EP, &nhm_features },
> - { INTEL_FAM6_WESTMERE_EX, &nhx_features },
> - { INTEL_FAM6_SANDYBRIDGE, &snb_features },
> - { INTEL_FAM6_SANDYBRIDGE_X, &snx_features },
> - { INTEL_FAM6_IVYBRIDGE, &ivb_features },
> - { INTEL_FAM6_IVYBRIDGE_X, &ivx_features },
> - { INTEL_FAM6_HASWELL, &hsw_features },
> - { INTEL_FAM6_HASWELL_X, &hsx_features },
> - { INTEL_FAM6_HASWELL_L, &hswl_features },
> - { INTEL_FAM6_HASWELL_G, &hswg_features },
> - { INTEL_FAM6_BROADWELL, &bdw_features },
> - { INTEL_FAM6_BROADWELL_G, &bdwg_features },
> - { INTEL_FAM6_BROADWELL_X, &bdx_features },
> - { INTEL_FAM6_BROADWELL_D, &bdx_features },
> - { INTEL_FAM6_SKYLAKE_L, &skl_features },
> - { INTEL_FAM6_SKYLAKE, &skl_features },
> - { INTEL_FAM6_SKYLAKE_X, &skx_features },
> - { INTEL_FAM6_KABYLAKE_L, &skl_features },
> - { INTEL_FAM6_KABYLAKE, &skl_features },
> - { INTEL_FAM6_COMETLAKE, &skl_features },
> - { INTEL_FAM6_COMETLAKE_L, &skl_features },
> - { INTEL_FAM6_CANNONLAKE_L, &cnl_features },
> - { INTEL_FAM6_ICELAKE_X, &icx_features },
> - { INTEL_FAM6_ICELAKE_D, &icx_features },
> - { INTEL_FAM6_ICELAKE_L, &cnl_features },
> - { INTEL_FAM6_ICELAKE_NNPI, &cnl_features },
> - { INTEL_FAM6_ROCKETLAKE, &cnl_features },
> - { INTEL_FAM6_TIGERLAKE_L, &cnl_features },
> - { INTEL_FAM6_TIGERLAKE, &cnl_features },
> - { INTEL_FAM6_SAPPHIRERAPIDS_X, &spr_features },
> - { INTEL_FAM6_EMERALDRAPIDS_X, &spr_features },
> - { INTEL_FAM6_GRANITERAPIDS_X, &spr_features },
> - { INTEL_FAM6_LAKEFIELD, &cnl_features },
> - { INTEL_FAM6_ALDERLAKE, &adl_features },
> - { INTEL_FAM6_ALDERLAKE_L, &adl_features },
> - { INTEL_FAM6_RAPTORLAKE, &adl_features },
> - { INTEL_FAM6_RAPTORLAKE_P, &adl_features },
> - { INTEL_FAM6_RAPTORLAKE_S, &adl_features },
> - { INTEL_FAM6_METEORLAKE, &cnl_features },
> - { INTEL_FAM6_METEORLAKE_L, &cnl_features },
> - { INTEL_FAM6_ARROWLAKE, &cnl_features },
> - { INTEL_FAM6_LUNARLAKE_M, &cnl_features },
> - { INTEL_FAM6_ATOM_SILVERMONT, &slv_features },
> - { INTEL_FAM6_ATOM_SILVERMONT_D, &slvd_features },
> - { INTEL_FAM6_ATOM_AIRMONT, &amt_features },
> - { INTEL_FAM6_ATOM_GOLDMONT, &gmt_features },
> - { INTEL_FAM6_ATOM_GOLDMONT_D, &gmtd_features },
> - { INTEL_FAM6_ATOM_GOLDMONT_PLUS, &gmtp_features },
> - { INTEL_FAM6_ATOM_TREMONT_D, &tmtd_features },
> - { INTEL_FAM6_ATOM_TREMONT, &tmt_features },
> - { INTEL_FAM6_ATOM_TREMONT_L, &tmt_features },
> - { INTEL_FAM6_ATOM_GRACEMONT, &adl_features },
> - { INTEL_FAM6_ATOM_CRESTMONT_X, &srf_features },
> - { INTEL_FAM6_ATOM_CRESTMONT, &grr_features },
> - { INTEL_FAM6_XEON_PHI_KNL, &knl_features },
> - { INTEL_FAM6_XEON_PHI_KNM, &knl_features },
> + { INTEL_NEHALEM, &nhm_features },
> + { INTEL_NEHALEM_G, &nhm_features },
> + { INTEL_NEHALEM_EP, &nhm_features },
> + { INTEL_NEHALEM_EX, &nhx_features },
> + { INTEL_WESTMERE, &nhm_features },
> + { INTEL_WESTMERE_EP, &nhm_features },
> + { INTEL_WESTMERE_EX, &nhx_features },
> + { INTEL_SANDYBRIDGE, &snb_features },
> + { INTEL_SANDYBRIDGE_X, &snx_features },
> + { INTEL_IVYBRIDGE, &ivb_features },
> + { INTEL_IVYBRIDGE_X, &ivx_features },
> + { INTEL_HASWELL, &hsw_features },
> + { INTEL_HASWELL_X, &hsx_features },
> + { INTEL_HASWELL_L, &hswl_features },
> + { INTEL_HASWELL_G, &hswg_features },
> + { INTEL_BROADWELL, &bdw_features },
> + { INTEL_BROADWELL_G, &bdwg_features },
> + { INTEL_BROADWELL_X, &bdx_features },
> + { INTEL_BROADWELL_D, &bdx_features },
> + { INTEL_SKYLAKE_L, &skl_features },
> + { INTEL_SKYLAKE, &skl_features },
> + { INTEL_SKYLAKE_X, &skx_features },
> + { INTEL_KABYLAKE_L, &skl_features },
> + { INTEL_KABYLAKE, &skl_features },
> + { INTEL_COMETLAKE, &skl_features },
> + { INTEL_COMETLAKE_L, &skl_features },
> + { INTEL_CANNONLAKE_L, &cnl_features },
> + { INTEL_ICELAKE_X, &icx_features },
> + { INTEL_ICELAKE_D, &icx_features },
> + { INTEL_ICELAKE_L, &cnl_features },
> + { INTEL_ICELAKE_NNPI, &cnl_features },
> + { INTEL_ROCKETLAKE, &cnl_features },
> + { INTEL_TIGERLAKE_L, &cnl_features },
> + { INTEL_TIGERLAKE, &cnl_features },
> + { INTEL_SAPPHIRERAPIDS_X, &spr_features },
> + { INTEL_EMERALDRAPIDS_X, &spr_features },
> + { INTEL_GRANITERAPIDS_X, &spr_features },
> + { INTEL_LAKEFIELD, &cnl_features },
> + { INTEL_ALDERLAKE, &adl_features },
> + { INTEL_ALDERLAKE_L, &adl_features },
> + { INTEL_RAPTORLAKE, &adl_features },
> + { INTEL_RAPTORLAKE_P, &adl_features },
> + { INTEL_RAPTORLAKE_S, &adl_features },
> + { INTEL_METEORLAKE, &cnl_features },
> + { INTEL_METEORLAKE_L, &cnl_features },
> + { INTEL_ARROWLAKE, &cnl_features },
> + { INTEL_LUNARLAKE_M, &cnl_features },
> + { INTEL_ATOM_SILVERMONT, &slv_features },
> + { INTEL_ATOM_SILVERMONT_D, &slvd_features },
> + { INTEL_ATOM_AIRMONT, &amt_features },
> + { INTEL_ATOM_GOLDMONT, &gmt_features },
> + { INTEL_ATOM_GOLDMONT_D, &gmtd_features },
> + { INTEL_ATOM_GOLDMONT_PLUS, &gmtp_features },
> + { INTEL_ATOM_TREMONT_D, &tmtd_features },
> + { INTEL_ATOM_TREMONT, &tmt_features },
> + { INTEL_ATOM_TREMONT_L, &tmt_features },
> + { INTEL_ATOM_GRACEMONT, &adl_features },
> + { INTEL_ATOM_CRESTMONT_X, &srf_features },
> + { INTEL_ATOM_CRESTMONT, &grr_features },
> + { INTEL_XEON_PHI_KNL, &knl_features },
> + { INTEL_XEON_PHI_KNM, &knl_features },
> /*
> * Missing support for
> - * INTEL_FAM6_ICELAKE
> - * INTEL_FAM6_ATOM_SILVERMONT_MID
> - * INTEL_FAM6_ATOM_AIRMONT_MID
> - * INTEL_FAM6_ATOM_AIRMONT_NP
> + * INTEL_ICELAKE
> + * INTEL_ATOM_SILVERMONT_MID
> + * INTEL_ATOM_AIRMONT_MID
> + * INTEL_ATOM_AIRMONT_NP
> */
> { 0, NULL },
> };
> @@ -951,11 +975,12 @@ void probe_platform_features(unsigned int family, unsigned int model)
> return;
> }
>
> - if (!genuine_intel || family != 6)
> + if (!genuine_intel)
> return;
>
> for (i = 0; turbostat_pdata[i].features; i++) {
> - if (turbostat_pdata[i].model == model) {
> + if (VFM_FAMILY(turbostat_pdata[i].vfm) == family &&
> + VFM_MODEL(turbostat_pdata[i].vfm) == model) {
> platform = turbostat_pdata[i].features;
> return;
> }
> --
> 2.44.0
>
>
On Tue, Apr 16, 2024 at 11:22 PM Tony Luck <[email protected]> wrote:
>
> New CPU #defines encode vendor and family as well as model.
>
> Signed-off-by: Tony Luck <[email protected]>
Acked-by: Rafael J. Wysocki <[email protected]>
> ---
> drivers/acpi/x86/utils.c | 42 ++++++++++++++++++++--------------------
> 1 file changed, 21 insertions(+), 21 deletions(-)
>
> diff --git a/drivers/acpi/x86/utils.c b/drivers/acpi/x86/utils.c
> index 90c3d2eab9e9..2d8203f7bd98 100644
> --- a/drivers/acpi/x86/utils.c
> +++ b/drivers/acpi/x86/utils.c
> @@ -45,37 +45,37 @@ struct override_status_id {
> unsigned long long status;
> };
>
> -#define ENTRY(status, hid, uid, path, cpu_model, dmi...) { \
> +#define ENTRY(status, hid, uid, path, cpu_vfm, dmi...) { \
> { { hid, }, {} }, \
> - { X86_MATCH_INTEL_FAM6_MODEL(cpu_model, NULL), {} }, \
> + { X86_MATCH_VFM(cpu_vfm, NULL), {} }, \
> { { .matches = dmi }, {} }, \
> uid, \
> path, \
> status, \
> }
>
> -#define PRESENT_ENTRY_HID(hid, uid, cpu_model, dmi...) \
> - ENTRY(ACPI_STA_DEFAULT, hid, uid, NULL, cpu_model, dmi)
> +#define PRESENT_ENTRY_HID(hid, uid, cpu_vfm, dmi...) \
> + ENTRY(ACPI_STA_DEFAULT, hid, uid, NULL, cpu_vfm, dmi)
>
> -#define NOT_PRESENT_ENTRY_HID(hid, uid, cpu_model, dmi...) \
> - ENTRY(0, hid, uid, NULL, cpu_model, dmi)
> +#define NOT_PRESENT_ENTRY_HID(hid, uid, cpu_vfm, dmi...) \
> + ENTRY(0, hid, uid, NULL, cpu_vfm, dmi)
>
> -#define PRESENT_ENTRY_PATH(path, cpu_model, dmi...) \
> - ENTRY(ACPI_STA_DEFAULT, "", NULL, path, cpu_model, dmi)
> +#define PRESENT_ENTRY_PATH(path, cpu_vfm, dmi...) \
> + ENTRY(ACPI_STA_DEFAULT, "", NULL, path, cpu_vfm, dmi)
>
> -#define NOT_PRESENT_ENTRY_PATH(path, cpu_model, dmi...) \
> - ENTRY(0, "", NULL, path, cpu_model, dmi)
> +#define NOT_PRESENT_ENTRY_PATH(path, cpu_vfm, dmi...) \
> + ENTRY(0, "", NULL, path, cpu_vfm, dmi)
>
> static const struct override_status_id override_status_ids[] = {
> /*
> * Bay / Cherry Trail PWM directly poked by GPU driver in win10,
> * but Linux uses a separate PWM driver, harmless if not used.
> */
> - PRESENT_ENTRY_HID("80860F09", "1", ATOM_SILVERMONT, {}),
> - PRESENT_ENTRY_HID("80862288", "1", ATOM_AIRMONT, {}),
> + PRESENT_ENTRY_HID("80860F09", "1", INTEL_ATOM_SILVERMONT, {}),
> + PRESENT_ENTRY_HID("80862288", "1", INTEL_ATOM_AIRMONT, {}),
>
> /* The Xiaomi Mi Pad 2 uses PWM2 for touchkeys backlight control */
> - PRESENT_ENTRY_HID("80862289", "2", ATOM_AIRMONT, {
> + PRESENT_ENTRY_HID("80862289", "2", INTEL_ATOM_AIRMONT, {
> DMI_MATCH(DMI_SYS_VENDOR, "Xiaomi Inc"),
> DMI_MATCH(DMI_PRODUCT_NAME, "Mipad2"),
> }),
> @@ -84,18 +84,18 @@ static const struct override_status_id override_status_ids[] = {
> * The INT0002 device is necessary to clear wakeup interrupt sources
> * on Cherry Trail devices, without it we get nobody cared IRQ msgs.
> */
> - PRESENT_ENTRY_HID("INT0002", "1", ATOM_AIRMONT, {}),
> + PRESENT_ENTRY_HID("INT0002", "1", INTEL_ATOM_AIRMONT, {}),
> /*
> * On the Dell Venue 11 Pro 7130 and 7139, the DSDT hides
> * the touchscreen ACPI device until a certain time
> * after _SB.PCI0.GFX0.LCD.LCD1._ON gets called has passed
> * *and* _STA has been called at least 3 times since.
> */
> - PRESENT_ENTRY_HID("SYNA7500", "1", HASWELL_L, {
> + PRESENT_ENTRY_HID("SYNA7500", "1", INTEL_HASWELL_L, {
> DMI_MATCH(DMI_SYS_VENDOR, "Dell Inc."),
> DMI_MATCH(DMI_PRODUCT_NAME, "Venue 11 Pro 7130"),
> }),
> - PRESENT_ENTRY_HID("SYNA7500", "1", HASWELL_L, {
> + PRESENT_ENTRY_HID("SYNA7500", "1", INTEL_HASWELL_L, {
> DMI_MATCH(DMI_SYS_VENDOR, "Dell Inc."),
> DMI_MATCH(DMI_PRODUCT_NAME, "Venue 11 Pro 7139"),
> }),
> @@ -112,19 +112,19 @@ static const struct override_status_id override_status_ids[] = {
> * was copy-pasted from the GPD win, so it has a disabled KIOX000A
> * node which we should not enable, thus we also check the BIOS date.
> */
> - PRESENT_ENTRY_HID("KIOX000A", "1", ATOM_AIRMONT, {
> + PRESENT_ENTRY_HID("KIOX000A", "1", INTEL_ATOM_AIRMONT, {
> DMI_MATCH(DMI_BOARD_VENDOR, "AMI Corporation"),
> DMI_MATCH(DMI_BOARD_NAME, "Default string"),
> DMI_MATCH(DMI_PRODUCT_NAME, "Default string"),
> DMI_MATCH(DMI_BIOS_DATE, "02/21/2017")
> }),
> - PRESENT_ENTRY_HID("KIOX000A", "1", ATOM_AIRMONT, {
> + PRESENT_ENTRY_HID("KIOX000A", "1", INTEL_ATOM_AIRMONT, {
> DMI_MATCH(DMI_BOARD_VENDOR, "AMI Corporation"),
> DMI_MATCH(DMI_BOARD_NAME, "Default string"),
> DMI_MATCH(DMI_PRODUCT_NAME, "Default string"),
> DMI_MATCH(DMI_BIOS_DATE, "03/20/2017")
> }),
> - PRESENT_ENTRY_HID("KIOX000A", "1", ATOM_AIRMONT, {
> + PRESENT_ENTRY_HID("KIOX000A", "1", INTEL_ATOM_AIRMONT, {
> DMI_MATCH(DMI_BOARD_VENDOR, "AMI Corporation"),
> DMI_MATCH(DMI_BOARD_NAME, "Default string"),
> DMI_MATCH(DMI_PRODUCT_NAME, "Default string"),
> @@ -137,7 +137,7 @@ static const struct override_status_id override_status_ids[] = {
> * method sets a GPIO causing the PCI wifi card to turn off.
> * See above remark about uniqueness of the DMI match.
> */
> - NOT_PRESENT_ENTRY_PATH("\\_SB_.PCI0.SDHB.BRC1", ATOM_AIRMONT, {
> + NOT_PRESENT_ENTRY_PATH("\\_SB_.PCI0.SDHB.BRC1", INTEL_ATOM_AIRMONT, {
> DMI_EXACT_MATCH(DMI_BOARD_VENDOR, "AMI Corporation"),
> DMI_EXACT_MATCH(DMI_BOARD_NAME, "Default string"),
> DMI_EXACT_MATCH(DMI_BOARD_SERIAL, "Default string"),
> @@ -149,7 +149,7 @@ static const struct override_status_id override_status_ids[] = {
> * as both ACCL0001 and MAGN0001. As we can only ever register an
> * i2c client for one of them, ignore MAGN0001.
> */
> - NOT_PRESENT_ENTRY_HID("MAGN0001", "1", ATOM_SILVERMONT, {
> + NOT_PRESENT_ENTRY_HID("MAGN0001", "1", INTEL_ATOM_SILVERMONT, {
> DMI_MATCH(DMI_SYS_VENDOR, "LENOVO"),
> DMI_MATCH(DMI_PRODUCT_FAMILY, "YOGATablet2"),
> }),
> --
> 2.44.0
>
On Tue, Apr 16, 2024 at 11:22 PM Tony Luck <[email protected]> wrote:
>
> New CPU #defines encode vendor and family as well as model.
>
> Signed-off-by: Tony Luck <[email protected]>
Acked-by: Rafael J. Wysocki <[email protected]>
> ---
> drivers/acpi/acpi_lpss.c | 4 ++--
> 1 file changed, 2 insertions(+), 2 deletions(-)
>
> diff --git a/drivers/acpi/acpi_lpss.c b/drivers/acpi/acpi_lpss.c
> index 04e273167e92..e7b57dcce146 100644
> --- a/drivers/acpi/acpi_lpss.c
> +++ b/drivers/acpi/acpi_lpss.c
> @@ -337,8 +337,8 @@ static const struct lpss_device_desc bsw_spi_dev_desc = {
> };
>
> static const struct x86_cpu_id lpss_cpu_ids[] = {
> - X86_MATCH_INTEL_FAM6_MODEL(ATOM_SILVERMONT, NULL),
> - X86_MATCH_INTEL_FAM6_MODEL(ATOM_AIRMONT, NULL),
> + X86_MATCH_VFM(INTEL_ATOM_SILVERMONT, NULL),
> + X86_MATCH_VFM(INTEL_ATOM_AIRMONT, NULL),
> {}
> };
>
> --
> 2.44.0
>
On Tue, Apr 16, 2024 at 09:51:43PM +0000, Luck, Tony wrote:
..
> > I guess "vfm" is
> > some kind of a hint, but I don't know what it means. I suppose it is
> > for "vendor, family, model".
>
> Yes. vfm is indeed vendor-family-model. Agreed the commit comment
> is lacking details without the context of the cover letter and the other
> patches in this series.
You see, TLAs are cryptic, that's why I internally proposed different naming.
--
With Best Regards,
Andy Shevchenko
On 4/16/2024 11:19 PM, Tony Luck wrote:
> To avoid adding a slew of new macros for each new Intel CPU family
> switch over from providing CPU model number #defines to a new
> scheme that encodes vendor, family, and model in a single number.
>
> Signed-off-by: Tony Luck <[email protected]>
> Reviewed-by: Thomas Gleixner <[email protected]>
> ---
> arch/x86/include/asm/cpu_device_id.h | 93 ++++++++++++++++++++++++++++
> 1 file changed, 93 insertions(+)
>
> diff --git a/arch/x86/include/asm/cpu_device_id.h b/arch/x86/include/asm/cpu_device_id.h
> index bf4e065cf1e2..833f230aeafc 100644
> --- a/arch/x86/include/asm/cpu_device_id.h
> +++ b/arch/x86/include/asm/cpu_device_id.h
> @@ -2,6 +2,39 @@
> #ifndef _ASM_X86_CPU_DEVICE_ID
> #define _ASM_X86_CPU_DEVICE_ID
>
> +/*
> + * Can't use <linux/bitfield.h> because it generates expressions that
> + * cannot be used in structure initializers. Bitfield construction
> + * here must match the union in struct cpuinfo_86:
Typo:
cpuinfo_86 -> cpuinfo_x86
On 4/16/2024 11:22 PM, Tony Luck wrote:
> New CPU #defines encode vendor and family as well as model.
>
> Signed-off-by: Tony Luck <[email protected]>
> ---
> sound/soc/intel/avs/boards/es8336.c | 7 ++++---
> 1 file changed, 4 insertions(+), 3 deletions(-)
>
> diff --git a/sound/soc/intel/avs/boards/es8336.c b/sound/soc/intel/avs/boards/es8336.c
> index 5c90a6007577..6c86c581877e 100644
> --- a/sound/soc/intel/avs/boards/es8336.c
> +++ b/sound/soc/intel/avs/boards/es8336.c
> @@ -18,6 +18,7 @@
> #include <sound/pcm_params.h>
> #include <sound/soc.h>
> #include <sound/soc-acpi.h>
> +#include <asm/cpu_device_id.h>
> #include <asm/intel-family.h>
> #include "../utils.h"
>
> @@ -153,9 +154,9 @@ static int avs_es8336_hw_params(struct snd_pcm_substream *substream,
> int clk_freq;
> int ret;
>
> - switch (boot_cpu_data.x86_model) {
> - case INTEL_FAM6_KABYLAKE_L:
> - case INTEL_FAM6_KABYLAKE:
> + switch (boot_cpu_data.x86_vfm) {
> + case INTEL_KABYLAKE_L:
> + case INTEL_KABYLAKE:
> clk_freq = 24000000;
> break;
> default:
Any chance we could adjust topic to follow subsystem rules?
Something like:
ASoC: Intel: avs: boards: Update defines used in es8336
or something like that?
On Wed Apr 17, 2024 at 12:22 AM EEST, Tony Luck wrote:
> New CPU #defines encode vendor and family as well as model.
>
> Signed-off-by: Tony Luck <[email protected]>
> ---
> drivers/char/tpm/tpm.h | 1 +
> drivers/char/tpm/tpm_tis_core.h | 2 +-
> 2 files changed, 2 insertions(+), 1 deletion(-)
>
> diff --git a/drivers/char/tpm/tpm.h b/drivers/char/tpm/tpm.h
> index 61445f1dc46d..895f2dba266c 100644
> --- a/drivers/char/tpm/tpm.h
> +++ b/drivers/char/tpm/tpm.h
> @@ -28,6 +28,7 @@
> #include <linux/tpm_eventlog.h>
>
> #ifdef CONFIG_X86
> +#include <asm/cpu_device_id.h>
> #include <asm/intel-family.h>
> #endif
>
> diff --git a/drivers/char/tpm/tpm_tis_core.h b/drivers/char/tpm/tpm_tis_core.h
> index 13e99cf65efe..c940fd18988e 100644
> --- a/drivers/char/tpm/tpm_tis_core.h
> +++ b/drivers/char/tpm/tpm_tis_core.h
> @@ -210,7 +210,7 @@ static inline int tpm_tis_verify_crc(struct tpm_tis_data *data, size_t len,
> static inline bool is_bsw(void)
> {
> #ifdef CONFIG_X86
> - return ((boot_cpu_data.x86_model == INTEL_FAM6_ATOM_AIRMONT) ? 1 : 0);
> + return ((boot_cpu_data.x86_vfm == INTEL_ATOM_AIRMONT) ? 1 : 0);
> #else
> return false;
> #endif
Thanks!
Reviewed-by: Jarkko Sakkinen <[email protected]>
You want me to pick this?
BR, Jarkko
>> New CPU #defines encode vendor and family as well as model.
>
> Thanks, but I would rather see this using the following
> https://elixir.bootlin.com/linux/v6.9-rc4/source/include/linux/platform_data/x86/soc.h
Are you asking for drivers/staging/media/atomisp/include/linux/atomisp_platform.h
to be refactored to use the new functions/macros in <linux/platform_data/x86/soc.h>?
Maybe folks working on this staging driver can do that? I don't think I have the domain
specific knowledge to make this update.
Note that patch 69 in this series does update <linux/platform_data/x86/soc.h> to use
the new vendor-family-model scheme.
-Tony
Dear Tony,
Thank you for your patch. It’d be great if you changed the commit
message summary/title to be more specific. Currently, the short log,
`git log --oneline`, is not very meaningful. Maybe:
tpm: Use new VFM macro INTEL_ATOM_AIRMONT
or
x86/cpu/vfm: Use macro INTEL_ATOM_AIRMONT in tpm
Kind regards,
Paul
> > #ifdef CONFIG_X86
> > - return ((boot_cpu_data.x86_model == INTEL_FAM6_ATOM_AIRMONT) ? 1 : 0);
> > + return ((boot_cpu_data.x86_vfm == INTEL_ATOM_AIRMONT) ? 1 : 0);
> > #else
> > return false;
> > #endif
>
> Thanks!
>
> Reviewed-by: Jarkko Sakkinen <[email protected]>
>
> You want me to pick this?
This depends on patches 1,2,3 in this series. Boris may be applying those to TIP soon.
Are you Ok with this patch also going into the TIP tree to keep all the parts in sync?
Otherwise it can wait until this moves from TIP to Linus. I'm not in a great rush.
-Tony
> Thank you for your patch. It’d be great if you changed the commit
> message summary/title to be more specific. Currently, the short log,
> `git log --oneline`, is not very meaningful. Maybe:
>
> tpm: Use new VFM macro INTEL_ATOM_AIRMONT
>
> or
>
> x86/cpu/vfm: Use macro INTEL_ATOM_AIRMONT in tpm
Paul,
With 74 patches in this series there was a lot of automation. I'll
see about updating "Subject:" lines to match subsystem conventions
before these are applied.
Apart from that, are you OK with the contents of this patch?
-Tony
On Wed, Apr 17, 2024 at 7:24 PM Luck, Tony <[email protected]> wrote:
>
> >> New CPU #defines encode vendor and family as well as model.
> >
> > Thanks, but I would rather see this using the following
> > https://elixir.bootlin.com/linux/v6.9-rc4/source/include/linux/platform_data/x86/soc.h
>
> Are you asking for drivers/staging/media/atomisp/include/linux/atomisp_platform.h
> to be refactored to use the new functions/macros in <linux/platform_data/x86/soc.h>?
>
> Maybe folks working on this staging driver can do that? I don't think I have the domain
> specific knowledge to make this update.
>
> Note that patch 69 in this series does update <linux/platform_data/x86/soc.h> to use
> the new vendor-family-model scheme.
So. maybe if this patch is placed after that one, it can be easily
seen how to amend it? I would help with the conversion as I know
something about AtomISP driver code (not as much as Hans de Goede,
though).
--
With Best Regards,
Andy Shevchenko
>> Note that patch 69 in this series does update <linux/platform_data/x86/soc.h> to use
>> the new vendor-family-model scheme.
>
> So. maybe if this patch is placed after that one, it can be easily
> seen how to amend it? I would help with the conversion as I know
> something about AtomISP driver code (not as much as Hans de Goede,
> though).
Ok. I put a hold on patch 68 until 69 is applied somewhere (that one
has a Ack from Rafael, so is high on the list to move forward once
parts 1-3 are applied.)
-Tony
For the scope, please use:
KVM: x86/pmu:
On Tue, Apr 16, 2024, Tony Luck wrote:
> New CPU #defines encode vendor and family as well as model.
>
> Signed-off-by: Tony Luck <[email protected]>
> ---
Acked-by: Sean Christopherson <[email protected]>
For the scope:
KVM: VMX:
On Tue, Apr 16, 2024, Tony Luck wrote:
> New CPU #defines encode vendor and family as well as model.
>
> Signed-off-by: Tony Luck <[email protected]>
> ---
Acked-by: Sean Christopherson <[email protected]>
On Wed Apr 17, 2024 at 7:38 PM EEST, Luck, Tony wrote:
> > > #ifdef CONFIG_X86
> > > - return ((boot_cpu_data.x86_model == INTEL_FAM6_ATOM_AIRMONT) ? 1 : 0);
> > > + return ((boot_cpu_data.x86_vfm == INTEL_ATOM_AIRMONT) ? 1 : 0);
> > > #else
> > > return false;
> > > #endif
> >
> > Thanks!
> >
> > Reviewed-by: Jarkko Sakkinen <[email protected]>
> >
> > You want me to pick this?
>
> This depends on patches 1,2,3 in this series. Boris may be applying those to TIP soon.
>
> Are you Ok with this patch also going into the TIP tree to keep all the parts in sync?
>
> Otherwise it can wait until this moves from TIP to Linus. I'm not in a great rush.
I don't mind Boris applying this. It is very unlikely to cause any
possible merge issues with other patches.
>
> -Tony
BR, Jarkko
On Wed Apr 17, 2024 at 7:43 PM EEST, Luck, Tony wrote:
> > Thank you for your patch. It’d be great if you changed the commit
> > message summary/title to be more specific. Currently, the short log,
> > `git log --oneline`, is not very meaningful. Maybe:
> >
> > tpm: Use new VFM macro INTEL_ATOM_AIRMONT
> >
> > or
> >
> > x86/cpu/vfm: Use macro INTEL_ATOM_AIRMONT in tpm
>
> Paul,
>
> With 74 patches in this series there was a lot of automation. I'll
> see about updating "Subject:" lines to match subsystem conventions
> before these are applied.
>
> Apart from that, are you OK with the contents of this patch?
>
> -Tony
For the possible subject-line change: please *do not* remove my reviewed-by :-)
BR, Jarkko
On Tue, 2024-04-16 at 23:57 +0000, Luck, Tony wrote:
> > If the CPU defines and the new macro are to be kept in architecture code,
> > maybe include arch/x86/include/asm/cpu_device_id.h from linux/peci.cpu.h.
> > That would not be worse than today's include of intel-family.h.
>
> Guenter,
>
> Looks like I did that to resolve one of the other peci problems. Because I
> already have:
>
> #include "../../arch/x86/include/asm/cpu_device_id.h"
> #include "../../arch/x86/include/asm/intel-family.h"
>
> in <linux/peci_cpu.h>
>
> Simply deleting the include from cputemp.c builds OK in the
> context of all the other changes in my patch series.
Hi Tony,
It won't build on non-x86, as cpu_device_id.h includes <asm/intel-family.h>.
I think the simplest way to solve the issue is to provide a copy of VFM_* macros
and X86_VENDOR_INTEL in include/linux/peci-cpu.h.
-Iwona
>
> -Tony
On Thu, Apr 18, 2024 at 01:32:15PM +0000, Winiarska, Iwona wrote:
> On Tue, 2024-04-16 at 23:57 +0000, Luck, Tony wrote:
> > > If the CPU defines and the new macro are to be kept in architecture code,
> > > maybe include arch/x86/include/asm/cpu_device_id.h from linux/peci.cpu.h.
> > > That would not be worse than today's include of intel-family.h.
> >
> > Guenter,
> >
> > Looks like I did that to resolve one of the other peci problems. Because I
> > already have:
> >
> > #include "../../arch/x86/include/asm/cpu_device_id.h"
> > #include "../../arch/x86/include/asm/intel-family.h"
> >
> > in <linux/peci_cpu.h>
> >
> > Simply deleting the include from cputemp.c builds OK in the
> > context of all the other changes in my patch series.
>
> Hi Tony,
>
> It won't build on non-x86, as cpu_device_id.h includes <asm/intel-family.h>.
> I think the simplest way to solve the issue is to provide a copy of VFM_* macros
> and X86_VENDOR_INTEL in include/linux/peci-cpu.h.
>
I think the proper fix would really be to move the include files to a
generic directory, such as include/linux/x86/ or include/linux/cpu/x86/.
After all, they _are_ now needed in non-Intel code.
Guenter
On Thu, 2024-04-18 at 06:52 -0700, Guenter Roeck wrote:
> On Thu, Apr 18, 2024 at 01:32:15PM +0000, Winiarska, Iwona wrote:
> > On Tue, 2024-04-16 at 23:57 +0000, Luck, Tony wrote:
> > > > If the CPU defines and the new macro are to be kept in architecture
> > > > code,
> > > > maybe include arch/x86/include/asm/cpu_device_id.h from
> > > > linux/peci.cpu.h.
> > > > That would not be worse than today's include of intel-family.h.
> > >
> > > Guenter,
> > >
> > > Looks like I did that to resolve one of the other peci problems. Because I
> > > already have:
> > >
> > > #include "../../arch/x86/include/asm/cpu_device_id.h"
> > > #include "../../arch/x86/include/asm/intel-family.h"
> > >
> > > in <linux/peci_cpu.h>
> > >
> > > Simply deleting the include from cputemp.c builds OK in the
> > > context of all the other changes in my patch series.
> >
> > Hi Tony,
> >
> > It won't build on non-x86, as cpu_device_id.h includes <asm/intel-family.h>.
> > I think the simplest way to solve the issue is to provide a copy of VFM_*
> > macros
> > and X86_VENDOR_INTEL in include/linux/peci-cpu.h.
> >
>
> I think the proper fix would really be to move the include files to a
> generic directory, such as include/linux/x86/ or include/linux/cpu/x86/.
> After all, they _are_ now needed in non-Intel code.
Yeah, that was the initial proposal:
https://lore.kernel.org/lkml/[email protected]/
Unfortunately, it ended up being simplified to just include arch/x86 directly.
-Iwona
>
> Guenter
The following commit has been merged into the x86/cpu branch of tip:
Commit-ID: e6dfdc2e89a0adedf455814c91b977d6a584cc88
Gitweb: https://git.kernel.org/tip/e6dfdc2e89a0adedf455814c91b977d6a584cc88
Author: Tony Luck <[email protected]>
AuthorDate: Tue, 16 Apr 2024 14:19:04 -07:00
Committer: Borislav Petkov (AMD) <[email protected]>
CommitterDate: Mon, 22 Apr 2024 11:43:55 +02:00
x86/cpu/vfm: Add new macros to work with (vendor/family/model) values
To avoid adding a slew of new macros for each new Intel CPU family
switch over from providing CPU model number #defines to a new
scheme that encodes vendor, family, and model in a single number.
[ bp: s/casted/cast/g ]
Signed-off-by: Tony Luck <[email protected]>
Signed-off-by: Borislav Petkov (AMD) <[email protected]>
Reviewed-by: Thomas Gleixner <[email protected]>
Link: https://lore.kernel.org/r/[email protected]
---
arch/x86/include/asm/cpu_device_id.h | 93 +++++++++++++++++++++++++++-
1 file changed, 93 insertions(+)
diff --git a/arch/x86/include/asm/cpu_device_id.h b/arch/x86/include/asm/cpu_device_id.h
index bf4e065..970a232 100644
--- a/arch/x86/include/asm/cpu_device_id.h
+++ b/arch/x86/include/asm/cpu_device_id.h
@@ -3,6 +3,39 @@
#define _ASM_X86_CPU_DEVICE_ID
/*
+ * Can't use <linux/bitfield.h> because it generates expressions that
+ * cannot be used in structure initializers. Bitfield construction
+ * here must match the union in struct cpuinfo_86:
+ * union {
+ * struct {
+ * __u8 x86_model;
+ * __u8 x86;
+ * __u8 x86_vendor;
+ * __u8 x86_reserved;
+ * };
+ * __u32 x86_vfm;
+ * };
+ */
+#define VFM_MODEL_BIT 0
+#define VFM_FAMILY_BIT 8
+#define VFM_VENDOR_BIT 16
+#define VFM_RSVD_BIT 24
+
+#define VFM_MODEL_MASK GENMASK(VFM_FAMILY_BIT - 1, VFM_MODEL_BIT)
+#define VFM_FAMILY_MASK GENMASK(VFM_VENDOR_BIT - 1, VFM_FAMILY_BIT)
+#define VFM_VENDOR_MASK GENMASK(VFM_RSVD_BIT - 1, VFM_VENDOR_BIT)
+
+#define VFM_MODEL(vfm) (((vfm) & VFM_MODEL_MASK) >> VFM_MODEL_BIT)
+#define VFM_FAMILY(vfm) (((vfm) & VFM_FAMILY_MASK) >> VFM_FAMILY_BIT)
+#define VFM_VENDOR(vfm) (((vfm) & VFM_VENDOR_MASK) >> VFM_VENDOR_BIT)
+
+#define VFM_MAKE(_vendor, _family, _model) ( \
+ ((_model) << VFM_MODEL_BIT) | \
+ ((_family) << VFM_FAMILY_BIT) | \
+ ((_vendor) << VFM_VENDOR_BIT) \
+)
+
+/*
* Declare drivers belonging to specific x86 CPUs
* Similar in spirit to pci_device_id and related PCI functions
*
@@ -49,6 +82,16 @@
.driver_data = (unsigned long) _data \
}
+#define X86_MATCH_VENDORID_FAM_MODEL_STEPPINGS_FEATURE(_vendor, _family, _model, \
+ _steppings, _feature, _data) { \
+ .vendor = _vendor, \
+ .family = _family, \
+ .model = _model, \
+ .steppings = _steppings, \
+ .feature = _feature, \
+ .driver_data = (unsigned long) _data \
+}
+
/**
* X86_MATCH_VENDOR_FAM_MODEL_FEATURE - Macro for CPU matching
* @_vendor: The vendor name, e.g. INTEL, AMD, HYGON, ..., ANY
@@ -164,6 +207,56 @@
X86_MATCH_VENDOR_FAM_MODEL_STEPPINGS_FEATURE(INTEL, 6, INTEL_FAM6_##model, \
steppings, X86_FEATURE_ANY, data)
+/**
+ * X86_MATCH_VFM - Match encoded vendor/family/model
+ * @vfm: Encoded 8-bits each for vendor, family, model
+ * @data: Driver specific data or NULL. The internal storage
+ * format is unsigned long. The supplied value, pointer
+ * etc. is cast to unsigned long internally.
+ *
+ * Stepping and feature are set to wildcards
+ */
+#define X86_MATCH_VFM(vfm, data) \
+ X86_MATCH_VENDORID_FAM_MODEL_STEPPINGS_FEATURE( \
+ VFM_VENDOR(vfm), \
+ VFM_FAMILY(vfm), \
+ VFM_MODEL(vfm), \
+ X86_STEPPING_ANY, X86_FEATURE_ANY, data)
+
+/**
+ * X86_MATCH_VFM_STEPPINGS - Match encoded vendor/family/model/stepping
+ * @vfm: Encoded 8-bits each for vendor, family, model
+ * @steppings: Bitmask of steppings to match
+ * @data: Driver specific data or NULL. The internal storage
+ * format is unsigned long. The supplied value, pointer
+ * etc. is cast to unsigned long internally.
+ *
+ * feature is set to wildcard
+ */
+#define X86_MATCH_VFM_STEPPINGS(vfm, steppings, data) \
+ X86_MATCH_VENDORID_FAM_MODEL_STEPPINGS_FEATURE( \
+ VFM_VENDOR(vfm), \
+ VFM_FAMILY(vfm), \
+ VFM_MODEL(vfm), \
+ steppings, X86_FEATURE_ANY, data)
+
+/**
+ * X86_MATCH_VFM_FEATURE - Match encoded vendor/family/model/feature
+ * @vfm: Encoded 8-bits each for vendor, family, model
+ * @feature: A X86_FEATURE bit
+ * @data: Driver specific data or NULL. The internal storage
+ * format is unsigned long. The supplied value, pointer
+ * etc. is cast to unsigned long internally.
+ *
+ * Steppings is set to wildcard
+ */
+#define X86_MATCH_VFM_FEATURE(vfm, feature, data) \
+ X86_MATCH_VENDORID_FAM_MODEL_STEPPINGS_FEATURE( \
+ VFM_VENDOR(vfm), \
+ VFM_FAMILY(vfm), \
+ VFM_MODEL(vfm), \
+ X86_STEPPING_ANY, feature, data)
+
/*
* Match specific microcode revisions.
*
The following commit has been merged into the x86/cpu branch of tip:
Commit-ID: f055b6260eb3ef20a6e310d1e555a5d5a0a28ca0
Gitweb: https://git.kernel.org/tip/f055b6260eb3ef20a6e310d1e555a5d5a0a28ca0
Author: Tony Luck <[email protected]>
AuthorDate: Tue, 16 Apr 2024 14:19:05 -07:00
Committer: Borislav Petkov (AMD) <[email protected]>
CommitterDate: Mon, 22 Apr 2024 11:44:00 +02:00
x86/cpu/vfm: Update arch/x86/include/asm/intel-family.h
New CPU #defines encode vendor and family as well as model.
Update the example usage comment in arch/x86/kernel/cpu/match.c
Signed-off-by: Tony Luck <[email protected]>
Signed-off-by: Borislav Petkov (AMD) <[email protected]>
Reviewed-by: Thomas Gleixner <[email protected]>
Link: https://lore.kernel.org/r/[email protected]
---
arch/x86/include/asm/intel-family.h | 84 ++++++++++++++++++++++++++++-
arch/x86/kernel/cpu/match.c | 3 +-
2 files changed, 85 insertions(+), 2 deletions(-)
diff --git a/arch/x86/include/asm/intel-family.h b/arch/x86/include/asm/intel-family.h
index d0941f4..f81a851 100644
--- a/arch/x86/include/asm/intel-family.h
+++ b/arch/x86/include/asm/intel-family.h
@@ -40,137 +40,221 @@
* their own names :-(
*/
+#define IFM(_fam, _model) VFM_MAKE(X86_VENDOR_INTEL, _fam, _model)
+
/* Wildcard match for FAM6 so X86_MATCH_INTEL_FAM6_MODEL(ANY) works */
#define INTEL_FAM6_ANY X86_MODEL_ANY
+/* Wildcard match for FAM6 so X86_MATCH_VFM(ANY) works */
+#define INTEL_ANY IFM(X86_FAMILY_ANY, X86_MODEL_ANY)
#define INTEL_FAM6_CORE_YONAH 0x0E
+#define INTEL_CORE_YONAH IFM(6, 0x0E)
#define INTEL_FAM6_CORE2_MEROM 0x0F
+#define INTEL_CORE2_MEROM IFM(6, 0x0F)
#define INTEL_FAM6_CORE2_MEROM_L 0x16
+#define INTEL_CORE2_MEROM_L IFM(6, 0x16)
#define INTEL_FAM6_CORE2_PENRYN 0x17
+#define INTEL_CORE2_PENRYN IFM(6, 0x17)
#define INTEL_FAM6_CORE2_DUNNINGTON 0x1D
+#define INTEL_CORE2_DUNNINGTON IFM(6, 0x1D)
#define INTEL_FAM6_NEHALEM 0x1E
+#define INTEL_NEHALEM IFM(6, 0x1E)
#define INTEL_FAM6_NEHALEM_G 0x1F /* Auburndale / Havendale */
+#define INTEL_NEHALEM_G IFM(6, 0x1F) /* Auburndale / Havendale */
#define INTEL_FAM6_NEHALEM_EP 0x1A
+#define INTEL_NEHALEM_EP IFM(6, 0x1A)
#define INTEL_FAM6_NEHALEM_EX 0x2E
+#define INTEL_NEHALEM_EX IFM(6, 0x2E)
#define INTEL_FAM6_WESTMERE 0x25
+#define INTEL_WESTMERE IFM(6, 0x25)
#define INTEL_FAM6_WESTMERE_EP 0x2C
+#define INTEL_WESTMERE_EP IFM(6, 0x2C)
#define INTEL_FAM6_WESTMERE_EX 0x2F
+#define INTEL_WESTMERE_EX IFM(6, 0x2F)
#define INTEL_FAM6_SANDYBRIDGE 0x2A
+#define INTEL_SANDYBRIDGE IFM(6, 0x2A)
#define INTEL_FAM6_SANDYBRIDGE_X 0x2D
+#define INTEL_SANDYBRIDGE_X IFM(6, 0x2D)
#define INTEL_FAM6_IVYBRIDGE 0x3A
+#define INTEL_IVYBRIDGE IFM(6, 0x3A)
#define INTEL_FAM6_IVYBRIDGE_X 0x3E
+#define INTEL_IVYBRIDGE_X IFM(6, 0x3E)
#define INTEL_FAM6_HASWELL 0x3C
+#define INTEL_HASWELL IFM(6, 0x3C)
#define INTEL_FAM6_HASWELL_X 0x3F
+#define INTEL_HASWELL_X IFM(6, 0x3F)
#define INTEL_FAM6_HASWELL_L 0x45
+#define INTEL_HASWELL_L IFM(6, 0x45)
#define INTEL_FAM6_HASWELL_G 0x46
+#define INTEL_HASWELL_G IFM(6, 0x46)
#define INTEL_FAM6_BROADWELL 0x3D
+#define INTEL_BROADWELL IFM(6, 0x3D)
#define INTEL_FAM6_BROADWELL_G 0x47
+#define INTEL_BROADWELL_G IFM(6, 0x47)
#define INTEL_FAM6_BROADWELL_X 0x4F
+#define INTEL_BROADWELL_X IFM(6, 0x4F)
#define INTEL_FAM6_BROADWELL_D 0x56
+#define INTEL_BROADWELL_D IFM(6, 0x56)
#define INTEL_FAM6_SKYLAKE_L 0x4E /* Sky Lake */
+#define INTEL_SKYLAKE_L IFM(6, 0x4E) /* Sky Lake */
#define INTEL_FAM6_SKYLAKE 0x5E /* Sky Lake */
+#define INTEL_SKYLAKE IFM(6, 0x5E) /* Sky Lake */
#define INTEL_FAM6_SKYLAKE_X 0x55 /* Sky Lake */
+#define INTEL_SKYLAKE_X IFM(6, 0x55) /* Sky Lake */
/* CASCADELAKE_X 0x55 Sky Lake -- s: 7 */
/* COOPERLAKE_X 0x55 Sky Lake -- s: 11 */
#define INTEL_FAM6_KABYLAKE_L 0x8E /* Sky Lake */
+#define INTEL_KABYLAKE_L IFM(6, 0x8E) /* Sky Lake */
/* AMBERLAKE_L 0x8E Sky Lake -- s: 9 */
/* COFFEELAKE_L 0x8E Sky Lake -- s: 10 */
/* WHISKEYLAKE_L 0x8E Sky Lake -- s: 11,12 */
#define INTEL_FAM6_KABYLAKE 0x9E /* Sky Lake */
+#define INTEL_KABYLAKE IFM(6, 0x9E) /* Sky Lake */
/* COFFEELAKE 0x9E Sky Lake -- s: 10-13 */
#define INTEL_FAM6_COMETLAKE 0xA5 /* Sky Lake */
+#define INTEL_COMETLAKE IFM(6, 0xA5) /* Sky Lake */
#define INTEL_FAM6_COMETLAKE_L 0xA6 /* Sky Lake */
+#define INTEL_COMETLAKE_L IFM(6, 0xA6) /* Sky Lake */
#define INTEL_FAM6_CANNONLAKE_L 0x66 /* Palm Cove */
+#define INTEL_CANNONLAKE_L IFM(6, 0x66) /* Palm Cove */
#define INTEL_FAM6_ICELAKE_X 0x6A /* Sunny Cove */
+#define INTEL_ICELAKE_X IFM(6, 0x6A) /* Sunny Cove */
#define INTEL_FAM6_ICELAKE_D 0x6C /* Sunny Cove */
+#define INTEL_ICELAKE_D IFM(6, 0x6C) /* Sunny Cove */
#define INTEL_FAM6_ICELAKE 0x7D /* Sunny Cove */
+#define INTEL_ICELAKE IFM(6, 0x7D) /* Sunny Cove */
#define INTEL_FAM6_ICELAKE_L 0x7E /* Sunny Cove */
+#define INTEL_ICELAKE_L IFM(6, 0x7E) /* Sunny Cove */
#define INTEL_FAM6_ICELAKE_NNPI 0x9D /* Sunny Cove */
+#define INTEL_ICELAKE_NNPI IFM(6, 0x9D) /* Sunny Cove */
#define INTEL_FAM6_ROCKETLAKE 0xA7 /* Cypress Cove */
+#define INTEL_ROCKETLAKE IFM(6, 0xA7) /* Cypress Cove */
#define INTEL_FAM6_TIGERLAKE_L 0x8C /* Willow Cove */
+#define INTEL_TIGERLAKE_L IFM(6, 0x8C) /* Willow Cove */
#define INTEL_FAM6_TIGERLAKE 0x8D /* Willow Cove */
+#define INTEL_TIGERLAKE IFM(6, 0x8D) /* Willow Cove */
#define INTEL_FAM6_SAPPHIRERAPIDS_X 0x8F /* Golden Cove */
+#define INTEL_SAPPHIRERAPIDS_X IFM(6, 0x8F) /* Golden Cove */
#define INTEL_FAM6_EMERALDRAPIDS_X 0xCF
+#define INTEL_EMERALDRAPIDS_X IFM(6, 0xCF)
#define INTEL_FAM6_GRANITERAPIDS_X 0xAD
+#define INTEL_GRANITERAPIDS_X IFM(6, 0xAD)
#define INTEL_FAM6_GRANITERAPIDS_D 0xAE
+#define INTEL_GRANITERAPIDS_D IFM(6, 0xAE)
/* "Hybrid" Processors (P-Core/E-Core) */
#define INTEL_FAM6_LAKEFIELD 0x8A /* Sunny Cove / Tremont */
+#define INTEL_LAKEFIELD IFM(6, 0x8A) /* Sunny Cove / Tremont */
#define INTEL_FAM6_ALDERLAKE 0x97 /* Golden Cove / Gracemont */
+#define INTEL_ALDERLAKE IFM(6, 0x97) /* Golden Cove / Gracemont */
#define INTEL_FAM6_ALDERLAKE_L 0x9A /* Golden Cove / Gracemont */
+#define INTEL_ALDERLAKE_L IFM(6, 0x9A) /* Golden Cove / Gracemont */
#define INTEL_FAM6_RAPTORLAKE 0xB7 /* Raptor Cove / Enhanced Gracemont */
+#define INTEL_RAPTORLAKE IFM(6, 0xB7) /* Raptor Cove / Enhanced Gracemont */
#define INTEL_FAM6_RAPTORLAKE_P 0xBA
+#define INTEL_RAPTORLAKE_P IFM(6, 0xBA)
#define INTEL_FAM6_RAPTORLAKE_S 0xBF
+#define INTEL_RAPTORLAKE_S IFM(6, 0xBF)
#define INTEL_FAM6_METEORLAKE 0xAC
+#define INTEL_METEORLAKE IFM(6, 0xAC)
#define INTEL_FAM6_METEORLAKE_L 0xAA
+#define INTEL_METEORLAKE_L IFM(6, 0xAA)
#define INTEL_FAM6_ARROWLAKE_H 0xC5
+#define INTEL_ARROWLAKE_H IFM(6, 0xC5)
#define INTEL_FAM6_ARROWLAKE 0xC6
+#define INTEL_ARROWLAKE IFM(6, 0xC6)
#define INTEL_FAM6_ARROWLAKE_U 0xB5
+#define INTEL_ARROWLAKE_U IFM(6, 0xB5)
#define INTEL_FAM6_LUNARLAKE_M 0xBD
+#define INTEL_LUNARLAKE_M IFM(6, 0xBD)
/* "Small Core" Processors (Atom/E-Core) */
#define INTEL_FAM6_ATOM_BONNELL 0x1C /* Diamondville, Pineview */
+#define INTEL_ATOM_BONNELL IFM(6, 0x1C) /* Diamondville, Pineview */
#define INTEL_FAM6_ATOM_BONNELL_MID 0x26 /* Silverthorne, Lincroft */
+#define INTEL_ATOM_BONNELL_MID IFM(6, 0x26) /* Silverthorne, Lincroft */
#define INTEL_FAM6_ATOM_SALTWELL 0x36 /* Cedarview */
+#define INTEL_ATOM_SALTWELL IFM(6, 0x36) /* Cedarview */
#define INTEL_FAM6_ATOM_SALTWELL_MID 0x27 /* Penwell */
+#define INTEL_ATOM_SALTWELL_MID IFM(6, 0x27) /* Penwell */
#define INTEL_FAM6_ATOM_SALTWELL_TABLET 0x35 /* Cloverview */
+#define INTEL_ATOM_SALTWELL_TABLET IFM(6, 0x35) /* Cloverview */
#define INTEL_FAM6_ATOM_SILVERMONT 0x37 /* Bay Trail, Valleyview */
+#define INTEL_ATOM_SILVERMONT IFM(6, 0x37) /* Bay Trail, Valleyview */
#define INTEL_FAM6_ATOM_SILVERMONT_D 0x4D /* Avaton, Rangely */
+#define INTEL_ATOM_SILVERMONT_D IFM(6, 0x4D) /* Avaton, Rangely */
#define INTEL_FAM6_ATOM_SILVERMONT_MID 0x4A /* Merriefield */
+#define INTEL_ATOM_SILVERMONT_MID IFM(6, 0x4A) /* Merriefield */
#define INTEL_FAM6_ATOM_AIRMONT 0x4C /* Cherry Trail, Braswell */
+#define INTEL_ATOM_AIRMONT IFM(6, 0x4C) /* Cherry Trail, Braswell */
#define INTEL_FAM6_ATOM_AIRMONT_MID 0x5A /* Moorefield */
+#define INTEL_ATOM_AIRMONT_MID IFM(6, 0x5A) /* Moorefield */
#define INTEL_FAM6_ATOM_AIRMONT_NP 0x75 /* Lightning Mountain */
+#define INTEL_ATOM_AIRMONT_NP IFM(6, 0x75) /* Lightning Mountain */
#define INTEL_FAM6_ATOM_GOLDMONT 0x5C /* Apollo Lake */
+#define INTEL_ATOM_GOLDMONT IFM(6, 0x5C) /* Apollo Lake */
#define INTEL_FAM6_ATOM_GOLDMONT_D 0x5F /* Denverton */
+#define INTEL_ATOM_GOLDMONT_D IFM(6, 0x5F) /* Denverton */
/* Note: the micro-architecture is "Goldmont Plus" */
#define INTEL_FAM6_ATOM_GOLDMONT_PLUS 0x7A /* Gemini Lake */
+#define INTEL_ATOM_GOLDMONT_PLUS IFM(6, 0x7A) /* Gemini Lake */
#define INTEL_FAM6_ATOM_TREMONT_D 0x86 /* Jacobsville */
+#define INTEL_ATOM_TREMONT_D IFM(6, 0x86) /* Jacobsville */
#define INTEL_FAM6_ATOM_TREMONT 0x96 /* Elkhart Lake */
+#define INTEL_ATOM_TREMONT IFM(6, 0x96) /* Elkhart Lake */
#define INTEL_FAM6_ATOM_TREMONT_L 0x9C /* Jasper Lake */
+#define INTEL_ATOM_TREMONT_L IFM(6, 0x9C) /* Jasper Lake */
#define INTEL_FAM6_ATOM_GRACEMONT 0xBE /* Alderlake N */
+#define INTEL_ATOM_GRACEMONT IFM(6, 0xBE) /* Alderlake N */
#define INTEL_FAM6_ATOM_CRESTMONT_X 0xAF /* Sierra Forest */
+#define INTEL_ATOM_CRESTMONT_X IFM(6, 0xAF) /* Sierra Forest */
#define INTEL_FAM6_ATOM_CRESTMONT 0xB6 /* Grand Ridge */
+#define INTEL_ATOM_CRESTMONT IFM(6, 0xB6) /* Grand Ridge */
#define INTEL_FAM6_ATOM_DARKMONT_X 0xDD /* Clearwater Forest */
+#define INTEL_ATOM_DARKMONT_X IFM(6, 0xDD) /* Clearwater Forest */
/* Xeon Phi */
#define INTEL_FAM6_XEON_PHI_KNL 0x57 /* Knights Landing */
+#define INTEL_XEON_PHI_KNL IFM(6, 0x57) /* Knights Landing */
#define INTEL_FAM6_XEON_PHI_KNM 0x85 /* Knights Mill */
+#define INTEL_XEON_PHI_KNM IFM(6, 0x85) /* Knights Mill */
/* Family 5 */
#define INTEL_FAM5_QUARK_X1000 0x09 /* Quark X1000 SoC */
+#define INTEL_QUARK_X1000 IFM(5, 0x09) /* Quark X1000 SoC */
#endif /* _ASM_X86_INTEL_FAMILY_H */
diff --git a/arch/x86/kernel/cpu/match.c b/arch/x86/kernel/cpu/match.c
index ad67760..2243083 100644
--- a/arch/x86/kernel/cpu/match.c
+++ b/arch/x86/kernel/cpu/match.c
@@ -17,8 +17,7 @@
*
* A typical table entry would be to match a specific CPU
*
- * X86_MATCH_VENDOR_FAM_MODEL_FEATURE(INTEL, 6, INTEL_FAM6_BROADWELL,
- * X86_FEATURE_ANY, NULL);
+ * X86_MATCH_VFM_FEATURE(INTEL_BROADWELL, X86_FEATURE_ANY, NULL);
*
* Fields can be wildcarded with %X86_VENDOR_ANY, %X86_FAMILY_ANY,
* %X86_MODEL_ANY, %X86_FEATURE_ANY (except for vendor)
> > > > > If the CPU defines and the new macro are to be kept in architecture
> > > > > code,
> > > > > maybe include arch/x86/include/asm/cpu_device_id.h from
> > > > > linux/peci.cpu.h.
> > > > > That would not be worse than today's include of intel-family.h.
> > > >
> > > > Guenter,
> > > >
> > > > Looks like I did that to resolve one of the other peci problems. Because I
> > > > already have:
> > > >
> > > > #include "../../arch/x86/include/asm/cpu_device_id.h"
> > > > #include "../../arch/x86/include/asm/intel-family.h"
> > > >
> > > > in <linux/peci_cpu.h>
> > > >
> > > > Simply deleting the include from cputemp.c builds OK in the
> > > > context of all the other changes in my patch series.
> > >
> > > Hi Tony,
> > >
> > > It won't build on non-x86, as cpu_device_id.h includes <asm/intel-family.h>.
> > > I think the simplest way to solve the issue is to provide a copy of VFM_*
> > > macros
> > > and X86_VENDOR_INTEL in include/linux/peci-cpu.h.
> > >
> >
> > I think the proper fix would really be to move the include files to a
> > generic directory, such as include/linux/x86/ or include/linux/cpu/x86/.
> > After all, they _are_ now needed in non-Intel code.
>
> Yeah, that was the initial proposal:
> https://lore.kernel.org/lkml/[email protected]/
>
> Unfortunately, it ended up being simplified to just include arch/x86 directly.
Reading through that other thread (Iwona: thanks for the link) it seems that moving
the x86 include files out of arch/x86/include/asm has been soundly rejected.
I'm going to take Iwona's advice above and copy the VFM_* macros.
-Tony
>> Unfortunately, it ended up being simplified to just include arch/x86 directly.
>
> Reading through that other thread (Iwona: thanks for the link) it seems that moving
> the x86 include files out of arch/x86/include/asm has been soundly rejected.
>
> I'm going to take Iwona's advice above and copy the VFM_* macros.
Iwona,
I just pushed what might become v4 of this series to:
git://git.kernel.org/pub/scm/linux/kernel/git/aegl/linux.git new_families_v4
If you have a moment, could you please check whether the peci bits build on
a non-x86 system.
Thanks
-Tony
On Mon, 2024-04-22 at 22:19 +0000, Luck, Tony wrote:
> > > Unfortunately, it ended up being simplified to just include arch/x86
> > > directly.
> >
> > Reading through that other thread (Iwona: thanks for the link) it seems that
> > moving
> > the x86 include files out of arch/x86/include/asm has been soundly rejected.
> >
> > I'm going to take Iwona's advice above and copy the VFM_* macros.
>
> Iwona,
>
> I just pushed what might become v4 of this series to:
>
> git://git.kernel.org/pub/scm/linux/kernel/git/aegl/linux.git
> new_families_v4
>
> If you have a moment, could you please check whether the peci bits build on
> a non-x86 system.
It still doesn't compile because X86_VENDOR_INTEL is missing in
include/linux/peci-cpu.h:
We need something like:
diff --git a/include/linux/peci-cpu.h b/include/linux/peci-cpu.h
index 218fc9372..38cb61203 100644
--- a/include/linux/peci-cpu.h
+++ b/include/linux/peci-cpu.h
@@ -6,6 +6,9 @@
#include <linux/types.h>
+/* Copied from x86 <asm/processor.h> */
+#define X86_VENDOR_INTEL 0
+
/* Copied from x86 <asm/cpu_device_id.h> */
#define VFM_MODEL_BIT 0
#define VFM_FAMILY_BIT 8
Thanks
-Iwona
>
> Thanks
>
> -Tony
>> If you have a moment, could you please check whether the peci bits build on
>> a non-x86 system.
>
> It still doesn't compile because X86_VENDOR_INTEL is missing in
> include/linux/peci-cpu.h:
Iwona: Thanks for testing.
> We need something like:
> +/* Copied from x86 <asm/processor.h> */
> +#define X86_VENDOR_INTEL 0
> +
Agreed. I've added that.
-Tony