The INA230 has alert polarity bit in Mask/Enable register which can be
configured to be active high or active low depending upon the requirements
of the hardware using this chip. The patches in this series adds the support
for passing alert polarity value from device tree to the driver. Alert polarity
property is added device tree bindings and the driver is modified to read
this property and set the Alert polarity (APOL) bit value in Mask/Enable register
of INA230.
Signed-off-by: Amna Waseem <[email protected]>
---
Changes in v2:
- Add vendor specific prefix to alert polarity property in binding.
- Minor improvement in description of alert polarity binding property
- Remove usage of mutex while setting alert polarity in Mask/Enable
register
- Correct indentation
- Link to v1: https://lore.kernel.org/r/[email protected]
---
Amna Waseem (2):
dt-bindings: hwmon: ti,ina2xx: Add ti,alert-polarity property
hwmon: (ina2xx) Add device tree support to pass alert polarity
.../devicetree/bindings/hwmon/ti,ina2xx.yaml | 9 ++++++++
drivers/hwmon/ina2xx.c | 27 ++++++++++++++++++++++
2 files changed, 36 insertions(+)
---
base-commit: a38297e3fb012ddfa7ce0321a7e5a8daeb1872b6
change-id: 20240524-apol-ina2xx-fix-34e76346cb26
Best regards,
--
Amna Waseem <[email protected]>
Add a property to the binding to configure the Alert Polarity.
Alert pin is asserted based on the value of Alert Polarity bit of
Mask/Enable register. It is by default 0 which means Alert pin is
configured to be active low open collector. Value of 1 maps to
Inverted (active high open collector).
Signed-off-by: Amna Waseem <[email protected]>
---
Documentation/devicetree/bindings/hwmon/ti,ina2xx.yaml | 9 +++++++++
1 file changed, 9 insertions(+)
diff --git a/Documentation/devicetree/bindings/hwmon/ti,ina2xx.yaml b/Documentation/devicetree/bindings/hwmon/ti,ina2xx.yaml
index df86c2c92037..5a16d2d94587 100644
--- a/Documentation/devicetree/bindings/hwmon/ti,ina2xx.yaml
+++ b/Documentation/devicetree/bindings/hwmon/ti,ina2xx.yaml
@@ -66,6 +66,14 @@ properties:
description: phandle to the regulator that provides the VS supply typically
in range from 2.7 V to 5.5 V.
+ ti,alert-polarity:
+ description: Alert polarity bit value of Mask/Enable register. Alert pin is
+ asserted based on the value of Alert polarity Bit. Default value is Normal
+ (0 which maps to active-low open collector). The other value is Inverted
+ (1 which maps to active-high open collector).
+ $ref: /schemas/types.yaml#/definitions/uint32
+ enum: [0, 1]
+
required:
- compatible
- reg
@@ -88,5 +96,6 @@ examples:
label = "vdd_3v0";
shunt-resistor = <1000>;
vs-supply = <&vdd_3v0>;
+ ti,alert-polarity = <1>;
};
};
--
2.30.2
On 5/29/24 09:17, Conor Dooley wrote:
> On Wed, May 29, 2024 at 11:47:44AM +0200, Amna Waseem wrote:
>> Add a property to the binding to configure the Alert Polarity.
>> Alert pin is asserted based on the value of Alert Polarity bit of
>> Mask/Enable register. It is by default 0 which means Alert pin is
>> configured to be active low open collector. Value of 1 maps to
>> Inverted (active high open collector).
>>
>> Signed-off-by: Amna Waseem <[email protected]>
>> ---
>> Documentation/devicetree/bindings/hwmon/ti,ina2xx.yaml | 9 +++++++++
>> 1 file changed, 9 insertions(+)
>>
>> diff --git a/Documentation/devicetree/bindings/hwmon/ti,ina2xx.yaml b/Documentation/devicetree/bindings/hwmon/ti,ina2xx.yaml
>> index df86c2c92037..5a16d2d94587 100644
>> --- a/Documentation/devicetree/bindings/hwmon/ti,ina2xx.yaml
>> +++ b/Documentation/devicetree/bindings/hwmon/ti,ina2xx.yaml
>> @@ -66,6 +66,14 @@ properties:
>> description: phandle to the regulator that provides the VS supply typically
>> in range from 2.7 V to 5.5 V.
>>
>> + ti,alert-polarity:
>> + description: Alert polarity bit value of Mask/Enable register. Alert pin is
>> + asserted based on the value of Alert polarity Bit. Default value is Normal
>> + (0 which maps to active-low open collector). The other value is Inverted
>> + (1 which maps to active-high open collector).
>> + $ref: /schemas/types.yaml#/definitions/uint32
>> + enum: [0, 1]
>
> There's no need for this to have a value, it's sufficient to be a flag
> of "ti,alert-active-high". Present would mean active-high and absent
> active-low. This has the added benefit the devicetree node being
> understandable to a reader.
>
Agreed, makes sense. Even better, at the same time simplifies the code.
Guenter
On Wed, May 29, 2024 at 11:47:44AM +0200, Amna Waseem wrote:
> Add a property to the binding to configure the Alert Polarity.
> Alert pin is asserted based on the value of Alert Polarity bit of
> Mask/Enable register. It is by default 0 which means Alert pin is
> configured to be active low open collector. Value of 1 maps to
> Inverted (active high open collector).
>
> Signed-off-by: Amna Waseem <[email protected]>
> ---
> Documentation/devicetree/bindings/hwmon/ti,ina2xx.yaml | 9 +++++++++
> 1 file changed, 9 insertions(+)
>
> diff --git a/Documentation/devicetree/bindings/hwmon/ti,ina2xx.yaml b/Documentation/devicetree/bindings/hwmon/ti,ina2xx.yaml
> index df86c2c92037..5a16d2d94587 100644
> --- a/Documentation/devicetree/bindings/hwmon/ti,ina2xx.yaml
> +++ b/Documentation/devicetree/bindings/hwmon/ti,ina2xx.yaml
> @@ -66,6 +66,14 @@ properties:
> description: phandle to the regulator that provides the VS supply typically
> in range from 2.7 V to 5.5 V.
>
> + ti,alert-polarity:
> + description: Alert polarity bit value of Mask/Enable register. Alert pin is
> + asserted based on the value of Alert polarity Bit. Default value is Normal
> + (0 which maps to active-low open collector). The other value is Inverted
> + (1 which maps to active-high open collector).
> + $ref: /schemas/types.yaml#/definitions/uint32
> + enum: [0, 1]
There's no need for this to have a value, it's sufficient to be a flag
of "ti,alert-active-high". Present would mean active-high and absent
active-low. This has the added benefit the devicetree node being
understandable to a reader.
Thanks,
Conor.
> +
> required:
> - compatible
> - reg
> @@ -88,5 +96,6 @@ examples:
> label = "vdd_3v0";
> shunt-resistor = <1000>;
> vs-supply = <&vdd_3v0>;
> + ti,alert-polarity = <1>;
> };
> };
>
> --
> 2.30.2
>
On 5/29/24 18:20, Guenter Roeck wrote:
> On 5/29/24 09:17, Conor Dooley wrote:
>> On Wed, May 29, 2024 at 11:47:44AM +0200, Amna Waseem wrote:
>>> Add a property to the binding to configure the Alert Polarity.
>>> Alert pin is asserted based on the value of Alert Polarity bit of
>>> Mask/Enable register. It is by default 0 which means Alert pin is
>>> configured to be active low open collector. Value of 1 maps to
>>> Inverted (active high open collector).
>>>
>>> Signed-off-by: Amna Waseem <[email protected]>
>>> ---
>>> Documentation/devicetree/bindings/hwmon/ti,ina2xx.yaml | 9 +++++++++
>>> 1 file changed, 9 insertions(+)
>>>
>>> diff --git a/Documentation/devicetree/bindings/hwmon/ti,ina2xx.yaml
>>> b/Documentation/devicetree/bindings/hwmon/ti,ina2xx.yaml
>>> index df86c2c92037..5a16d2d94587 100644
>>> --- a/Documentation/devicetree/bindings/hwmon/ti,ina2xx.yaml
>>> +++ b/Documentation/devicetree/bindings/hwmon/ti,ina2xx.yaml
>>> @@ -66,6 +66,14 @@ properties:
>>> description: phandle to the regulator that provides the VS
>>> supply typically
>>> in range from 2.7 V to 5.5 V.
>>> + ti,alert-polarity:
>>> + description: Alert polarity bit value of Mask/Enable register.
>>> Alert pin is
>>> + asserted based on the value of Alert polarity Bit. Default
>>> value is Normal
>>> + (0 which maps to active-low open collector). The other value
>>> is Inverted
>>> + (1 which maps to active-high open collector).
>>> + $ref: /schemas/types.yaml#/definitions/uint32
>>> + enum: [0, 1]
>>
>> There's no need for this to have a value, it's sufficient to be a flag
>> of "ti,alert-active-high". Present would mean active-high and absent
>> active-low. This has the added benefit the devicetree node being
>> understandable to a reader.
>>
>
> Agreed, makes sense. Even better, at the same time simplifies the code.
>
> Guenter
>
>
Agreed. Will do it in next patch
Amna