MWDMA0 timings cannot be met with the PIIX based controller
programming interface.
This change should be safe as this is how we have been doing
things in IDE it8213 host driver for years.
Signed-off-by: Bartlomiej Zolnierkiewicz <[email protected]>
---
Verified with the documentation (similar case as with pata_efar).
On top of patches from yesterday.
drivers/ata/pata_it8213.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
Index: b/drivers/ata/pata_it8213.c
===================================================================
--- a/drivers/ata/pata_it8213.c
+++ b/drivers/ata/pata_it8213.c
@@ -227,7 +227,7 @@ static int it8213_init_one (struct pci_d
static const struct ata_port_info info = {
.flags = ATA_FLAG_SLAVE_POSS,
.pio_mask = ATA_PIO4,
- .mwdma_mask = ATA_MWDMA2,
+ .mwdma_mask = ATA_MWDMA12_ONLY,
.udma_mask = ATA_UDMA6,
.port_ops = &it8213_ops,
};
On Thursday 26 November 2009 05:28:36 pm Bartlomiej Zolnierkiewicz wrote:
>
> MWDMA0 timings cannot be met with the PIIX based controller
> programming interface.
>
> This change should be safe as this is how we have been doing
> things in IDE it8213 host driver for years.
>
> Signed-off-by: Bartlomiej Zolnierkiewicz <[email protected]>
> ---
> Verified with the documentation (similar case as with pata_efar).
Uhhh, no...
Too many damn drivers.
Too much damn duplication.
Too much damn subtle differences here and there.
The hardware is probably fine for MWMDA0 when it comes to pata_{efar,it8213},
it just not documented properly in the data sheet.
I'll drop those two patches from my tree and take some break..
> On top of patches from yesterday.
>
> drivers/ata/pata_it8213.c | 2 +-
> 1 file changed, 1 insertion(+), 1 deletion(-)
>
> Index: b/drivers/ata/pata_it8213.c
> ===================================================================
> --- a/drivers/ata/pata_it8213.c
> +++ b/drivers/ata/pata_it8213.c
> @@ -227,7 +227,7 @@ static int it8213_init_one (struct pci_d
> static const struct ata_port_info info = {
> .flags = ATA_FLAG_SLAVE_POSS,
> .pio_mask = ATA_PIO4,
> - .mwdma_mask = ATA_MWDMA2,
> + .mwdma_mask = ATA_MWDMA12_ONLY,
> .udma_mask = ATA_UDMA6,
> .port_ops = &it8213_ops,
> };
Bartlomiej Zolnierkiewicz wrote:
>>MWDMA0 timings cannot be met with the PIIX based controller
>>programming interface.
>>This change should be safe as this is how we have been doing
>>things in IDE it8213 host driver for years.
>>Signed-off-by: Bartlomiej Zolnierkiewicz <[email protected]>
>>---
>>Verified with the documentation (similar case as with pata_efar).
> Uhhh, no...
> Too many damn drivers.
> Too much damn duplication.
> Too much damn subtle differences here and there.
> The hardware is probably fine for MWMDA0 when it comes to pata_{efar,it8213},
> it just not documented properly in the data sheet.
How so with pata_efar? The active/recovery bitfields are still 2-bit
wide, no?
> I'll drop those two patches from my tree and take some break..
Taking a break is good, not sure about dropping yet.
MBR, Sergei
On Thursday 26 November 2009 06:23:18 pm Sergei Shtylyov wrote:
> Bartlomiej Zolnierkiewicz wrote:
>
> >>MWDMA0 timings cannot be met with the PIIX based controller
> >>programming interface.
>
> >>This change should be safe as this is how we have been doing
> >>things in IDE it8213 host driver for years.
>
> >>Signed-off-by: Bartlomiej Zolnierkiewicz <[email protected]>
> >>---
> >>Verified with the documentation (similar case as with pata_efar).
>
> > Uhhh, no...
>
> > Too many damn drivers.
>
> > Too much damn duplication.
>
> > Too much damn subtle differences here and there.
>
> > The hardware is probably fine for MWMDA0 when it comes to pata_{efar,it8213},
> > it just not documented properly in the data sheet.
>
> How so with pata_efar? The active/recovery bitfields are still 2-bit
> wide, no?
Yes but when TIMEx bit is disabled we are using XFER_PIO_SLOW timings.
All data sheets including original Intel ones are a complete crap when it
comes to explicitly documenting this behavior.
--
Bartlomiej Zolnierkiewicz
On Thursday 26 November 2009 07:00:11 pm Bartlomiej Zolnierkiewicz wrote:
> On Thursday 26 November 2009 06:23:18 pm Sergei Shtylyov wrote:
> > Bartlomiej Zolnierkiewicz wrote:
> >
> > >>MWDMA0 timings cannot be met with the PIIX based controller
> > >>programming interface.
> >
> > >>This change should be safe as this is how we have been doing
> > >>things in IDE it8213 host driver for years.
> >
> > >>Signed-off-by: Bartlomiej Zolnierkiewicz <[email protected]>
> > >>---
> > >>Verified with the documentation (similar case as with pata_efar).
> >
> > > Uhhh, no...
> >
> > > Too many damn drivers.
> >
> > > Too much damn duplication.
> >
> > > Too much damn subtle differences here and there.
> >
> > > The hardware is probably fine for MWMDA0 when it comes to pata_{efar,it8213},
> > > it just not documented properly in the data sheet.
> >
> > How so with pata_efar? The active/recovery bitfields are still 2-bit
> > wide, no?
>
> Yes but when TIMEx bit is disabled we are using XFER_PIO_SLOW timings.
>
> All data sheets including original Intel ones are a complete crap when it
> comes to explicitly documenting this behavior.
OTOH all drivers set TIMEx for MWDMA0 currently.. ?
--
Bartlomiej Zolnierkiewicz
Bartlomiej Zolnierkiewicz wrote:
>>>>>MWDMA0 timings cannot be met with the PIIX based controller
>>>>>programming interface.
>>>
>>>>>This change should be safe as this is how we have been doing
>>>>>things in IDE it8213 host driver for years.
>>>
>>>>>Signed-off-by: Bartlomiej Zolnierkiewicz <[email protected]>
>>>>>---
>>>>>Verified with the documentation (similar case as with pata_efar).
>>>>Uhhh, no...
>>>>Too many damn drivers.
>>>>Too much damn duplication.
>>>>Too much damn subtle differences here and there.
>>>>The hardware is probably fine for MWMDA0 when it comes to pata_{efar,it8213},
>>>>it just not documented properly in the data sheet.
>>> How so with pata_efar? The active/recovery bitfields are still 2-bit
>>>wide, no?
>>Yes but when TIMEx bit is disabled we are using XFER_PIO_SLOW timings.
600 ns cycle vs spec'ed 480 ns? Is it really worth it?
>>All data sheets including original Intel ones are a complete crap when it
>>comes to explicitly documenting this behavior.
> OTOH all drivers set TIMEx for MWDMA0 currently.. ?
... which would give a grossly overclocked timing.
> --
> Bartlomiej Zolnierkiewicz
MBR, Sergei
On Thursday 26 November 2009 07:12:59 pm Sergei Shtylyov wrote:
> Bartlomiej Zolnierkiewicz wrote:
>
> >>>>>MWDMA0 timings cannot be met with the PIIX based controller
> >>>>>programming interface.
> >>>
> >>>>>This change should be safe as this is how we have been doing
> >>>>>things in IDE it8213 host driver for years.
> >>>
> >>>>>Signed-off-by: Bartlomiej Zolnierkiewicz <[email protected]>
> >>>>>---
> >>>>>Verified with the documentation (similar case as with pata_efar).
>
> >>>>Uhhh, no...
>
> >>>>Too many damn drivers.
>
> >>>>Too much damn duplication.
>
> >>>>Too much damn subtle differences here and there.
>
> >>>>The hardware is probably fine for MWMDA0 when it comes to pata_{efar,it8213},
> >>>>it just not documented properly in the data sheet.
>
> >>> How so with pata_efar? The active/recovery bitfields are still 2-bit
> >>>wide, no?
>
> >>Yes but when TIMEx bit is disabled we are using XFER_PIO_SLOW timings.
>
> 600 ns cycle vs spec'ed 480 ns? Is it really worth it?
960 ns actually
> >>All data sheets including original Intel ones are a complete crap when it
> >>comes to explicitly documenting this behavior.
>
> > OTOH all drivers set TIMEx for MWDMA0 currently.. ?
>
> ... which would give a grossly overclocked timing.
Except ata_piix which blacklists MWDMA0 for _all_ PATA controllers.. :)
I'm leaving my patches as they were for now, unless somebody wants to
untangle this mess this is a safest and quickest way forward..
--
Bartlomiej Zolnierkiewicz
Bartlomiej Zolnierkiewicz wrote:
>>>>>>>MWDMA0 timings cannot be met with the PIIX based controller
>>>>>>>programming interface.
>>>>>>>This change should be safe as this is how we have been doing
>>>>>>>things in IDE it8213 host driver for years.
>>>>>>>Signed-off-by: Bartlomiej Zolnierkiewicz <[email protected]>
>>>>>>>---
>>>>>>>Verified with the documentation (similar case as with pata_efar).
>>>>>>Uhhh, no...
>>>>>>Too many damn drivers.
>>>>>>Too much damn duplication.
>>>>>>Too much damn subtle differences here and there.
>>>>>>The hardware is probably fine for MWMDA0 when it comes to pata_{efar,it8213},
>>>>>>it just not documented properly in the data sheet.
>>>>> How so with pata_efar? The active/recovery bitfields are still 2-bit
>>>>>wide, no?
>>>>Yes but when TIMEx bit is disabled we are using XFER_PIO_SLOW timings.
>> 600 ns cycle vs spec'ed 480 ns? Is it really worth it?
> 960 ns actually
That table you're looking at (probably in the SLC90E66 datasheet?) must
be screwed up. 960 ns is used for command cycles, according to Intel's docs,
data cycles run at 600 ns...
>>>>All data sheets including original Intel ones are a complete crap when it
>>>>comes to explicitly documenting this behavior.
>>>OTOH all drivers set TIMEx for MWDMA0 currently.. ?
>>
>> ... which would give a grossly overclocked timing.
> Except ata_piix which blacklists MWDMA0 for _all_ PATA controllers.. :)
:-)
> I'm leaving my patches as they were for now, unless somebody wants to
> untangle this mess this is a safest and quickest way forward..
MBR, Sergei
Hello, I wrote:
>>>>>>>> MWDMA0 timings cannot be met with the PIIX based controller
>>>>>>>> programming interface.
>>>>>>>> This change should be safe as this is how we have been doing
>>>>>>>> things in IDE it8213 host driver for years.
>>>>>>>> Signed-off-by: Bartlomiej Zolnierkiewicz <[email protected]>
>>>>>>>> ---
>>>>>>>> Verified with the documentation (similar case as with pata_efar).
>>>>>>> Uhhh, no...
>>>>>>> Too many damn drivers.
>>>>>>> Too much damn duplication.
>>>>>>> Too much damn subtle differences here and there.
>>>>>>> The hardware is probably fine for MWMDA0 when it comes to
>>>>>>> pata_{efar,it8213},
>>>>>>> it just not documented properly in the data sheet.
>>>>>> How so with pata_efar? The active/recovery bitfields are still
>>>>>> 2-bit wide, no?
>>>>> Yes but when TIMEx bit is disabled we are using XFER_PIO_SLOW timings.
>>> 600 ns cycle vs spec'ed 480 ns? Is it really worth it?
>> 960 ns actually
> That table you're looking at (probably in the SLC90E66 datasheet?)
> must be screwed up. 960 ns is used for command cycles, according to
> Intel's docs, data cycles run at 600 ns...
Well, after doublke checking 82371AB datasheet has 660 ns, and ICH PRM
has 900 ns. Not sure where I got what I've cited now, perhaps in some older
version of PRM... what a mess indeed. :-/
MBR, Sergei
On 11/26/2009 12:23 PM, Sergei Shtylyov wrote:
> Bartlomiej Zolnierkiewicz wrote:
>
>>> MWDMA0 timings cannot be met with the PIIX based controller
>>> programming interface.
>
>>> This change should be safe as this is how we have been doing
>>> things in IDE it8213 host driver for years.
>
>>> Signed-off-by: Bartlomiej Zolnierkiewicz <[email protected]>
>>> ---
>>> Verified with the documentation (similar case as with pata_efar).
>
>> Uhhh, no...
>
>> Too many damn drivers.
>
>> Too much damn duplication.
>
>> Too much damn subtle differences here and there.
>
>> The hardware is probably fine for MWMDA0 when it comes to
>> pata_{efar,it8213},
>> it just not documented properly in the data sheet.
>
> How so with pata_efar? The active/recovery bitfields are still 2-bit
> wide, no?
So.... pata_it8213 is fine for MWDMA0, then?
Jeff
Hello.
Jeff Garzik wrote:
>>>> MWDMA0 timings cannot be met with the PIIX based controller
>>>> programming interface.
>>
>>>> This change should be safe as this is how we have been doing
>>>> things in IDE it8213 host driver for years.
>>
>>>> Signed-off-by: Bartlomiej Zolnierkiewicz <[email protected]>
>>>> ---
>>>> Verified with the documentation (similar case as with pata_efar).
>>
>>> Uhhh, no...
>>
>>> Too many damn drivers.
>>
>>> Too much damn duplication.
>>
>>> Too much damn subtle differences here and there.
>>
>>> The hardware is probably fine for MWMDA0 when it comes to
>>> pata_{efar,it8213},
>>> it just not documented properly in the data sheet.
>>
>> How so with pata_efar? The active/recovery bitfields are still 2-bit
>> wide, no?
>
> So.... pata_it8213 is fine for MWDMA0, then?
No, TTBOMK. I just have no datasheet. However, it's programmed
overclocked and even in theory the cycle time cannot exceeed 600 ns vs
480 ns spec'ed.
> Jeff
MBR, Sergei