On 04/11/2022 10:27, Maxime Chevallier wrote:
> The Qualcomm IPQ4019 includes an internal 5 ports switch, which is
> connected to the CPU through the internal IPQESS Ethernet controller.
>
> Add support for this internal interface, which is internally connected to a
> modified version of the QCA8K Ethernet switch.
>
> This Ethernet controller only support a specific internal interface mode
> for connection to the switch.
>
> Signed-off-by: Maxime Chevallier <[email protected]>
> Reviewed-by: Krzysztof Kozlowski <[email protected]>
> ---
> V6->V7:
> - No Changes
> V5->V6:
> - Removed extra blank lines
> - Put the status property last
> V4->V5:
> - Reword the commit log
> V3->V4:
> - No Changes
> V2->V3:
> - No Changes
> V1->V2:
> - Added clock and resets
>
> arch/arm/boot/dts/qcom-ipq4019.dtsi | 44 +++++++++++++++++++++++++++++
> 1 file changed, 44 insertions(+)
>
> diff --git a/arch/arm/boot/dts/qcom-ipq4019.dtsi b/arch/arm/boot/dts/qcom-ipq4019.dtsi
> index b23591110bd2..5fa1af147df9 100644
> --- a/arch/arm/boot/dts/qcom-ipq4019.dtsi
> +++ b/arch/arm/boot/dts/qcom-ipq4019.dtsi
> @@ -38,6 +38,7 @@ aliases {
> spi1 = &blsp1_spi2;
> i2c0 = &blsp1_i2c3;
> i2c1 = &blsp1_i2c4;
> + ethernet0 = &gmac;
Hm, I have doubts about this one. Why alias is needed and why it is a
property of a SoC? Not every board has Ethernet enabled, so this looks
like board property.
I also wonder why do you need it at all?
Best regards,
Krzysztof
On Fri, Nov 04, 2022 at 10:31:06AM -0400, Krzysztof Kozlowski wrote:
> > diff --git a/arch/arm/boot/dts/qcom-ipq4019.dtsi b/arch/arm/boot/dts/qcom-ipq4019.dtsi
> > index b23591110bd2..5fa1af147df9 100644
> > --- a/arch/arm/boot/dts/qcom-ipq4019.dtsi
> > +++ b/arch/arm/boot/dts/qcom-ipq4019.dtsi
> > @@ -38,6 +38,7 @@ aliases {
> > spi1 = &blsp1_spi2;
> > i2c0 = &blsp1_i2c3;
> > i2c1 = &blsp1_i2c4;
> > + ethernet0 = &gmac;
>
> Hm, I have doubts about this one. Why alias is needed and why it is a
> property of a SoC? Not every board has Ethernet enabled, so this looks
> like board property.
>
> I also wonder why do you need it at all?
In general, Ethernet aliases are needed so that the bootloader can fix
up the MAC address of each port's OF node with values it gets from the
U-Boot environment or an AT24 EEPROM or something like that.
On 04/11/2022 10:32, Vladimir Oltean wrote:
> On Fri, Nov 04, 2022 at 10:31:06AM -0400, Krzysztof Kozlowski wrote:
>>> diff --git a/arch/arm/boot/dts/qcom-ipq4019.dtsi b/arch/arm/boot/dts/qcom-ipq4019.dtsi
>>> index b23591110bd2..5fa1af147df9 100644
>>> --- a/arch/arm/boot/dts/qcom-ipq4019.dtsi
>>> +++ b/arch/arm/boot/dts/qcom-ipq4019.dtsi
>>> @@ -38,6 +38,7 @@ aliases {
>>> spi1 = &blsp1_spi2;
>>> i2c0 = &blsp1_i2c3;
>>> i2c1 = &blsp1_i2c4;
>>> + ethernet0 = &gmac;
>>
>> Hm, I have doubts about this one. Why alias is needed and why it is a
>> property of a SoC? Not every board has Ethernet enabled, so this looks
>> like board property.
>>
>> I also wonder why do you need it at all?
>
> In general, Ethernet aliases are needed so that the bootloader can fix
> up the MAC address of each port's OF node with values it gets from the
> U-Boot environment or an AT24 EEPROM or something like that.
Assuming that's the case here, my other part of question remains - is
this property of SoC or board? The buses (SPI, I2C) are properties of
boards, even though were incorrectly put here. If the board has multiple
ethernets, the final ordering is the property of the board, not SoC. I
would assume that bootloader also configures the MAC address based on
the board config, not per SoC...
Best regards,
Krzysztof
On Fri, Nov 04, 2022 at 11:08:07AM -0400, Krzysztof Kozlowski wrote:
> On 04/11/2022 10:32, Vladimir Oltean wrote:
> > On Fri, Nov 04, 2022 at 10:31:06AM -0400, Krzysztof Kozlowski wrote:
> >>> diff --git a/arch/arm/boot/dts/qcom-ipq4019.dtsi b/arch/arm/boot/dts/qcom-ipq4019.dtsi
> >>> index b23591110bd2..5fa1af147df9 100644
> >>> --- a/arch/arm/boot/dts/qcom-ipq4019.dtsi
> >>> +++ b/arch/arm/boot/dts/qcom-ipq4019.dtsi
> >>> @@ -38,6 +38,7 @@ aliases {
> >>> spi1 = &blsp1_spi2;
> >>> i2c0 = &blsp1_i2c3;
> >>> i2c1 = &blsp1_i2c4;
> >>> + ethernet0 = &gmac;
> >>
> >> Hm, I have doubts about this one. Why alias is needed and why it is a
> >> property of a SoC? Not every board has Ethernet enabled, so this looks
> >> like board property.
> >>
> >> I also wonder why do you need it at all?
> >
> > In general, Ethernet aliases are needed so that the bootloader can fix
> > up the MAC address of each port's OF node with values it gets from the
> > U-Boot environment or an AT24 EEPROM or something like that.
>
> Assuming that's the case here, my other part of question remains - is
> this property of SoC or board? The buses (SPI, I2C) are properties of
> boards, even though were incorrectly put here. If the board has multiple
> ethernets, the final ordering is the property of the board, not SoC. I
> would assume that bootloader also configures the MAC address based on
> the board config, not per SoC...
I don't disagree. On NXP LS1028A, we also have all aliases in board
device trees and not in the SoC dtsi.
Hello Krzysztof, Vladimir,
On Fri, 4 Nov 2022 15:40:48 +0000
Vladimir Oltean <[email protected]> wrote:
> On Fri, Nov 04, 2022 at 11:08:07AM -0400, Krzysztof Kozlowski wrote:
> > On 04/11/2022 10:32, Vladimir Oltean wrote:
> > > On Fri, Nov 04, 2022 at 10:31:06AM -0400, Krzysztof Kozlowski
> > > wrote:
> > >>> diff --git a/arch/arm/boot/dts/qcom-ipq4019.dtsi
> > >>> b/arch/arm/boot/dts/qcom-ipq4019.dtsi index
> > >>> b23591110bd2..5fa1af147df9 100644 ---
> > >>> a/arch/arm/boot/dts/qcom-ipq4019.dtsi +++
> > >>> b/arch/arm/boot/dts/qcom-ipq4019.dtsi @@ -38,6 +38,7 @@ aliases
> > >>> { spi1 = &blsp1_spi2;
> > >>> i2c0 = &blsp1_i2c3;
> > >>> i2c1 = &blsp1_i2c4;
> > >>> + ethernet0 = &gmac;
> > >>
> > >> Hm, I have doubts about this one. Why alias is needed and why it
> > >> is a property of a SoC? Not every board has Ethernet enabled, so
> > >> this looks like board property.
> > >>
> > >> I also wonder why do you need it at all?
> > >
> > > In general, Ethernet aliases are needed so that the bootloader
> > > can fix up the MAC address of each port's OF node with values it
> > > gets from the U-Boot environment or an AT24 EEPROM or something
> > > like that.
> >
> > Assuming that's the case here, my other part of question remains -
> > is this property of SoC or board? The buses (SPI, I2C) are
> > properties of boards, even though were incorrectly put here. If the
> > board has multiple ethernets, the final ordering is the property of
> > the board, not SoC. I would assume that bootloader also configures
> > the MAC address based on the board config, not per SoC...
>
> I don't disagree. On NXP LS1028A, we also have all aliases in board
> device trees and not in the SoC dtsi.
You're right indeed, it was put there so that it's alongside the other
aliases, but it makes more sense to include it in the board file. I'll
respin with the alias removed.
Thanks,
Maxime