From: Lakshmi Sowjanya D <[email protected]>
The goal of the PPS (Pulse Per Second) hardware/software is to generate a
signal from the system on a wire so that some third-party hardware can
observe that signal and judge how close the system's time is to another
system or piece of hardware.
Existing methods (like parallel ports) require software to flip a bit at
just the right time to create a PPS signal. Many things can prevent
software from doing this precisely. This (Timed I/O) method is better
because software only "arms" the hardware in advance and then depends on
the hardware to "fire" and flip the signal at just the right time.
To generate a PPS signal with this new hardware, the kernel wakes up
twice a second, once for 1->0 edge and other for the 0->1 edge. It does
this shortly (~10ms) before the actual change in the signal needs to be
made. It computes the TSC value at which edge will happen, convert to a
value hardware understands and program this value to Timed I/O hardware.
The actual edge transition happens without any further action from the
kernel.
The result here is a signal coming out of the system that is roughly
1,000 times more accurate than the old methods. If the system is heavily
loaded, the difference in accuracy is larger in old methods.
Application Interface:
The API to use Timed I/O is very simple. It is enabled and disabled by
writing a '1' or '0' value to the sysfs enable attribute associated with
the Timed I/O PPS device. Each Timed I/O pin is represented by a PPS
device. When enabled, a pulse-per-second (PPS) synchronized with the
system clock is continuously produced on the Timed I/O pin, otherwise it
is pulled low.
The Timed I/O signal on the motherboard is enabled in the BIOS setup.
Intel Advanced Menu -> PCH IO Configuration -> Timed I/O <Enable>
References:
https://en.wikipedia.org/wiki/Pulse-per-second_signal
https://drive.google.com/file/d/1vkBRRDuELmY8I3FlfOZaEBp-DxLW6t_V/view
https://youtu.be/JLUTT-lrDqw
Patch 1 adds base clock properties in clocksource structure
Patch 2 adds function to convert realtime to base clock
Patch 3 - 7 removes reference to convert_art_to_tsc function across
drivers
Patch 8 removes the convert art to tsc functions which are no longer
used
Patch 9 adds the pps(pulse per second) generator tio driver to the pps
subsystem.
Patch 10 documentation and usage of the pps tio generator module.
Patch 11 includes documentation for sysfs interface.
Please help to review the changes.
Thanks in advance,
Sowjanya
Changes from v2:
- Split patch 1 to remove the functions in later stages.
- Include required headers in pps_gen_tio.
Changes from v3:
- Corrections in Documentation.
- Introducing non-RFC version of the patch series.
Changes from v4:
- Setting id in ice_ptp
- Modified conversion logic in convert_base_to_cs.
- Included the usage of the APIs in the commit message of 2nd patch.
Changes from v5:
- Change nsecs variable to use_nsecs.
- Change order of 1&2 patches and modify the commit message.
- Add sysfs abi file entry in MAINTAINERS file.
- Add check to find if any event is missed and diable hardware
accordingly.
Lakshmi Sowjanya D (6):
x86/tsc: Add base clock properties in clocksource structure
x86/tsc: Remove art to tsc conversion functions which are obsolete
timekeeping: Add function to convert realtime to base clock
pps: generators: Add PPS Generator TIO Driver
Documentation: driver-api: pps: Add Intel Timed I/O PPS generator
ABI: pps: Add ABI documentation for Intel TIO
Thomas Gleixner (5):
e1000e: remove convert_art_to_tsc()
igc: remove convert_art_to_tsc()
stmmac: intel: remove convert_art_to_tsc()
ALSA: hda: remove convert_art_to_tsc()
ice/ptp: remove convert_art_to_tsc()
.../ABI/testing/sysfs-platform-pps-tio | 7 +
Documentation/driver-api/pps.rst | 22 ++
MAINTAINERS | 1 +
arch/x86/include/asm/tsc.h | 3 -
arch/x86/kernel/tsc.c | 92 ++-----
drivers/net/ethernet/intel/e1000e/ptp.c | 3 +-
drivers/net/ethernet/intel/ice/ice_ptp.c | 3 +-
drivers/net/ethernet/intel/igc/igc_ptp.c | 6 +-
.../net/ethernet/stmicro/stmmac/dwmac-intel.c | 3 +-
drivers/pps/generators/Kconfig | 16 ++
drivers/pps/generators/Makefile | 1 +
drivers/pps/generators/pps_gen_tio.c | 258 ++++++++++++++++++
include/linux/clocksource.h | 27 ++
include/linux/clocksource_ids.h | 1 +
include/linux/timekeeping.h | 6 +
kernel/time/timekeeping.c | 107 +++++++-
sound/pci/hda/hda_controller.c | 3 +-
17 files changed, 476 insertions(+), 83 deletions(-)
create mode 100644 Documentation/ABI/testing/sysfs-platform-pps-tio
create mode 100644 drivers/pps/generators/pps_gen_tio.c
--
2.35.3
From: Lakshmi Sowjanya D <[email protected]>
Add Intel Timed I/O PPS usage instructions.
Co-developed-by: Pandith N <[email protected]>
Signed-off-by: Pandith N <[email protected]>
Signed-off-by: Lakshmi Sowjanya D <[email protected]>
Reviewed-by: Andy Shevchenko <[email protected]>
Acked-by: Rodolfo Giometti <[email protected]>
---
Documentation/driver-api/pps.rst | 22 ++++++++++++++++++++++
1 file changed, 22 insertions(+)
diff --git a/Documentation/driver-api/pps.rst b/Documentation/driver-api/pps.rst
index 78dded03e5d8..52a6d5faf885 100644
--- a/Documentation/driver-api/pps.rst
+++ b/Documentation/driver-api/pps.rst
@@ -246,3 +246,25 @@ delay between assert and clear edge as small as possible to reduce system
latencies. But if it is too small slave won't be able to capture clear edge
transition. The default of 30us should be good enough in most situations.
The delay can be selected using 'delay' pps_gen_parport module parameter.
+
+
+Intel Timed I/O PPS signal generator
+------------------------------------
+
+Intel Timed I/O is a high precision device, present on 2019 and newer Intel
+CPUs, that can generate PPS signals.
+
+Timed I/O and system time are both driven by same hardware clock. The signal
+is generated with a precision of ~20 nanoseconds. The generated PPS signal
+is used to synchronize an external device with system clock. For example,
+share your clock with a device that receives PPS signal, generated by
+Timed I/O device. There are dedicated Timed I/O pins to deliver the PPS signal
+to an external device.
+
+Usage of Intel Timed I/O as PPS generator:
+
+Start generating PPS signal::
+ $echo 1 > /sys/devices/platform/INTCxxxx\:00/enable
+
+Stop generating PPS signal::
+ $echo 0 > /sys/devices/platform/INTCxxxx\:00/enable
--
2.35.3
From: Lakshmi Sowjanya D <[email protected]>
Add base clock hardware abstraction in clocksource structure.
Add clocksource ID for x86 ART(Always Running Timer). The newly added
clocksource ID and conversion parameters are used to convert time in a
clocksource domain to base clock and vice versa.
Convert the base clock to the system clock using convert_base_to_cs() in
get_device_system_crosststamp().
Co-developed-by: Thomas Gleixner <[email protected]>
Signed-off-by: Thomas Gleixner <[email protected]>
Co-developed-by: Christopher S. Hall <[email protected]>
Signed-off-by: Christopher S. Hall <[email protected]>
Signed-off-by: Lakshmi Sowjanya D <[email protected]>
---
arch/x86/kernel/tsc.c | 42 +++++++++++++++++++--------------
include/linux/clocksource.h | 27 +++++++++++++++++++++
include/linux/clocksource_ids.h | 1 +
include/linux/timekeeping.h | 2 ++
kernel/time/timekeeping.c | 37 +++++++++++++++++++++++++++--
5 files changed, 89 insertions(+), 20 deletions(-)
diff --git a/arch/x86/kernel/tsc.c b/arch/x86/kernel/tsc.c
index 5a69a49acc96..45bf2f6d0ffa 100644
--- a/arch/x86/kernel/tsc.c
+++ b/arch/x86/kernel/tsc.c
@@ -50,9 +50,9 @@ int tsc_clocksource_reliable;
static int __read_mostly tsc_force_recalibrate;
-static u32 art_to_tsc_numerator;
-static u32 art_to_tsc_denominator;
-static u64 art_to_tsc_offset;
+static struct clocksource_base art_base_clk = {
+ .id = CSID_X86_ART,
+};
static bool have_art;
struct cyc2ns {
@@ -1074,7 +1074,7 @@ core_initcall(cpufreq_register_tsc_scaling);
*/
static void __init detect_art(void)
{
- unsigned int unused[2];
+ unsigned int unused;
if (boot_cpu_data.cpuid_level < ART_CPUID_LEAF)
return;
@@ -1089,13 +1089,14 @@ static void __init detect_art(void)
tsc_async_resets)
return;
- cpuid(ART_CPUID_LEAF, &art_to_tsc_denominator,
- &art_to_tsc_numerator, unused, unused+1);
+ cpuid(ART_CPUID_LEAF, &art_base_clk.denominator,
+ &art_base_clk.numerator, &art_base_clk.freq_khz, &unused);
- if (art_to_tsc_denominator < ART_MIN_DENOMINATOR)
+ art_base_clk.freq_khz /= KHZ;
+ if (art_base_clk.denominator < ART_MIN_DENOMINATOR)
return;
- rdmsrl(MSR_IA32_TSC_ADJUST, art_to_tsc_offset);
+ rdmsrl(MSR_IA32_TSC_ADJUST, art_base_clk.offset);
/* Make this sticky over multiple CPU init calls */
setup_force_cpu_cap(X86_FEATURE_ART);
@@ -1303,13 +1304,13 @@ struct system_counterval_t convert_art_to_tsc(u64 art)
{
u64 tmp, res, rem;
- rem = do_div(art, art_to_tsc_denominator);
+ rem = do_div(art, art_base_clk.denominator);
- res = art * art_to_tsc_numerator;
- tmp = rem * art_to_tsc_numerator;
+ res = art * art_base_clk.numerator;
+ tmp = rem * art_base_clk.numerator;
- do_div(tmp, art_to_tsc_denominator);
- res += tmp + art_to_tsc_offset;
+ do_div(tmp, art_base_clk.denominator);
+ res += tmp + art_base_clk.offset;
return (struct system_counterval_t) {
.cs_id = have_art ? CSID_X86_TSC : CSID_GENERIC,
@@ -1356,7 +1357,6 @@ struct system_counterval_t convert_art_ns_to_tsc(u64 art_ns)
}
EXPORT_SYMBOL(convert_art_ns_to_tsc);
-
static void tsc_refine_calibration_work(struct work_struct *work);
static DECLARE_DELAYED_WORK(tsc_irqwork, tsc_refine_calibration_work);
/**
@@ -1458,8 +1458,10 @@ static void tsc_refine_calibration_work(struct work_struct *work)
if (tsc_unstable)
goto unreg;
- if (boot_cpu_has(X86_FEATURE_ART))
+ if (boot_cpu_has(X86_FEATURE_ART)) {
have_art = true;
+ clocksource_tsc.base = &art_base_clk;
+ }
clocksource_register_khz(&clocksource_tsc, tsc_khz);
unreg:
clocksource_unregister(&clocksource_tsc_early);
@@ -1484,8 +1486,10 @@ static int __init init_tsc_clocksource(void)
* the refined calibration and directly register it as a clocksource.
*/
if (boot_cpu_has(X86_FEATURE_TSC_KNOWN_FREQ)) {
- if (boot_cpu_has(X86_FEATURE_ART))
+ if (boot_cpu_has(X86_FEATURE_ART)) {
have_art = true;
+ clocksource_tsc.base = &art_base_clk;
+ }
clocksource_register_khz(&clocksource_tsc, tsc_khz);
clocksource_unregister(&clocksource_tsc_early);
@@ -1509,10 +1513,12 @@ static bool __init determine_cpu_tsc_frequencies(bool early)
if (early) {
cpu_khz = x86_platform.calibrate_cpu();
- if (tsc_early_khz)
+ if (tsc_early_khz) {
tsc_khz = tsc_early_khz;
- else
+ } else {
tsc_khz = x86_platform.calibrate_tsc();
+ clocksource_tsc.freq_khz = tsc_khz;
+ }
} else {
/* We should not be here with non-native cpu calibration */
WARN_ON(x86_platform.calibrate_cpu != native_calibrate_cpu);
diff --git a/include/linux/clocksource.h b/include/linux/clocksource.h
index 0ad8b550bb4b..66a033bff17c 100644
--- a/include/linux/clocksource.h
+++ b/include/linux/clocksource.h
@@ -21,6 +21,7 @@
#include <asm/div64.h>
#include <asm/io.h>
+struct clocksource_base;
struct clocksource;
struct module;
@@ -48,6 +49,7 @@ struct module;
* @archdata: Optional arch-specific data
* @max_cycles: Maximum safe cycle value which won't overflow on
* multiplication
+ * @freq_khz: Clocksource frequency in khz.
* @name: Pointer to clocksource name
* @list: List head for registration (internal)
* @rating: Rating value for selection (higher is better)
@@ -70,6 +72,8 @@ struct module;
* validate the clocksource from which the snapshot was
* taken.
* @flags: Flags describing special properties
+ * @base: Hardware abstraction for clock on which a clocksource
+ * is based
* @enable: Optional function to enable the clocksource
* @disable: Optional function to disable the clocksource
* @suspend: Optional suspend function for the clocksource
@@ -105,12 +109,14 @@ struct clocksource {
struct arch_clocksource_data archdata;
#endif
u64 max_cycles;
+ u32 freq_khz;
const char *name;
struct list_head list;
int rating;
enum clocksource_ids id;
enum vdso_clock_mode vdso_clock_mode;
unsigned long flags;
+ struct clocksource_base *base;
int (*enable)(struct clocksource *cs);
void (*disable)(struct clocksource *cs);
@@ -306,4 +312,25 @@ static inline unsigned int clocksource_get_max_watchdog_retry(void)
void clocksource_verify_percpu(struct clocksource *cs);
+/**
+ * struct clocksource_base - hardware abstraction for clock on which a clocksource
+ * is based
+ * @id: Defaults to CSID_GENERIC. The id value is used for conversion
+ * functions which require that the current clocksource is based
+ * on a clocksource_base with a particular ID in certain snapshot
+ * functions to allow callers to validate the clocksource from
+ * which the snapshot was taken.
+ * @freq_khz: Nominal frequency of the base clock in kHz
+ * @offset: Offset between the base clock and the clocksource
+ * @numerator: Numerator of the clock ratio between base clock and the clocksource
+ * @denominator: Denominator of the clock ratio between base clock and the clocksource
+ */
+struct clocksource_base {
+ enum clocksource_ids id;
+ u32 freq_khz;
+ u64 offset;
+ u32 numerator;
+ u32 denominator;
+};
+
#endif /* _LINUX_CLOCKSOURCE_H */
diff --git a/include/linux/clocksource_ids.h b/include/linux/clocksource_ids.h
index a4fa3436940c..2bb4d8c2f1b0 100644
--- a/include/linux/clocksource_ids.h
+++ b/include/linux/clocksource_ids.h
@@ -9,6 +9,7 @@ enum clocksource_ids {
CSID_X86_TSC_EARLY,
CSID_X86_TSC,
CSID_X86_KVM_CLK,
+ CSID_X86_ART,
CSID_MAX,
};
diff --git a/include/linux/timekeeping.h b/include/linux/timekeeping.h
index 0ea7823b7f31..b2ee182d891e 100644
--- a/include/linux/timekeeping.h
+++ b/include/linux/timekeeping.h
@@ -310,10 +310,12 @@ struct system_device_crosststamp {
* timekeeping code to verify comparability of two cycle values.
* The default ID, CSID_GENERIC, does not identify a specific
* clocksource.
+ * @use_nsecs: @cycles is in nanoseconds.
*/
struct system_counterval_t {
u64 cycles;
enum clocksource_ids cs_id;
+ bool use_nsecs;
};
/*
diff --git a/kernel/time/timekeeping.c b/kernel/time/timekeeping.c
index b58dffc58a8f..2542cfefbdee 100644
--- a/kernel/time/timekeeping.c
+++ b/kernel/time/timekeeping.c
@@ -1193,6 +1193,40 @@ static bool timestamp_in_interval(u64 start, u64 end, u64 ts)
return false;
}
+static bool convert_clock(u64 *val, u32 numerator, u32 denominator)
+{
+ u64 rem, res;
+
+ if (!numerator || !denominator)
+ return false;
+
+ res = div64_u64_rem(*val, denominator, &rem) * numerator;
+ *val = res + div_u64(rem * numerator, denominator);
+ return true;
+}
+
+static bool convert_base_to_cs(struct system_counterval_t *scv)
+{
+ struct clocksource *cs = tk_core.timekeeper.tkr_mono.clock;
+ struct clocksource_base *base = cs->base;
+ u32 num, den;
+
+ /* The timestamp was taken from the time keeper clock source */
+ if (cs->id == scv->cs_id)
+ return true;
+
+ /* Check whether cs_id matches the base clock */
+ if (!base || base->id != scv->cs_id)
+ return false;
+
+ num = scv->use_nsecs ? cs->freq_khz : base->numerator;
+ den = scv->use_nsecs ? USEC_PER_SEC : base->denominator;
+
+ convert_clock(&scv->cycles, num, den);
+ scv->cycles += base->offset;
+ return true;
+}
+
/**
* get_device_system_crosststamp - Synchronously capture system/device timestamp
* @get_time_fn: Callback to get simultaneous device time and
@@ -1238,8 +1272,7 @@ int get_device_system_crosststamp(int (*get_time_fn)
* system counter value is the same as for the currently
* installed timekeeper clocksource
*/
- if (system_counterval.cs_id == CSID_GENERIC ||
- tk->tkr_mono.clock->id != system_counterval.cs_id)
+ if (!convert_base_to_cs(&system_counterval))
return -ENODEV;
cycles = system_counterval.cycles;
--
2.35.3
From: Lakshmi Sowjanya D <[email protected]>
Document sysfs interface for Intel Timed I/O PPS driver.
Signed-off-by: Lakshmi Sowjanya D <[email protected]>
---
Documentation/ABI/testing/sysfs-platform-pps-tio | 7 +++++++
MAINTAINERS | 1 +
2 files changed, 8 insertions(+)
create mode 100644 Documentation/ABI/testing/sysfs-platform-pps-tio
diff --git a/Documentation/ABI/testing/sysfs-platform-pps-tio b/Documentation/ABI/testing/sysfs-platform-pps-tio
new file mode 100644
index 000000000000..b9b8c97a7840
--- /dev/null
+++ b/Documentation/ABI/testing/sysfs-platform-pps-tio
@@ -0,0 +1,7 @@
+What: /sys/devices/platform/INTCxxxx/enable
+Date: March 2024
+KernelVersion 6.9
+Contact: Lakshmi Sowjanya D <[email protected]>
+Description:
+ (RW) Enable or disable PPS TIO generator output, read to
+ see the status of hardware (Enabled/Disabled).
diff --git a/MAINTAINERS b/MAINTAINERS
index aea47e04c3a5..e63365a2d029 100644
--- a/MAINTAINERS
+++ b/MAINTAINERS
@@ -17684,6 +17684,7 @@ M: Rodolfo Giometti <[email protected]>
L: [email protected] (subscribers-only)
S: Maintained
W: http://wiki.enneenne.com/index.php/LinuxPPS_support
+F: Documentation/ABI/testing/sysfs-platform-pps-tio
F: Documentation/ABI/testing/sysfs-pps
F: Documentation/devicetree/bindings/pps/pps-gpio.yaml
F: Documentation/driver-api/pps.rst
--
2.35.3
From: Thomas Gleixner <[email protected]>
Remove convert_art_to_tsc() function call, Pass system clock cycles and
clocksource ID as input to get_device_system_crosststamp().
Signed-off-by: Thomas Gleixner <[email protected]>
Signed-off-by: Lakshmi Sowjanya D <[email protected]>
---
sound/pci/hda/hda_controller.c | 3 ++-
1 file changed, 2 insertions(+), 1 deletion(-)
diff --git a/sound/pci/hda/hda_controller.c b/sound/pci/hda/hda_controller.c
index 206306a0eb82..6f648fae7a7b 100644
--- a/sound/pci/hda/hda_controller.c
+++ b/sound/pci/hda/hda_controller.c
@@ -463,7 +463,8 @@ static int azx_get_sync_time(ktime_t *device,
*device = ktime_add_ns(*device, (wallclk_cycles * NSEC_PER_SEC) /
((HDA_MAX_CYCLE_VALUE + 1) * runtime->rate));
- *system = convert_art_to_tsc(tsc_counter);
+ system->cycles = tsc_counter;
+ system->cs_id = CSID_X86_ART;
return 0;
}
--
2.35.3
From: Lakshmi Sowjanya D <[email protected]>
The convert_art_to_tsc() and convert_art_ns_to_tsc() interfaces are no
longer required. This conversion is internally done in
get_device_system_crosststamp() using convert_base_to_cs().
Signed-off-by: Lakshmi Sowjanya D <[email protected]>
---
arch/x86/include/asm/tsc.h | 3 --
arch/x86/kernel/tsc.c | 60 --------------------------------------
2 files changed, 63 deletions(-)
diff --git a/arch/x86/include/asm/tsc.h b/arch/x86/include/asm/tsc.h
index 405efb3e4996..94408a784c8e 100644
--- a/arch/x86/include/asm/tsc.h
+++ b/arch/x86/include/asm/tsc.h
@@ -28,9 +28,6 @@ static inline cycles_t get_cycles(void)
}
#define get_cycles get_cycles
-extern struct system_counterval_t convert_art_to_tsc(u64 art);
-extern struct system_counterval_t convert_art_ns_to_tsc(u64 art_ns);
-
extern void tsc_early_init(void);
extern void tsc_init(void);
extern void mark_tsc_unstable(char *reason);
diff --git a/arch/x86/kernel/tsc.c b/arch/x86/kernel/tsc.c
index 45bf2f6d0ffa..5f0bd441ed4d 100644
--- a/arch/x86/kernel/tsc.c
+++ b/arch/x86/kernel/tsc.c
@@ -1297,66 +1297,6 @@ int unsynchronized_tsc(void)
return 0;
}
-/*
- * Convert ART to TSC given numerator/denominator found in detect_art()
- */
-struct system_counterval_t convert_art_to_tsc(u64 art)
-{
- u64 tmp, res, rem;
-
- rem = do_div(art, art_base_clk.denominator);
-
- res = art * art_base_clk.numerator;
- tmp = rem * art_base_clk.numerator;
-
- do_div(tmp, art_base_clk.denominator);
- res += tmp + art_base_clk.offset;
-
- return (struct system_counterval_t) {
- .cs_id = have_art ? CSID_X86_TSC : CSID_GENERIC,
- .cycles = res,
- };
-}
-EXPORT_SYMBOL(convert_art_to_tsc);
-
-/**
- * convert_art_ns_to_tsc() - Convert ART in nanoseconds to TSC.
- * @art_ns: ART (Always Running Timer) in unit of nanoseconds
- *
- * PTM requires all timestamps to be in units of nanoseconds. When user
- * software requests a cross-timestamp, this function converts system timestamp
- * to TSC.
- *
- * This is valid when CPU feature flag X86_FEATURE_TSC_KNOWN_FREQ is set
- * indicating the tsc_khz is derived from CPUID[15H]. Drivers should check
- * that this flag is set before conversion to TSC is attempted.
- *
- * Return:
- * struct system_counterval_t - system counter value with the ID of the
- * corresponding clocksource:
- * cycles: System counter value
- * cs_id: The clocksource ID for validating comparability
- */
-
-struct system_counterval_t convert_art_ns_to_tsc(u64 art_ns)
-{
- u64 tmp, res, rem;
-
- rem = do_div(art_ns, USEC_PER_SEC);
-
- res = art_ns * tsc_khz;
- tmp = rem * tsc_khz;
-
- do_div(tmp, USEC_PER_SEC);
- res += tmp;
-
- return (struct system_counterval_t) {
- .cs_id = have_art ? CSID_X86_TSC : CSID_GENERIC,
- .cycles = res,
- };
-}
-EXPORT_SYMBOL(convert_art_ns_to_tsc);
-
static void tsc_refine_calibration_work(struct work_struct *work);
static DECLARE_DELAYED_WORK(tsc_irqwork, tsc_refine_calibration_work);
/**
--
2.35.3
From: Lakshmi Sowjanya D <[email protected]>
The Intel Timed IO PPS generator driver outputs a PPS signal using
dedicated hardware that is more accurate than software actuated PPS.
The Timed IO hardware generates output events using the ART timer.
The ART timer period varies based on platform type, but is less than 100
nanoseconds for all current platforms. Timed IO output accuracy is
within 1 ART period.
PPS output is enabled by writing '1' the 'enable' sysfs attribute. The
driver uses hrtimers to schedule a wake-up 10 ms before each event
(edge) target time. At wakeup, the driver converts the target time in
terms of CLOCK_REALTIME to ART trigger time and writes this to the Timed
IO hardware. The Timed IO hardware generates an event precisely at the
requested system time without software involvement.
Co-developed-by: Christopher Hall <[email protected]>
Signed-off-by: Christopher Hall <[email protected]>
Co-developed-by: Pandith N <[email protected]>
Signed-off-by: Pandith N <[email protected]>
Co-developed-by: Thejesh Reddy T R <[email protected]>
Signed-off-by: Thejesh Reddy T R <[email protected]>
Signed-off-by: Lakshmi Sowjanya D <[email protected]>
Reviewed-by: Eddie Dong <[email protected]>
Reviewed-by: Andy Shevchenko <[email protected]>
Acked-by: Rodolfo Giometti <[email protected]>
---
drivers/pps/generators/Kconfig | 16 ++
drivers/pps/generators/Makefile | 1 +
drivers/pps/generators/pps_gen_tio.c | 258 +++++++++++++++++++++++++++
3 files changed, 275 insertions(+)
create mode 100644 drivers/pps/generators/pps_gen_tio.c
diff --git a/drivers/pps/generators/Kconfig b/drivers/pps/generators/Kconfig
index d615e640fcad..0f090932336f 100644
--- a/drivers/pps/generators/Kconfig
+++ b/drivers/pps/generators/Kconfig
@@ -12,3 +12,19 @@ config PPS_GENERATOR_PARPORT
If you say yes here you get support for a PPS signal generator which
utilizes STROBE pin of a parallel port to send PPS signals. It uses
parport abstraction layer and hrtimers to precisely control the signal.
+
+config PPS_GENERATOR_TIO
+ tristate "TIO PPS signal generator"
+ depends on X86 && CPU_SUP_INTEL
+ help
+ If you say yes here you get support for a PPS TIO signal generator
+ which generates a pulse at a prescribed time based on the system clock.
+ It uses time translation and hrtimers to precisely generate a pulse.
+ This hardware is present on 2019 and newer Intel CPUs. However, this
+ driver is not useful without adding highly specialized hardware outside
+ the Linux system to observe these pulses.
+
+ To compile this driver as a module, choose M here: the module
+ will be called pps_gen_tio.
+
+ If unsure, say N.
diff --git a/drivers/pps/generators/Makefile b/drivers/pps/generators/Makefile
index 2589fd0f2481..714e847ae193 100644
--- a/drivers/pps/generators/Makefile
+++ b/drivers/pps/generators/Makefile
@@ -4,5 +4,6 @@
#
obj-$(CONFIG_PPS_GENERATOR_PARPORT) += pps_gen_parport.o
+obj-$(CONFIG_PPS_GENERATOR_TIO) += pps_gen_tio.o
ccflags-$(CONFIG_PPS_DEBUG) := -DDEBUG
diff --git a/drivers/pps/generators/pps_gen_tio.c b/drivers/pps/generators/pps_gen_tio.c
new file mode 100644
index 000000000000..74c2a92eddb8
--- /dev/null
+++ b/drivers/pps/generators/pps_gen_tio.c
@@ -0,0 +1,258 @@
+// SPDX-License-Identifier: GPL-2.0-only
+/*
+ * Intel PPS signal Generator Driver
+ *
+ * Copyright (C) 2023 Intel Corporation
+ */
+
+#include <linux/bits.h>
+#include <linux/bitfield.h>
+#include <linux/cleanup.h>
+#include <linux/container_of.h>
+#include <linux/cpu.h>
+#include <linux/device.h>
+#include <linux/err.h>
+#include <linux/hrtimer.h>
+#include <linux/io-64-nonatomic-hi-lo.h>
+#include <linux/kstrtox.h>
+#include <linux/mod_devicetable.h>
+#include <linux/module.h>
+#include <linux/platform_device.h>
+#include <linux/spinlock.h>
+#include <linux/sysfs.h>
+#include <linux/timekeeping.h>
+#include <linux/types.h>
+
+#include <asm/cpu_device_id.h>
+
+#define TIOCTL 0x00
+#define TIOCOMPV 0x10
+#define TIOEC 0x30
+
+/* Control Register */
+#define TIOCTL_EN BIT(0)
+#define TIOCTL_DIR BIT(1)
+#define TIOCTL_EP GENMASK(3, 2)
+#define TIOCTL_EP_RISING_EDGE FIELD_PREP(TIOCTL_EP, 0)
+#define TIOCTL_EP_FALLING_EDGE FIELD_PREP(TIOCTL_EP, 1)
+#define TIOCTL_EP_TOGGLE_EDGE FIELD_PREP(TIOCTL_EP, 2)
+
+#define SAFE_TIME_NS (10 * NSEC_PER_MSEC) /* Safety time to set hrtimer early */
+#define MAGIC_CONST (NSEC_PER_SEC - SAFE_TIME_NS)
+#define ART_HW_DELAY_CYCLES 2
+
+struct pps_tio {
+ struct hrtimer timer;
+ struct device *dev;
+ spinlock_t lock;
+ struct attribute_group attrs;
+ void __iomem *base;
+ bool enabled;
+ u32 prev_count;
+};
+
+static inline u32 pps_tio_read(struct pps_tio *tio, u32 offset)
+{
+ return readl(tio->base + offset);
+}
+
+static inline void pps_ctl_write(struct pps_tio *tio, u32 value)
+{
+ writel(value, tio->base + TIOCTL);
+}
+
+/* For COMPV register, It's safer to write higher 32-bit followed by lower 32-bit */
+static inline void pps_compv_write(struct pps_tio *tio, u64 value)
+{
+ hi_lo_writeq(value, tio->base + TIOCOMPV);
+}
+
+static inline ktime_t first_event(struct pps_tio *tio)
+{
+ return ktime_set(ktime_get_real_seconds() + 1, MAGIC_CONST);
+}
+
+static u32 pps_tio_disable(struct pps_tio *tio)
+{
+ u32 ctrl;
+
+ ctrl = pps_tio_read(tio, TIOCTL);
+ pps_compv_write(tio, 0);
+
+ ctrl &= ~TIOCTL_EN;
+ pps_ctl_write(tio, ctrl);
+ tio->prev_count = 0;
+
+ return ctrl;
+}
+
+static void pps_tio_direction_output(struct pps_tio *tio)
+{
+ u32 ctrl;
+
+ ctrl = pps_tio_disable(tio);
+
+ /* We enable the device, be sure that the 'compare' value is invalid */
+ pps_compv_write(tio, 0);
+
+ ctrl &= ~(TIOCTL_DIR | TIOCTL_EP);
+ ctrl |= TIOCTL_EP_TOGGLE_EDGE;
+ pps_ctl_write(tio, ctrl);
+
+ ctrl |= TIOCTL_EN;
+ pps_ctl_write(tio, ctrl);
+}
+
+static bool pps_generate_next_pulse(struct pps_tio *tio, ktime_t expires)
+{
+ u64 art;
+
+ if (!ktime_real_to_base_clock(expires, CSID_X86_ART, &art)) {
+ pps_tio_disable(tio);
+ return false;
+ }
+
+ pps_compv_write(tio, art - ART_HW_DELAY_CYCLES);
+ return true;
+}
+
+static enum hrtimer_restart hrtimer_callback(struct hrtimer *timer)
+{
+ struct pps_tio *tio = container_of(timer, struct pps_tio, timer);
+ ktime_t expires, now;
+ u32 event_count;
+
+ guard(spinlock)(&tio->lock);
+
+ /* Check if any event is missed. If an event is missed, TIO will be disabled*/
+ event_count = pps_tio_read(tio, TIOEC);
+ if (!tio->prev_count && tio->prev_count == event_count)
+ goto err;
+ tio->prev_count = event_count;
+ expires = hrtimer_get_expires(timer);
+ now = ktime_get_real();
+
+ if (now - expires < SAFE_TIME_NS) {
+ if (!pps_generate_next_pulse(tio, expires + SAFE_TIME_NS))
+ goto err;
+ }
+
+ hrtimer_forward(timer, now, NSEC_PER_SEC / 2);
+ return HRTIMER_RESTART;
+err:
+ dev_err(tio->dev, "Event missed, Disabling Timed I/O");
+ pps_tio_disable(tio);
+ return HRTIMER_NORESTART;
+}
+
+static ssize_t enable_store(struct device *dev, struct device_attribute *attr, const char *buf,
+ size_t count)
+{
+ struct pps_tio *tio = dev_get_drvdata(dev);
+ bool enable;
+ int err;
+
+ err = kstrtobool(buf, &enable);
+ if (err)
+ return err;
+
+ guard(spinlock_irqsave)(&tio->lock);
+ if (enable && !tio->enabled) {
+ if (!timekeeping_clocksource_has_base(CSID_X86_ART)) {
+ dev_err(tio->dev, "PPS cannot be started as clock is not related to ART");
+ return -EPERM;
+ }
+ pps_tio_direction_output(tio);
+ hrtimer_start(&tio->timer, first_event(tio), HRTIMER_MODE_ABS);
+ tio->enabled = true;
+ } else if (!enable && tio->enabled) {
+ hrtimer_cancel(&tio->timer);
+ pps_tio_disable(tio);
+ tio->enabled = false;
+ }
+ return count;
+}
+
+static ssize_t enable_show(struct device *dev, struct device_attribute *devattr, char *buf)
+{
+ struct pps_tio *tio = dev_get_drvdata(dev);
+ u32 ctrl;
+
+ ctrl = pps_tio_read(tio, TIOCTL);
+ ctrl &= TIOCTL_EN;
+
+ return sysfs_emit(buf, "%u\n", ctrl);
+}
+static DEVICE_ATTR_RW(enable);
+
+static struct attribute *pps_tio_attrs[] = {
+ &dev_attr_enable.attr,
+ NULL
+};
+ATTRIBUTE_GROUPS(pps_tio);
+
+static int pps_tio_probe(struct platform_device *pdev)
+{
+ struct pps_tio *tio;
+
+ if (!(cpu_feature_enabled(X86_FEATURE_TSC_KNOWN_FREQ) &&
+ cpu_feature_enabled(X86_FEATURE_ART))) {
+ dev_warn(&pdev->dev, "TSC/ART is not enabled");
+ return -ENODEV;
+ }
+
+ tio = devm_kzalloc(&pdev->dev, sizeof(*tio), GFP_KERNEL);
+ if (!tio)
+ return -ENOMEM;
+
+ tio->dev = &pdev->dev;
+ tio->base = devm_platform_ioremap_resource(pdev, 0);
+ if (IS_ERR(tio->base))
+ return PTR_ERR(tio->base);
+
+ pps_tio_disable(tio);
+ hrtimer_init(&tio->timer, CLOCK_REALTIME, HRTIMER_MODE_ABS);
+ tio->timer.function = hrtimer_callback;
+ spin_lock_init(&tio->lock);
+ tio->enabled = false;
+ platform_set_drvdata(pdev, tio);
+
+ return 0;
+}
+
+static int pps_tio_remove(struct platform_device *pdev)
+{
+ struct pps_tio *tio = platform_get_drvdata(pdev);
+
+ hrtimer_cancel(&tio->timer);
+ pps_tio_disable(tio);
+
+ return 0;
+}
+
+static const struct acpi_device_id intel_pmc_tio_acpi_match[] = {
+ { "INTC1021" },
+ { "INTC1022" },
+ { "INTC1023" },
+ { "INTC1024" },
+ {}
+};
+MODULE_DEVICE_TABLE(acpi, intel_pmc_tio_acpi_match);
+
+static struct platform_driver pps_tio_driver = {
+ .probe = pps_tio_probe,
+ .remove = pps_tio_remove,
+ .driver = {
+ .name = "intel-pps-generator",
+ .acpi_match_table = intel_pmc_tio_acpi_match,
+ .dev_groups = pps_tio_groups,
+ },
+};
+module_platform_driver(pps_tio_driver);
+
+MODULE_AUTHOR("Lakshmi Sowjanya D <[email protected]>");
+MODULE_AUTHOR("Christopher Hall <[email protected]>");
+MODULE_AUTHOR("Pandith N <[email protected]>");
+MODULE_AUTHOR("Thejesh Reddy T R <[email protected]>");
+MODULE_DESCRIPTION("Intel PMC Time-Aware IO Generator Driver");
+MODULE_LICENSE("GPL");
--
2.35.3
On Wed, Apr 10, 2024 at 05:18:28PM +0530, [email protected] wrote:
> From: Lakshmi Sowjanya D <[email protected]>
>
> Document sysfs interface for Intel Timed I/O PPS driver.
..
> +Date: March 2024
> +KernelVersion 6.9
This boat is already sailed...
--
With Best Regards,
Andy Shevchenko
On Wed, Apr 10 2024 at 17:18, [email protected] wrote:
> @@ -48,6 +49,7 @@ struct module;
> * @archdata: Optional arch-specific data
> * @max_cycles: Maximum safe cycle value which won't overflow on
> * multiplication
> + * @freq_khz: Clocksource frequency in khz.
> * @name: Pointer to clocksource name
> * @list: List head for registration (internal)
> * @rating: Rating value for selection (higher is better)
> @@ -70,6 +72,8 @@ struct module;
> * validate the clocksource from which the snapshot was
> * taken.
> * @flags: Flags describing special properties
> + * @base: Hardware abstraction for clock on which a clocksource
> + * is based
> * @enable: Optional function to enable the clocksource
> * @disable: Optional function to disable the clocksource
> * @suspend: Optional suspend function for the clocksource
> @@ -105,12 +109,14 @@ struct clocksource {
> struct arch_clocksource_data archdata;
> #endif
> u64 max_cycles;
> + u32 freq_khz;
Q: Why is this a bad place to add this member?
A: Because it creates a 4 byte hole in the data structure.
> const char *name;
> struct list_head list;
While adding it here fills a 4 byte hole.
Hint:
pahole -c clocksource kernel/time/clocksource.o
would have told you that.
> int rating;
> enum clocksource_ids id;
> enum vdso_clock_mode vdso_clock_mode;
> unsigned long flags;
> + struct clocksource_base *base;
> diff --git a/kernel/time/timekeeping.c b/kernel/time/timekeeping.c
> index b58dffc58a8f..2542cfefbdee 100644
> --- a/kernel/time/timekeeping.c
> +++ b/kernel/time/timekeeping.c
> @@ -1193,6 +1193,40 @@ static bool timestamp_in_interval(u64 start, u64 end, u64 ts)
> return false;
> }
>
> +static bool convert_clock(u64 *val, u32 numerator, u32 denominator)
> +{
> + u64 rem, res;
> +
> + if (!numerator || !denominator)
> + return false;
> +
> + res = div64_u64_rem(*val, denominator, &rem) * numerator;
> + *val = res + div_u64(rem * numerator, denominator);
> + return true;
> +}
> +
> +static bool convert_base_to_cs(struct system_counterval_t *scv)
> +{
> + struct clocksource *cs = tk_core.timekeeper.tkr_mono.clock;
> + struct clocksource_base *base = cs->base;
> + u32 num, den;
> +
> + /* The timestamp was taken from the time keeper clock source */
> + if (cs->id == scv->cs_id)
> + return true;
> +
> + /* Check whether cs_id matches the base clock */
> + if (!base || base->id != scv->cs_id)
> + return false;
> +
> + num = scv->use_nsecs ? cs->freq_khz : base->numerator;
> + den = scv->use_nsecs ? USEC_PER_SEC : base->denominator;
> +
> + convert_clock(&scv->cycles, num, den);
Q: Why does this ignore the return value of convert_clock() ?
A: Because all drivers will correctly fill in everything.
Q: Then why does convert_clock() bother to check and have a return
value?
A: Because drivers will fail to correctly fill in everything
Thanks,
tglx
On Wed, Apr 10 2024 at 17:18, [email protected] wrote:
> From: Lakshmi Sowjanya D <[email protected]>
>
> Add base clock hardware abstraction in clocksource structure.
>
> Add clocksource ID for x86 ART(Always Running Timer). The newly added
> clocksource ID and conversion parameters are used to convert time in a
> clocksource domain to base clock and vice versa.
>
> Convert the base clock to the system clock using convert_base_to_cs() in
> get_device_system_crosststamp().
In https://lore.kernel.org/all/875xxhi1ty.ffs@tglx I asked you to
provide a change log which explains the WHY and not the WHAT. The new
change log still fails to explain WHY this change is needed and which
problem it is trying to solve.
I further asked you to do:
1) Add the clocksource_base struct and provide the infrastructure in
get_device_system_crosststamp()
2) Make TSC/ART use it
But this still does #1 and #2 in one go.
If you don't understand my review comments, then please ask. If you
disagree with them then please tell me and argue with me.
Just ignoring them is not an option.
Thanks,
tglx
On Wed, Apr 10 2024 at 17:18, [email protected] wrote:
> +static bool pps_generate_next_pulse(struct pps_tio *tio, ktime_t expires)
> +{
> + u64 art;
> +
> + if (!ktime_real_to_base_clock(expires, CSID_X86_ART, &art)) {
> + pps_tio_disable(tio);
> + return false;
> + }
> +
> + pps_compv_write(tio, art - ART_HW_DELAY_CYCLES);
> + return true;
> +}
> +
> +static enum hrtimer_restart hrtimer_callback(struct hrtimer *timer)
> +{
> + struct pps_tio *tio = container_of(timer, struct pps_tio, timer);
> + ktime_t expires, now;
> + u32 event_count;
> +
> + guard(spinlock)(&tio->lock);
> +
> + /* Check if any event is missed. If an event is missed, TIO will be disabled*/
> + event_count = pps_tio_read(tio, TIOEC);
> + if (!tio->prev_count && tio->prev_count == event_count)
> + goto err;
> + tio->prev_count = event_count;
> + expires = hrtimer_get_expires(timer);
> + now = ktime_get_real();
> +
> + if (now - expires < SAFE_TIME_NS) {
> + if (!pps_generate_next_pulse(tio, expires + SAFE_TIME_NS))
> + goto err;
> + }
If the hrtimer callback is invoked late so that now - expires is >=
SAFE_TIME_NS then this just forwards the timer and tries again.
This lacks any form of explanation why this is correct as obviously
there will be a missing pulse, no?
> + hrtimer_forward(timer, now, NSEC_PER_SEC / 2);
> + return HRTIMER_RESTART;
> +err:
> + dev_err(tio->dev, "Event missed, Disabling Timed I/O");
> + pps_tio_disable(tio);
Why does this disable it again? The failure path in
pps_generate_next_pulse() does so already, no?
> + return HRTIMER_NORESTART;
> +}
> +
Thanks,
tglx
> -----Original Message-----
> From: Thomas Gleixner <[email protected]>
> Sent: Thursday, April 11, 2024 2:51 AM
> To: D, Lakshmi Sowjanya <[email protected]>;
> [email protected]; [email protected]; [email protected]; linux-
> [email protected]
> Cc: [email protected]; [email protected]; [email protected]; intel-
> [email protected]; [email protected]; Dong, Eddie
> <[email protected]>; Hall, Christopher S <[email protected]>;
> Brandeburg, Jesse <[email protected]>; [email protected];
> [email protected]; [email protected];
> [email protected]; [email protected]; [email protected];
> Nguyen, Anthony L <[email protected]>;
> [email protected]; N, Pandith <[email protected]>; Mohan,
> Subramanian <[email protected]>; T R, Thejesh Reddy
> <[email protected]>; D, Lakshmi Sowjanya
> <[email protected]>
> Subject: Re: [PATCH v6 01/11] x86/tsc: Add base clock properties in clocksource
> structure
>
> On Wed, Apr 10 2024 at 17:18, [email protected] wrote:
> > From: Lakshmi Sowjanya D <[email protected]>
> >
> > Add base clock hardware abstraction in clocksource structure.
> >
> > Add clocksource ID for x86 ART(Always Running Timer). The newly added
> > clocksource ID and conversion parameters are used to convert time in a
> > clocksource domain to base clock and vice versa.
> >
> > Convert the base clock to the system clock using convert_base_to_cs()
> > in get_device_system_crosststamp().
>
> In https://lore.kernel.org/all/875xxhi1ty.ffs@tglx I asked you to provide a
> change log which explains the WHY and not the WHAT. The new change log still
> fails to explain WHY this change is needed and which problem it is trying to
> solve.
Rephrased the commit message to:
" Add base clock hardware abstraction in clocksource structure.
The core code has a mechanism to convert the ART base clock to
the corresponding tsc value.
Provide the generic functionality in convert_base_to_cs() to convert
base clock timestamps to system clocksource without requiring
architecture specific parameters.
Add the infrastructure in get_device_system_crosststamp()."
>
> I further asked you to do:
>
> 1) Add the clocksource_base struct and provide the infrastructure in
> get_device_system_crosststamp()
>
> 2) Make TSC/ART use it
>
> But this still does #1 and #2 in one go.
>
> If you don't understand my review comments, then please ask. If you disagree
> with them then please tell me and argue with me.
>
> Just ignoring them is not an option.
Sorry Thomas, that was a mis-understanding. We had split only realtime as separate patch.
We will split the first patch as suggested.
1. Timekeeping part(convert_base_to_cs() and infrastructure in get_device_system_crosststamp())
2. x86(TSC/ART values update into the structure)
Thanks,
Sowjanya
>
> Thanks,
>
> tglx
> -----Original Message-----
> From: Thomas Gleixner <[email protected]>
> Sent: Thursday, April 11, 2024 3:03 AM
> To: D, Lakshmi Sowjanya <[email protected]>;
> [email protected]; [email protected]; [email protected]; linux-
> [email protected]
> Cc: [email protected]; [email protected]; [email protected]; intel-
> [email protected]; [email protected]; Dong, Eddie
> <[email protected]>; Hall, Christopher S <[email protected]>;
> Brandeburg, Jesse <[email protected]>; [email protected];
> [email protected]; [email protected];
> [email protected]; [email protected]; [email protected];
> Nguyen, Anthony L <[email protected]>;
> [email protected]; N, Pandith <[email protected]>; Mohan,
> Subramanian <[email protected]>; T R, Thejesh Reddy
> <[email protected]>; D, Lakshmi Sowjanya
> <[email protected]>
> Subject: Re: [PATCH v6 01/11] x86/tsc: Add base clock properties in clocksource
> structure
>
> On Wed, Apr 10 2024 at 17:18, [email protected] wrote:
> > @@ -48,6 +49,7 @@ struct module;
> > * @archdata: Optional arch-specific data
> > * @max_cycles: Maximum safe cycle value which won't
> overflow on
> > * multiplication
> > + * @freq_khz: Clocksource frequency in khz.
> > * @name: Pointer to clocksource name
> > * @list: List head for registration (internal)
> > * @rating: Rating value for selection (higher is better)
> > @@ -70,6 +72,8 @@ struct module;
> > * validate the clocksource from which the snapshot was
> > * taken.
> > * @flags: Flags describing special properties
> > + * @base: Hardware abstraction for clock on which a clocksource
> > + * is based
> > * @enable: Optional function to enable the clocksource
> > * @disable: Optional function to disable the clocksource
> > * @suspend: Optional suspend function for the clocksource
> > @@ -105,12 +109,14 @@ struct clocksource {
> > struct arch_clocksource_data archdata; #endif
> > u64 max_cycles;
> > + u32 freq_khz;
>
> Q: Why is this a bad place to add this member?
>
> A: Because it creates a 4 byte hole in the data structure.
>
> > const char *name;
> > struct list_head list;
>
> While adding it here fills a 4 byte hole.
>
> Hint:
>
> pahole -c clocksource kernel/time/clocksource.o
>
> would have told you that.
>
> > int rating;
> > enum clocksource_ids id;
> > enum vdso_clock_mode vdso_clock_mode;
> > unsigned long flags;
> > + struct clocksource_base *base;
>
> > diff --git a/kernel/time/timekeeping.c b/kernel/time/timekeeping.c
> > index b58dffc58a8f..2542cfefbdee 100644
> > --- a/kernel/time/timekeeping.c
> > +++ b/kernel/time/timekeeping.c
> > @@ -1193,6 +1193,40 @@ static bool timestamp_in_interval(u64 start, u64
> end, u64 ts)
> > return false;
> > }
> >
> > +static bool convert_clock(u64 *val, u32 numerator, u32 denominator) {
> > + u64 rem, res;
> > +
> > + if (!numerator || !denominator)
> > + return false;
> > +
> > + res = div64_u64_rem(*val, denominator, &rem) * numerator;
> > + *val = res + div_u64(rem * numerator, denominator);
> > + return true;
> > +}
> > +
> > +static bool convert_base_to_cs(struct system_counterval_t *scv) {
> > + struct clocksource *cs = tk_core.timekeeper.tkr_mono.clock;
> > + struct clocksource_base *base = cs->base;
> > + u32 num, den;
> > +
> > + /* The timestamp was taken from the time keeper clock source */
> > + if (cs->id == scv->cs_id)
> > + return true;
> > +
> > + /* Check whether cs_id matches the base clock */
> > + if (!base || base->id != scv->cs_id)
> > + return false;
> > +
> > + num = scv->use_nsecs ? cs->freq_khz : base->numerator;
> > + den = scv->use_nsecs ? USEC_PER_SEC : base->denominator;
> > +
> > + convert_clock(&scv->cycles, num, den);
>
> Q: Why does this ignore the return value of convert_clock() ?
>
> A: Because all drivers will correctly fill in everything.
>
> Q: Then why does convert_clock() bother to check and have a return
> value?
>
> A: Because drivers will fail to correctly fill in everything
Agreed.
Will add a check for error case:
if (!convert_clock(&scv->cycles, num, den))
return false;
Thanks,
Sowjanya
>
> Thanks,
>
> tglx
> -----Original Message-----
> From: Thomas Gleixner <[email protected]>
> Sent: Thursday, April 11, 2024 3:59 AM
> To: D, Lakshmi Sowjanya <[email protected]>;
> [email protected]; [email protected]; [email protected]; linux-
> [email protected]
> Cc: [email protected]; [email protected]; [email protected]; intel-
> [email protected]; [email protected]; Dong, Eddie
> <[email protected]>; Hall, Christopher S <[email protected]>;
> Brandeburg, Jesse <[email protected]>; [email protected];
> [email protected]; [email protected];
> [email protected]; [email protected]; [email protected];
> Nguyen, Anthony L <[email protected]>;
> [email protected]; N, Pandith <[email protected]>; Mohan,
> Subramanian <[email protected]>; T R, Thejesh Reddy
> <[email protected]>; D, Lakshmi Sowjanya
> <[email protected]>
> Subject: Re: [PATCH v6 09/11] pps: generators: Add PPS Generator TIO Driver
>
> On Wed, Apr 10 2024 at 17:18, [email protected] wrote:
> > +static bool pps_generate_next_pulse(struct pps_tio *tio, ktime_t
> > +expires) {
> > + u64 art;
> > +
> > + if (!ktime_real_to_base_clock(expires, CSID_X86_ART, &art)) {
> > + pps_tio_disable(tio);
> > + return false;
> > + }
> > +
> > + pps_compv_write(tio, art - ART_HW_DELAY_CYCLES);
> > + return true;
> > +}
> > +
> > +static enum hrtimer_restart hrtimer_callback(struct hrtimer *timer) {
> > + struct pps_tio *tio = container_of(timer, struct pps_tio, timer);
> > + ktime_t expires, now;
> > + u32 event_count;
> > +
> > + guard(spinlock)(&tio->lock);
> > +
> > + /* Check if any event is missed. If an event is missed, TIO will be
> disabled*/
> > + event_count = pps_tio_read(tio, TIOEC);
> > + if (!tio->prev_count && tio->prev_count == event_count)
> > + goto err;
> > + tio->prev_count = event_count;
> > + expires = hrtimer_get_expires(timer);
> > + now = ktime_get_real();
> > +
> > + if (now - expires < SAFE_TIME_NS) {
> > + if (!pps_generate_next_pulse(tio, expires + SAFE_TIME_NS))
> > + goto err;
> > + }
>
> If the hrtimer callback is invoked late so that now - expires is >= SAFE_TIME_NS
> then this just forwards the timer and tries again.
Yes we will introduce a return HRTIMER_NORESTART if the time is expired.
>
> This lacks any form of explanation why this is correct as obviously there will be a
> missing pulse, no?
We had added an event count check to detect the missed pulse(i.e if we had programmed an expired time).
Timed I/O hardware has an event count register to log the number of pulses generated.
>
> > + hrtimer_forward(timer, now, NSEC_PER_SEC / 2);
> > + return HRTIMER_RESTART;
> > +err:
> > + dev_err(tio->dev, "Event missed, Disabling Timed I/O");
> > + pps_tio_disable(tio);
>
> Why does this disable it again? The failure path in
> pps_generate_next_pulse() does so already, no?
will remove disabling twice in the next version of patchset.
>
> > + return HRTIMER_NORESTART;
> > +}
> > +
>
> Thanks,
>
> tglx