The current DT binding documentation is not ideal as it is just free form
text with at most only a loose structure. This makes reviewing bindings a
manual process. The bindings are often duplicating information that's
already defined elsewhere and missing information one would need to
validate a DTS file. The examples in binding documents are not built and
a source of lots of typos sometimes found in review and sometimes not.
Secondly, there's no verification that DTS files match what the
documentation says. While dtc does do some checking (and has gained more
recently), it can't do per binding checks as it would have to understand
thousands of compatible strings to match on.
There's been a number of proposals over the years to address validation.
They've all suffered from inventing their own validation language and the
effort it would take to fully define and flush out a validation language.
Enter json-schema. The language has a defined specification, maps well to
DT data, and there are numerous existing tools which can be leveraged.
The actual DT schema doc files are stored as YAML using only a JSON
compatible subset. YAML is considered more human readable allowing
comments for example.
This series adds the build support, some documentation, and converts
some bindings (mostly ARM board/soc bindings). The tools, core schema,
and meta-schema are in a separate repository[1]. This might eventually
be integrated with dtc or added to the kernel, but for now I plan to
keep it separate.
Future plans/ideas:
- Validate examples against the schema. Currently, they are just built
with dtc.
- Support single targets in addition to validating all enabled dtb
targets.
- Better control of which schemas to use for validation such as core
only or specific lists of schemas. This will make for more easily
testing new schema and filtering warnings.
- Printing out nodes without any specific schema (i.e. missing schema).
This series is dependent on the dt/next branch and is available here[2].
The branch also has a doc2yaml script which can help convert binding
files. It's not perfect, but works pretty well considering the input is
free form text.
Rob
[1] https://github.com/robherring/yaml-bindings
[2] git://git.kernel.org/pub/scm/linux/kernel/git/robh/linux.git yaml-bindings
Rob Herring (36):
dt-bindings: arm: alpine: Move CPU control related binding to
cpu-enable-method/al,alpine-smp
dt-bindings: arm: amlogic: Move 'amlogic,meson-gx-ao-secure' binding
to its own file
dt-bindings: arm: atmel: Move various sys registers out of SoC binding
doc
dt-bindings: arm: fsl: Move DCFG and SCFG bindings to their own docs
dt-bindings: arm: renesas: Move 'renesas,prr' binding to its own doc
dt-bindings: arm: zte: Move sysctrl bindings to their own doc
kbuild: Add support for DT binding schema checks
dt-bindings: Add a writing DT schemas how-to and annotated example
dt-bindings: Convert trivial-devices.txt to json-schema
dt-bindings: altera: Convert clkmgr binding to json-schema
dt-bindings: timer: Convert ARM timer bindings to json-schema
dt-bindings: arm: Convert cpu binding to json-schema
dt-bindings: arm: Convert PMU binding to json-schema
dt-bindings: arm: Convert primecell binding to json-schema
dt-bindings: arm: Convert Actions Semi bindings to jsonschema
dt-bindings: arm: Convert Alpine board/soc bindings to json-schema
dt-bindings: arm: Convert Altera board/soc bindings to json-schema
dt-bindings: arm: Convert Amlogic board/soc bindings to json-schema
dt-bindings: arm: Convert Atmel board/soc bindings to json-schema
dt-bindings: arm: Convert Calxeda board/soc bindings to json-schema
dt-bindings: arm: Convert TI davinci board/soc bindings to json-schema
dt-bindings: arm: Convert FSL board/soc bindings to json-schema
dt-bindings: arm: Convert MediaTek board/soc bindings to json-schema
dt-bindings: arm: Convert TI nspire board/soc bindings to json-schema
dt-bindings: arm: Convert Oxford Semi board/soc bindings to
json-schema
dt-bindings: arm: Convert QCom board/soc bindings to json-schema
dt-bindings: arm: Convert Realtek board/soc bindings to json-schema
dt-bindings: arm: Convert Rockchip board/soc bindings to json-schema
dt-bindings: arm: Convert Renesas board/soc bindings to json-schema
dt-bindings: arm: Convert CSR SiRF board/soc bindings to json-schema
dt-bindings: arm: Convert SPEAr board/soc bindings to json-schema
dt-bindings: arm: Convert ST STi board/soc bindings to json-schema
dt-bindings: arm: Convert Tegra board/soc bindings to json-schema
dt-bindings: arm: Convert VIA board/soc bindings to json-schema
dt-bindings: arm: Convert Xilinx board/soc bindings to json-schema
dt-bindings: arm: Convert ZTE board/soc bindings to json-schema
.gitignore | 1 +
Documentation/Makefile | 2 +-
Documentation/devicetree/bindings/.gitignore | 2 +
Documentation/devicetree/bindings/Makefile | 30 ++
.../devicetree/bindings/arm/actions.txt | 56 --
.../devicetree/bindings/arm/actions.yaml | 34 ++
.../devicetree/bindings/arm/al,alpine.txt | 88 ---
.../devicetree/bindings/arm/al,alpine.yaml | 21 +
.../devicetree/bindings/arm/altera.txt | 14 -
.../devicetree/bindings/arm/altera.yaml | 20 +
.../arm/altera/socfpga-clk-manager.txt | 11 -
.../arm/altera/socfpga-clk-manager.yaml | 30 ++
.../devicetree/bindings/arm/amlogic.txt | 131 -----
.../devicetree/bindings/arm/amlogic.yaml | 104 ++++
.../amlogic/amlogic,meson-gx-ao-secure.txt | 28 +
.../devicetree/bindings/arm/armadeus.txt | 6 -
.../devicetree/bindings/arm/atmel-at91.yaml | 132 +++++
.../arm/{atmel-at91.txt => atmel-sysregs.txt} | 73 +--
Documentation/devicetree/bindings/arm/bhf.txt | 6 -
.../devicetree/bindings/arm/calxeda.txt | 15 -
.../devicetree/bindings/arm/calxeda.yaml | 22 +
.../bindings/arm/compulab-boards.txt | 25 -
.../arm/cpu-enable-method/al,alpine-smp | 34 +-
.../devicetree/bindings/arm/cpus.txt | 490 -----------------
.../devicetree/bindings/arm/cpus.yaml | 503 ++++++++++++++++++
.../devicetree/bindings/arm/davinci.txt | 25 -
.../arm/freescale/fsl,layerscape-dcfg.txt | 19 +
.../arm/freescale/fsl,layerscape-scfg.txt | 19 +
Documentation/devicetree/bindings/arm/fsl.txt | 224 --------
.../devicetree/bindings/arm/fsl.yaml | 166 ++++++
.../devicetree/bindings/arm/i2se.txt | 22 -
.../devicetree/bindings/arm/mediatek.txt | 79 ---
.../devicetree/bindings/arm/mediatek.yaml | 85 +++
.../devicetree/bindings/arm/nspire.txt | 14 -
.../devicetree/bindings/arm/olimex.txt | 10 -
.../devicetree/bindings/arm/oxnas.txt | 14 -
.../devicetree/bindings/arm/oxnas.yaml | 25 +
Documentation/devicetree/bindings/arm/pmu.txt | 70 ---
.../devicetree/bindings/arm/pmu.yaml | 96 ++++
.../devicetree/bindings/arm/primecell.txt | 46 --
.../devicetree/bindings/arm/primecell.yaml | 35 ++
.../devicetree/bindings/arm/qcom.txt | 57 --
.../devicetree/bindings/arm/qcom.yaml | 125 +++++
.../devicetree/bindings/arm/realtek.txt | 22 -
.../devicetree/bindings/arm/realtek.yaml | 25 +
.../devicetree/bindings/arm/renesas,prr.txt | 18 +
.../devicetree/bindings/arm/rockchip.txt | 220 --------
.../devicetree/bindings/arm/rockchip.yaml | 242 +++++++++
.../devicetree/bindings/arm/shmobile.txt | 161 ------
.../devicetree/bindings/arm/shmobile.yaml | 205 +++++++
.../devicetree/bindings/arm/sirf.txt | 11 -
.../devicetree/bindings/arm/sirf.yaml | 27 +
.../devicetree/bindings/arm/spear.txt | 26 -
.../devicetree/bindings/arm/spear.yaml | 25 +
Documentation/devicetree/bindings/arm/sti.txt | 23 -
.../devicetree/bindings/arm/sti.yaml | 23 +
.../devicetree/bindings/arm/technologic.txt | 23 -
.../devicetree/bindings/arm/tegra.txt | 60 ---
.../devicetree/bindings/arm/tegra.yaml | 88 +++
.../devicetree/bindings/arm/ti/nspire.yaml | 24 +
.../bindings/arm/ti/ti,davinci.yaml | 26 +
.../devicetree/bindings/arm/vt8500.txt | 22 -
.../devicetree/bindings/arm/vt8500.yaml | 23 +
.../devicetree/bindings/arm/xilinx.txt | 83 ---
.../devicetree/bindings/arm/xilinx.yaml | 81 +++
.../bindings/arm/{zte.txt => zte-sysctrl.txt} | 15 +-
.../devicetree/bindings/arm/zte.yaml | 26 +
.../devicetree/bindings/example-schema.yaml | 155 ++++++
.../bindings/timer/arm,arch_timer.txt | 112 ----
.../bindings/timer/arm,arch_timer.yaml | 103 ++++
.../bindings/timer/arm,arch_timer_mmio.yaml | 120 +++++
.../bindings/timer/arm,global_timer.txt | 27 -
.../bindings/timer/arm,global_timer.yaml | 46 ++
.../devicetree/bindings/trivial-devices.txt | 201 -------
.../devicetree/bindings/trivial-devices.yaml | 414 ++++++++++++++
Documentation/devicetree/writing-schema.md | 111 ++++
Makefile | 8 +-
scripts/Makefile.lib | 24 +-
78 files changed, 3344 insertions(+), 2485 deletions(-)
create mode 100644 Documentation/devicetree/bindings/.gitignore
create mode 100644 Documentation/devicetree/bindings/Makefile
delete mode 100644 Documentation/devicetree/bindings/arm/actions.txt
create mode 100644 Documentation/devicetree/bindings/arm/actions.yaml
delete mode 100644 Documentation/devicetree/bindings/arm/al,alpine.txt
create mode 100644 Documentation/devicetree/bindings/arm/al,alpine.yaml
delete mode 100644 Documentation/devicetree/bindings/arm/altera.txt
create mode 100644 Documentation/devicetree/bindings/arm/altera.yaml
delete mode 100644 Documentation/devicetree/bindings/arm/altera/socfpga-clk-manager.txt
create mode 100644 Documentation/devicetree/bindings/arm/altera/socfpga-clk-manager.yaml
delete mode 100644 Documentation/devicetree/bindings/arm/amlogic.txt
create mode 100644 Documentation/devicetree/bindings/arm/amlogic.yaml
create mode 100644 Documentation/devicetree/bindings/arm/amlogic/amlogic,meson-gx-ao-secure.txt
delete mode 100644 Documentation/devicetree/bindings/arm/armadeus.txt
create mode 100644 Documentation/devicetree/bindings/arm/atmel-at91.yaml
rename Documentation/devicetree/bindings/arm/{atmel-at91.txt => atmel-sysregs.txt} (67%)
delete mode 100644 Documentation/devicetree/bindings/arm/bhf.txt
delete mode 100644 Documentation/devicetree/bindings/arm/calxeda.txt
create mode 100644 Documentation/devicetree/bindings/arm/calxeda.yaml
delete mode 100644 Documentation/devicetree/bindings/arm/compulab-boards.txt
delete mode 100644 Documentation/devicetree/bindings/arm/cpus.txt
create mode 100644 Documentation/devicetree/bindings/arm/cpus.yaml
delete mode 100644 Documentation/devicetree/bindings/arm/davinci.txt
create mode 100644 Documentation/devicetree/bindings/arm/freescale/fsl,layerscape-dcfg.txt
create mode 100644 Documentation/devicetree/bindings/arm/freescale/fsl,layerscape-scfg.txt
delete mode 100644 Documentation/devicetree/bindings/arm/fsl.txt
create mode 100644 Documentation/devicetree/bindings/arm/fsl.yaml
delete mode 100644 Documentation/devicetree/bindings/arm/i2se.txt
delete mode 100644 Documentation/devicetree/bindings/arm/mediatek.txt
create mode 100644 Documentation/devicetree/bindings/arm/mediatek.yaml
delete mode 100644 Documentation/devicetree/bindings/arm/nspire.txt
delete mode 100644 Documentation/devicetree/bindings/arm/olimex.txt
delete mode 100644 Documentation/devicetree/bindings/arm/oxnas.txt
create mode 100644 Documentation/devicetree/bindings/arm/oxnas.yaml
delete mode 100644 Documentation/devicetree/bindings/arm/pmu.txt
create mode 100644 Documentation/devicetree/bindings/arm/pmu.yaml
delete mode 100644 Documentation/devicetree/bindings/arm/primecell.txt
create mode 100644 Documentation/devicetree/bindings/arm/primecell.yaml
delete mode 100644 Documentation/devicetree/bindings/arm/qcom.txt
create mode 100644 Documentation/devicetree/bindings/arm/qcom.yaml
delete mode 100644 Documentation/devicetree/bindings/arm/realtek.txt
create mode 100644 Documentation/devicetree/bindings/arm/realtek.yaml
create mode 100644 Documentation/devicetree/bindings/arm/renesas,prr.txt
delete mode 100644 Documentation/devicetree/bindings/arm/rockchip.txt
create mode 100644 Documentation/devicetree/bindings/arm/rockchip.yaml
delete mode 100644 Documentation/devicetree/bindings/arm/shmobile.txt
create mode 100644 Documentation/devicetree/bindings/arm/shmobile.yaml
delete mode 100644 Documentation/devicetree/bindings/arm/sirf.txt
create mode 100644 Documentation/devicetree/bindings/arm/sirf.yaml
delete mode 100644 Documentation/devicetree/bindings/arm/spear.txt
create mode 100644 Documentation/devicetree/bindings/arm/spear.yaml
delete mode 100644 Documentation/devicetree/bindings/arm/sti.txt
create mode 100644 Documentation/devicetree/bindings/arm/sti.yaml
delete mode 100644 Documentation/devicetree/bindings/arm/technologic.txt
delete mode 100644 Documentation/devicetree/bindings/arm/tegra.txt
create mode 100644 Documentation/devicetree/bindings/arm/tegra.yaml
create mode 100644 Documentation/devicetree/bindings/arm/ti/nspire.yaml
create mode 100644 Documentation/devicetree/bindings/arm/ti/ti,davinci.yaml
delete mode 100644 Documentation/devicetree/bindings/arm/vt8500.txt
create mode 100644 Documentation/devicetree/bindings/arm/vt8500.yaml
delete mode 100644 Documentation/devicetree/bindings/arm/xilinx.txt
create mode 100644 Documentation/devicetree/bindings/arm/xilinx.yaml
rename Documentation/devicetree/bindings/arm/{zte.txt => zte-sysctrl.txt} (62%)
create mode 100644 Documentation/devicetree/bindings/arm/zte.yaml
create mode 100644 Documentation/devicetree/bindings/example-schema.yaml
delete mode 100644 Documentation/devicetree/bindings/timer/arm,arch_timer.txt
create mode 100644 Documentation/devicetree/bindings/timer/arm,arch_timer.yaml
create mode 100644 Documentation/devicetree/bindings/timer/arm,arch_timer_mmio.yaml
delete mode 100644 Documentation/devicetree/bindings/timer/arm,global_timer.txt
create mode 100644 Documentation/devicetree/bindings/timer/arm,global_timer.yaml
delete mode 100644 Documentation/devicetree/bindings/trivial-devices.txt
create mode 100644 Documentation/devicetree/bindings/trivial-devices.yaml
create mode 100644 Documentation/devicetree/writing-schema.md
--
2.17.1
Convert QCom SoC bindings to DT schema format using json-schema.
Cc: Andy Gross <[email protected]>
Cc: David Brown <[email protected]>
Cc: Mark Rutland <[email protected]>
Cc: [email protected]
Signed-off-by: Rob Herring <[email protected]>
---
.../devicetree/bindings/arm/qcom.txt | 57 --------
.../devicetree/bindings/arm/qcom.yaml | 125 ++++++++++++++++++
2 files changed, 125 insertions(+), 57 deletions(-)
delete mode 100644 Documentation/devicetree/bindings/arm/qcom.txt
create mode 100644 Documentation/devicetree/bindings/arm/qcom.yaml
diff --git a/Documentation/devicetree/bindings/arm/qcom.txt b/Documentation/devicetree/bindings/arm/qcom.txt
deleted file mode 100644
index ee532e705d6c..000000000000
--- a/Documentation/devicetree/bindings/arm/qcom.txt
+++ /dev/null
@@ -1,57 +0,0 @@
-QCOM device tree bindings
--------------------------
-
-Some qcom based bootloaders identify the dtb blob based on a set of
-device properties like SoC and platform and revisions of those components.
-To support this scheme, we encode this information into the board compatible
-string.
-
-Each board must specify a top-level board compatible string with the following
-format:
-
- compatible = "qcom,<SoC>[-<soc_version>][-<foundry_id>]-<board>[/<subtype>][-<board_version>]"
-
-The 'SoC' and 'board' elements are required. All other elements are optional.
-
-The 'SoC' element must be one of the following strings:
-
- apq8016
- apq8074
- apq8084
- apq8096
- msm8916
- msm8974
- msm8992
- msm8994
- msm8996
- mdm9615
- ipq8074
- sdm845
-
-The 'board' element must be one of the following strings:
-
- cdp
- liquid
- dragonboard
- mtp
- sbc
- hk01
-
-The 'soc_version' and 'board_version' elements take the form of v<Major>.<Minor>
-where the minor number may be omitted when it's zero, i.e. v1.0 is the same
-as v1. If all versions of the 'board_version' elements match, then a
-wildcard '*' should be used, e.g. 'v*'.
-
-The 'foundry_id' and 'subtype' elements are one or more digits from 0 to 9.
-
-Examples:
-
- "qcom,msm8916-v1-cdp-pm8916-v2.1"
-
-A CDP board with an msm8916 SoC, version 1 paired with a pm8916 PMIC of version
-2.1.
-
- "qcom,apq8074-v2.0-2-dragonboard/1-v0.1"
-
-A dragonboard board v0.1 of subtype 1 with an apq8074 SoC version 2, made in
-foundry 2.
diff --git a/Documentation/devicetree/bindings/arm/qcom.yaml b/Documentation/devicetree/bindings/arm/qcom.yaml
new file mode 100644
index 000000000000..d8fcd8deed5c
--- /dev/null
+++ b/Documentation/devicetree/bindings/arm/qcom.yaml
@@ -0,0 +1,125 @@
+# SPDX-License-Identifier: None
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/bindings/arm/qcom.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: QCOM device tree bindings
+
+maintainers:
+ - Stephen Boyd <[email protected]>
+
+description: |
+ Some qcom based bootloaders identify the dtb blob based on a set of
+ device properties like SoC and platform and revisions of those components.
+ To support this scheme, we encode this information into the board compatible
+ string.
+
+ Each board must specify a top-level board compatible string with the following
+ format:
+
+ compatible = "qcom,<SoC>[-<soc_version>][-<foundry_id>]-<board>[/<subtype>][-<board_version>]"
+
+ The 'SoC' and 'board' elements are required. All other elements are optional.
+
+ The 'SoC' element must be one of the following strings:
+
+ apq8016
+ apq8074
+ apq8084
+ apq8096
+ msm8916
+ msm8974
+ msm8992
+ msm8994
+ msm8996
+ mdm9615
+ ipq8074
+ sdm845
+
+ The 'board' element must be one of the following strings:
+
+ cdp
+ liquid
+ dragonboard
+ mtp
+ sbc
+ hk01
+
+ The 'soc_version' and 'board_version' elements take the form of v<Major>.<Minor>
+ where the minor number may be omitted when it's zero, i.e. v1.0 is the same
+ as v1. If all versions of the 'board_version' elements match, then a
+ wildcard '*' should be used, e.g. 'v*'.
+
+ The 'foundry_id' and 'subtype' elements are one or more digits from 0 to 9.
+
+ Examples:
+
+ "qcom,msm8916-v1-cdp-pm8916-v2.1"
+
+ A CDP board with an msm8916 SoC, version 1 paired with a pm8916 PMIC of version
+ 2.1.
+
+ "qcom,apq8074-v2.0-2-dragonboard/1-v0.1"
+
+ A dragonboard board v0.1 of subtype 1 with an apq8074 SoC version 2, made in
+ foundry 2.
+
+properties:
+ compatible:
+ oneOf:
+ - items:
+ - enum:
+ - qcom,apq8016-sbc
+ - const: qcom,apq8016
+
+ - items:
+ - enum:
+ - qcom,apq8064-cm-qs600
+ - qcom,apq8064-ifc6410
+ - const: qcom,apq8064
+
+ - items:
+ - enum:
+ - qcom,apq8074-dragonboard
+ - const: qcom,apq8074
+
+ - items:
+ - enum:
+ - qcom,apq8060-dragonboard
+ - qcom,msm8660-surf
+ - const: qcom,msm8660
+
+ - items:
+ - enum:
+ - qcom,apq8084-mtp
+ - qcom,apq8084-sbc
+ - const: qcom,apq8084
+
+ - items:
+ - enum:
+ - qcom,msm8960-cdp
+ - const: qcom,msm8960
+
+ - items:
+ - const: qcom,msm8916-mtp/1
+ - const: qcom,msm8916-mtp
+ - const: qcom,msm8916
+
+ - items:
+ - const: qcom,msm8996-mtp
+
+ - items:
+ - const: qcom,ipq4019
+
+ - items:
+ - enum:
+ - qcom,ipq8064-ap148
+ - const: qcom,ipq8064
+
+ - items:
+ - enum:
+ - qcom,ipq8074-hk01
+ - const: qcom,ipq8074
+
+...
--
2.17.1
Convert ZTE SoC bindings to DT schema format using json-schema.
Cc: Jun Nie <[email protected]>
Cc: Baoyou Xie <[email protected]>
Cc: Shawn Guo <[email protected]>
Cc: Mark Rutland <[email protected]>
Cc: [email protected]
Cc: [email protected]
Signed-off-by: Rob Herring <[email protected]>
---
Documentation/devicetree/bindings/arm/zte.txt | 14 ----------
.../devicetree/bindings/arm/zte.yaml | 26 +++++++++++++++++++
2 files changed, 26 insertions(+), 14 deletions(-)
delete mode 100644 Documentation/devicetree/bindings/arm/zte.txt
create mode 100644 Documentation/devicetree/bindings/arm/zte.yaml
diff --git a/Documentation/devicetree/bindings/arm/zte.txt b/Documentation/devicetree/bindings/arm/zte.txt
deleted file mode 100644
index 340612794a37..000000000000
--- a/Documentation/devicetree/bindings/arm/zte.txt
+++ /dev/null
@@ -1,14 +0,0 @@
-ZTE platforms device tree bindings
-
----------------------------------------
-- ZX296702 board:
- Required root node properties:
- - compatible = "zte,zx296702-ad1", "zte,zx296702"
-
----------------------------------------
-- ZX296718 SoC:
- Required root node properties:
- - compatible = "zte,zx296718"
-
-ZX296718 EVB board:
- - "zte,zx296718-evb"
diff --git a/Documentation/devicetree/bindings/arm/zte.yaml b/Documentation/devicetree/bindings/arm/zte.yaml
new file mode 100644
index 000000000000..147bd78f27ed
--- /dev/null
+++ b/Documentation/devicetree/bindings/arm/zte.yaml
@@ -0,0 +1,26 @@
+# SPDX-License-Identifier: None
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/bindings/arm/zte.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: ZTE platforms device tree bindings
+
+maintainers:
+ - Jun Nie <[email protected]>
+
+properties:
+ $nodename:
+ const: '/'
+ compatible:
+ oneOf:
+ - items:
+ - enum:
+ - zte,zx296702-ad1
+ - const: zte,zx296702
+ - items:
+ - enum:
+ - zte,zx296718-evb
+ - const: zte,zx296718
+
+...
--
2.17.1
Convert Xilinx SoC bindings to DT schema format using json-schema.
Cc: Mark Rutland <[email protected]>
Cc: Michal Simek <[email protected]>
Cc: [email protected]
Cc: [email protected]
Signed-off-by: Rob Herring <[email protected]>
---
.../devicetree/bindings/arm/xilinx.txt | 83 -------------------
.../devicetree/bindings/arm/xilinx.yaml | 81 ++++++++++++++++++
2 files changed, 81 insertions(+), 83 deletions(-)
delete mode 100644 Documentation/devicetree/bindings/arm/xilinx.txt
create mode 100644 Documentation/devicetree/bindings/arm/xilinx.yaml
diff --git a/Documentation/devicetree/bindings/arm/xilinx.txt b/Documentation/devicetree/bindings/arm/xilinx.txt
deleted file mode 100644
index 26fe5ecc4332..000000000000
--- a/Documentation/devicetree/bindings/arm/xilinx.txt
+++ /dev/null
@@ -1,83 +0,0 @@
-Xilinx Zynq Platforms Device Tree Bindings
-
-Boards with Zynq-7000 SOC based on an ARM Cortex A9 processor
-shall have the following properties.
-
-Required root node properties:
- - compatible = "xlnx,zynq-7000";
-
-Additional compatible strings:
-
-- Adapteva Parallella board
- "adapteva,parallella"
-
-- Avnet MicroZed board
- "avnet,zynq-microzed"
- "xlnx,zynq-microzed"
-
-- Avnet ZedBoard board
- "avnet,zynq-zed"
- "xlnx,zynq-zed"
-
-- Digilent Zybo board
- "digilent,zynq-zybo"
-
-- Digilent Zybo Z7 board
- "digilent,zynq-zybo-z7"
-
-- Xilinx CC108 internal board
- "xlnx,zynq-cc108"
-
-- Xilinx ZC702 internal board
- "xlnx,zynq-zc702"
-
-- Xilinx ZC706 internal board
- "xlnx,zynq-zc706"
-
-- Xilinx ZC770 internal board, with different FMC cards
- "xlnx,zynq-zc770-xm010"
- "xlnx,zynq-zc770-xm011"
- "xlnx,zynq-zc770-xm012"
- "xlnx,zynq-zc770-xm013"
-
----------------------------------------------------------------
-
-Xilinx Zynq UltraScale+ MPSoC Platforms Device Tree Bindings
-
-Boards with ZynqMP SOC based on an ARM Cortex A53 processor
-shall have the following properties.
-
-Required root node properties:
- - compatible = "xlnx,zynqmp";
-
-
-Additional compatible strings:
-
-- Xilinx internal board zc1232
- "xlnx,zynqmp-zc1232-revA", "xlnx,zynqmp-zc1232"
-
-- Xilinx internal board zc1254
- "xlnx,zynqmp-zc1254-revA", "xlnx,zynqmp-zc1254"
-
-- Xilinx internal board zc1275
- "xlnx,zynqmp-zc1275-revA", "xlnx,zynqmp-zc1275"
-
-- Xilinx internal board zc1751
- "xlnx,zynqmp-zc1751"
-
-- Xilinx 96boards compatible board zcu100
- "xlnx,zynqmp-zcu100-revC", "xlnx,zynqmp-zcu100"
-
-- Xilinx evaluation board zcu102
- "xlnx,zynqmp-zcu102-revA", "xlnx,zynqmp-zcu102"
- "xlnx,zynqmp-zcu102-revB", "xlnx,zynqmp-zcu102"
- "xlnx,zynqmp-zcu102-rev1.0", "xlnx,zynqmp-zcu102"
-
-- Xilinx evaluation board zcu104
- "xlnx,zynqmp-zcu104-revA", "xlnx,zynqmp-zcu104"
-
-- Xilinx evaluation board zcu106
- "xlnx,zynqmp-zcu106-revA", "xlnx,zynqmp-zcu106"
-
-- Xilinx evaluation board zcu111
- "xlnx,zynqmp-zcu111-revA", "xlnx,zynqmp-zcu111"
diff --git a/Documentation/devicetree/bindings/arm/xilinx.yaml b/Documentation/devicetree/bindings/arm/xilinx.yaml
new file mode 100644
index 000000000000..dd227bccf015
--- /dev/null
+++ b/Documentation/devicetree/bindings/arm/xilinx.yaml
@@ -0,0 +1,81 @@
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/soc/arm/xilinx.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: Xilinx Zynq Platforms Device Tree Bindings
+
+maintainers:
+ - Michal Simek <[email protected]>
+
+description: |
+ Xilinx boards with Zynq-7000 SOC or Zynq UltraScale+ MPSoC
+
+properties:
+ $nodename:
+ const: '/'
+ compatible:
+ oneOf:
+ - items:
+ - enum:
+ - adapteva,parallella
+ - digilent,zynq-zybo
+ - digilent,zynq-zybo-z7
+ - xlnx,zynq-cc108
+ - xlnx,zynq-zc702
+ - xlnx,zynq-zc706
+ - xlnx,zynq-zc770-xm010
+ - xlnx,zynq-zc770-xm011
+ - xlnx,zynq-zc770-xm012
+ - xlnx,zynq-zc770-xm013
+ - const: xlnx,zynq-7000
+
+ - items:
+ - const: avnet,zynq-microzed
+ - const: xlnx,zynq-microzed
+ - const: xlnx,zynq-7000
+
+ - items:
+ - const: avnet,zynq-zed
+ - const: xlnx,zynq-zed
+ - const: xlnx,zynq-7000
+
+ - items:
+ - enum:
+ - xlnx,zynqmp-zc1751
+ - const: xlnx,zynqmp
+
+ - description: Xilinx internal board zc1232
+ items:
+ - const: xlnx,zynqmp-zc1232-revA
+ - const: xlnx,zynqmp-zc1232
+ - const: xlnx,zynqmp
+
+ - description: Xilinx internal board zc1254
+ items:
+ - const: xlnx,zynqmp-zc1254-revA
+ - const: xlnx,zynqmp-zc1254
+ - const: xlnx,zynqmp
+
+ - description: Xilinx internal board zc1275
+ items:
+ - const: xlnx,zynqmp-zc1275-revA
+ - const: xlnx,zynqmp-zc1275
+ - const: xlnx,zynqmp
+
+ - description: Xilinx 96boards compatible board zcu100
+ items:
+ - const: xlnx,zynqmp-zcu100-revC
+ - const: xlnx,zynqmp-zcu100
+ - const: xlnx,zynqmp
+
+ - description: Xilinx evaluation board zcu102
+ items:
+ - enum:
+ - xlnx,zynqmp-zcu102-revA
+ - xlnx,zynqmp-zcu102-revB
+ - xlnx,zynqmp-zcu102-rev1.0
+ - const: xlnx,zynqmp-zcu102
+ - const: xlnx,zynqmp
+
+...
--
2.17.1
Convert VIA SoC bindings to DT schema format using json-schema.
Cc: Tony Prisk <[email protected]>
Cc: Mark Rutland <[email protected]>
Cc: [email protected]
Signed-off-by: Rob Herring <[email protected]>
---
.../devicetree/bindings/arm/vt8500.txt | 22 ------------------
.../devicetree/bindings/arm/vt8500.yaml | 23 +++++++++++++++++++
2 files changed, 23 insertions(+), 22 deletions(-)
delete mode 100644 Documentation/devicetree/bindings/arm/vt8500.txt
create mode 100644 Documentation/devicetree/bindings/arm/vt8500.yaml
diff --git a/Documentation/devicetree/bindings/arm/vt8500.txt b/Documentation/devicetree/bindings/arm/vt8500.txt
deleted file mode 100644
index 87dc1ddf4770..000000000000
--- a/Documentation/devicetree/bindings/arm/vt8500.txt
+++ /dev/null
@@ -1,22 +0,0 @@
-VIA/Wondermedia VT8500 Platforms Device Tree Bindings
----------------------------------------
-
-Boards with the VIA VT8500 SoC shall have the following properties:
-Required root node property:
-compatible = "via,vt8500";
-
-Boards with the Wondermedia WM8505 SoC shall have the following properties:
-Required root node property:
-compatible = "wm,wm8505";
-
-Boards with the Wondermedia WM8650 SoC shall have the following properties:
-Required root node property:
-compatible = "wm,wm8650";
-
-Boards with the Wondermedia WM8750 SoC shall have the following properties:
-Required root node property:
-compatible = "wm,wm8750";
-
-Boards with the Wondermedia WM8850 SoC shall have the following properties:
-Required root node property:
-compatible = "wm,wm8850";
diff --git a/Documentation/devicetree/bindings/arm/vt8500.yaml b/Documentation/devicetree/bindings/arm/vt8500.yaml
new file mode 100644
index 000000000000..6e07775b160f
--- /dev/null
+++ b/Documentation/devicetree/bindings/arm/vt8500.yaml
@@ -0,0 +1,23 @@
+# SPDX-License-Identifier: None
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/bindings/arm/vt8500.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: VIA/Wondermedia VT8500 Platforms Device Tree Bindings
+
+maintainers:
+ - Tony Prisk <[email protected]>
+description: test
+
+properties:
+ $nodename:
+ const: '/'
+ compatible:
+ items:
+ - enum:
+ - via,vt8500
+ - wm,wm8505
+ - wm,wm8650
+ - wm,wm8750
+ - wm,wm8850
--
2.17.1
Convert Tegra SoC bindings to DT schema format using json-schema.
Cc: Mark Rutland <[email protected]>
Cc: Thierry Reding <[email protected]>
Cc: Jonathan Hunter <[email protected]>
Cc: [email protected]
Cc: [email protected]
Signed-off-by: Rob Herring <[email protected]>
---
.../devicetree/bindings/arm/tegra.txt | 60 -------------
.../devicetree/bindings/arm/tegra.yaml | 88 +++++++++++++++++++
2 files changed, 88 insertions(+), 60 deletions(-)
delete mode 100644 Documentation/devicetree/bindings/arm/tegra.txt
create mode 100644 Documentation/devicetree/bindings/arm/tegra.yaml
diff --git a/Documentation/devicetree/bindings/arm/tegra.txt b/Documentation/devicetree/bindings/arm/tegra.txt
deleted file mode 100644
index 32f62bb7006d..000000000000
--- a/Documentation/devicetree/bindings/arm/tegra.txt
+++ /dev/null
@@ -1,60 +0,0 @@
-NVIDIA Tegra device tree bindings
--------------------------------------------
-
-SoCs
--------------------------------------------
-
-Each device tree must specify which Tegra SoC it uses, using one of the
-following compatible values:
-
- nvidia,tegra20
- nvidia,tegra30
- nvidia,tegra114
- nvidia,tegra124
- nvidia,tegra132
- nvidia,tegra210
- nvidia,tegra186
- nvidia,tegra194
-
-Boards
--------------------------------------------
-
-Each device tree must specify which one or more of the following
-board-specific compatible values:
-
- ad,medcom-wide
- ad,plutux
- ad,tamonten
- ad,tec
- compal,paz00
- compulab,trimslice
- nvidia,beaver
- nvidia,cardhu
- nvidia,cardhu-a02
- nvidia,cardhu-a04
- nvidia,dalmore
- nvidia,harmony
- nvidia,jetson-tk1
- nvidia,norrin
- nvidia,p2371-0000
- nvidia,p2371-2180
- nvidia,p2571
- nvidia,p2771-0000
- nvidia,p2972-0000
- nvidia,roth
- nvidia,seaboard
- nvidia,tn7
- nvidia,ventana
- toradex,apalis_t30
- toradex,apalis_t30-eval
- toradex,apalis-tk1
- toradex,apalis-tk1-eval
- toradex,colibri_t20-512
- toradex,colibri_t30
- toradex,colibri_t30-eval-v3
- toradex,iris
-
-Trusted Foundations
--------------------------------------------
-Tegra supports the Trusted Foundation secure monitor. See the
-"tlm,trusted-foundations" binding's documentation for more details.
diff --git a/Documentation/devicetree/bindings/arm/tegra.yaml b/Documentation/devicetree/bindings/arm/tegra.yaml
new file mode 100644
index 000000000000..9cebcfaaad1e
--- /dev/null
+++ b/Documentation/devicetree/bindings/arm/tegra.yaml
@@ -0,0 +1,88 @@
+# SPDX-License-Identifier: None
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/bindings/arm/tegra.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: NVIDIA Tegra device tree bindings
+
+maintainers:
+ - Marcel Ziswiler <[email protected]>
+ - Peter De Schrijver <[email protected]>
+
+properties:
+ compatible:
+ oneOf:
+ - items:
+ - enum:
+ - compal,paz00
+ - compulab,trimslice
+ - nvidia,harmony
+ - nvidia,seaboard
+ - nvidia,ventana
+ - const: nvidia,tegra20
+ - items:
+ - enum:
+ - ad,medcom-wide
+ - ad,plutux
+ - ad,tec
+ - const: ad,tamonten
+ - const: nvidia,tegra20
+ - items:
+ - const: toradex,iris
+ - const: toradex,colibri_t20-512
+ - const: nvidia,tegra20
+ - items:
+ - enum:
+ - nvidia,beaver
+ - const: nvidia,tegra30
+ - items:
+ - enum:
+ - nvidia,cardhu-a02
+ - nvidia,cardhu-a04
+ - const: nvidia,cardhu
+ - const: nvidia,tegra30
+ - items:
+ - enum:
+ - toradex,apalis_t30-eval
+ - const: toradex,apalis_t30
+ - const: nvidia,tegra30
+ - items:
+ - enum:
+ - toradex,colibri_t30-eval-v3
+ - const: toradex,colibri_t30
+ - const: nvidia,tegra30
+ - items:
+ - enum:
+ - nvidia,dalmore
+ - nvidia,roth
+ - nvidia,tn7
+ - const: nvidia,tegra114
+ - items:
+ - enum:
+ - nvidia,jetson-tk1
+ - nvidia,venice2
+ - const: nvidia,tegra124
+ - items:
+ - const: toradex,apalis-tk1-eval
+ - const: toradex,apalis-tk1
+ - const: nvidia,tegra124
+ - items:
+ - enum:
+ - nvidia,norrin
+ - const: nvidia,tegra132
+ - const: nvidia,tegra124
+ - items:
+ - enum:
+ - nvidia,p2371-0000
+ - nvidia,p2371-2180
+ - nvidia,p2571
+ - const: nvidia,tegra210
+ - items:
+ - enum:
+ - nvidia,p2771-0000
+ - const: nvidia,tegra186
+ - items:
+ - enum:
+ - nvidia,p2972-0000
+ - const: nvidia,tegra194
--
2.17.1
Convert SPEAr SoC bindings to DT schema format using json-schema.
Cc: Viresh Kumar <[email protected]>
Cc: Shiraz Hashim <[email protected]>
Cc: Mark Rutland <[email protected]>
Cc: [email protected]
Signed-off-by: Rob Herring <[email protected]>
---
.../devicetree/bindings/arm/spear.txt | 26 -------------------
.../devicetree/bindings/arm/spear.yaml | 25 ++++++++++++++++++
2 files changed, 25 insertions(+), 26 deletions(-)
delete mode 100644 Documentation/devicetree/bindings/arm/spear.txt
create mode 100644 Documentation/devicetree/bindings/arm/spear.yaml
diff --git a/Documentation/devicetree/bindings/arm/spear.txt b/Documentation/devicetree/bindings/arm/spear.txt
deleted file mode 100644
index 0d42949df6c2..000000000000
--- a/Documentation/devicetree/bindings/arm/spear.txt
+++ /dev/null
@@ -1,26 +0,0 @@
-ST SPEAr Platforms Device Tree Bindings
----------------------------------------
-
-Boards with the ST SPEAr600 SoC shall have the following properties:
-Required root node property:
-compatible = "st,spear600";
-
-Boards with the ST SPEAr300 SoC shall have the following properties:
-Required root node property:
-compatible = "st,spear300";
-
-Boards with the ST SPEAr310 SoC shall have the following properties:
-Required root node property:
-compatible = "st,spear310";
-
-Boards with the ST SPEAr320 SoC shall have the following properties:
-Required root node property:
-compatible = "st,spear320";
-
-Boards with the ST SPEAr1310 SoC shall have the following properties:
-Required root node property:
-compatible = "st,spear1310";
-
-Boards with the ST SPEAr1340 SoC shall have the following properties:
-Required root node property:
-compatible = "st,spear1340";
diff --git a/Documentation/devicetree/bindings/arm/spear.yaml b/Documentation/devicetree/bindings/arm/spear.yaml
new file mode 100644
index 000000000000..6ce8ef979390
--- /dev/null
+++ b/Documentation/devicetree/bindings/arm/spear.yaml
@@ -0,0 +1,25 @@
+# SPDX-License-Identifier: None
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/bindings/arm/spear.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: ST SPEAr Platforms Device Tree Bindings
+
+maintainers:
+ - Viresh Kumar <[email protected]>
+ - Stefan Roese <[email protected]>
+
+properties:
+ $nodename:
+ const: '/'
+ compatible:
+ items:
+ - enum:
+ - st,spear600
+ - st,spear300
+ - st,spear310
+ - st,spear320
+ - st,spear1310
+ - st,spear1340
+...
--
2.17.1
Convert ST STi SoC bindings to DT schema format using json-schema.
Cc: Patrice Chotard <[email protected]>
Cc: Mark Rutland <[email protected]>
Cc: [email protected]
Signed-off-by: Rob Herring <[email protected]>
---
Documentation/devicetree/bindings/arm/sti.txt | 23 -------------------
.../devicetree/bindings/arm/sti.yaml | 23 +++++++++++++++++++
2 files changed, 23 insertions(+), 23 deletions(-)
delete mode 100644 Documentation/devicetree/bindings/arm/sti.txt
create mode 100644 Documentation/devicetree/bindings/arm/sti.yaml
diff --git a/Documentation/devicetree/bindings/arm/sti.txt b/Documentation/devicetree/bindings/arm/sti.txt
deleted file mode 100644
index 8d27f6b084c7..000000000000
--- a/Documentation/devicetree/bindings/arm/sti.txt
+++ /dev/null
@@ -1,23 +0,0 @@
-ST STi Platforms Device Tree Bindings
----------------------------------------
-
-Boards with the ST STiH415 SoC shall have the following properties:
-Required root node property:
-compatible = "st,stih415";
-
-Boards with the ST STiH416 SoC shall have the following properties:
-Required root node property:
-compatible = "st,stih416";
-
-Boards with the ST STiH407 SoC shall have the following properties:
-Required root node property:
-compatible = "st,stih407";
-
-Boards with the ST STiH410 SoC shall have the following properties:
-Required root node property:
-compatible = "st,stih410";
-
-Boards with the ST STiH418 SoC shall have the following properties:
-Required root node property:
-compatible = "st,stih418";
-
diff --git a/Documentation/devicetree/bindings/arm/sti.yaml b/Documentation/devicetree/bindings/arm/sti.yaml
new file mode 100644
index 000000000000..10814334cfc9
--- /dev/null
+++ b/Documentation/devicetree/bindings/arm/sti.yaml
@@ -0,0 +1,23 @@
+# SPDX-License-Identifier: None
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/bindings/arm/sti.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: ST STi Platforms Device Tree Bindings
+
+maintainers:
+ - Maxime Coquelin <[email protected]>
+
+properties:
+ $nodename:
+ const: '/'
+ compatible:
+ items:
+ - enum:
+ - st,stih415
+ - st,stih416
+ - st,stih407
+ - st,stih410
+ - st,stih418
+...
--
2.17.1
Convert Renesas SoC bindings to DT schema format using json-schema.
Cc: Simon Horman <[email protected]>
Cc: Magnus Damm <[email protected]>
Cc: Mark Rutland <[email protected]>
Cc: [email protected]
Cc: [email protected]
Signed-off-by: Rob Herring <[email protected]>
---
.../devicetree/bindings/arm/shmobile.txt | 143 ------------
.../devicetree/bindings/arm/shmobile.yaml | 205 ++++++++++++++++++
2 files changed, 205 insertions(+), 143 deletions(-)
delete mode 100644 Documentation/devicetree/bindings/arm/shmobile.txt
create mode 100644 Documentation/devicetree/bindings/arm/shmobile.yaml
diff --git a/Documentation/devicetree/bindings/arm/shmobile.txt b/Documentation/devicetree/bindings/arm/shmobile.txt
deleted file mode 100644
index 619b765e5bee..000000000000
--- a/Documentation/devicetree/bindings/arm/shmobile.txt
+++ /dev/null
@@ -1,143 +0,0 @@
-Renesas SH-Mobile, R-Mobile, and R-Car Platform Device Tree Bindings
---------------------------------------------------------------------
-
-SoCs:
-
- - Emma Mobile EV2
- compatible = "renesas,emev2"
- - RZ/A1H (R7S72100)
- compatible = "renesas,r7s72100"
- - SH-Mobile AG5 (R8A73A00/SH73A0)
- compatible = "renesas,sh73a0"
- - R-Mobile APE6 (R8A73A40)
- compatible = "renesas,r8a73a4"
- - R-Mobile A1 (R8A77400)
- compatible = "renesas,r8a7740"
- - RZ/G1H (R8A77420)
- compatible = "renesas,r8a7742"
- - RZ/G1M (R8A77430)
- compatible = "renesas,r8a7743"
- - RZ/G1N (R8A77440)
- compatible = "renesas,r8a7744"
- - RZ/G1E (R8A77450)
- compatible = "renesas,r8a7745"
- - RZ/G1C (R8A77470)
- compatible = "renesas,r8a77470"
- - R-Car M1A (R8A77781)
- compatible = "renesas,r8a7778"
- - R-Car H1 (R8A77790)
- compatible = "renesas,r8a7779"
- - R-Car H2 (R8A77900)
- compatible = "renesas,r8a7790"
- - R-Car M2-W (R8A77910)
- compatible = "renesas,r8a7791"
- - R-Car V2H (R8A77920)
- compatible = "renesas,r8a7792"
- - R-Car M2-N (R8A77930)
- compatible = "renesas,r8a7793"
- - R-Car E2 (R8A77940)
- compatible = "renesas,r8a7794"
- - R-Car H3 (R8A77950)
- compatible = "renesas,r8a7795"
- - R-Car M3-W (R8A77960)
- compatible = "renesas,r8a7796"
- - R-Car M3-N (R8A77965)
- compatible = "renesas,r8a77965"
- - R-Car V3M (R8A77970)
- compatible = "renesas,r8a77970"
- - R-Car V3H (R8A77980)
- compatible = "renesas,r8a77980"
- - R-Car E3 (R8A77990)
- compatible = "renesas,r8a77990"
- - R-Car D3 (R8A77995)
- compatible = "renesas,r8a77995"
- - RZ/N1D (R9A06G032)
- compatible = "renesas,r9a06g032"
-
-Boards:
-
- - Alt (RTP0RC7794SEB00010S)
- compatible = "renesas,alt", "renesas,r8a7794"
- - APE6-EVM
- compatible = "renesas,ape6evm", "renesas,r8a73a4"
- - Atmark Techno Armadillo-800 EVA
- compatible = "renesas,armadillo800eva", "renesas,r8a7740"
- - Blanche (RTP0RC7792SEB00010S)
- compatible = "renesas,blanche", "renesas,r8a7792"
- - BOCK-W
- compatible = "renesas,bockw", "renesas,r8a7778"
- - Condor (RTP0RC77980SEB0010SS/RTP0RC77980SEB0010SA01)
- compatible = "renesas,condor", "renesas,r8a77980"
- - Draak (RTP0RC77995SEB0010S)
- compatible = "renesas,draak", "renesas,r8a77995"
- - Eagle (RTP0RC77970SEB0010S)
- compatible = "renesas,eagle", "renesas,r8a77970"
- - Ebisu (RTP0RC77990SEB0010S)
- compatible = "renesas,ebisu", "renesas,r8a77990"
- - Genmai (RTK772100BC00000BR)
- compatible = "renesas,genmai", "renesas,r7s72100"
- - GR-Peach (X28A-M01-E/F)
- compatible = "renesas,gr-peach", "renesas,r7s72100"
- - Gose (RTP0RC7793SEB00010S)
- compatible = "renesas,gose", "renesas,r8a7793"
- - H3ULCB (R-Car Starter Kit Premier, RTP0RC7795SKBX0010SA00 (H3 ES1.1))
- H3ULCB (R-Car Starter Kit Premier, RTP0RC77951SKBX010SA00 (H3 ES2.0))
- compatible = "renesas,h3ulcb", "renesas,r8a7795"
- - Henninger
- compatible = "renesas,henninger", "renesas,r8a7791"
- - iWave Systems RZ/G1C Single Board Computer (iW-RainboW-G23S)
- compatible = "iwave,g23s", "renesas,r8a77470"
- - iWave Systems RZ/G1E SODIMM SOM Development Platform (iW-RainboW-G22D)
- compatible = "iwave,g22d", "iwave,g22m", "renesas,r8a7745"
- - iWave Systems RZ/G1E SODIMM System On Module (iW-RainboW-G22M-SM)
- compatible = "iwave,g22m", "renesas,r8a7745"
- - iWave Systems RZ/G1M Qseven Development Platform (iW-RainboW-G20D-Qseven)
- compatible = "iwave,g20d", "iwave,g20m", "renesas,r8a7743"
- - iWave Systems RZ/G1M Qseven System On Module (iW-RainboW-G20M-Qseven)
- compatible = "iwave,g20m", "renesas,r8a7743"
- - Kingfisher (SBEV-RCAR-KF-M03)
- compatible = "shimafuji,kingfisher"
- - Koelsch (RTP0RC7791SEB00010S)
- compatible = "renesas,koelsch", "renesas,r8a7791"
- - Kyoto Microcomputer Co. KZM-A9-Dual
- compatible = "renesas,kzm9d", "renesas,emev2"
- - Kyoto Microcomputer Co. KZM-A9-GT
- compatible = "renesas,kzm9g", "renesas,sh73a0"
- - Lager (RTP0RC7790SEB00010S)
- compatible = "renesas,lager", "renesas,r8a7790"
- - M3ULCB (R-Car Starter Kit Pro, RTP0RC7796SKBX0010SA09 (M3 ES1.0))
- compatible = "renesas,m3ulcb", "renesas,r8a7796"
- - Marzen (R0P7779A00010S)
- compatible = "renesas,marzen", "renesas,r8a7779"
- - Porter (M2-LCDP)
- compatible = "renesas,porter", "renesas,r8a7791"
- - RSKRZA1 (YR0K77210C000BE)
- compatible = "renesas,rskrza1", "renesas,r7s72100"
- - RZN1D-DB (RZ/N1D Demo Board for the RZ/N1D 400 pins package)
- compatible = "renesas,rzn1d400-db", "renesas,r9a06g032"
- - Salvator-X (RTP0RC7795SIPB0010S)
- compatible = "renesas,salvator-x", "renesas,r8a7795"
- - Salvator-X (RTP0RC7796SIPB0011S)
- compatible = "renesas,salvator-x", "renesas,r8a7796"
- - Salvator-X (RTP0RC7796SIPB0011S (M3-N))
- compatible = "renesas,salvator-x", "renesas,r8a77965"
- - Salvator-XS (Salvator-X 2nd version, RTP0RC7795SIPB0012S)
- compatible = "renesas,salvator-xs", "renesas,r8a7795"
- - Salvator-XS (Salvator-X 2nd version, RTP0RC7796SIPB0012S)
- compatible = "renesas,salvator-xs", "renesas,r8a7796"
- - Salvator-XS (Salvator-X 2nd version, RTP0RC77965SIPB012S)
- compatible = "renesas,salvator-xs", "renesas,r8a77965"
- - SILK (RTP0RC7794LCB00011S)
- compatible = "renesas,silk", "renesas,r8a7794"
- - SK-RZG1E (YR8A77450S000BE)
- compatible = "renesas,sk-rzg1e", "renesas,r8a7745"
- - SK-RZG1M (YR8A77430S000BE)
- compatible = "renesas,sk-rzg1m", "renesas,r8a7743"
- - Stout (ADAS Starterkit, Y-R-CAR-ADAS-SKH2-BOARD)
- compatible = "renesas,stout", "renesas,r8a7790"
- - V3HSK (Y-ASK-RCAR-V3H-WS10)
- compatible = "renesas,v3hsk", "renesas,r8a77980"
- - V3MSK (Y-ASK-RCAR-V3M-WS10)
- compatible = "renesas,v3msk", "renesas,r8a77970"
- - Wheat (RTP0RC7792ASKB0000JE)
- compatible = "renesas,wheat", "renesas,r8a7792"
diff --git a/Documentation/devicetree/bindings/arm/shmobile.yaml b/Documentation/devicetree/bindings/arm/shmobile.yaml
new file mode 100644
index 000000000000..31009e7fb0ea
--- /dev/null
+++ b/Documentation/devicetree/bindings/arm/shmobile.yaml
@@ -0,0 +1,205 @@
+# SPDX-License-Identifier: None
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/bindings/arm/shmobile.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: Renesas SH-Mobile, R-Mobile, and R-Car Platform Device Tree Bindings
+
+maintainers:
+ - Geert Uytterhoeven <[email protected]>
+
+properties:
+ $nodename:
+ const: '/'
+ compatible:
+ oneOf:
+ - description: Emma Mobile EV2
+ items:
+ - enum:
+ - renesas,kzm9d # Kyoto Microcomputer Co. KZM-A9-Dual
+ - const: renesas,emev2
+
+ - description: RZ/A1H (R7S72100)
+ items:
+ - enum:
+ - renesas,genmai # Genmai (RTK772100BC00000BR)
+ - renesas,gr-peach # GR-Peach (X28A-M01-E/F)
+ - renesas,rskrza1 # RSKRZA1 (YR0K77210C000BE)
+ - const: renesas,r7s72100
+
+ - description: SH-Mobile AG5 (R8A73A00/SH73A0)
+ items:
+ - enum:
+ - renesas,kzm9g # Kyoto Microcomputer Co. KZM-A9-GT
+ - const: renesas,sh73a0
+
+ - description: R-Mobile APE6 (R8A73A40)
+ items:
+ - enum:
+ - renesas,ape6evm
+ - const: renesas,r8a73a4
+
+ - description: R-Mobile A1 (R8A77400)
+ items:
+ - enum:
+ - renesas,armadillo800eva # Atmark Techno Armadillo-800 EVA
+ - const: renesas,r8a7740
+
+ - description: RZ/G1H (R8A77420)
+ items:
+ - const: renesas,r8a7742
+
+ - description: RZ/G1M (R8A77430)
+ items:
+ - enum:
+ # iWave Systems RZ/G1M Qseven Development Platform (iW-RainboW-G20D-Qseven)
+ - iwave,g20d
+ - const: iwave,g20m
+ - const: renesas,r8a7743
+
+ - items:
+ - enum:
+ # iWave Systems RZ/G1M Qseven System On Module (iW-RainboW-G20M-Qseven)
+ - iwave,g20m
+ - const: renesas,r8a7743
+
+ - description: RZ/G1N (R8A77440)
+ items:
+ - enum:
+ - renesas,sk-rzg1m # SK-RZG1M (YR8A77430S000BE)
+ - const: renesas,r8a7744
+
+ - description: RZ/G1E (R8A77450)
+ items:
+ - enum:
+ - iwave,g22m # iWave Systems RZ/G1E SODIMM System On Module (iW-RainboW-G22M-SM)
+ - renesas,sk-rzg1e # SK-RZG1E (YR8A77450S000BE)
+ - const: renesas,r8a7745
+ - items:
+ # iWave Systems RZ/G1E SODIMM SOM Development Platform (iW-RainboW-G22D)
+ - const: iwave,g22d
+ - const: iwave,g22m
+ - const: renesas,r8a7745
+
+ - description: RZ/G1C (R8A77470)
+ items:
+ - enum:
+ - iwave,g23s #iWave Systems RZ/G1C Single Board Computer (iW-RainboW-G23S)
+ - const: renesas,r8a77470
+
+ - description: R-Car M1A (R8A77781)
+ items:
+ - enum:
+ - renesas,bockw
+ - const: renesas,r8a7778
+
+ - description: R-Car H1 (R8A77790)
+ items:
+ - enum:
+ - renesas,marzen # Marzen (R0P7779A00010S)
+ - renesas,stout # Stout (ADAS Starterkit, Y-R-CAR-ADAS-SKH2-BOARD)
+ - const: renesas,r8a7779
+
+ - description: R-Car H2 (R8A77900)
+ items:
+ - enum:
+ - renesas,lager # Lager (RTP0RC7790SEB00010S)
+ - const: renesas,r8a7790
+
+ - description: R-Car M2-W (R8A77910)
+ items:
+ - enum:
+ - renesas,henninger
+ - renesas,koelsch # Koelsch (RTP0RC7791SEB00010S)
+ - renesas,porter # Porter (M2-LCDP)
+ - const: renesas,r8a7791
+
+ - description: R-Car V2H (R8A77920)
+ items:
+ - enum:
+ - renesas,blanche # Blanche (RTP0RC7792SEB00010S)
+ - renesas,wheat # Wheat (RTP0RC7792ASKB0000JE)
+ - const: renesas,r8a7792
+
+ - description: R-Car M2-N (R8A77930)
+ items:
+ - enum:
+ - renesas,gose # Gose (RTP0RC7793SEB00010S)
+ - const: renesas,r8a7793
+
+ - description: R-Car E2 (R8A77940)
+ items:
+ - enum:
+ - renesas,alt # Alt (RTP0RC7794SEB00010S)
+ - renesas,silk # SILK (RTP0RC7794LCB00011S)
+ - const: renesas,r8a7794
+
+ - description: R-Car H3 (R8A77950)
+ items:
+ - enum:
+ # H3ULCB (R-Car Starter Kit Premier, RTP0RC7795SKBX0010SA00 (H3 ES1.1))
+ # H3ULCB (R-Car Starter Kit Premier, RTP0RC77951SKBX010SA00 (H3 ES2.0))
+ - renesas,h3ulcb
+ - renesas,salvator-x # Salvator-X (RTP0RC7795SIPB0010S)
+ - renesas,salvator-xs # Salvator-XS (Salvator-X 2nd version, RTP0RC7795SIPB0012S)
+ - const: renesas,r8a7795
+
+ - description: R-Car M3-W (R8A77960)
+ items:
+ - enum:
+ - renesas,m3ulcb # M3ULCB (R-Car Starter Kit Pro, RTP0RC7796SKBX0010SA09 (M3 ES1.0))
+ - renesas,salvator-x # Salvator-X (RTP0RC7796SIPB0011S)
+ - renesas,salvator-xs # Salvator-XS (Salvator-X 2nd version, RTP0RC7796SIPB0012S)
+ - const: renesas,r8a7796
+
+ - description: Kingfisher (SBEV-RCAR-KF-M03)
+ items:
+ - const: shimafuji,kingfisher
+ - enum:
+ - renesas,h3ulcb
+ - renesas,m3ulcb
+ - enum:
+ - renesas,r8a7795
+ - renesas,r8a7796
+
+ - description: R-Car M3-N (R8A77965)
+ items:
+ - enum:
+ - renesas,salvator-x # Salvator-X (RTP0RC7796SIPB0011S (M3-N))
+ - renesas,salvator-xs # Salvator-XS (Salvator-X 2nd version, RTP0RC77965SIPB012S)
+ - const: renesas,r8a77965
+
+ - description: R-Car V3M (R8A77970)
+ items:
+ - enum:
+ - renesas,eagle # Eagle (RTP0RC77970SEB0010S)
+ - renesas,v3msk # V3MSK (Y-ASK-RCAR-V3M-WS10)
+ - const: renesas,r8a77970
+
+ - description: R-Car V3H (R8A77980)
+ items:
+ - enum:
+ - renesas,condor # Condor (RTP0RC77980SEB0010SS/RTP0RC77980SEB0010SA01)
+ - renesas,v3hsk # V3HSK (Y-ASK-RCAR-V3H-WS10)
+ - const: renesas,r8a77980
+
+ - description: R-Car E3 (R8A77990)
+ items:
+ - enum:
+ - renesas,ebisu # Ebisu (RTP0RC77990SEB0010S)
+ - const: renesas,r8a77990
+
+ - description: R-Car D3 (R8A77995)
+ items:
+ - enum:
+ - renesas,draak # Draak (RTP0RC77995SEB0010S)
+ - const: renesas,r8a77995
+
+ - description: RZ/N1D (R9A06G032)
+ items:
+ - enum:
+ - renesas,rzn1d400-db # RZN1D-DB (RZ/N1D Demo Board for the RZ/N1D 400 pins package)
+ - const: renesas,r9a06g032
+
+...
--
2.17.1
Convert CSR SiRF SoC bindings to DT schema format using json-schema.
Cc: Mark Rutland <[email protected]>
Cc: Barry Song <[email protected]>
Cc: [email protected]
Cc: [email protected]
Signed-off-by: Rob Herring <[email protected]>
---
.../devicetree/bindings/arm/sirf.txt | 11 --------
.../devicetree/bindings/arm/sirf.yaml | 27 +++++++++++++++++++
2 files changed, 27 insertions(+), 11 deletions(-)
delete mode 100644 Documentation/devicetree/bindings/arm/sirf.txt
create mode 100644 Documentation/devicetree/bindings/arm/sirf.yaml
diff --git a/Documentation/devicetree/bindings/arm/sirf.txt b/Documentation/devicetree/bindings/arm/sirf.txt
deleted file mode 100644
index 7b28ee6fee91..000000000000
--- a/Documentation/devicetree/bindings/arm/sirf.txt
+++ /dev/null
@@ -1,11 +0,0 @@
-CSR SiRFprimaII and SiRFmarco device tree bindings.
-========================================
-
-Required root node properties:
- - compatible:
- - "sirf,atlas6-cb" : atlas6 "cb" evaluation board
- - "sirf,atlas6" : atlas6 device based board
- - "sirf,atlas7-cb" : atlas7 "cb" evaluation board
- - "sirf,atlas7" : atlas7 device based board
- - "sirf,prima2-cb" : prima2 "cb" evaluation board
- - "sirf,prima2" : prima2 device based board
diff --git a/Documentation/devicetree/bindings/arm/sirf.yaml b/Documentation/devicetree/bindings/arm/sirf.yaml
new file mode 100644
index 000000000000..5675b3efda96
--- /dev/null
+++ b/Documentation/devicetree/bindings/arm/sirf.yaml
@@ -0,0 +1,27 @@
+# SPDX-License-Identifier: None
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/bindings/arm/sirf.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: CSR SiRFprimaII and SiRFmarco device tree bindings.
+
+maintainers:
+ - Binghua Duan <[email protected]>
+ - Barry Song <[email protected]>
+
+properties:
+ $nodename:
+ const: '/'
+ compatible:
+ oneOf:
+ - items:
+ - const: sirf,atlas6-cb
+ - const: sirf,atlas6
+ - items:
+ - const: sirf,atlas7-cb
+ - const: sirf,atlas7
+ - items:
+ - const: sirf,prima2-cb
+ - const: sirf,prima2
+...
--
2.17.1
Convert Realtek SoC bindings to DT schema format using json-schema.
Cc: "Andreas Färber" <[email protected]>
Cc: Mark Rutland <[email protected]>
Cc: [email protected]
Cc: [email protected]
Signed-off-by: Rob Herring <[email protected]>
---
.../devicetree/bindings/arm/realtek.txt | 22 ----------------
.../devicetree/bindings/arm/realtek.yaml | 25 +++++++++++++++++++
2 files changed, 25 insertions(+), 22 deletions(-)
delete mode 100644 Documentation/devicetree/bindings/arm/realtek.txt
create mode 100644 Documentation/devicetree/bindings/arm/realtek.yaml
diff --git a/Documentation/devicetree/bindings/arm/realtek.txt b/Documentation/devicetree/bindings/arm/realtek.txt
deleted file mode 100644
index 95839e19ae92..000000000000
--- a/Documentation/devicetree/bindings/arm/realtek.txt
+++ /dev/null
@@ -1,22 +0,0 @@
-Realtek platforms device tree bindings
---------------------------------------
-
-
-RTD1295 SoC
-===========
-
-Required root node properties:
-
- - compatible : must contain "realtek,rtd1295"
-
-
-Root node property compatible must contain, depending on board:
-
- - MeLE V9: "mele,v9"
- - ProBox2 AVA: "probox2,ava"
- - Zidoo X9S: "zidoo,x9s"
-
-
-Example:
-
- compatible = "zidoo,x9s", "realtek,rtd1295";
diff --git a/Documentation/devicetree/bindings/arm/realtek.yaml b/Documentation/devicetree/bindings/arm/realtek.yaml
new file mode 100644
index 000000000000..9e3bb3249c77
--- /dev/null
+++ b/Documentation/devicetree/bindings/arm/realtek.yaml
@@ -0,0 +1,25 @@
+# SPDX-License-Identifier: None
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/bindings/arm/realtek.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: Realtek platforms device tree bindings
+
+maintainers:
+ - Andreas Färber <[email protected]>
+
+description: |+
+ RTD1295 SoC
+
+properties:
+ $nodename:
+ const: '/'
+ compatible:
+ items:
+ - enum:
+ - mele,v9
+ - probox2,ava
+ - zidoo,x9s
+ - const: realtek,rtd1295
+...
--
2.17.1
Convert Oxford Semi SoC bindings to DT schema format using json-schema.
Cc: Mark Rutland <[email protected]>
Cc: Neil Armstrong <[email protected]>
Cc: [email protected]
Cc: [email protected]
Cc: [email protected]
Signed-off-by: Rob Herring <[email protected]>
---
.../devicetree/bindings/arm/oxnas.txt | 14 -----------
.../devicetree/bindings/arm/oxnas.yaml | 25 +++++++++++++++++++
2 files changed, 25 insertions(+), 14 deletions(-)
delete mode 100644 Documentation/devicetree/bindings/arm/oxnas.txt
create mode 100644 Documentation/devicetree/bindings/arm/oxnas.yaml
diff --git a/Documentation/devicetree/bindings/arm/oxnas.txt b/Documentation/devicetree/bindings/arm/oxnas.txt
deleted file mode 100644
index ac64e60f99f1..000000000000
--- a/Documentation/devicetree/bindings/arm/oxnas.txt
+++ /dev/null
@@ -1,14 +0,0 @@
-Oxford Semiconductor OXNAS SoCs Family device tree bindings
--------------------------------------------
-
-Boards with the OX810SE SoC shall have the following properties:
- Required root node property:
- compatible: "oxsemi,ox810se"
-
-Boards with the OX820 SoC shall have the following properties:
- Required root node property:
- compatible: "oxsemi,ox820"
-
-Board compatible values:
- - "wd,mbwe" (OX810SE)
- - "cloudengines,pogoplugv3" (OX820)
diff --git a/Documentation/devicetree/bindings/arm/oxnas.yaml b/Documentation/devicetree/bindings/arm/oxnas.yaml
new file mode 100644
index 000000000000..c847a5707417
--- /dev/null
+++ b/Documentation/devicetree/bindings/arm/oxnas.yaml
@@ -0,0 +1,25 @@
+# SPDX-License-Identifier: None
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/bindings/arm/oxnas.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: Oxford Semiconductor OXNAS SoCs Family device tree bindings
+
+maintainers:
+ - Neil Armstrong <[email protected]>
+
+properties:
+ $nodename:
+ const: '/'
+ compatible:
+ oneOf:
+ - items:
+ - enum:
+ - wd,mbwe
+ - const: oxsemi,ox810se
+
+ - items:
+ - enum:
+ - cloudengines,pogoplugv3
+ - const: oxsemi,ox820
--
2.17.1
Convert Freescale SoC bindings to DT schema format using json-schema.
Cc: Shawn Guo <[email protected]>
Cc: Mark Rutland <[email protected]>
Cc: [email protected]
Signed-off-by: Rob Herring <[email protected]>
---
.../devicetree/bindings/arm/armadeus.txt | 6 -
Documentation/devicetree/bindings/arm/bhf.txt | 6 -
.../bindings/arm/compulab-boards.txt | 25 ---
Documentation/devicetree/bindings/arm/fsl.txt | 185 ------------------
.../devicetree/bindings/arm/fsl.yaml | 166 ++++++++++++++++
.../devicetree/bindings/arm/i2se.txt | 22 ---
.../devicetree/bindings/arm/olimex.txt | 10 -
.../devicetree/bindings/arm/technologic.txt | 23 ---
8 files changed, 166 insertions(+), 277 deletions(-)
delete mode 100644 Documentation/devicetree/bindings/arm/armadeus.txt
delete mode 100644 Documentation/devicetree/bindings/arm/bhf.txt
delete mode 100644 Documentation/devicetree/bindings/arm/compulab-boards.txt
delete mode 100644 Documentation/devicetree/bindings/arm/fsl.txt
create mode 100644 Documentation/devicetree/bindings/arm/fsl.yaml
delete mode 100644 Documentation/devicetree/bindings/arm/i2se.txt
delete mode 100644 Documentation/devicetree/bindings/arm/olimex.txt
delete mode 100644 Documentation/devicetree/bindings/arm/technologic.txt
diff --git a/Documentation/devicetree/bindings/arm/armadeus.txt b/Documentation/devicetree/bindings/arm/armadeus.txt
deleted file mode 100644
index 9821283ff516..000000000000
--- a/Documentation/devicetree/bindings/arm/armadeus.txt
+++ /dev/null
@@ -1,6 +0,0 @@
-Armadeus i.MX Platforms Device Tree Bindings
------------------------------------------------
-
-APF51: i.MX51 based module.
-Required root node properties:
- - compatible = "armadeus,imx51-apf51", "fsl,imx51";
diff --git a/Documentation/devicetree/bindings/arm/bhf.txt b/Documentation/devicetree/bindings/arm/bhf.txt
deleted file mode 100644
index 886b503caf9c..000000000000
--- a/Documentation/devicetree/bindings/arm/bhf.txt
+++ /dev/null
@@ -1,6 +0,0 @@
-Beckhoff Automation Platforms Device Tree Bindings
---------------------------------------------------
-
-CX9020 Embedded PC
-Required root node properties:
- - compatible = "bhf,cx9020", "fsl,imx53";
diff --git a/Documentation/devicetree/bindings/arm/compulab-boards.txt b/Documentation/devicetree/bindings/arm/compulab-boards.txt
deleted file mode 100644
index 42a10285af9c..000000000000
--- a/Documentation/devicetree/bindings/arm/compulab-boards.txt
+++ /dev/null
@@ -1,25 +0,0 @@
-CompuLab SB-SOM is a multi-module baseboard capable of carrying:
- - CM-T43
- - CM-T54
- - CM-QS600
- - CL-SOM-AM57x
- - CL-SOM-iMX7
-modules with minor modifications to the SB-SOM assembly.
-
-Required root node properties:
- - compatible = should be "compulab,sb-som"
-
-Compulab CL-SOM-iMX7 is a miniature System-on-Module (SoM) based on
-Freescale i.MX7 ARM Cortex-A7 System-on-Chip.
-
-Required root node properties:
- - compatible = "compulab,cl-som-imx7", "fsl,imx7d";
-
-Compulab SBC-iMX7 is a single board computer based on the
-Freescale i.MX7 system-on-chip. SBC-iMX7 is implemented with
-the CL-SOM-iMX7 System-on-Module providing most of the functions,
-and SB-SOM-iMX7 carrier board providing additional peripheral
-functions and connectors.
-
-Required root node properties:
- - compatible = "compulab,sbc-imx7", "compulab,cl-som-imx7", "fsl,imx7d";
diff --git a/Documentation/devicetree/bindings/arm/fsl.txt b/Documentation/devicetree/bindings/arm/fsl.txt
deleted file mode 100644
index 1e775aaa5c5b..000000000000
--- a/Documentation/devicetree/bindings/arm/fsl.txt
+++ /dev/null
@@ -1,185 +0,0 @@
-Freescale i.MX Platforms Device Tree Bindings
------------------------------------------------
-
-i.MX23 Evaluation Kit
-Required root node properties:
- - compatible = "fsl,imx23-evk", "fsl,imx23";
-
-i.MX25 Product Development Kit
-Required root node properties:
- - compatible = "fsl,imx25-pdk", "fsl,imx25";
-
-i.MX27 Product Development Kit
-Required root node properties:
- - compatible = "fsl,imx27-pdk", "fsl,imx27";
-
-i.MX28 Evaluation Kit
-Required root node properties:
- - compatible = "fsl,imx28-evk", "fsl,imx28";
-
-i.MX51 Babbage Board
-Required root node properties:
- - compatible = "fsl,imx51-babbage", "fsl,imx51";
-
-i.MX53 Automotive Reference Design Board
-Required root node properties:
- - compatible = "fsl,imx53-ard", "fsl,imx53";
-
-i.MX53 Evaluation Kit
-Required root node properties:
- - compatible = "fsl,imx53-evk", "fsl,imx53";
-
-i.MX53 Quick Start Board
-Required root node properties:
- - compatible = "fsl,imx53-qsb", "fsl,imx53";
-
-i.MX53 Smart Mobile Reference Design Board
-Required root node properties:
- - compatible = "fsl,imx53-smd", "fsl,imx53";
-
-i.MX6 Quad Armadillo2 Board
-Required root node properties:
- - compatible = "fsl,imx6q-arm2", "fsl,imx6q";
-
-i.MX6 Quad SABRE Lite Board
-Required root node properties:
- - compatible = "fsl,imx6q-sabrelite", "fsl,imx6q";
-
-i.MX6 Quad SABRE Smart Device Board
-Required root node properties:
- - compatible = "fsl,imx6q-sabresd", "fsl,imx6q";
-
-i.MX6 Quad SABRE Automotive Board
-Required root node properties:
- - compatible = "fsl,imx6q-sabreauto", "fsl,imx6q";
-
-i.MX6SLL EVK board
-Required root node properties:
- - compatible = "fsl,imx6sll-evk", "fsl,imx6sll";
-
-Generic i.MX boards
--------------------
-
-No iomux setup is done for these boards, so this must have been configured
-by the bootloader for boards to work with the generic bindings.
-
-i.MX27 generic board
-Required root node properties:
- - compatible = "fsl,imx27";
-
-i.MX51 generic board
-Required root node properties:
- - compatible = "fsl,imx51";
-
-i.MX53 generic board
-Required root node properties:
- - compatible = "fsl,imx53";
-
-i.MX6q generic board
-Required root node properties:
- - compatible = "fsl,imx6q";
-
-Freescale Vybrid Platform Device Tree Bindings
-----------------------------------------------
-
-For the Vybrid SoC familiy all variants with DDR controller are supported,
-which is the VF5xx and VF6xx series. Out of historical reasons, in most
-places the kernel uses vf610 to refer to the whole familiy.
-The compatible string "fsl,vf610m4" is used for the secondary Cortex-M4
-core support.
-
-Required root node compatible property (one of them):
- - compatible = "fsl,vf500";
- - compatible = "fsl,vf510";
- - compatible = "fsl,vf600";
- - compatible = "fsl,vf610";
- - compatible = "fsl,vf610m4";
-
-Freescale LS1021A Platform Device Tree Bindings
-------------------------------------------------
-
-Required root node compatible properties:
- - compatible = "fsl,ls1021a";
-
-Freescale ARMv8 based Layerscape SoC family Device Tree Bindings
-----------------------------------------------------------------
-
-LS1012A SoC
-Required root node properties:
- - compatible = "fsl,ls1012a";
-
-LS1012A ARMv8 based RDB Board
-Required root node properties:
- - compatible = "fsl,ls1012a-rdb", "fsl,ls1012a";
-
-LS1012A ARMv8 based FRDM Board
-Required root node properties:
- - compatible = "fsl,ls1012a-frdm", "fsl,ls1012a";
-
-LS1012A ARMv8 based QDS Board
-Required root node properties:
- - compatible = "fsl,ls1012a-qds", "fsl,ls1012a";
-
-LS1043A SoC
-Required root node properties:
- - compatible = "fsl,ls1043a";
-
-LS1043A ARMv8 based RDB Board
-Required root node properties:
- - compatible = "fsl,ls1043a-rdb", "fsl,ls1043a";
-
-LS1043A ARMv8 based QDS Board
-Required root node properties:
- - compatible = "fsl,ls1043a-qds", "fsl,ls1043a";
-
-LS1046A SoC
-Required root node properties:
- - compatible = "fsl,ls1046a";
-
-LS1046A ARMv8 based QDS Board
-Required root node properties:
- - compatible = "fsl,ls1046a-qds", "fsl,ls1046a";
-
-LS1046A ARMv8 based RDB Board
-Required root node properties:
- - compatible = "fsl,ls1046a-rdb", "fsl,ls1046a";
-
-LS1088A SoC
-Required root node properties:
- - compatible = "fsl,ls1088a";
-
-LS1088A ARMv8 based QDS Board
-Required root node properties:
- - compatible = "fsl,ls1088a-qds", "fsl,ls1088a";
-
-LS1088A ARMv8 based RDB Board
-Required root node properties:
- - compatible = "fsl,ls1088a-rdb", "fsl,ls1088a";
-
-LS2080A SoC
-Required root node properties:
- - compatible = "fsl,ls2080a";
-
-LS2080A ARMv8 based Simulator model
-Required root node properties:
- - compatible = "fsl,ls2080a-simu", "fsl,ls2080a";
-
-LS2080A ARMv8 based QDS Board
-Required root node properties:
- - compatible = "fsl,ls2080a-qds", "fsl,ls2080a";
-
-LS2080A ARMv8 based RDB Board
-Required root node properties:
- - compatible = "fsl,ls2080a-rdb", "fsl,ls2080a";
-
-LS2088A SoC
-Required root node properties:
- - compatible = "fsl,ls2088a";
-
-LS2088A ARMv8 based QDS Board
-Required root node properties:
- - compatible = "fsl,ls2088a-qds", "fsl,ls2088a";
-
-LS2088A ARMv8 based RDB Board
-Required root node properties:
- - compatible = "fsl,ls2088a-rdb", "fsl,ls2088a";
diff --git a/Documentation/devicetree/bindings/arm/fsl.yaml b/Documentation/devicetree/bindings/arm/fsl.yaml
new file mode 100644
index 000000000000..5241fa92e3d1
--- /dev/null
+++ b/Documentation/devicetree/bindings/arm/fsl.yaml
@@ -0,0 +1,166 @@
+# SPDX-License-Identifier: None
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/bindings/arm/fsl.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: Freescale i.MX Platforms Device Tree Bindings
+
+maintainers:
+ - Shawn Guo <[email protected]>
+ - Shaohui Xie <[email protected]>
+
+properties:
+ $nodename:
+ const: '/'
+ compatible:
+ oneOf:
+ - description: i.MX23 based Boards
+ items:
+ - enum:
+ - fsl,imx23-evk
+ - olimex,imx23-olinuxino
+ - const: fsl,imx23
+
+ - description: i.MX25 Product Development Kit
+ items:
+ - enum:
+ - fsl,imx25-pdk
+ - const: fsl,imx25
+
+ - description: i.MX27 Product Development Kit
+ items:
+ - enum:
+ - fsl,imx27-pdk
+ - const: fsl,imx27
+
+ - description: i.MX28 based Boards
+ items:
+ - enum:
+ - fsl,imx28-evk
+ - i2se,duckbill
+ - i2se,duckbill-2
+ - technologic,imx28-ts4600
+ - const: fsl,imx28
+ - items:
+ - enum:
+ - i2se,duckbill-2-485
+ - i2se,duckbill-2-enocean
+ - i2se,duckbill-2-spi
+ - const: i2se,duckbill-2
+ - const: fsl,imx28
+
+ - description: i.MX51 Babbage Board
+ items:
+ - enum:
+ - armadeus,imx51-apf51
+ - fsl,imx51-babbage
+ - technologic,imx51-ts4800
+ - const: fsl,imx51
+
+ - description: i.MX53 Boards
+ items:
+ - enum:
+ - bhf,cx9020
+ - fsl,imx53-ard
+ - fsl,imx53-evk
+ - fsl,imx53-qsb
+ - fsl,imx53-smd
+ - const: fsl,imx53
+
+ - description: i.MX6Q based Boards
+ items:
+ - enum:
+ - fsl,imx6q-arm2
+ - fsl,imx6q-sabrelite
+ - fsl,imx6q-sabresd
+ - fsl,imx6q-sabreauto
+ - technologic,imx6q-ts4900
+ - technologic,imx6q-ts7970
+ - const: fsl,imx6q
+
+ - description: i.MX6DL based Boards
+ items:
+ - enum:
+ - technologic,imx6dl-ts4900
+ - technologic,imx6dl-ts7970
+ - const: fsl,imx6dl
+
+ - description: i.MX6SLL based Boards
+ items:
+ - enum:
+ - fsl,imx6sll-evk
+ - const: fsl,imx6sll
+
+ - description:
+ Compulab SBC-iMX7 is a single board computer based on the
+ Freescale i.MX7 system-on-chip. SBC-iMX7 is implemented with
+ the CL-SOM-iMX7 System-on-Module providing most of the functions,
+ and SB-SOM-iMX7 carrier board providing additional peripheral
+ functions and connectors.
+ items:
+ - const: compulab,sbc-imx7
+ - const: compulab,cl-som-imx7
+ - const: fsl,imx7d
+
+ - description:
+ Freescale Vybrid Platform Device Tree Bindings
+
+ For the Vybrid SoC familiy all variants with DDR controller are supported,
+ which is the VF5xx and VF6xx series. Out of historical reasons, in most
+ places the kernel uses vf610 to refer to the whole familiy.
+ The compatible string "fsl,vf610m4" is used for the secondary Cortex-M4
+ core support.
+ items:
+ - enum:
+ - fsl,vf500
+ - fsl,vf510
+ - fsl,vf600
+ - fsl,vf610
+ - fsl,vf610m4
+
+ - description: LS1021A based Boards
+ items:
+ - enum:
+ - fsl,ls1012a-rdb
+ - fsl,ls1012a-frdm
+ - fsl,ls1012a-qds
+ - const: fsl,ls1021a
+
+ - description: LS1043A based Boards
+ items:
+ - enum:
+ - fsl,ls1043a-rdb
+ - fsl,ls1043a-qds
+ - const: fsl,ls1043a
+
+ - description: LS1046A based Boards
+ items:
+ - enum:
+ - fsl,ls1046a-qds
+ - fsl,ls1046a-rdb
+ - const: fsl,ls1046a
+
+ - description: LS1088A based Boards
+ items:
+ - enum:
+ - fsl,ls1088a-qds
+ - fsl,ls1088a-rdb
+ - const: fsl,ls1088a
+
+ - description: LS2080A based Boards
+ items:
+ - enum:
+ - fsl,ls2080a-simu
+ - fsl,ls2080a-qds
+ - fsl,ls2080a-rdb
+ - const: fsl,ls2080a
+
+ - description: LS2088A based Boards
+ items:
+ - enum:
+ - fsl,ls2088a-qds
+ - fsl,ls2088a-rdb
+ - const: fsl,ls2088a
+
+...
diff --git a/Documentation/devicetree/bindings/arm/i2se.txt b/Documentation/devicetree/bindings/arm/i2se.txt
deleted file mode 100644
index dbd54a3aa07d..000000000000
--- a/Documentation/devicetree/bindings/arm/i2se.txt
+++ /dev/null
@@ -1,22 +0,0 @@
-I2SE Device Tree Bindings
--------------------------
-
-Duckbill Board
-Required root node properties:
- - compatible = "i2se,duckbill", "fsl,imx28";
-
-Duckbill 2 Board
-Required root node properties:
- - compatible = "i2se,duckbill-2", "fsl,imx28";
-
-Duckbill 2 485 Board
-Required root node properties:
- - compatible = "i2se,duckbill-2-485", "i2se,duckbill-2", "fsl,imx28";
-
-Duckbill 2 EnOcean Board
-Required root node properties:
- - compatible = "i2se,duckbill-2-enocean", "i2se,duckbill-2", "fsl,imx28";
-
-Duckbill 2 SPI Board
-Required root node properties:
- - compatible = "i2se,duckbill-2-spi", "i2se,duckbill-2", "fsl,imx28";
diff --git a/Documentation/devicetree/bindings/arm/olimex.txt b/Documentation/devicetree/bindings/arm/olimex.txt
deleted file mode 100644
index d726aeca56be..000000000000
--- a/Documentation/devicetree/bindings/arm/olimex.txt
+++ /dev/null
@@ -1,10 +0,0 @@
-Olimex Device Tree Bindings
----------------------------
-
-SAM9-L9260 Board
-Required root node properties:
- - compatible = "olimex,sam9-l9260", "atmel,at91sam9260";
-
-i.MX23 Olinuxino Low Cost Board
-Required root node properties:
- - compatible = "olimex,imx23-olinuxino", "fsl,imx23";
diff --git a/Documentation/devicetree/bindings/arm/technologic.txt b/Documentation/devicetree/bindings/arm/technologic.txt
deleted file mode 100644
index f1cedc00dcab..000000000000
--- a/Documentation/devicetree/bindings/arm/technologic.txt
+++ /dev/null
@@ -1,23 +0,0 @@
-Technologic Systems Platforms Device Tree Bindings
---------------------------------------------------
-
-TS-4600 is a System-on-Module based on the Freescale i.MX28 System-on-Chip.
-It can be mounted on a carrier board providing additional peripheral connectors.
-Required root node properties:
- - compatible = "technologic,imx28-ts4600", "fsl,imx28"
-
-TS-4800 board
-Required root node properties:
- - compatible = "technologic,imx51-ts4800", "fsl,imx51";
-
-TS-4900 is a System-on-Module based on the Freescale i.MX6 System-on-Chip.
-It can be mounted on a carrier board providing additional peripheral connectors.
-Required root node properties:
- - compatible = "technologic,imx6dl-ts4900", "fsl,imx6dl"
- - compatible = "technologic,imx6q-ts4900", "fsl,imx6q"
-
-TS-7970 is a System-on-Module based on the Freescale i.MX6 System-on-Chip.
-It can be mounted on a carrier board providing additional peripheral connectors.
-Required root node properties:
- - compatible = "technologic,imx6dl-ts7970", "fsl,imx6dl"
- - compatible = "technologic,imx6q-ts7970", "fsl,imx6q"
--
2.17.1
Convert Calxeda SoC bindings to DT schema format using json-schema.
Cc: Mark Rutland <[email protected]>
Cc: [email protected]
Signed-off-by: Rob Herring <[email protected]>
---
.../devicetree/bindings/arm/calxeda.txt | 15 -------------
.../devicetree/bindings/arm/calxeda.yaml | 22 +++++++++++++++++++
2 files changed, 22 insertions(+), 15 deletions(-)
delete mode 100644 Documentation/devicetree/bindings/arm/calxeda.txt
create mode 100644 Documentation/devicetree/bindings/arm/calxeda.yaml
diff --git a/Documentation/devicetree/bindings/arm/calxeda.txt b/Documentation/devicetree/bindings/arm/calxeda.txt
deleted file mode 100644
index 25fcf96795ca..000000000000
--- a/Documentation/devicetree/bindings/arm/calxeda.txt
+++ /dev/null
@@ -1,15 +0,0 @@
-Calxeda Platforms Device Tree Bindings
------------------------------------------------
-
-Boards with Calxeda Cortex-A9 based ECX-1000 (Highbank) SOC shall have the
-following properties.
-
-Required root node properties:
- - compatible = "calxeda,highbank";
-
-
-Boards with Calxeda Cortex-A15 based ECX-2000 SOC shall have the following
-properties.
-
-Required root node properties:
- - compatible = "calxeda,ecx-2000";
diff --git a/Documentation/devicetree/bindings/arm/calxeda.yaml b/Documentation/devicetree/bindings/arm/calxeda.yaml
new file mode 100644
index 000000000000..bc5c69926c6e
--- /dev/null
+++ b/Documentation/devicetree/bindings/arm/calxeda.yaml
@@ -0,0 +1,22 @@
+# SPDX-License-Identifier: None
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/bindings/arm/calxeda.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: Calxeda Platforms Device Tree Bindings
+
+maintainers:
+ - Rob Herring <[email protected]>
+description: |+
+ Bindings for boards with Calxeda Cortex-A9 based ECX-1000 (Highbank) SOC
+ or Cortex-A15 based ECX-2000 SOCs
+
+properties:
+ $nodename:
+ const: '/'
+ compatible:
+ items:
+ - enum:
+ - calxeda,highbank
+ - calxeda,ecx-2000
--
2.17.1
Convert TI Davinci SoC bindings to DT schema format using json-schema.
Cc: Sekhar Nori <[email protected]>
Cc: Kevin Hilman <[email protected]>
Cc: Mark Rutland <[email protected]>
Cc: [email protected]
Signed-off-by: Rob Herring <[email protected]>
---
.../devicetree/bindings/arm/davinci.txt | 25 ------------------
.../bindings/arm/ti/ti,davinci.yaml | 26 +++++++++++++++++++
2 files changed, 26 insertions(+), 25 deletions(-)
delete mode 100644 Documentation/devicetree/bindings/arm/davinci.txt
create mode 100644 Documentation/devicetree/bindings/arm/ti/ti,davinci.yaml
diff --git a/Documentation/devicetree/bindings/arm/davinci.txt b/Documentation/devicetree/bindings/arm/davinci.txt
deleted file mode 100644
index 715622c36260..000000000000
--- a/Documentation/devicetree/bindings/arm/davinci.txt
+++ /dev/null
@@ -1,25 +0,0 @@
-Texas Instruments DaVinci Platforms Device Tree Bindings
---------------------------------------------------------
-
-DA850/OMAP-L138/AM18x Evaluation Module (EVM) board
-Required root node properties:
- - compatible = "ti,da850-evm", "ti,da850";
-
-DA850/OMAP-L138/AM18x L138/C6748 Development Kit (LCDK) board
-Required root node properties:
- - compatible = "ti,da850-lcdk", "ti,da850";
-
-EnBW AM1808 based CMC board
-Required root node properties:
- - compatible = "enbw,cmc", "ti,da850;
-
-LEGO MINDSTORMS EV3 (AM1808 based)
-Required root node properties:
- - compatible = "lego,ev3", "ti,da850";
-
-Generic DaVinci Boards
-----------------------
-
-DA850/OMAP-L138/AM18x generic board
-Required root node properties:
- - compatible = "ti,da850";
diff --git a/Documentation/devicetree/bindings/arm/ti/ti,davinci.yaml b/Documentation/devicetree/bindings/arm/ti/ti,davinci.yaml
new file mode 100644
index 000000000000..2675cae91a60
--- /dev/null
+++ b/Documentation/devicetree/bindings/arm/ti/ti,davinci.yaml
@@ -0,0 +1,26 @@
+# SPDX-License-Identifier: None
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/bindings/arm/davinci.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: Texas Instruments DaVinci Platforms Device Tree Bindings
+
+maintainers:
+ - Sekhar Nori <[email protected]>
+description: |
+ DA850/OMAP-L138/AM18x based boards
+
+
+properties:
+ $nodename:
+ const: '/'
+ compatible:
+ items:
+ - enum:
+ - ti,da850-evm
+ - ti,da850-lcdk
+ - enbw,cmc
+ - lego,ev3
+ - const: ti,da850
+...
--
2.17.1
Convert Amlogic SoC bindings to DT schema format using json-schema.
Cc: Carlo Caione <[email protected]>
Cc: Kevin Hilman <[email protected]>
Cc: Mark Rutland <[email protected]>
Cc: [email protected]
Signed-off-by: Rob Herring <[email protected]>
---
.../devicetree/bindings/arm/amlogic.txt | 102 -----------------
.../devicetree/bindings/arm/amlogic.yaml | 104 ++++++++++++++++++
2 files changed, 104 insertions(+), 102 deletions(-)
delete mode 100644 Documentation/devicetree/bindings/arm/amlogic.txt
create mode 100644 Documentation/devicetree/bindings/arm/amlogic.yaml
diff --git a/Documentation/devicetree/bindings/arm/amlogic.txt b/Documentation/devicetree/bindings/arm/amlogic.txt
deleted file mode 100644
index 2f2d01a00c54..000000000000
--- a/Documentation/devicetree/bindings/arm/amlogic.txt
+++ /dev/null
@@ -1,102 +0,0 @@
-Amlogic MesonX device tree bindings
--------------------------------------------
-
-Work in progress statement:
-
-Device tree files and bindings applying to Amlogic SoCs and boards are
-considered "unstable". Any Amlogic device tree binding may change at
-any time. Be sure to use a device tree binary and a kernel image
-generated from the same source tree.
-
-Please refer to Documentation/devicetree/bindings/ABI.txt for a definition of a
-stable binding/ABI.
-
----------------------------------------------------------------
-
-Boards with the Amlogic Meson6 SoC shall have the following properties:
- Required root node property:
- compatible: "amlogic,meson6"
-
-Boards with the Amlogic Meson8 SoC shall have the following properties:
- Required root node property:
- compatible: "amlogic,meson8";
-
-Boards with the Amlogic Meson8b SoC shall have the following properties:
- Required root node property:
- compatible: "amlogic,meson8b";
-
-Boards with the Amlogic Meson8m2 SoC shall have the following properties:
- Required root node property:
- compatible: "amlogic,meson8m2";
-
-Boards with the Amlogic Meson GXBaby SoC shall have the following properties:
- Required root node property:
- compatible: "amlogic,meson-gxbb";
-
-Boards with the Amlogic Meson GXL S905X SoC shall have the following properties:
- Required root node property:
- compatible: "amlogic,s905x", "amlogic,meson-gxl";
-
-Boards with the Amlogic Meson GXL S905D SoC shall have the following properties:
- Required root node property:
- compatible: "amlogic,s905d", "amlogic,meson-gxl";
-
-Boards with the Amlogic Meson GXL S805X SoC shall have the following properties:
- Required root node property:
- compatible: "amlogic,s805x", "amlogic,meson-gxl";
-
-Boards with the Amlogic Meson GXL S905W SoC shall have the following properties:
- Required root node property:
- compatible: "amlogic,s905w", "amlogic,meson-gxl";
-
-Boards with the Amlogic Meson GXM S912 SoC shall have the following properties:
- Required root node property:
- compatible: "amlogic,s912", "amlogic,meson-gxm";
-
-Boards with the Amlogic Meson AXG A113D SoC shall have the following properties:
- Required root node property:
- compatible: "amlogic,a113d", "amlogic,meson-axg";
-
-Board compatible values (alphabetically, grouped by SoC):
-
- - "geniatech,atv1200" (Meson6)
-
- - "minix,neo-x8" (Meson8)
-
- - "hardkernel,odroid-c1" (Meson8b)
- - "tronfy,mxq" (Meson8b)
-
- - "tronsmart,mxiii-plus" (Meson8m2)
-
- - "amlogic,p200" (Meson gxbb)
- - "amlogic,p201" (Meson gxbb)
- - "friendlyarm,nanopi-k2" (Meson gxbb)
- - "hardkernel,odroid-c2" (Meson gxbb)
- - "nexbox,a95x" (Meson gxbb or Meson gxl s905x)
- - "tronsmart,vega-s95-pro", "tronsmart,vega-s95" (Meson gxbb)
- - "tronsmart,vega-s95-meta", "tronsmart,vega-s95" (Meson gxbb)
- - "tronsmart,vega-s95-telos", "tronsmart,vega-s95" (Meson gxbb)
- - "wetek,hub" (Meson gxbb)
- - "wetek,play2" (Meson gxbb)
-
- - "amlogic,p212" (Meson gxl s905x)
- - "hwacom,amazetv" (Meson gxl s905x)
- - "khadas,vim" (Meson gxl s905x)
- - "libretech,cc" (Meson gxl s905x)
-
- - "amlogic,p230" (Meson gxl s905d)
- - "amlogic,p231" (Meson gxl s905d)
-
- - "amlogic,p241" (Meson gxl s805x)
-
- - "amlogic,p281" (Meson gxl s905w)
- - "oranth,tx3-mini" (Meson gxl s905w)
-
- - "amlogic,q200" (Meson gxm s912)
- - "amlogic,q201" (Meson gxm s912)
- - "khadas,vim2" (Meson gxm s912)
- - "kingnovel,r-box-pro" (Meson gxm S912)
- - "nexbox,a1" (Meson gxm s912)
- - "tronsmart,vega-s96" (Meson gxm s912)
-
- - "amlogic,s400" (Meson axg a113d)
diff --git a/Documentation/devicetree/bindings/arm/amlogic.yaml b/Documentation/devicetree/bindings/arm/amlogic.yaml
new file mode 100644
index 000000000000..6168fef53aa1
--- /dev/null
+++ b/Documentation/devicetree/bindings/arm/amlogic.yaml
@@ -0,0 +1,104 @@
+# SPDX-License-Identifier: None
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/bindings/arm/amlogic.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: Amlogic MesonX device tree bindings
+
+maintainers:
+ - Neil Armstrong <[email protected]>
+ - Carlo Caione <[email protected]>
+description: |+
+ Work in progress statement:
+
+ Device tree files and bindings applying to Amlogic SoCs and boards are
+ considered "unstable". Any Amlogic device tree binding may change at
+ any time. Be sure to use a device tree binary and a kernel image
+ generated from the same source tree.
+
+ Please refer to Documentation/devicetree/bindings/ABI.txt for a definition of a
+ stable binding/ABI.
+
+properties:
+ $nodename:
+ const: '/'
+ compatible:
+ oneOf:
+ - items:
+ - enum:
+ - geniatech,atv1200
+ - const: amlogic,meson6
+ - items:
+ - enum:
+ - minix,neo-x8
+ - const: amlogic,meson8
+ - items:
+ - enum:
+ - tronsmart,mxiii-plus
+ - const: amlogic,meson8m2
+ - items:
+ - enum:
+ - hardkernel,odroid-c1
+ - tronfy,mxq
+ - const: amlogic,meson8b
+ - items:
+ - enum:
+ - amlogic,p200
+ - amlogic,p201
+ - friendlyarm,nanopi-k2
+ - hardkernel,odroid-c2
+ - nexbox,a95x
+ - wetek,hub
+ - wetek,play2
+ - const: amlogic,meson-gxbb
+ - items:
+ - enum:
+ - tronsmart,vega-s95-pro
+ - tronsmart,vega-s95-meta
+ - tronsmart,vega-s95-telos
+ - const: tronsmart,vega-s95
+ - const: amlogic,meson-gxbb
+ - items:
+ - enum:
+ - amlogic,p241
+ - const: amlogic,s805x
+ - const: amlogic,meson-gxl
+ - items:
+ - enum:
+ - amlogic,p281
+ - oranth,tx3-mini
+ - const: amlogic,s905w
+ - const: amlogic,meson-gxl
+ - items:
+ - enum:
+ - amlogic,p212
+ - hwacom,amazetv
+ - khadas,vim
+ - libretech,cc
+ - nexbox,a95x
+ - const: amlogic,s905x
+ - const: amlogic,meson-gxl
+ - items:
+ - enum:
+ - amlogic,p230
+ - amlogic,p231
+ - const: amlogic,s905d
+ - const: amlogic,meson-gxl
+ - items:
+ - enum:
+ - amlogic,q200
+ - amlogic,q201
+ - khadas,vim2
+ - kingnovel,r-box-pro
+ - nexbox,a1
+ - tronsmart,vega-s96
+ - const: amlogic,s912
+ - const: amlogic,meson-gxm
+ - items:
+ - enum:
+ - amlogic,s400
+ - const: amlogic,a113d
+ - const: amlogic,meson-axg
+
+...
--
2.17.1
Convert Altera SoC bindings to DT schema format using json-schema.
Cc: Mark Rutland <[email protected]>
Cc: Dinh Nguyen <[email protected]>
Cc: [email protected]
Signed-off-by: Rob Herring <[email protected]>
---
.../devicetree/bindings/arm/altera.txt | 14 -------------
.../devicetree/bindings/arm/altera.yaml | 20 +++++++++++++++++++
2 files changed, 20 insertions(+), 14 deletions(-)
delete mode 100644 Documentation/devicetree/bindings/arm/altera.txt
create mode 100644 Documentation/devicetree/bindings/arm/altera.yaml
diff --git a/Documentation/devicetree/bindings/arm/altera.txt b/Documentation/devicetree/bindings/arm/altera.txt
deleted file mode 100644
index 558735aacca8..000000000000
--- a/Documentation/devicetree/bindings/arm/altera.txt
+++ /dev/null
@@ -1,14 +0,0 @@
-Altera's SoCFPGA platform device tree bindings
----------------------------------------------
-
-Boards with Cyclone 5 SoC:
-Required root node properties:
-compatible = "altr,socfpga-cyclone5", "altr,socfpga";
-
-Boards with Arria 5 SoC:
-Required root node properties:
-compatible = "altr,socfpga-arria5", "altr,socfpga";
-
-Boards with Arria 10 SoC:
-Required root node properties:
-compatible = "altr,socfpga-arria10", "altr,socfpga";
diff --git a/Documentation/devicetree/bindings/arm/altera.yaml b/Documentation/devicetree/bindings/arm/altera.yaml
new file mode 100644
index 000000000000..0fc6564badc3
--- /dev/null
+++ b/Documentation/devicetree/bindings/arm/altera.yaml
@@ -0,0 +1,20 @@
+# SPDX-License-Identifier: None
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/bindings/arm/altera.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: Altera's SoCFPGA platform device tree bindings
+
+maintainers:
+ - Dinh Nguyen <[email protected]>
+
+properties:
+ compatible:
+ items:
+ - enum:
+ - altr,socfpga-cyclone5
+ - altr,socfpga-arria5
+ - altr,socfpga-arria10
+ - const: altr,socfpga
+...
--
2.17.1
Convert Atmel SoC bindings to DT schema format using json-schema.
Cc: Mark Rutland <[email protected]>
Cc: Nicolas Ferre <[email protected]>
Cc: Alexandre Belloni <[email protected]>
Cc: [email protected]
Cc: [email protected]
Signed-off-by: Rob Herring <[email protected]>
---
.../devicetree/bindings/arm/atmel-at91.txt | 72 ----------
.../devicetree/bindings/arm/atmel-at91.yaml | 132 ++++++++++++++++++
2 files changed, 132 insertions(+), 72 deletions(-)
delete mode 100644 Documentation/devicetree/bindings/arm/atmel-at91.txt
create mode 100644 Documentation/devicetree/bindings/arm/atmel-at91.yaml
diff --git a/Documentation/devicetree/bindings/arm/atmel-at91.txt b/Documentation/devicetree/bindings/arm/atmel-at91.txt
deleted file mode 100644
index 4bf1b4da7659..000000000000
--- a/Documentation/devicetree/bindings/arm/atmel-at91.txt
+++ /dev/null
@@ -1,72 +0,0 @@
-Atmel AT91 device tree bindings.
-================================
-
-Boards with a SoC of the Atmel AT91 or SMART family shall have the following
-properties:
-
-Required root node properties:
-compatible: must be one of:
- * "atmel,at91rm9200"
-
- * "atmel,at91sam9" for SoCs using an ARM926EJ-S core, shall be extended with
- the specific SoC family or compatible:
- o "atmel,at91sam9260"
- o "atmel,at91sam9261"
- o "atmel,at91sam9263"
- o "atmel,at91sam9x5" for the 5 series, shall be extended with the specific
- SoC compatible:
- - "atmel,at91sam9g15"
- - "atmel,at91sam9g25"
- - "atmel,at91sam9g35"
- - "atmel,at91sam9x25"
- - "atmel,at91sam9x35"
- o "atmel,at91sam9g20"
- o "atmel,at91sam9g45"
- o "atmel,at91sam9n12"
- o "atmel,at91sam9rl"
- o "atmel,at91sam9xe"
- * "atmel,sama5" for SoCs using a Cortex-A5, shall be extended with the specific
- SoC family:
- o "atmel,sama5d2" shall be extended with the specific SoC compatible:
- - "atmel,sama5d27"
- o "atmel,sama5d3" shall be extended with the specific SoC compatible:
- - "atmel,sama5d31"
- - "atmel,sama5d33"
- - "atmel,sama5d34"
- - "atmel,sama5d35"
- - "atmel,sama5d36"
- o "atmel,sama5d4" shall be extended with the specific SoC compatible:
- - "atmel,sama5d41"
- - "atmel,sama5d42"
- - "atmel,sama5d43"
- - "atmel,sama5d44"
-
- * "atmel,samv7" for MCUs using a Cortex-M7, shall be extended with the specific
- SoC family:
- o "atmel,sams70" shall be extended with the specific MCU compatible:
- - "atmel,sams70j19"
- - "atmel,sams70j20"
- - "atmel,sams70j21"
- - "atmel,sams70n19"
- - "atmel,sams70n20"
- - "atmel,sams70n21"
- - "atmel,sams70q19"
- - "atmel,sams70q20"
- - "atmel,sams70q21"
- o "atmel,samv70" shall be extended with the specific MCU compatible:
- - "atmel,samv70j19"
- - "atmel,samv70j20"
- - "atmel,samv70n19"
- - "atmel,samv70n20"
- - "atmel,samv70q19"
- - "atmel,samv70q20"
- o "atmel,samv71" shall be extended with the specific MCU compatible:
- - "atmel,samv71j19"
- - "atmel,samv71j20"
- - "atmel,samv71j21"
- - "atmel,samv71n19"
- - "atmel,samv71n20"
- - "atmel,samv71n21"
- - "atmel,samv71q19"
- - "atmel,samv71q20"
- - "atmel,samv71q21"
diff --git a/Documentation/devicetree/bindings/arm/atmel-at91.yaml b/Documentation/devicetree/bindings/arm/atmel-at91.yaml
new file mode 100644
index 000000000000..f788315b94fa
--- /dev/null
+++ b/Documentation/devicetree/bindings/arm/atmel-at91.yaml
@@ -0,0 +1,132 @@
+# SPDX-License-Identifier: None
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/bindings/arm/atmel-at91.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: Atmel AT91 device tree bindings.
+
+maintainers:
+ - Alexandre Belloni <[email protected]>
+ - Jean-Christophe PLAGNIOL-VILLARD <[email protected]>
+description: |
+ Boards with a SoC of the Atmel AT91 or SMART family shall have the following
+
+properties:
+ $nodename:
+ const: '/'
+ compatible:
+ oneOf:
+ - items:
+ - const: atmel,at91rm9200
+ - items:
+ - enum:
+ - olimex,sam9-l9260
+ - enum:
+ - atmel,at91sam9260
+ - atmel,at91sam9261
+ - atmel,at91sam9263
+ - atmel,at91sam9g20
+ - atmel,at91sam9g45
+ - atmel,at91sam9n12
+ - atmel,at91sam9rl
+ - atmel,at91sam9xe
+ - const: atmel,at91sam9
+
+ - items:
+ - enum:
+ - atmel,at91sam9g15
+ - atmel,at91sam9g25
+ - atmel,at91sam9g35
+ - atmel,at91sam9x25
+ - atmel,at91sam9x35
+ - const: atmel,at91sam9x5
+ - const: atmel,at91sam9
+
+ - items:
+ - const: atmel,sama5d27
+ - const: atmel,sama5d2
+ - const: atmel,sama5
+
+ - description: Nattis v2 board with Natte v2 power board
+ items:
+ - const: axentia,nattis-2
+ - const: axentia,natte-2
+ - const: axentia,linea
+ - const: atmel,sama5d31
+ - const: atmel,sama5d3
+ - const: atmel,sama5
+
+ - description: TSE-850 v3 board
+ items:
+ - const: axentia,tse850v3
+ - const: axentia,linea
+ - const: atmel,sama5d31
+ - const: atmel,sama5d3
+ - const: atmel,sama5
+
+ - items:
+ - const: axentia,linea
+ - const: atmel,sama5d31
+ - const: atmel,sama5d3
+ - const: atmel,sama5
+
+ - items:
+ - enum:
+ - atmel,sama5d31
+ - atmel,sama5d33
+ - atmel,sama5d34
+ - atmel,sama5d35
+ - atmel,sama5d36
+ - const: atmel,sama5d3
+ - const: atmel,sama5
+
+ - items:
+ - enum:
+ - atmel,sama5d41
+ - atmel,sama5d42
+ - atmel,sama5d43
+ - atmel,sama5d44
+ - const: atmel,sama5d4
+ - const: atmel,sama5
+
+ - items:
+ - enum:
+ - atmel,sams70j19
+ - atmel,sams70j20
+ - atmel,sams70j21
+ - atmel,sams70n19
+ - atmel,sams70n20
+ - atmel,sams70n21
+ - atmel,sams70q19
+ - atmel,sams70q20
+ - atmel,sams70q21
+ - const: atmel,sams70
+ - const: atmel,samv7
+
+ - items:
+ - enum:
+ - atmel,samv70j19
+ - atmel,samv70j20
+ - atmel,samv70n19
+ - atmel,samv70n20
+ - atmel,samv70q19
+ - atmel,samv70q20
+ - const: atmel,samv70
+ - const: atmel,samv7
+
+ - items:
+ - enum:
+ - atmel,samv71j19
+ - atmel,samv71j20
+ - atmel,samv71j21
+ - atmel,samv71n19
+ - atmel,samv71n20
+ - atmel,samv71n21
+ - atmel,samv71q19
+ - atmel,samv71q20
+ - atmel,samv71q21
+ - const: atmel,samv71
+ - const: atmel,samv7
+
+...
--
2.17.1
Convert Rockchip SoC bindings to DT schema format using json-schema.
Cc: Mark Rutland <[email protected]>
Cc: Heiko Stuebner <[email protected]>
Cc: [email protected]
Cc: [email protected]
Cc: [email protected]
Signed-off-by: Rob Herring <[email protected]>
---
.../devicetree/bindings/arm/rockchip.txt | 220 ----------------
.../devicetree/bindings/arm/rockchip.yaml | 242 ++++++++++++++++++
2 files changed, 242 insertions(+), 220 deletions(-)
delete mode 100644 Documentation/devicetree/bindings/arm/rockchip.txt
create mode 100644 Documentation/devicetree/bindings/arm/rockchip.yaml
diff --git a/Documentation/devicetree/bindings/arm/rockchip.txt b/Documentation/devicetree/bindings/arm/rockchip.txt
deleted file mode 100644
index acfd3c773dd0..000000000000
--- a/Documentation/devicetree/bindings/arm/rockchip.txt
+++ /dev/null
@@ -1,220 +0,0 @@
-Rockchip platforms device tree bindings
----------------------------------------
-
-- 96boards RK3399 Ficus (ROCK960 Enterprise Edition)
- Required root node properties:
- - compatible = "vamrs,ficus", "rockchip,rk3399";
-
-- Amarula Vyasa RK3288 board
- Required root node properties:
- - compatible = "amarula,vyasa-rk3288", "rockchip,rk3288";
-
-- Asus Tinker board
- Required root node properties:
- - compatible = "asus,rk3288-tinker", "rockchip,rk3288";
-
-- Kylin RK3036 board:
- Required root node properties:
- - compatible = "rockchip,kylin-rk3036", "rockchip,rk3036";
-
-- MarsBoard RK3066 board:
- Required root node properties:
- - compatible = "haoyu,marsboard-rk3066", "rockchip,rk3066a";
-
-- bq Curie 2 tablet:
- Required root node properties:
- - compatible = "mundoreader,bq-curie2", "rockchip,rk3066a";
-
-- ChipSPARK Rayeager PX2 board:
- Required root node properties:
- - compatible = "chipspark,rayeager-px2", "rockchip,rk3066a";
-
-- Radxa Rock board:
- Required root node properties:
- - compatible = "radxa,rock", "rockchip,rk3188";
-
-- Radxa Rock2 Square board:
- Required root node properties:
- - compatible = "radxa,rock2-square", "rockchip,rk3288";
-
-- Rikomagic MK808 v1 board:
- Required root node properties:
- - compatible = "rikomagic,mk808", "rockchip,rk3066a";
-
-- Firefly Firefly-RK3288 board:
- Required root node properties:
- - compatible = "firefly,firefly-rk3288", "rockchip,rk3288";
- or
- - compatible = "firefly,firefly-rk3288-beta", "rockchip,rk3288";
-
-- Firefly Firefly-RK3288 Reload board:
- Required root node properties:
- - compatible = "firefly,firefly-rk3288-reload", "rockchip,rk3288";
-
-- Firefly Firefly-RK3399 board:
- Required root node properties:
- - compatible = "firefly,firefly-rk3399", "rockchip,rk3399";
-
-- Firefly roc-rk3328-cc board:
- Required root node properties:
- - compatible = "firefly,roc-rk3328-cc", "rockchip,rk3328";
-
-- ChipSPARK PopMetal-RK3288 board:
- Required root node properties:
- - compatible = "chipspark,popmetal-rk3288", "rockchip,rk3288";
-
-- Netxeon R89 board:
- Required root node properties:
- - compatible = "netxeon,r89", "rockchip,rk3288";
-
-- GeekBuying GeekBox:
- Required root node properties:
- - compatible = "geekbuying,geekbox", "rockchip,rk3368";
-
-- Google Bob (Asus Chromebook Flip C101PA):
- Required root node properties:
- compatible = "google,bob-rev13", "google,bob-rev12",
- "google,bob-rev11", "google,bob-rev10",
- "google,bob-rev9", "google,bob-rev8",
- "google,bob-rev7", "google,bob-rev6",
- "google,bob-rev5", "google,bob-rev4",
- "google,bob", "google,gru", "rockchip,rk3399";
-
-- Google Brain (dev-board):
- Required root node properties:
- - compatible = "google,veyron-brain-rev0", "google,veyron-brain",
- "google,veyron", "rockchip,rk3288";
-
-- Google Gru (dev-board):
- Required root node properties:
- - compatible = "google,gru-rev15", "google,gru-rev14",
- "google,gru-rev13", "google,gru-rev12",
- "google,gru-rev11", "google,gru-rev10",
- "google,gru-rev9", "google,gru-rev8",
- "google,gru-rev7", "google,gru-rev6",
- "google,gru-rev5", "google,gru-rev4",
- "google,gru-rev3", "google,gru-rev2",
- "google,gru", "rockchip,rk3399";
-
-- Google Jaq (Haier Chromebook 11 and more):
- Required root node properties:
- - compatible = "google,veyron-jaq-rev5", "google,veyron-jaq-rev4",
- "google,veyron-jaq-rev3", "google,veyron-jaq-rev2",
- "google,veyron-jaq-rev1", "google,veyron-jaq",
- "google,veyron", "rockchip,rk3288";
-
-- Google Jerry (Hisense Chromebook C11 and more):
- Required root node properties:
- - compatible = "google,veyron-jerry-rev7", "google,veyron-jerry-rev6",
- "google,veyron-jerry-rev5", "google,veyron-jerry-rev4",
- "google,veyron-jerry-rev3", "google,veyron-jerry",
- "google,veyron", "rockchip,rk3288";
-
-- Google Kevin (Samsung Chromebook Plus):
- Required root node properties:
- - compatible = "google,kevin-rev15", "google,kevin-rev14",
- "google,kevin-rev13", "google,kevin-rev12",
- "google,kevin-rev11", "google,kevin-rev10",
- "google,kevin-rev9", "google,kevin-rev8",
- "google,kevin-rev7", "google,kevin-rev6",
- "google,kevin", "google,gru", "rockchip,rk3399";
-
-- Google Mickey (Asus Chromebit CS10):
- Required root node properties:
- - compatible = "google,veyron-mickey-rev8", "google,veyron-mickey-rev7",
- "google,veyron-mickey-rev6", "google,veyron-mickey-rev5",
- "google,veyron-mickey-rev4", "google,veyron-mickey-rev3",
- "google,veyron-mickey-rev2", "google,veyron-mickey-rev1",
- "google,veyron-mickey-rev0", "google,veyron-mickey",
- "google,veyron", "rockchip,rk3288";
-
-- Google Minnie (Asus Chromebook Flip C100P):
- Required root node properties:
- - compatible = "google,veyron-minnie-rev4", "google,veyron-minnie-rev3",
- "google,veyron-minnie-rev2", "google,veyron-minnie-rev1",
- "google,veyron-minnie-rev0", "google,veyron-minnie",
- "google,veyron", "rockchip,rk3288";
-
-- Google Pinky (dev-board):
- Required root node properties:
- - compatible = "google,veyron-pinky-rev2", "google,veyron-pinky",
- "google,veyron", "rockchip,rk3288";
-
-- Google Speedy (Asus C201 Chromebook):
- Required root node properties:
- - compatible = "google,veyron-speedy-rev9", "google,veyron-speedy-rev8",
- "google,veyron-speedy-rev7", "google,veyron-speedy-rev6",
- "google,veyron-speedy-rev5", "google,veyron-speedy-rev4",
- "google,veyron-speedy-rev3", "google,veyron-speedy-rev2",
- "google,veyron-speedy", "google,veyron", "rockchip,rk3288";
-
-- mqmaker MiQi:
- Required root node properties:
- - compatible = "mqmaker,miqi", "rockchip,rk3288";
-
-- Phytec phyCORE-RK3288: Rapid Development Kit
- Required root node properties:
- - compatible = "phytec,rk3288-pcm-947", "phytec,rk3288-phycore-som", "rockchip,rk3288";
-
-- Pine64 Rock64 board:
- Required root node properties:
- - compatible = "pine64,rock64", "rockchip,rk3328";
-
-- Rockchip PX3 Evaluation board:
- Required root node properties:
- - compatible = "rockchip,px3-evb", "rockchip,px3", "rockchip,rk3188";
-
-- Rockchip PX5 Evaluation board:
- Required root node properties:
- - compatible = "rockchip,px5-evb", "rockchip,px5", "rockchip,rk3368";
-
-- Rockchip RV1108 Evaluation board
- Required root node properties:
- - compatible = "rockchip,rv1108-evb", "rockchip,rv1108";
-
-- Rockchip RK3368 evb:
- Required root node properties:
- - compatible = "rockchip,rk3368-evb-act8846", "rockchip,rk3368";
-
-- Rockchip R88 board:
- Required root node properties:
- - compatible = "rockchip,r88", "rockchip,rk3368";
-
-- Rockchip RK3228 Evaluation board:
- Required root node properties:
- - compatible = "rockchip,rk3228-evb", "rockchip,rk3228";
-
-- Rockchip RK3229 Evaluation board:
- - compatible = "rockchip,rk3229-evb", "rockchip,rk3229";
-
-- Rockchip RK3288 Fennec board:
- Required root node properties:
- - compatible = "rockchip,rk3288-fennec", "rockchip,rk3288";
-
-- Rockchip RK3328 evb:
- Required root node properties:
- - compatible = "rockchip,rk3328-evb", "rockchip,rk3328";
-
-- Rockchip RK3399 evb:
- Required root node properties:
- - compatible = "rockchip,rk3399-evb", "rockchip,rk3399";
-
-- Rockchip RK3399 Sapphire board standalone:
- Required root node properties:
- - compatible = "rockchip,rk3399-sapphire", "rockchip,rk3399";
-
-- Rockchip RK3399 Sapphire Excavator board:
- Required root node properties:
- - compatible = "rockchip,rk3399-sapphire-excavator", "rockchip,rk3399";
-
-- Theobroma Systems RK3368-uQ7 Haikou Baseboard:
- Required root node properties:
- - compatible = "tsd,rk3368-uq7-haikou", "rockchip,rk3368";
-
-- Theobroma Systems RK3399-Q7 Haikou Baseboard:
- Required root node properties:
- - compatible = "tsd,rk3399-q7-haikou", "rockchip,rk3399";
-
-- Tronsmart Orion R68 Meta
- Required root node properties:
- - compatible = "tronsmart,orion-r68-meta", "rockchip,rk3368";
diff --git a/Documentation/devicetree/bindings/arm/rockchip.yaml b/Documentation/devicetree/bindings/arm/rockchip.yaml
new file mode 100644
index 000000000000..4b4b892e5af7
--- /dev/null
+++ b/Documentation/devicetree/bindings/arm/rockchip.yaml
@@ -0,0 +1,242 @@
+# SPDX-License-Identifier: None
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/bindings/arm/rockchip.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: Rockchip platforms device tree bindings
+
+maintainers:
+ - Beniamino Galvani <[email protected]>
+ - Heiko Stuebner <[email protected]>
+
+properties:
+ $nodename:
+ const: '/'
+ compatible:
+ oneOf:
+ - items:
+ - enum:
+ - amarula,vyasa-rk3288
+ - asus,rk3288-tinker
+ - radxa,rock2-square
+ - chipspark,popmetal-rk3288
+ - netxeon,r89
+ - firefly,firefly-rk3288
+ - firefly,firefly-rk3288-beta
+ - firefly,firefly-rk3288-reload
+ - mqmaker,miqi
+ - rockchip,rk3288-fennec
+ - const: rockchip,rk3288
+
+ - description: Phytec phyCORE-RK3288 Rapid Development Kit
+ items:
+ - const: phytec,rk3288-pcm-947
+ - const: phytec,rk3288-phycore-som
+ - const: rockchip,rk3288
+
+ - description: Google Mickey (Asus Chromebit CS10)
+ items:
+ - const: google,veyron-mickey-rev8
+ - const: google,veyron-mickey-rev7
+ - const: google,veyron-mickey-rev6
+ - const: google,veyron-mickey-rev5
+ - const: google,veyron-mickey-rev4
+ - const: google,veyron-mickey-rev3
+ - const: google,veyron-mickey-rev2
+ - const: google,veyron-mickey-rev1
+ - const: google,veyron-mickey-rev0
+ - const: google,veyron-mickey
+ - const: google,veyron
+ - const: rockchip,rk3288
+
+ - description: Google Minnie (Asus Chromebook Flip C100P)
+ items:
+ - const: google,veyron-minnie-rev4
+ - const: google,veyron-minnie-rev3
+ - const: google,veyron-minnie-rev2
+ - const: google,veyron-minnie-rev1
+ - const: google,veyron-minnie-rev0
+ - const: google,veyron-minnie
+ - const: google,veyron
+ - const: rockchip,rk3288
+
+ - description: Google Pinky (dev-board)
+ items:
+ - const: google,veyron-pinky-rev2
+ - const: google,veyron-pinky
+ - const: google,veyron
+ - const: rockchip,rk3288
+
+ - description: Google Speedy (Asus C201 Chromebook)
+ items:
+ - const: google,veyron-speedy-rev9
+ - const: google,veyron-speedy-rev8
+ - const: google,veyron-speedy-rev7
+ - const: google,veyron-speedy-rev6
+ - const: google,veyron-speedy-rev5
+ - const: google,veyron-speedy-rev4
+ - const: google,veyron-speedy-rev3
+ - const: google,veyron-speedy-rev2
+ - const: google,veyron-speedy
+ - const: google,veyron
+ - const: rockchip,rk3288
+
+ - description: Google Jaq (Haier Chromebook 11 and more)
+ items:
+ - const: google,veyron-jaq-rev5
+ - const: google,veyron-jaq-rev4
+ - const: google,veyron-jaq-rev3
+ - const: google,veyron-jaq-rev2
+ - const: google,veyron-jaq-rev1
+ - const: google,veyron-jaq
+ - const: google,veyron
+ - const: rockchip,rk3288
+
+ - description: Google Jerry (Hisense Chromebook C11 and more)
+ items:
+ - const: google,veyron-jerry-rev7
+ - const: google,veyron-jerry-rev6
+ - const: google,veyron-jerry-rev5
+ - const: google,veyron-jerry-rev4
+ - const: google,veyron-jerry-rev3
+ - const: google,veyron-jerry
+ - const: google,veyron
+ - const: rockchip,rk3288
+
+ - description: Google Brain (dev-board)
+ items:
+ - const: google,veyron-brain-rev0
+ - const: google,veyron-brain
+ - const: google,veyron
+ - const: rockchip,rk3288
+
+ - items:
+ - enum:
+ - rockchip,kylin-rk3036
+ - const: rockchip,rk3036
+
+ - items:
+ - enum:
+ - haoyu,marsboard-rk3066
+ - mundoreader,bq-curie2
+ - chipspark,rayeager-px2
+ - rikomagic,mk80
+ - const: rockchip,rk3066a
+
+ - items:
+ - enum:
+ - radxa,rock
+ - const: rockchip,rk3188
+
+ - items:
+ - const: rockchip,px3-evb
+ - const: rockchip,px3
+ - const: rockchip,rk3188
+
+ - items:
+ - enum:
+ - firefly,roc-rk3328-cc
+ - pine64,rock64
+ - rockchip,rk3328-evb
+ - const: rockchip,rk3328
+
+ - items:
+ - enum:
+ - geekbuying,geekbox
+ - rockchip,rk3368-evb-act8846
+ - rockchip,r88
+ - tsd,rk3368-uq7-haikou
+ - tronsmart,orion-r68-meta
+ - const: rockchip,rk3368
+
+ - items:
+ - enum:
+ - geekbuying,geekbox
+ - rockchip,rk3368-evb-act8846
+ - rockchip,r88
+ - tsd,rk3368-uq7-haikou
+ - tronsmart,orion-r68-meta
+ - const: rockchip,rk3368
+
+ - items:
+ - const: rockchip,px5-evb
+ - const: rockchip,px5
+ - const: rockchip,rk3368
+
+ - items:
+ - enum:
+ - firefly,firefly-rk3399
+ - rockchip,rk3399-evb
+ - rockchip,rk3399-sapphire
+ - rockchip,rk3399-sapphire-excavator
+ - tsd,rk3399-q7-haikou
+ - vamrs,ficus
+ - const: rockchip,rk3399
+
+ - description: Google Bob (Asus Chromebook Flip C101PA)
+ items:
+ - const: google,bob-rev13
+ - const: google,bob-rev12
+ - const: google,bob-rev11
+ - const: google,bob-rev10
+ - const: google,bob-rev9
+ - const: google,bob-rev8
+ - const: google,bob-rev7
+ - const: google,bob-rev6
+ - const: google,bob-rev5
+ - const: google,bob-rev4
+ - const: google,bob
+ - const: google,gru
+ - const: rockchip,rk3399
+
+ - description: Google Gru (dev-board)
+ items:
+ - const: google,gru-rev15
+ - const: google,gru-rev14
+ - const: google,gru-rev13
+ - const: google,gru-rev12
+ - const: google,gru-rev11
+ - const: google,gru-rev10
+ - const: google,gru-rev9
+ - const: google,gru-rev8
+ - const: google,gru-rev7
+ - const: google,gru-rev6
+ - const: google,gru-rev5
+ - const: google,gru-rev4
+ - const: google,gru-rev3
+ - const: google,gru-rev2
+ - const: google,gru
+ - const: rockchip,rk3399
+
+ - description: Google Kevin (Samsung Chromebook Plus)
+ items:
+ - const: google,kevin-rev15
+ - const: google,kevin-rev14
+ - const: google,kevin-rev13
+ - const: google,kevin-rev12
+ - const: google,kevin-rev11
+ - const: google,kevin-rev10
+ - const: google,kevin-rev9
+ - const: google,kevin-rev8
+ - const: google,kevin-rev7
+ - const: google,kevin-rev6
+ - const: google,kevin
+ - const: google,gru
+ - const: rockchip,rk3399
+
+ - items:
+ - enum:
+ - rockchip,rv1108-evb
+ - const: rockchip,rv1108
+
+ - items:
+ - enum:
+ - rockchip,rk3228-evb
+ - const: rockchip,rk3228
+
+ - items:
+ - enum:
+ - rockchip,rk3229-evb
+ - const: rockchip,rk3229
+...
--
2.17.1
Convert ARM Primecell binding to DT schema format using json-schema.
Cc: Mark Rutland <[email protected]>
Cc: [email protected]
Signed-off-by: Rob Herring <[email protected]>
---
.../devicetree/bindings/arm/primecell.txt | 46 -------------------
.../devicetree/bindings/arm/primecell.yaml | 35 ++++++++++++++
2 files changed, 35 insertions(+), 46 deletions(-)
delete mode 100644 Documentation/devicetree/bindings/arm/primecell.txt
create mode 100644 Documentation/devicetree/bindings/arm/primecell.yaml
diff --git a/Documentation/devicetree/bindings/arm/primecell.txt b/Documentation/devicetree/bindings/arm/primecell.txt
deleted file mode 100644
index 0df6acacfaea..000000000000
--- a/Documentation/devicetree/bindings/arm/primecell.txt
+++ /dev/null
@@ -1,46 +0,0 @@
-* ARM Primecell Peripherals
-
-ARM, Ltd. Primecell peripherals have a standard id register that can be used to
-identify the peripheral type, vendor, and revision. This value can be used for
-driver matching.
-
-Required properties:
-
-- compatible : should be a specific name for the peripheral and
- "arm,primecell". The specific name will match the ARM
- engineering name for the logic block in the form: "arm,pl???"
-
-Optional properties:
-
-- arm,primecell-periphid : Value to override the h/w value with
-- clocks : From common clock binding. First clock is phandle to clock for apb
- pclk. Additional clocks are optional and specific to those peripherals.
-- clock-names : From common clock binding. Shall be "apb_pclk" for first clock.
-- dmas : From common DMA binding. If present, refers to one or more dma channels.
-- dma-names : From common DMA binding, needs to match the 'dmas' property.
- Devices with exactly one receive and transmit channel shall name
- these "rx" and "tx", respectively.
-- pinctrl-<n> : Pinctrl states as described in bindings/pinctrl/pinctrl-bindings.txt
-- pinctrl-names : Names corresponding to the numbered pinctrl states
-- interrupts : one or more interrupt specifiers
-- interrupt-names : names corresponding to the interrupts properties
-
-Example:
-
-serial@fff36000 {
- compatible = "arm,pl011", "arm,primecell";
- arm,primecell-periphid = <0x00341011>;
-
- clocks = <&pclk>;
- clock-names = "apb_pclk";
-
- dmas = <&dma-controller 4>, <&dma-controller 5>;
- dma-names = "rx", "tx";
-
- pinctrl-0 = <&uart0_default_mux>, <&uart0_default_mode>;
- pinctrl-1 = <&uart0_sleep_mode>;
- pinctrl-names = "default","sleep";
-
- interrupts = <0 11 0x4>;
-};
-
diff --git a/Documentation/devicetree/bindings/arm/primecell.yaml b/Documentation/devicetree/bindings/arm/primecell.yaml
new file mode 100644
index 000000000000..d8097521dc7d
--- /dev/null
+++ b/Documentation/devicetree/bindings/arm/primecell.yaml
@@ -0,0 +1,35 @@
+# SPDX-License-Identifier: None
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/bindings/arm/primecell.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: ARM Primecell Peripherals
+
+maintainers:
+ - Grant Likely <[email protected]>
+description: |+
+ ARM, Ltd. Primecell peripherals have a standard id register that can be used to
+ identify the peripheral type, vendor, and revision. This value can be used for
+ driver matching.
+
+properties:
+ compatible:
+ contains:
+ const: arm,primecell
+ description:
+ Should be a specific name for the peripheral followed by "arm,primecell".
+ The specific name will match the ARM engineering name for the logic block
+ in the form "arm,pl???"
+
+ arm,primecell-periphid:
+ $ref: /schemas/types.yaml#/definitions/uint32
+ description: Value to override the h/w ID value
+ clocks:
+ minItems: 1
+ maxItems: 32
+ clock-names:
+ contains:
+ const: apb_pclk
+ additionalItems: true
+...
--
2.17.1
Convert TI NSpire SoC bindings to DT schema format using json-schema.
Cc: Mark Rutland <[email protected]>
Cc: [email protected]
Signed-off-by: Rob Herring <[email protected]>
---
.../devicetree/bindings/arm/nspire.txt | 14 -----------
.../devicetree/bindings/arm/ti/nspire.yaml | 24 +++++++++++++++++++
2 files changed, 24 insertions(+), 14 deletions(-)
delete mode 100644 Documentation/devicetree/bindings/arm/nspire.txt
create mode 100644 Documentation/devicetree/bindings/arm/ti/nspire.yaml
diff --git a/Documentation/devicetree/bindings/arm/nspire.txt b/Documentation/devicetree/bindings/arm/nspire.txt
deleted file mode 100644
index 4d08518bd176..000000000000
--- a/Documentation/devicetree/bindings/arm/nspire.txt
+++ /dev/null
@@ -1,14 +0,0 @@
-TI-NSPIRE calculators
-
-Required properties:
-- compatible: Compatible property value should contain "ti,nspire".
- CX models should have "ti,nspire-cx"
- Touchpad models should have "ti,nspire-tp"
- Clickpad models should have "ti,nspire-clp"
-
-Example:
-
-/ {
- model = "TI-NSPIRE CX";
- compatible = "ti,nspire-cx";
- ...
diff --git a/Documentation/devicetree/bindings/arm/ti/nspire.yaml b/Documentation/devicetree/bindings/arm/ti/nspire.yaml
new file mode 100644
index 000000000000..882f79f95942
--- /dev/null
+++ b/Documentation/devicetree/bindings/arm/ti/nspire.yaml
@@ -0,0 +1,24 @@
+# SPDX-License-Identifier: None
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/bindings/arm/nspire.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: TI-NSPIRE calculators
+
+maintainers:
+ - Daniel Tang <[email protected]>
+
+properties:
+ $nodename:
+ const: '/'
+ compatible:
+ items:
+ - enum:
+ # CX models
+ - ti,nspire-cx
+ # Touchpad models
+ - ti,nspire-tp
+ # Clickpad models
+ - ti,nspire-clp
+...
--
2.17.1
Convert ARM CPU binding to DT schema format using json-schema.
Cc: Mark Rutland <[email protected]>
Cc: Matthias Brugger <[email protected]>
Cc: [email protected]
Cc: [email protected]
Cc: [email protected]
Signed-off-by: Rob Herring <[email protected]>
---
.../devicetree/bindings/arm/cpus.txt | 490 -----------------
.../devicetree/bindings/arm/cpus.yaml | 503 ++++++++++++++++++
2 files changed, 503 insertions(+), 490 deletions(-)
delete mode 100644 Documentation/devicetree/bindings/arm/cpus.txt
create mode 100644 Documentation/devicetree/bindings/arm/cpus.yaml
diff --git a/Documentation/devicetree/bindings/arm/cpus.txt b/Documentation/devicetree/bindings/arm/cpus.txt
deleted file mode 100644
index b0198a1cf403..000000000000
--- a/Documentation/devicetree/bindings/arm/cpus.txt
+++ /dev/null
@@ -1,490 +0,0 @@
-=================
-ARM CPUs bindings
-=================
-
-The device tree allows to describe the layout of CPUs in a system through
-the "cpus" node, which in turn contains a number of subnodes (ie "cpu")
-defining properties for every cpu.
-
-Bindings for CPU nodes follow the Devicetree Specification, available from:
-
-https://www.devicetree.org/specifications/
-
-with updates for 32-bit and 64-bit ARM systems provided in this document.
-
-================================
-Convention used in this document
-================================
-
-This document follows the conventions described in the Devicetree
-Specification, with the addition:
-
-- square brackets define bitfields, eg reg[7:0] value of the bitfield in
- the reg property contained in bits 7 down to 0
-
-=====================================
-cpus and cpu node bindings definition
-=====================================
-
-The ARM architecture, in accordance with the Devicetree Specification,
-requires the cpus and cpu nodes to be present and contain the properties
-described below.
-
-- cpus node
-
- Description: Container of cpu nodes
-
- The node name must be "cpus".
-
- A cpus node must define the following properties:
-
- - #address-cells
- Usage: required
- Value type: <u32>
-
- Definition depends on ARM architecture version and
- configuration:
-
- # On uniprocessor ARM architectures previous to v7
- value must be 1, to enable a simple enumeration
- scheme for processors that do not have a HW CPU
- identification register.
- # On 32-bit ARM 11 MPcore, ARM v7 or later systems
- value must be 1, that corresponds to CPUID/MPIDR
- registers sizes.
- # On ARM v8 64-bit systems value should be set to 2,
- that corresponds to the MPIDR_EL1 register size.
- If MPIDR_EL1[63:32] value is equal to 0 on all CPUs
- in the system, #address-cells can be set to 1, since
- MPIDR_EL1[63:32] bits are not used for CPUs
- identification.
- - #size-cells
- Usage: required
- Value type: <u32>
- Definition: must be set to 0
-
-- cpu node
-
- Description: Describes a CPU in an ARM based system
-
- PROPERTIES
-
- - device_type
- Usage: required
- Value type: <string>
- Definition: must be "cpu"
- - reg
- Usage and definition depend on ARM architecture version and
- configuration:
-
- # On uniprocessor ARM architectures previous to v7
- this property is required and must be set to 0.
-
- # On ARM 11 MPcore based systems this property is
- required and matches the CPUID[11:0] register bits.
-
- Bits [11:0] in the reg cell must be set to
- bits [11:0] in CPU ID register.
-
- All other bits in the reg cell must be set to 0.
-
- # On 32-bit ARM v7 or later systems this property is
- required and matches the CPU MPIDR[23:0] register
- bits.
-
- Bits [23:0] in the reg cell must be set to
- bits [23:0] in MPIDR.
-
- All other bits in the reg cell must be set to 0.
-
- # On ARM v8 64-bit systems this property is required
- and matches the MPIDR_EL1 register affinity bits.
-
- * If cpus node's #address-cells property is set to 2
-
- The first reg cell bits [7:0] must be set to
- bits [39:32] of MPIDR_EL1.
-
- The second reg cell bits [23:0] must be set to
- bits [23:0] of MPIDR_EL1.
-
- * If cpus node's #address-cells property is set to 1
-
- The reg cell bits [23:0] must be set to bits [23:0]
- of MPIDR_EL1.
-
- All other bits in the reg cells must be set to 0.
-
- - compatible:
- Usage: required
- Value type: <string>
- Definition: should be one of:
- "arm,arm710t"
- "arm,arm720t"
- "arm,arm740t"
- "arm,arm7ej-s"
- "arm,arm7tdmi"
- "arm,arm7tdmi-s"
- "arm,arm9es"
- "arm,arm9ej-s"
- "arm,arm920t"
- "arm,arm922t"
- "arm,arm925"
- "arm,arm926e-s"
- "arm,arm926ej-s"
- "arm,arm940t"
- "arm,arm946e-s"
- "arm,arm966e-s"
- "arm,arm968e-s"
- "arm,arm9tdmi"
- "arm,arm1020e"
- "arm,arm1020t"
- "arm,arm1022e"
- "arm,arm1026ej-s"
- "arm,arm1136j-s"
- "arm,arm1136jf-s"
- "arm,arm1156t2-s"
- "arm,arm1156t2f-s"
- "arm,arm1176jzf"
- "arm,arm1176jz-s"
- "arm,arm1176jzf-s"
- "arm,arm11mpcore"
- "arm,cortex-a5"
- "arm,cortex-a7"
- "arm,cortex-a8"
- "arm,cortex-a9"
- "arm,cortex-a12"
- "arm,cortex-a15"
- "arm,cortex-a17"
- "arm,cortex-a53"
- "arm,cortex-a57"
- "arm,cortex-a72"
- "arm,cortex-a73"
- "arm,cortex-m0"
- "arm,cortex-m0+"
- "arm,cortex-m1"
- "arm,cortex-m3"
- "arm,cortex-m4"
- "arm,cortex-r4"
- "arm,cortex-r5"
- "arm,cortex-r7"
- "brcm,brahma-b15"
- "brcm,brahma-b53"
- "brcm,vulcan"
- "cavium,thunder"
- "cavium,thunder2"
- "faraday,fa526"
- "intel,sa110"
- "intel,sa1100"
- "marvell,feroceon"
- "marvell,mohawk"
- "marvell,pj4a"
- "marvell,pj4b"
- "marvell,sheeva-v5"
- "nvidia,tegra132-denver"
- "nvidia,tegra186-denver"
- "nvidia,tegra194-carmel"
- "qcom,krait"
- "qcom,kryo"
- "qcom,kryo385"
- "qcom,scorpion"
- - enable-method
- Value type: <stringlist>
- Usage and definition depend on ARM architecture version.
- # On ARM v8 64-bit this property is required and must
- be one of:
- "psci"
- "spin-table"
- # On ARM 32-bit systems this property is optional and
- can be one of:
- "actions,s500-smp"
- "allwinner,sun6i-a31"
- "allwinner,sun8i-a23"
- "allwinner,sun9i-a80-smp"
- "amlogic,meson8-smp"
- "amlogic,meson8b-smp"
- "arm,realview-smp"
- "brcm,bcm11351-cpu-method"
- "brcm,bcm23550"
- "brcm,bcm2836-smp"
- "brcm,bcm-nsp-smp"
- "brcm,brahma-b15"
- "marvell,armada-375-smp"
- "marvell,armada-380-smp"
- "marvell,armada-390-smp"
- "marvell,armada-xp-smp"
- "marvell,98dx3236-smp"
- "mediatek,mt6589-smp"
- "mediatek,mt81xx-tz-smp"
- "qcom,gcc-msm8660"
- "qcom,kpss-acc-v1"
- "qcom,kpss-acc-v2"
- "renesas,apmu"
- "renesas,r9a06g032-smp"
- "rockchip,rk3036-smp"
- "rockchip,rk3066-smp"
- "ste,dbx500-smp"
-
- - cpu-release-addr
- Usage: required for systems that have an "enable-method"
- property value of "spin-table".
- Value type: <prop-encoded-array>
- Definition:
- # On ARM v8 64-bit systems must be a two cell
- property identifying a 64-bit zero-initialised
- memory location.
-
- - qcom,saw
- Usage: required for systems that have an "enable-method"
- property value of "qcom,kpss-acc-v1" or
- "qcom,kpss-acc-v2"
- Value type: <phandle>
- Definition: Specifies the SAW[1] node associated with this CPU.
-
- - qcom,acc
- Usage: required for systems that have an "enable-method"
- property value of "qcom,kpss-acc-v1" or
- "qcom,kpss-acc-v2"
- Value type: <phandle>
- Definition: Specifies the ACC[2] node associated with this CPU.
-
- - cpu-idle-states
- Usage: Optional
- Value type: <prop-encoded-array>
- Definition:
- # List of phandles to idle state nodes supported
- by this cpu [3].
-
- - capacity-dmips-mhz
- Usage: Optional
- Value type: <u32>
- Definition:
- # u32 value representing CPU capacity [4] in
- DMIPS/MHz, relative to highest capacity-dmips-mhz
- in the system.
-
- - rockchip,pmu
- Usage: optional for systems that have an "enable-method"
- property value of "rockchip,rk3066-smp"
- While optional, it is the preferred way to get access to
- the cpu-core power-domains.
- Value type: <phandle>
- Definition: Specifies the syscon node controlling the cpu core
- power domains.
-
- - dynamic-power-coefficient
- Usage: optional
- Value type: <prop-encoded-array>
- Definition: A u32 value that represents the running time dynamic
- power coefficient in units of uW/MHz/V^2. The
- coefficient can either be calculated from power
- measurements or derived by analysis.
-
- The dynamic power consumption of the CPU is
- proportional to the square of the Voltage (V) and
- the clock frequency (f). The coefficient is used to
- calculate the dynamic power as below -
-
- Pdyn = dynamic-power-coefficient * V^2 * f
-
- where voltage is in V, frequency is in MHz.
-
-Example 1 (dual-cluster big.LITTLE system 32-bit):
-
- cpus {
- #size-cells = <0>;
- #address-cells = <1>;
-
- cpu@0 {
- device_type = "cpu";
- compatible = "arm,cortex-a15";
- reg = <0x0>;
- };
-
- cpu@1 {
- device_type = "cpu";
- compatible = "arm,cortex-a15";
- reg = <0x1>;
- };
-
- cpu@100 {
- device_type = "cpu";
- compatible = "arm,cortex-a7";
- reg = <0x100>;
- };
-
- cpu@101 {
- device_type = "cpu";
- compatible = "arm,cortex-a7";
- reg = <0x101>;
- };
- };
-
-Example 2 (Cortex-A8 uniprocessor 32-bit system):
-
- cpus {
- #size-cells = <0>;
- #address-cells = <1>;
-
- cpu@0 {
- device_type = "cpu";
- compatible = "arm,cortex-a8";
- reg = <0x0>;
- };
- };
-
-Example 3 (ARM 926EJ-S uniprocessor 32-bit system):
-
- cpus {
- #size-cells = <0>;
- #address-cells = <1>;
-
- cpu@0 {
- device_type = "cpu";
- compatible = "arm,arm926ej-s";
- reg = <0x0>;
- };
- };
-
-Example 4 (ARM Cortex-A57 64-bit system):
-
-cpus {
- #size-cells = <0>;
- #address-cells = <2>;
-
- cpu@0 {
- device_type = "cpu";
- compatible = "arm,cortex-a57";
- reg = <0x0 0x0>;
- enable-method = "spin-table";
- cpu-release-addr = <0 0x20000000>;
- };
-
- cpu@1 {
- device_type = "cpu";
- compatible = "arm,cortex-a57";
- reg = <0x0 0x1>;
- enable-method = "spin-table";
- cpu-release-addr = <0 0x20000000>;
- };
-
- cpu@100 {
- device_type = "cpu";
- compatible = "arm,cortex-a57";
- reg = <0x0 0x100>;
- enable-method = "spin-table";
- cpu-release-addr = <0 0x20000000>;
- };
-
- cpu@101 {
- device_type = "cpu";
- compatible = "arm,cortex-a57";
- reg = <0x0 0x101>;
- enable-method = "spin-table";
- cpu-release-addr = <0 0x20000000>;
- };
-
- cpu@10000 {
- device_type = "cpu";
- compatible = "arm,cortex-a57";
- reg = <0x0 0x10000>;
- enable-method = "spin-table";
- cpu-release-addr = <0 0x20000000>;
- };
-
- cpu@10001 {
- device_type = "cpu";
- compatible = "arm,cortex-a57";
- reg = <0x0 0x10001>;
- enable-method = "spin-table";
- cpu-release-addr = <0 0x20000000>;
- };
-
- cpu@10100 {
- device_type = "cpu";
- compatible = "arm,cortex-a57";
- reg = <0x0 0x10100>;
- enable-method = "spin-table";
- cpu-release-addr = <0 0x20000000>;
- };
-
- cpu@10101 {
- device_type = "cpu";
- compatible = "arm,cortex-a57";
- reg = <0x0 0x10101>;
- enable-method = "spin-table";
- cpu-release-addr = <0 0x20000000>;
- };
-
- cpu@100000000 {
- device_type = "cpu";
- compatible = "arm,cortex-a57";
- reg = <0x1 0x0>;
- enable-method = "spin-table";
- cpu-release-addr = <0 0x20000000>;
- };
-
- cpu@100000001 {
- device_type = "cpu";
- compatible = "arm,cortex-a57";
- reg = <0x1 0x1>;
- enable-method = "spin-table";
- cpu-release-addr = <0 0x20000000>;
- };
-
- cpu@100000100 {
- device_type = "cpu";
- compatible = "arm,cortex-a57";
- reg = <0x1 0x100>;
- enable-method = "spin-table";
- cpu-release-addr = <0 0x20000000>;
- };
-
- cpu@100000101 {
- device_type = "cpu";
- compatible = "arm,cortex-a57";
- reg = <0x1 0x101>;
- enable-method = "spin-table";
- cpu-release-addr = <0 0x20000000>;
- };
-
- cpu@100010000 {
- device_type = "cpu";
- compatible = "arm,cortex-a57";
- reg = <0x1 0x10000>;
- enable-method = "spin-table";
- cpu-release-addr = <0 0x20000000>;
- };
-
- cpu@100010001 {
- device_type = "cpu";
- compatible = "arm,cortex-a57";
- reg = <0x1 0x10001>;
- enable-method = "spin-table";
- cpu-release-addr = <0 0x20000000>;
- };
-
- cpu@100010100 {
- device_type = "cpu";
- compatible = "arm,cortex-a57";
- reg = <0x1 0x10100>;
- enable-method = "spin-table";
- cpu-release-addr = <0 0x20000000>;
- };
-
- cpu@100010101 {
- device_type = "cpu";
- compatible = "arm,cortex-a57";
- reg = <0x1 0x10101>;
- enable-method = "spin-table";
- cpu-release-addr = <0 0x20000000>;
- };
-};
-
---
-[1] arm/msm/qcom,saw2.txt
-[2] arm/msm/qcom,kpss-acc.txt
-[3] ARM Linux kernel documentation - idle states bindings
- Documentation/devicetree/bindings/arm/idle-states.txt
-[4] ARM Linux kernel documentation - cpu capacity bindings
- Documentation/devicetree/bindings/arm/cpu-capacity.txt
diff --git a/Documentation/devicetree/bindings/arm/cpus.yaml b/Documentation/devicetree/bindings/arm/cpus.yaml
new file mode 100644
index 000000000000..bb75914324a3
--- /dev/null
+++ b/Documentation/devicetree/bindings/arm/cpus.yaml
@@ -0,0 +1,503 @@
+# SPDX-License-Identifier: None
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/bindings/arm/cpus.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: ARM CPUs bindings
+
+maintainers:
+ - Lorenzo Pieralisi <[email protected]>
+
+description: |+
+ The device tree allows to describe the layout of CPUs in a system through
+ the "cpus" node, which in turn contains a number of subnodes (ie "cpu")
+ defining properties for every cpu.
+
+ Bindings for CPU nodes follow the Devicetree Specification, available from:
+
+ https://www.devicetree.org/specifications/
+
+ with updates for 32-bit and 64-bit ARM systems provided in this document.
+
+ ================================
+ Convention used in this document
+ ================================
+
+ This document follows the conventions described in the Devicetree
+ Specification, with the addition:
+
+ - square brackets define bitfields, eg reg[7:0] value of the bitfield in
+ the reg property contained in bits 7 down to 0
+
+ =====================================
+ cpus and cpu node bindings definition
+ =====================================
+
+ The ARM architecture, in accordance with the Devicetree Specification,
+ requires the cpus and cpu nodes to be present and contain the properties
+ described below.
+
+properties:
+ $nodename:
+ const: cpus
+ description: Container of cpu nodes
+
+ '#address-cells':
+ enum: [1, 2]
+ description: |
+ Definition depends on ARM architecture version and configuration:
+
+ On uniprocessor ARM architectures previous to v7
+ value must be 1, to enable a simple enumeration
+ scheme for processors that do not have a HW CPU
+ identification register.
+ On 32-bit ARM 11 MPcore, ARM v7 or later systems
+ value must be 1, that corresponds to CPUID/MPIDR
+ registers sizes.
+ On ARM v8 64-bit systems value should be set to 2,
+ that corresponds to the MPIDR_EL1 register size.
+ If MPIDR_EL1[63:32] value is equal to 0 on all CPUs
+ in the system, #address-cells can be set to 1, since
+ MPIDR_EL1[63:32] bits are not used for CPUs
+ identification.
+
+ '#size-cells':
+ const: 0
+
+patternProperties:
+ '^cpu@[0-9a-f]+$':
+ properties:
+ device_type:
+ const: cpu
+
+ reg:
+ maxItems: 1
+ description: |
+ Usage and definition depend on ARM architecture version and
+ configuration:
+
+ On uniprocessor ARM architectures previous to v7
+ this property is required and must be set to 0.
+
+ On ARM 11 MPcore based systems this property is
+ required and matches the CPUID[11:0] register bits.
+
+ Bits [11:0] in the reg cell must be set to
+ bits [11:0] in CPU ID register.
+
+ All other bits in the reg cell must be set to 0.
+
+ On 32-bit ARM v7 or later systems this property is
+ required and matches the CPU MPIDR[23:0] register
+ bits.
+
+ Bits [23:0] in the reg cell must be set to
+ bits [23:0] in MPIDR.
+
+ All other bits in the reg cell must be set to 0.
+
+ On ARM v8 64-bit systems this property is required
+ and matches the MPIDR_EL1 register affinity bits.
+
+ * If cpus node's #address-cells property is set to 2
+
+ The first reg cell bits [7:0] must be set to
+ bits [39:32] of MPIDR_EL1.
+
+ The second reg cell bits [23:0] must be set to
+ bits [23:0] of MPIDR_EL1.
+
+ * If cpus node's #address-cells property is set to 1
+
+ The reg cell bits [23:0] must be set to bits [23:0]
+ of MPIDR_EL1.
+
+ All other bits in the reg cells must be set to 0.
+
+ compatible:
+ items:
+ - enum:
+ - arm,arm710t
+ - arm,arm720t
+ - arm,arm740t
+ - arm,arm7ej-s
+ - arm,arm7tdmi
+ - arm,arm7tdmi-s
+ - arm,arm9es
+ - arm,arm9ej-s
+ - arm,arm920t
+ - arm,arm922t
+ - arm,arm925
+ - arm,arm926e-s
+ - arm,arm926ej-s
+ - arm,arm940t
+ - arm,arm946e-s
+ - arm,arm966e-s
+ - arm,arm968e-s
+ - arm,arm9tdmi
+ - arm,arm1020e
+ - arm,arm1020t
+ - arm,arm1022e
+ - arm,arm1026ej-s
+ - arm,arm1136j-s
+ - arm,arm1136jf-s
+ - arm,arm1156t2-s
+ - arm,arm1156t2f-s
+ - arm,arm1176jzf
+ - arm,arm1176jz-s
+ - arm,arm1176jzf-s
+ - arm,arm11mpcore
+ - arm,cortex-a5
+ - arm,cortex-a7
+ - arm,cortex-a8
+ - arm,cortex-a9
+ - arm,cortex-a12
+ - arm,cortex-a15
+ - arm,cortex-a17
+ - arm,cortex-a53
+ - arm,cortex-a57
+ - arm,cortex-a72
+ - arm,cortex-a73
+ - arm,cortex-m0
+ - arm,cortex-m0+
+ - arm,cortex-m1
+ - arm,cortex-m3
+ - arm,cortex-m4
+ - arm,cortex-r4
+ - arm,cortex-r5
+ - arm,cortex-r7
+ - brcm,brahma-b15
+ - brcm,brahma-b53
+ - brcm,vulcan
+ - cavium,thunder
+ - cavium,thunder2
+ - faraday,fa526
+ - intel,sa110
+ - intel,sa1100
+ - marvell,feroceon
+ - marvell,mohawk
+ - marvell,pj4a
+ - marvell,pj4b
+ - marvell,sheeva-v5
+ - nvidia,tegra132-denver
+ - nvidia,tegra186-denver
+ - nvidia,tegra194-carmel
+ - qcom,krait
+ - qcom,kryo
+ - qcom,kryo385
+ - qcom,scorpion
+
+ enable-method:
+ allOf:
+ - $ref: '/schemas/types.yaml#/definitions/string'
+ - oneOf:
+ # On ARM v8 64-bit this property is required
+ - enum:
+ - psci
+ - spin-table
+ # On ARM 32-bit systems this property is optional
+ - enum:
+ - actions,s500-smp
+ - allwinner,sun6i-a31
+ - allwinner,sun8i-a23
+ - allwinner,sun9i-a80-smp
+ - allwinner,sun8i-a83t-smp
+ - amlogic,meson8-smp
+ - amlogic,meson8b-smp
+ - arm,realview-smp
+ - brcm,bcm11351-cpu-method
+ - brcm,bcm23550
+ - brcm,bcm2836-smp
+ - brcm,bcm63138
+ - brcm,bcm-nsp-smp
+ - brcm,brahma-b15
+ - marvell,armada-375-smp
+ - marvell,armada-380-smp
+ - marvell,armada-390-smp
+ - marvell,armada-xp-smp
+ - marvell,98dx3236-smp
+ - mediatek,mt6589-smp
+ - mediatek,mt81xx-tz-smp
+ - qcom,gcc-msm8660
+ - qcom,kpss-acc-v1
+ - qcom,kpss-acc-v2
+ - renesas,apmu
+ - renesas,r9a06g032-smp
+ - rockchip,rk3036-smp
+ - rockchip,rk3066-smp
+ - ste,dbx500-smp
+
+ cpu-release-addr:
+ $ref: '/schemas/types.yaml#/definitions/uint64'
+
+ description:
+ Required for systems that have an "enable-method"
+ property value of "spin-table".
+ On ARM v8 64-bit systems must be a two cell
+ property identifying a 64-bit zero-initialised
+ memory location.
+
+ qcom,saw:
+ $ref: '/schemas/types.yaml#/definitions/phandle'
+ description: |
+ Usage: required for systems that have an "enable-method"
+ property value of "qcom,kpss-acc-v1" or
+ "qcom,kpss-acc-v2"
+ Definition: Specifies the SAW[1] node associated with this CPU.
+
+ qcom,acc:
+ $ref: '/schemas/types.yaml#/definitions/phandle'
+ description: |
+ Usage: required for systems that have an "enable-method"
+ property value of "qcom,kpss-acc-v1" or
+ "qcom,kpss-acc-v2"
+ Definition: Specifies the ACC[2] node associated with this CPU.
+
+ cpu-idle-states:
+ $ref: '/schemas/types.yaml#/definitions/phandle-array'
+ description: |
+ Usage: Optional
+ Value type: <prop-encoded-array>
+ description: List of phandles to idle state nodes supported
+ by this cpu [3].
+
+ capacity-dmips-mhz:
+ $ref: '/schemas/types.yaml#/definitions/uint32'
+ description:
+ u32 value representing CPU capacity [4] in
+ DMIPS/MHz, relative to highest capacity-dmips-mhz
+ in the system.
+
+ rockchip,pmu:
+ description: |
+ Optional for systems that have an "enable-method"
+ property value of "rockchip,rk3066-smp"
+ While optional, it is the preferred way to get access to
+ the cpu-core power-domains.
+ Value type: <phandle>
+ Definition: Specifies the syscon node controlling the cpu core
+ power domains.
+
+ dynamic-power-coefficient:
+ $ref: '/schemas/types.yaml#/definitions/uint32'
+ description:
+ A u32 value that represents the running time dynamic
+ power coefficient in units of uW/MHz/V^2. The
+ coefficient can either be calculated from power
+ measurements or derived by analysis.
+
+ The dynamic power consumption of the CPU is
+ proportional to the square of the Voltage (V) and
+ the clock frequency (f). The coefficient is used to
+ calculate the dynamic power as below -
+
+ Pdyn = dynamic-power-coefficient * V^2 * f
+
+ where voltage is in V, frequency is in MHz.
+
+ required:
+ - device_type
+ - reg
+ - compatible
+
+ dependencies:
+ cpu-release-addr: [enable-method]
+ rockchip,pmu: [enable-method]
+
+required:
+ - '#address-cells'
+ - '#size-cells'
+
+examples:
+ - |
+ cpus {
+ #size-cells = <0>;
+ #address-cells = <1>;
+
+ cpu@0 {
+ device_type = "cpu";
+ compatible = "arm,cortex-a15";
+ reg = <0x0>;
+ };
+
+ cpu@1 {
+ device_type = "cpu";
+ compatible = "arm,cortex-a15";
+ reg = <0x1>;
+ };
+
+ cpu@100 {
+ device_type = "cpu";
+ compatible = "arm,cortex-a7";
+ reg = <0x100>;
+ };
+
+ cpu@101 {
+ device_type = "cpu";
+ compatible = "arm,cortex-a7";
+ reg = <0x101>;
+ };
+ };
+
+ - |
+ // Example 2 (Cortex-A8 uniprocessor 32-bit system):
+ cpus {
+ #size-cells = <0>;
+ #address-cells = <1>;
+
+ cpu@0 {
+ device_type = "cpu";
+ compatible = "arm,cortex-a8";
+ reg = <0x0>;
+ };
+ };
+
+ - |
+ // Example 3 (ARM 926EJ-S uniprocessor 32-bit system):
+ cpus {
+ #size-cells = <0>;
+ #address-cells = <1>;
+
+ cpu@0 {
+ device_type = "cpu";
+ compatible = "arm,arm926ej-s";
+ reg = <0x0>;
+ };
+ };
+
+ - |
+ // Example 4 (ARM Cortex-A57 64-bit system):
+ cpus {
+ #size-cells = <0>;
+ #address-cells = <2>;
+
+ cpu@0 {
+ device_type = "cpu";
+ compatible = "arm,cortex-a57";
+ reg = <0x0 0x0>;
+ enable-method = "spin-table";
+ cpu-release-addr = <0 0x20000000>;
+ };
+
+ cpu@1 {
+ device_type = "cpu";
+ compatible = "arm,cortex-a57";
+ reg = <0x0 0x1>;
+ enable-method = "spin-table";
+ cpu-release-addr = <0 0x20000000>;
+ };
+
+ cpu@100 {
+ device_type = "cpu";
+ compatible = "arm,cortex-a57";
+ reg = <0x0 0x100>;
+ enable-method = "spin-table";
+ cpu-release-addr = <0 0x20000000>;
+ };
+
+ cpu@101 {
+ device_type = "cpu";
+ compatible = "arm,cortex-a57";
+ reg = <0x0 0x101>;
+ enable-method = "spin-table";
+ cpu-release-addr = <0 0x20000000>;
+ };
+
+ cpu@10000 {
+ device_type = "cpu";
+ compatible = "arm,cortex-a57";
+ reg = <0x0 0x10000>;
+ enable-method = "spin-table";
+ cpu-release-addr = <0 0x20000000>;
+ };
+
+ cpu@10001 {
+ device_type = "cpu";
+ compatible = "arm,cortex-a57";
+ reg = <0x0 0x10001>;
+ enable-method = "spin-table";
+ cpu-release-addr = <0 0x20000000>;
+ };
+
+ cpu@10100 {
+ device_type = "cpu";
+ compatible = "arm,cortex-a57";
+ reg = <0x0 0x10100>;
+ enable-method = "spin-table";
+ cpu-release-addr = <0 0x20000000>;
+ };
+
+ cpu@10101 {
+ device_type = "cpu";
+ compatible = "arm,cortex-a57";
+ reg = <0x0 0x10101>;
+ enable-method = "spin-table";
+ cpu-release-addr = <0 0x20000000>;
+ };
+
+ cpu@100000000 {
+ device_type = "cpu";
+ compatible = "arm,cortex-a57";
+ reg = <0x1 0x0>;
+ enable-method = "spin-table";
+ cpu-release-addr = <0 0x20000000>;
+ };
+
+ cpu@100000001 {
+ device_type = "cpu";
+ compatible = "arm,cortex-a57";
+ reg = <0x1 0x1>;
+ enable-method = "spin-table";
+ cpu-release-addr = <0 0x20000000>;
+ };
+
+ cpu@100000100 {
+ device_type = "cpu";
+ compatible = "arm,cortex-a57";
+ reg = <0x1 0x100>;
+ enable-method = "spin-table";
+ cpu-release-addr = <0 0x20000000>;
+ };
+
+ cpu@100000101 {
+ device_type = "cpu";
+ compatible = "arm,cortex-a57";
+ reg = <0x1 0x101>;
+ enable-method = "spin-table";
+ cpu-release-addr = <0 0x20000000>;
+ };
+
+ cpu@100010000 {
+ device_type = "cpu";
+ compatible = "arm,cortex-a57";
+ reg = <0x1 0x10000>;
+ enable-method = "spin-table";
+ cpu-release-addr = <0 0x20000000>;
+ };
+
+ cpu@100010001 {
+ device_type = "cpu";
+ compatible = "arm,cortex-a57";
+ reg = <0x1 0x10001>;
+ enable-method = "spin-table";
+ cpu-release-addr = <0 0x20000000>;
+ };
+
+ cpu@100010100 {
+ device_type = "cpu";
+ compatible = "arm,cortex-a57";
+ reg = <0x1 0x10100>;
+ enable-method = "spin-table";
+ cpu-release-addr = <0 0x20000000>;
+ };
+
+ cpu@100010101 {
+ device_type = "cpu";
+ compatible = "arm,cortex-a57";
+ reg = <0x1 0x10101>;
+ enable-method = "spin-table";
+ cpu-release-addr = <0 0x20000000>;
+ };
+ };
+...
--
2.17.1
Convert ARM PMU binding to DT schema format using json-schema.
Cc: Will Deacon <[email protected]>
Cc: Mark Rutland <[email protected]>
Cc: [email protected]
Cc: [email protected]
Signed-off-by: Rob Herring <[email protected]>
---
Documentation/devicetree/bindings/arm/pmu.txt | 70 --------------
.../devicetree/bindings/arm/pmu.yaml | 96 +++++++++++++++++++
2 files changed, 96 insertions(+), 70 deletions(-)
delete mode 100644 Documentation/devicetree/bindings/arm/pmu.txt
create mode 100644 Documentation/devicetree/bindings/arm/pmu.yaml
diff --git a/Documentation/devicetree/bindings/arm/pmu.txt b/Documentation/devicetree/bindings/arm/pmu.txt
deleted file mode 100644
index 13611a8199bb..000000000000
--- a/Documentation/devicetree/bindings/arm/pmu.txt
+++ /dev/null
@@ -1,70 +0,0 @@
-* ARM Performance Monitor Units
-
-ARM cores often have a PMU for counting cpu and cache events like cache misses
-and hits. The interface to the PMU is part of the ARM ARM. The ARM PMU
-representation in the device tree should be done as under:-
-
-Required properties:
-
-- compatible : should be one of
- "apm,potenza-pmu"
- "arm,armv8-pmuv3"
- "arm,cortex-a73-pmu"
- "arm,cortex-a72-pmu"
- "arm,cortex-a57-pmu"
- "arm,cortex-a53-pmu"
- "arm,cortex-a35-pmu"
- "arm,cortex-a17-pmu"
- "arm,cortex-a15-pmu"
- "arm,cortex-a12-pmu"
- "arm,cortex-a9-pmu"
- "arm,cortex-a8-pmu"
- "arm,cortex-a7-pmu"
- "arm,cortex-a5-pmu"
- "arm,arm11mpcore-pmu"
- "arm,arm1176-pmu"
- "arm,arm1136-pmu"
- "brcm,vulcan-pmu"
- "cavium,thunder-pmu"
- "qcom,scorpion-pmu"
- "qcom,scorpion-mp-pmu"
- "qcom,krait-pmu"
-- interrupts : 1 combined interrupt or 1 per core. If the interrupt is a per-cpu
- interrupt (PPI) then 1 interrupt should be specified.
-
-Optional properties:
-
-- interrupt-affinity : When using SPIs, specifies a list of phandles to CPU
- nodes corresponding directly to the affinity of
- the SPIs listed in the interrupts property.
-
- When using a PPI, specifies a list of phandles to CPU
- nodes corresponding to the set of CPUs which have
- a PMU of this type signalling the PPI listed in the
- interrupts property, unless this is already specified
- by the PPI interrupt specifier itself (in which case
- the interrupt-affinity property shouldn't be present).
-
- This property should be present when there is more than
- a single SPI.
-
-
-- qcom,no-pc-write : Indicates that this PMU doesn't support the 0xc and 0xd
- events.
-
-- secure-reg-access : Indicates that the ARMv7 Secure Debug Enable Register
- (SDER) is accessible. This will cause the driver to do
- any setup required that is only possible in ARMv7 secure
- state. If not present the ARMv7 SDER will not be touched,
- which means the PMU may fail to operate unless external
- code (bootloader or security monitor) has performed the
- appropriate initialisation. Note that this property is
- not valid for non-ARMv7 CPUs or ARMv7 CPUs booting Linux
- in Non-secure state.
-
-Example:
-
-pmu {
- compatible = "arm,cortex-a9-pmu";
- interrupts = <100 101>;
-};
diff --git a/Documentation/devicetree/bindings/arm/pmu.yaml b/Documentation/devicetree/bindings/arm/pmu.yaml
new file mode 100644
index 000000000000..0dbb9e0566af
--- /dev/null
+++ b/Documentation/devicetree/bindings/arm/pmu.yaml
@@ -0,0 +1,96 @@
+# SPDX-License-Identifier: None
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/bindings/arm/pmu.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: ARM Performance Monitor Units
+
+maintainers:
+ - Mark Rutland <[email protected]>
+ - Will Deacon <[email protected]>
+description: |+
+ ARM cores often have a PMU for counting cpu and cache events like cache misses
+ and hits. The interface to the PMU is part of the ARM ARM. The ARM PMU
+ representation in the device tree should be done as under:-
+
+properties:
+ compatible:
+ items:
+ - enum:
+ - apm,potenza-pmu
+ - arm,armv8-pmuv3
+ - arm,cortex-a73-pmu
+ - arm,cortex-a72-pmu
+ - arm,cortex-a57-pmu
+ - arm,cortex-a53-pmu
+ - arm,cortex-a35-pmu
+ - arm,cortex-a17-pmu
+ - arm,cortex-a15-pmu
+ - arm,cortex-a12-pmu
+ - arm,cortex-a9-pmu
+ - arm,cortex-a8-pmu
+ - arm,cortex-a7-pmu
+ - arm,cortex-a5-pmu
+ - arm,arm11mpcore-pmu
+ - arm,arm1176-pmu
+ - arm,arm1136-pmu
+ - brcm,vulcan-pmu
+ - cavium,thunder-pmu
+ - qcom,scorpion-pmu
+ - qcom,scorpion-mp-pmu
+ - qcom,krait-pmu
+ interrupts:
+ oneOf:
+ - maxItems: 1
+ - minItems: 2
+ maxItems: 8
+ description: 1 interrupt per core.
+
+ interrupts-extended:
+ $ref: '#/properties/interrupts'
+
+ interrupt-affinity:
+ description:
+ When using SPIs, specifies a list of phandles to CPU
+ nodes corresponding directly to the affinity of
+ the SPIs listed in the interrupts property.
+
+ When using a PPI, specifies a list of phandles to CPU
+ nodes corresponding to the set of CPUs which have
+ a PMU of this type signalling the PPI listed in the
+ interrupts property, unless this is already specified
+ by the PPI interrupt specifier itself (in which case
+ the interrupt-affinity property shouldn't be present).
+
+ This property should be present when there is more than
+ a single SPI.
+
+ qcom,no-pc-write:
+ type: boolean
+ description:
+ Indicates that this PMU doesn't support the 0xc and 0xd events.
+
+ secure-reg-access:
+ type: boolean
+ description:
+ Indicates that the ARMv7 Secure Debug Enable Register
+ (SDER) is accessible. This will cause the driver to do
+ any setup required that is only possible in ARMv7 secure
+ state. If not present the ARMv7 SDER will not be touched,
+ which means the PMU may fail to operate unless external
+ code (bootloader or security monitor) has performed the
+ appropriate initialisation. Note that this property is
+ not valid for non-ARMv7 CPUs or ARMv7 CPUs booting Linux
+ in Non-secure state.
+
+required:
+ - compatible
+
+oneOf:
+ - required:
+ - interrupts
+ - required:
+ - interrupts-extended
+
+...
--
2.17.1
Convert MediaTek SoC bindings to DT schema format using json-schema.
Cc: Mark Rutland <[email protected]>
Cc: Matthias Brugger <[email protected]>
Cc: [email protected]
Cc: [email protected]
Cc: [email protected]
Signed-off-by: Rob Herring <[email protected]>
---
.../devicetree/bindings/arm/mediatek.txt | 79 -----------------
.../devicetree/bindings/arm/mediatek.yaml | 85 +++++++++++++++++++
2 files changed, 85 insertions(+), 79 deletions(-)
delete mode 100644 Documentation/devicetree/bindings/arm/mediatek.txt
create mode 100644 Documentation/devicetree/bindings/arm/mediatek.yaml
diff --git a/Documentation/devicetree/bindings/arm/mediatek.txt b/Documentation/devicetree/bindings/arm/mediatek.txt
deleted file mode 100644
index 8f260e5cfd16..000000000000
--- a/Documentation/devicetree/bindings/arm/mediatek.txt
+++ /dev/null
@@ -1,79 +0,0 @@
-MediaTek SoC based Platforms Device Tree Bindings
-
-Boards with a MediaTek SoC shall have the following property:
-
-Required root node property:
-
-compatible: Must contain one of
- "mediatek,mt2701"
- "mediatek,mt2712"
- "mediatek,mt6580"
- "mediatek,mt6589"
- "mediatek,mt6592"
- "mediatek,mt6755"
- "mediatek,mt6765"
- "mediatek,mt6795"
- "mediatek,mt6797"
- "mediatek,mt7622"
- "mediatek,mt7623" which is referred to MT7623N SoC
- "mediatek,mt7623a"
- "mediatek,mt8127"
- "mediatek,mt8135"
- "mediatek,mt8173"
-
-
-Supported boards:
-
-- Evaluation board for MT2701:
- Required root node properties:
- - compatible = "mediatek,mt2701-evb", "mediatek,mt2701";
-- Evaluation board for MT2712:
- Required root node properties:
- - compatible = "mediatek,mt2712-evb", "mediatek,mt2712";
-- Evaluation board for MT6580:
- Required root node properties:
- - compatible = "mediatek,mt6580-evbp1", "mediatek,mt6580";
-- bq Aquaris5 smart phone:
- Required root node properties:
- - compatible = "mundoreader,bq-aquaris5", "mediatek,mt6589";
-- Evaluation board for MT6592:
- Required root node properties:
- - compatible = "mediatek,mt6592-evb", "mediatek,mt6592";
-- Evaluation phone for MT6755(Helio P10):
- Required root node properties:
- - compatible = "mediatek,mt6755-evb", "mediatek,mt6755";
-- Evaluation board for MT6765(Helio P22):
- Required root node properties:
- - compatible = "mediatek,mt6765-evb", "mediatek,mt6765";
-- Evaluation board for MT6795(Helio X10):
- Required root node properties:
- - compatible = "mediatek,mt6795-evb", "mediatek,mt6795";
-- Evaluation board for MT6797(Helio X20):
- Required root node properties:
- - compatible = "mediatek,mt6797-evb", "mediatek,mt6797";
-- Mediatek X20 Development Board:
- Required root node properties:
- - compatible = "archermind,mt6797-x20-dev", "mediatek,mt6797";
-- Reference board variant 1 for MT7622:
- Required root node properties:
- - compatible = "mediatek,mt7622-rfb1", "mediatek,mt7622";
-- Reference board for MT7623a with eMMC:
- Required root node properties:
- - compatible = "mediatek,mt7623a-rfb-emmc", "mediatek,mt7623";
-- Reference board for MT7623a with NAND:
- Required root node properties:
- - compatible = "mediatek,mt7623a-rfb-nand", "mediatek,mt7623";
-- Reference board for MT7623n with eMMC:
- Required root node properties:
- - compatible = "mediatek,mt7623n-rfb-emmc", "mediatek,mt7623";
-- Bananapi BPI-R2 board:
- - compatible = "bananapi,bpi-r2", "mediatek,mt7623";
-- MTK mt8127 tablet moose EVB:
- Required root node properties:
- - compatible = "mediatek,mt8127-moose", "mediatek,mt8127";
-- MTK mt8135 tablet EVB:
- Required root node properties:
- - compatible = "mediatek,mt8135-evbp1", "mediatek,mt8135";
-- MTK mt8173 tablet EVB:
- Required root node properties:
- - compatible = "mediatek,mt8173-evb", "mediatek,mt8173";
diff --git a/Documentation/devicetree/bindings/arm/mediatek.yaml b/Documentation/devicetree/bindings/arm/mediatek.yaml
new file mode 100644
index 000000000000..861af7c66ac5
--- /dev/null
+++ b/Documentation/devicetree/bindings/arm/mediatek.yaml
@@ -0,0 +1,85 @@
+# SPDX-License-Identifier: None
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/bindings/arm/mediatek.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: MediaTek SoC based Platforms Device Tree Bindings
+
+maintainers:
+ - Sean Wang <[email protected]>
+ - Matthias Brugger <[email protected]>
+description: |
+ Boards with a MediaTek SoC shall have the following properties.
+
+properties:
+ $nodename:
+ const: '/'
+ compatible:
+ oneOf:
+ - items:
+ - enum:
+ - mediatek,mt2701-evb
+ - const: mediatek,mt2701
+
+ - items:
+ - enum:
+ - mediatek,mt2712-evb
+ - const: mediatek,mt2712
+ - items:
+ - enum:
+ - mediatek,mt6580-evbp1
+ - const: mediatek,mt6580
+ - items:
+ - enum:
+ - mundoreader,bq-aquaris5
+ - const: mediatek,mt6589
+ - items:
+ - enum:
+ - mediatek,mt6592-evb
+ - const: mediatek,mt6592
+ - items:
+ - enum:
+ - mediatek,mt6755-evb
+ - const: mediatek,mt6755
+ - items:
+ - enum:
+ - mediatek,mt6765-evb
+ - const: mediatek,mt6765
+ - items:
+ - enum:
+ - mediatek,mt6795-evb
+ - const: mediatek,mt6795
+ - items:
+ - enum:
+ - archermind,mt6797-x20-dev
+ - mediatek,mt6797-evb
+ - const: mediatek,mt6797
+ - items:
+ - enum:
+ - mediatek,mt7622-rfb1
+ - const: mediatek,mt7622
+ - items:
+ - enum:
+ - mediatek,mt7623a-rfb-emmc
+ - mediatek,mt7623a-rfb-nand
+ - mediatek,mt7623n-rfb-emmc
+ - bananapi,bpi-r2
+ - const: mediatek,mt7623
+ description: Also referred to as MT7623N SoC
+
+ - items:
+ - const: mediatek,mt7623a
+ - items:
+ - enum:
+ - mediatek,mt8127-moose
+ - const: mediatek,mt8127
+ - items:
+ - enum:
+ - mediatek,mt8135-evbp1
+ - const: mediatek,mt8135
+ - items:
+ - enum:
+ - mediatek,mt8173-evb
+ - const: mediatek,mt8173
+...
--
2.17.1
Convert ARM timers to DT schema format using json-schema.
Cc: Daniel Lezcano <[email protected]>
Cc: Thomas Gleixner <[email protected]>
Cc: Mark Rutland <[email protected]>
Cc: [email protected]
Signed-off-by: Rob Herring <[email protected]>
---
.../bindings/timer/arm,arch_timer.txt | 112 ----------------
.../bindings/timer/arm,arch_timer.yaml | 103 +++++++++++++++
.../bindings/timer/arm,arch_timer_mmio.yaml | 120 ++++++++++++++++++
.../bindings/timer/arm,global_timer.txt | 27 ----
.../bindings/timer/arm,global_timer.yaml | 46 +++++++
5 files changed, 269 insertions(+), 139 deletions(-)
delete mode 100644 Documentation/devicetree/bindings/timer/arm,arch_timer.txt
create mode 100644 Documentation/devicetree/bindings/timer/arm,arch_timer.yaml
create mode 100644 Documentation/devicetree/bindings/timer/arm,arch_timer_mmio.yaml
delete mode 100644 Documentation/devicetree/bindings/timer/arm,global_timer.txt
create mode 100644 Documentation/devicetree/bindings/timer/arm,global_timer.yaml
diff --git a/Documentation/devicetree/bindings/timer/arm,arch_timer.txt b/Documentation/devicetree/bindings/timer/arm,arch_timer.txt
deleted file mode 100644
index 68301b77e854..000000000000
--- a/Documentation/devicetree/bindings/timer/arm,arch_timer.txt
+++ /dev/null
@@ -1,112 +0,0 @@
-* ARM architected timer
-
-ARM cores may have a per-core architected timer, which provides per-cpu timers,
-or a memory mapped architected timer, which provides up to 8 frames with a
-physical and optional virtual timer per frame.
-
-The per-core architected timer is attached to a GIC to deliver its
-per-processor interrupts via PPIs. The memory mapped timer is attached to a GIC
-to deliver its interrupts via SPIs.
-
-** CP15 Timer node properties:
-
-- compatible : Should at least contain one of
- "arm,armv7-timer"
- "arm,armv8-timer"
-
-- interrupts : Interrupt list for secure, non-secure, virtual and
- hypervisor timers, in that order.
-
-- clock-frequency : The frequency of the main counter, in Hz. Should be present
- only where necessary to work around broken firmware which does not configure
- CNTFRQ on all CPUs to a uniform correct value. Use of this property is
- strongly discouraged; fix your firmware unless absolutely impossible.
-
-- always-on : a boolean property. If present, the timer is powered through an
- always-on power domain, therefore it never loses context.
-
-- fsl,erratum-a008585 : A boolean property. Indicates the presence of
- QorIQ erratum A-008585, which says that reading the counter is
- unreliable unless the same value is returned by back-to-back reads.
- This also affects writes to the tval register, due to the implicit
- counter read.
-
-- hisilicon,erratum-161010101 : A boolean property. Indicates the
- presence of Hisilicon erratum 161010101, which says that reading the
- counters is unreliable in some cases, and reads may return a value 32
- beyond the correct value. This also affects writes to the tval
- registers, due to the implicit counter read.
-
-** Optional properties:
-
-- arm,cpu-registers-not-fw-configured : Firmware does not initialize
- any of the generic timer CPU registers, which contain their
- architecturally-defined reset values. Only supported for 32-bit
- systems which follow the ARMv7 architected reset values.
-
-- arm,no-tick-in-suspend : The main counter does not tick when the system is in
- low-power system suspend on some SoCs. This behavior does not match the
- Architecture Reference Manual's specification that the system counter "must
- be implemented in an always-on power domain."
-
-
-Example:
-
- timer {
- compatible = "arm,cortex-a15-timer",
- "arm,armv7-timer";
- interrupts = <1 13 0xf08>,
- <1 14 0xf08>,
- <1 11 0xf08>,
- <1 10 0xf08>;
- clock-frequency = <100000000>;
- };
-
-** Memory mapped timer node properties:
-
-- compatible : Should at least contain "arm,armv7-timer-mem".
-
-- clock-frequency : The frequency of the main counter, in Hz. Should be present
- only when firmware has not configured the MMIO CNTFRQ registers.
-
-- reg : The control frame base address.
-
-Note that #address-cells, #size-cells, and ranges shall be present to ensure
-the CPU can address a frame's registers.
-
-A timer node has up to 8 frame sub-nodes, each with the following properties:
-
-- frame-number: 0 to 7.
-
-- interrupts : Interrupt list for physical and virtual timers in that order.
- The virtual timer interrupt is optional.
-
-- reg : The first and second view base addresses in that order. The second view
- base address is optional.
-
-- status : "disabled" indicates the frame is not available for use. Optional.
-
-Example:
-
- timer@f0000000 {
- compatible = "arm,armv7-timer-mem";
- #address-cells = <1>;
- #size-cells = <1>;
- ranges;
- reg = <0xf0000000 0x1000>;
- clock-frequency = <50000000>;
-
- frame@f0001000 {
- frame-number = <0>
- interrupts = <0 13 0x8>,
- <0 14 0x8>;
- reg = <0xf0001000 0x1000>,
- <0xf0002000 0x1000>;
- };
-
- frame@f0003000 {
- frame-number = <1>
- interrupts = <0 15 0x8>;
- reg = <0xf0003000 0x1000>;
- };
- };
diff --git a/Documentation/devicetree/bindings/timer/arm,arch_timer.yaml b/Documentation/devicetree/bindings/timer/arm,arch_timer.yaml
new file mode 100644
index 000000000000..733ae2254c65
--- /dev/null
+++ b/Documentation/devicetree/bindings/timer/arm,arch_timer.yaml
@@ -0,0 +1,103 @@
+# SPDX-License-Identifier: None
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/bindings/arm,arch_timer.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: ARM architected timer
+
+maintainers:
+ - Marc Zyngier <[email protected]>
+ - Mark Rutland <[email protected]>
+description: |+
+ ARM cores may have a per-core architected timer, which provides per-cpu timers,
+ or a memory mapped architected timer, which provides up to 8 frames with a
+ physical and optional virtual timer per frame.
+
+ The per-core architected timer is attached to a GIC to deliver its
+ per-processor interrupts via PPIs. The memory mapped timer is attached to a GIC
+ to deliver its interrupts via SPIs.
+
+properties:
+ compatible:
+ oneOf:
+ - items:
+ - enum:
+ - arm,cortex-a15-timer
+ - enum:
+ - arm,armv7-timer
+ - items:
+ - enum:
+ - arm,armv7-timer
+ - items:
+ - enum:
+ - arm,armv8-timer
+
+ interrupts:
+ items:
+ - description: secure timer irq
+ - description: non-secure timer irq
+ - description: virtual timer irq
+ - description: hypervisor timer irq
+
+ clock-frequency:
+ description: The frequency of the main counter, in Hz. Should be present
+ only where necessary to work around broken firmware which does not configure
+ CNTFRQ on all CPUs to a uniform correct value. Use of this property is
+ strongly discouraged; fix your firmware unless absolutely impossible.
+
+ always-on:
+ type: boolean
+ description: If present, the timer is powered through an always-on power
+ domain, therefore it never loses context.
+
+ fsl,erratum-a008585:
+ type: boolean
+ description: Indicates the presence of QorIQ erratum A-008585, which says
+ that reading the counter is unreliable unless the same value is returned
+ by back-to-back reads. This also affects writes to the tval register, due
+ to the implicit counter read.
+
+ hisilicon,erratum-161010101:
+ type: boolean
+ description: Indicates the presence of Hisilicon erratum 161010101, which
+ says that reading the counters is unreliable in some cases, and reads may
+ return a value 32 beyond the correct value. This also affects writes to
+ the tval registers, due to the implicit counter read.
+
+ arm,cpu-registers-not-fw-configured:
+ type: boolean
+ description: Firmware does not initialize any of the generic timer CPU
+ registers, which contain their architecturally-defined reset values. Only
+ supported for 32-bit systems which follow the ARMv7 architected reset
+ values.
+
+ arm,no-tick-in-suspend:
+ type: boolean
+ description: The main counter does not tick when the system is in
+ low-power system suspend on some SoCs. This behavior does not match the
+ Architecture Reference Manual's specification that the system counter "must
+ be implemented in an always-on power domain."
+
+required:
+ - compatible
+
+oneOf:
+ - required:
+ - interrupts
+ - required:
+ - interrupts-extended
+
+examples:
+ - |
+ timer {
+ compatible = "arm,cortex-a15-timer",
+ "arm,armv7-timer";
+ interrupts = <1 13 0xf08>,
+ <1 14 0xf08>,
+ <1 11 0xf08>,
+ <1 10 0xf08>;
+ clock-frequency = <100000000>;
+ };
+
+...
diff --git a/Documentation/devicetree/bindings/timer/arm,arch_timer_mmio.yaml b/Documentation/devicetree/bindings/timer/arm,arch_timer_mmio.yaml
new file mode 100644
index 000000000000..34c8ecfea2a5
--- /dev/null
+++ b/Documentation/devicetree/bindings/timer/arm,arch_timer_mmio.yaml
@@ -0,0 +1,120 @@
+# SPDX-License-Identifier: None
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/bindings/arm,arch_timer_mmio.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: ARM memory mapped architected timer
+
+maintainers:
+ - Marc Zyngier <[email protected]>
+ - Mark Rutland <[email protected]>
+
+description: |+
+ ARM cores may have a memory mapped architected timer, which provides up to 8
+ frames with a physical and optional virtual timer per frame.
+
+ The memory mapped timer is attached to a GIC to deliver its interrupts via SPIs.
+
+properties:
+ compatible:
+ items:
+ - enum:
+ - arm,armv7-timer-mem
+
+ reg:
+ maxItems: 1
+ description: The control frame base address
+
+ '#address-cells':
+ enum: [1, 2]
+
+ '#size-cells':
+ const: 1
+
+ clock-frequency:
+ description: The frequency of the main counter, in Hz. Should be present
+ only where necessary to work around broken firmware which does not configure
+ CNTFRQ on all CPUs to a uniform correct value. Use of this property is
+ strongly discouraged; fix your firmware unless absolutely impossible.
+
+ always-on:
+ type: boolean
+ description: If present, the timer is powered through an always-on power
+ domain, therefore it never loses context.
+
+ arm,cpu-registers-not-fw-configured:
+ type: boolean
+ description: Firmware does not initialize any of the generic timer CPU
+ registers, which contain their architecturally-defined reset values. Only
+ supported for 32-bit systems which follow the ARMv7 architected reset
+ values.
+
+ arm,no-tick-in-suspend:
+ type: boolean
+ description: The main counter does not tick when the system is in
+ low-power system suspend on some SoCs. This behavior does not match the
+ Architecture Reference Manual's specification that the system counter "must
+ be implemented in an always-on power domain."
+
+patternProperties:
+ '^frame@[0-9a-z]*$':
+ description: A timer node has up to 8 frame sub-nodes, each with the following properties.
+ properties:
+ frame-number:
+ allOf:
+ - $ref: "/schemas/types.yaml#/definitions/uint32"
+ - minimum: 0
+ maximum: 7
+
+ interrupts:
+ minItems: 1
+ maxItems: 2
+ items:
+ - description: physical timer irq
+ - description: virtual timer irq
+
+ reg :
+ minItems: 1
+ maxItems: 2
+ items:
+ - description: 1st view base address
+ - description: 2nd optional view base address
+
+ required:
+ - frame-number
+ - interrupts
+ - reg
+
+required:
+ - compatible
+ - reg
+ - '#address-cells'
+ - '#size-cells'
+
+examples:
+ - |
+ timer@f0000000 {
+ compatible = "arm,armv7-timer-mem";
+ #address-cells = <1>;
+ #size-cells = <1>;
+ ranges;
+ reg = <0xf0000000 0x1000>;
+ clock-frequency = <50000000>;
+
+ frame@f0001000 {
+ frame-number = <0>;
+ interrupts = <0 13 0x8>,
+ <0 14 0x8>;
+ reg = <0xf0001000 0x1000>,
+ <0xf0002000 0x1000>;
+ };
+
+ frame@f0003000 {
+ frame-number = <1>;
+ interrupts = <0 15 0x8>;
+ reg = <0xf0003000 0x1000>;
+ };
+ };
+
+...
diff --git a/Documentation/devicetree/bindings/timer/arm,global_timer.txt b/Documentation/devicetree/bindings/timer/arm,global_timer.txt
deleted file mode 100644
index bdae3a818793..000000000000
--- a/Documentation/devicetree/bindings/timer/arm,global_timer.txt
+++ /dev/null
@@ -1,27 +0,0 @@
-
-* ARM Global Timer
- Cortex-A9 are often associated with a per-core Global timer.
-
-** Timer node required properties:
-
-- compatible : should contain
- * "arm,cortex-a5-global-timer" for Cortex-A5 global timers.
- * "arm,cortex-a9-global-timer" for Cortex-A9 global
- timers or any compatible implementation. Note: driver
- supports versions r2p0 and above.
-
-- interrupts : One interrupt to each core
-
-- reg : Specify the base address and the size of the GT timer
- register window.
-
-- clocks : Should be phandle to a clock.
-
-Example:
-
- timer@2c000600 {
- compatible = "arm,cortex-a9-global-timer";
- reg = <0x2c000600 0x20>;
- interrupts = <1 13 0xf01>;
- clocks = <&arm_periph_clk>;
- };
diff --git a/Documentation/devicetree/bindings/timer/arm,global_timer.yaml b/Documentation/devicetree/bindings/timer/arm,global_timer.yaml
new file mode 100644
index 000000000000..09090f677387
--- /dev/null
+++ b/Documentation/devicetree/bindings/timer/arm,global_timer.yaml
@@ -0,0 +1,46 @@
+# SPDX-License-Identifier: None
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/bindings/arm,global_timer.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: ARM Global Timer
+
+maintainers:
+ - Stuart Menefy <[email protected]>
+
+description:
+ Cortex-A9 are often associated with a per-core Global timer.
+
+properties:
+ compatible:
+ items:
+ - enum:
+ - arm,cortex-a5-global-timer
+ - arm,cortex-a9-global-timer
+
+ description: driver supports versions r2p0 and above.
+
+ reg:
+ maxItems: 1
+
+ interrupts:
+ maxItems: 1
+
+ clocks:
+ maxItems: 1
+
+required:
+ - compatible
+ - reg
+ - clocks
+
+examples:
+ - |
+ timer@2c000600 {
+ compatible = "arm,cortex-a9-global-timer";
+ reg = <0x2c000600 0x20>;
+ interrupts = <1 13 0xf01>;
+ clocks = <&arm_periph_clk>;
+ };
+...
--
2.17.1
In preparation to convert board-level bindings to json-schema, move
various misc SoC bindings out to their own file.
Cc: Mark Rutland <[email protected]>
Cc: Jun Nie <[email protected]>
Cc: Baoyou Xie <[email protected]>
Cc: Shawn Guo <[email protected]>
Cc: [email protected]
Cc: [email protected]
Signed-off-by: Rob Herring <[email protected]>
---
.../devicetree/bindings/arm/zte-sysctrl.txt | 30 +++++++++++++++++++
Documentation/devicetree/bindings/arm/zte.txt | 27 +----------------
2 files changed, 31 insertions(+), 26 deletions(-)
create mode 100644 Documentation/devicetree/bindings/arm/zte-sysctrl.txt
diff --git a/Documentation/devicetree/bindings/arm/zte-sysctrl.txt b/Documentation/devicetree/bindings/arm/zte-sysctrl.txt
new file mode 100644
index 000000000000..7e66b7f7ba96
--- /dev/null
+++ b/Documentation/devicetree/bindings/arm/zte-sysctrl.txt
@@ -0,0 +1,30 @@
+ZTE sysctrl Registers
+
+Registers for 'zte,zx296702' SoC:
+
+System management required properties:
+ - compatible = "zte,sysctrl"
+
+Low power management required properties:
+ - compatible = "zte,zx296702-pcu"
+
+Bus matrix required properties:
+ - compatible = "zte,zx-bus-matrix"
+
+
+Registers for 'zte,zx296718' SoC:
+
+System management required properties:
+ - compatible = "zte,zx296718-aon-sysctrl"
+ - compatible = "zte,zx296718-sysctrl"
+
+Example:
+aon_sysctrl: aon-sysctrl@116000 {
+ compatible = "zte,zx296718-aon-sysctrl", "syscon";
+ reg = <0x116000 0x1000>;
+};
+
+sysctrl: sysctrl@1463000 {
+ compatible = "zte,zx296718-sysctrl", "syscon";
+ reg = <0x1463000 0x1000>;
+};
diff --git a/Documentation/devicetree/bindings/arm/zte.txt b/Documentation/devicetree/bindings/arm/zte.txt
index 83369785d29c..340612794a37 100644
--- a/Documentation/devicetree/bindings/arm/zte.txt
+++ b/Documentation/devicetree/bindings/arm/zte.txt
@@ -1,20 +1,10 @@
ZTE platforms device tree bindings
----------------------------------------
+---------------------------------------
- ZX296702 board:
Required root node properties:
- compatible = "zte,zx296702-ad1", "zte,zx296702"
-System management required properties:
- - compatible = "zte,sysctrl"
-
-Low power management required properties:
- - compatible = "zte,zx296702-pcu"
-
-Bus matrix required properties:
- - compatible = "zte,zx-bus-matrix"
-
-
---------------------------------------
- ZX296718 SoC:
Required root node properties:
@@ -22,18 +12,3 @@ Bus matrix required properties:
ZX296718 EVB board:
- "zte,zx296718-evb"
-
-System management required properties:
- - compatible = "zte,zx296718-aon-sysctrl"
- - compatible = "zte,zx296718-sysctrl"
-
-Example:
-aon_sysctrl: aon-sysctrl@116000 {
- compatible = "zte,zx296718-aon-sysctrl", "syscon";
- reg = <0x116000 0x1000>;
-};
-
-sysctrl: sysctrl@1463000 {
- compatible = "zte,zx296718-sysctrl", "syscon";
- reg = <0x1463000 0x1000>;
-};
--
2.17.1
This adds the build infrastructure for checking DT binding schema
documents and validating dts files using the binding schema.
Check DT binding schema documents:
make dt_binding_check
Build dts files and check using DT binding schema:
make dtbs_check
Currently, the validation targets are separate from a normal build to
avoid a hard dependency on the external DT schema project and because
there are lots of warnings generated.
Cc: Jonathan Corbet <[email protected]>
Cc: Mark Rutland <[email protected]>
Cc: Masahiro Yamada <[email protected]>
Cc: Michal Marek <[email protected]>
Cc: [email protected]
Cc: [email protected]
Cc: [email protected]
Signed-off-by: Rob Herring <[email protected]>
---
.gitignore | 1 +
Documentation/Makefile | 2 +-
Documentation/devicetree/bindings/.gitignore | 2 ++
Documentation/devicetree/bindings/Makefile | 30 ++++++++++++++++++++
Makefile | 8 +++++-
scripts/Makefile.lib | 24 ++++++++++++++--
6 files changed, 63 insertions(+), 4 deletions(-)
create mode 100644 Documentation/devicetree/bindings/.gitignore
create mode 100644 Documentation/devicetree/bindings/Makefile
diff --git a/.gitignore b/.gitignore
index 97ba6b79834c..a20ac26aa2f5 100644
--- a/.gitignore
+++ b/.gitignore
@@ -15,6 +15,7 @@
*.bin
*.bz2
*.c.[012]*.*
+*.dt.yaml
*.dtb
*.dtb.S
*.dwo
diff --git a/Documentation/Makefile b/Documentation/Makefile
index 2ca77ad0f238..9786957c6a35 100644
--- a/Documentation/Makefile
+++ b/Documentation/Makefile
@@ -2,7 +2,7 @@
# Makefile for Sphinx documentation
#
-subdir-y :=
+subdir-y := devicetree/bindings/
# You can set these variables from the command line.
SPHINXBUILD = sphinx-build
diff --git a/Documentation/devicetree/bindings/.gitignore b/Documentation/devicetree/bindings/.gitignore
new file mode 100644
index 000000000000..7e47316f1d7a
--- /dev/null
+++ b/Documentation/devicetree/bindings/.gitignore
@@ -0,0 +1,2 @@
+*.example.dts
+*.yaml.tmp
diff --git a/Documentation/devicetree/bindings/Makefile b/Documentation/devicetree/bindings/Makefile
new file mode 100644
index 000000000000..b57f0dec3fab
--- /dev/null
+++ b/Documentation/devicetree/bindings/Makefile
@@ -0,0 +1,30 @@
+# SPDX-License-Identifier: GPL-2.0
+DT_DOC_CHECKER ?= dt-doc-validate
+DT_EXTRACT_EX ?= dt-extract-example
+
+quiet_cmd_chk_binding = CHKDT $<
+ cmd_chk_binding = (set -e; \
+ $(DT_DOC_CHECKER) $< ; \
+ mkdir -p $(dir $@) ; \
+ $(DT_EXTRACT_EX) $< > $@ )
+
+$(obj)/%.example.dts: $(src)/%.yaml FORCE
+ $(call if_changed,chk_binding)
+
+DT_MK_SCHEMA ?= dt-mk-schema
+DT_TMP_SCHEMA := .schema.yaml.tmp
+extra-y += $(DT_TMP_SCHEMA)
+
+quiet_cmd_mk_schema = SCHEMA $@
+ cmd_mk_schema = mkdir -p $(obj); \
+ $(DT_MK_SCHEMA) -o $@ $(srctree)/$(src)
+
+DT_DOCS = $(shell cd $(srctree)/$(src) && find * -name '*.yaml')
+DTS_EXAMPLES = $(patsubst %.yaml,%.example.dts, $(DT_DOCS))
+extra-y += $(DTS_EXAMPLES)
+
+DTBS = $(patsubst %.yaml,%.example.dtb, $(DT_DOCS))
+extra-y += $(DTBS)
+
+$(obj)/$(DT_TMP_SCHEMA): $(addprefix $(obj)/, $(DTBS)) FORCE
+ $(call if_changed,mk_schema)
diff --git a/Makefile b/Makefile
index 021e274c4b03..648f7238e883 100644
--- a/Makefile
+++ b/Makefile
@@ -1227,10 +1227,13 @@ ifneq ($(dtstree),)
%.dtb: prepare3 scripts_dtc
$(Q)$(MAKE) $(build)=$(dtstree) $(dtstree)/$@
-PHONY += dtbs dtbs_install
+PHONY += dtbs dtbs_install dt_binding_check
dtbs: prepare3 scripts_dtc
$(Q)$(MAKE) $(build)=$(dtstree)
+dtbs_check: prepare3 dt_binding_check
+ $(Q)$(MAKE) $(build)=$(dtstree) CHECK_DTBS=1
+
dtbs_install:
$(Q)$(MAKE) $(dtbinst)=$(dtstree)
@@ -1244,6 +1247,9 @@ PHONY += scripts_dtc
scripts_dtc: scripts_basic
$(Q)$(MAKE) $(build)=scripts/dtc
+dt_binding_check: scripts_dtc
+ $(Q)$(MAKE) $(build)=Documentation/devicetree/bindings
+
# ---------------------------------------------------------------------------
# Modules
diff --git a/scripts/Makefile.lib b/scripts/Makefile.lib
index 8fe4468f9bda..d1c5630ba24c 100644
--- a/scripts/Makefile.lib
+++ b/scripts/Makefile.lib
@@ -61,6 +61,11 @@ real-obj-m := $(foreach m, $(obj-m), $(if $(strip $($(m:.o=-objs)) $($(m:.o=-y))
extra-y += $(dtb-y)
extra-$(CONFIG_OF_ALL_DTBS) += $(dtb-)
+ifneq ($(CHECK_DTBS),)
+extra-y += $(patsubst %.dtb,%.dt.yaml, $(dtb-y))
+extra-$(CONFIG_OF_ALL_DTBS) += $(patsubst %.dtb,%.dt.yaml, $(dtb-))
+endif
+
# Add subdir path
extra-y := $(addprefix $(obj)/,$(extra-y))
@@ -284,13 +289,28 @@ $(obj)/%.dtb.S: $(obj)/%.dtb FORCE
quiet_cmd_dtc = DTC $@
cmd_dtc = mkdir -p $(dir ${dtc-tmp}) ; \
$(HOSTCC) -E $(dtc_cpp_flags) -x assembler-with-cpp -o $(dtc-tmp) $< ; \
- $(DTC) -O dtb -o $@ -b 0 \
+ $(DTC) -O $(2) -o $@ -b 0 \
$(addprefix -i,$(dir $<) $(DTC_INCLUDE)) $(DTC_FLAGS) \
-d $(depfile).dtc.tmp $(dtc-tmp) ; \
cat $(depfile).pre.tmp $(depfile).dtc.tmp > $(depfile)
$(obj)/%.dtb: $(src)/%.dts $(DTC) FORCE
- $(call if_changed_dep,dtc)
+ $(call if_changed_dep,dtc,dtb)
+
+DT_CHECKER ?= dt-validate
+DT_BINDING_DIR := Documentation/devicetree/bindings
+DT_TMP_SCHEMA := $(objtree)/$(DT_BINDING_DIR)/.schema.yaml.tmp
+
+quiet_cmd_dtb_check = CHECK $@
+ cmd_dtb_check = $(DT_CHECKER) -p $(DT_TMP_SCHEMA) $@ ;
+
+define rule_dtc_dt_yaml
+ $(call cmd_and_fixdep,dtc,yaml) \
+ $(call echo-cmd,dtb_check) $(cmd_dtb_check)
+endef
+
+$(obj)/%.dt.yaml: $(src)/%.dts $(DTC) $(DT_TMP_SCHEMA) FORCE
+ $(call if_changed_rule,dtc_dt_yaml)
dtc-tmp = $(subst $(comma),_,$(dot-target).dts.tmp)
--
2.17.1
Convert Alpine SoC bindings to DT schema format using json-schema.
Cc: Tsahee Zidenberg <[email protected]>
Cc: Antoine Tenart <[email protected]>
Cc: Mark Rutland <[email protected]>
Cc: [email protected]
Signed-off-by: Rob Herring <[email protected]>
---
.../devicetree/bindings/arm/al,alpine.txt | 16 --------------
.../devicetree/bindings/arm/al,alpine.yaml | 21 +++++++++++++++++++
2 files changed, 21 insertions(+), 16 deletions(-)
delete mode 100644 Documentation/devicetree/bindings/arm/al,alpine.txt
create mode 100644 Documentation/devicetree/bindings/arm/al,alpine.yaml
diff --git a/Documentation/devicetree/bindings/arm/al,alpine.txt b/Documentation/devicetree/bindings/arm/al,alpine.txt
deleted file mode 100644
index d00debe2e86f..000000000000
--- a/Documentation/devicetree/bindings/arm/al,alpine.txt
+++ /dev/null
@@ -1,16 +0,0 @@
-Annapurna Labs Alpine Platform Device Tree Bindings
----------------------------------------------------------------
-
-Boards in the Alpine family shall have the following properties:
-
-* Required root node properties:
-compatible: must contain "al,alpine"
-
-* Example:
-
-/ {
- model = "Annapurna Labs Alpine Dev Board";
- compatible = "al,alpine";
-
- ...
-}
diff --git a/Documentation/devicetree/bindings/arm/al,alpine.yaml b/Documentation/devicetree/bindings/arm/al,alpine.yaml
new file mode 100644
index 000000000000..95f8629f7b0a
--- /dev/null
+++ b/Documentation/devicetree/bindings/arm/al,alpine.yaml
@@ -0,0 +1,21 @@
+# SPDX-License-Identifier: None
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/bindings/arm/al,alpine.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: Annapurna Labs Alpine Platform Device Tree Bindings
+
+maintainers:
+ - Tsahee Zidenberg <[email protected]>
+description: test
+
+properties:
+ compatible:
+ items:
+ - const: al,alpine
+ model:
+ items:
+ - const: "Annapurna Labs Alpine Dev Board"
+
+...
--
2.17.1
Convert trivial-devices.txt to DT schema format using json-schema.
Cc: Mark Rutland <[email protected]>
Cc: [email protected]
Signed-off-by: Rob Herring <[email protected]>
---
.../devicetree/bindings/trivial-devices.txt | 201 ---------
.../devicetree/bindings/trivial-devices.yaml | 414 ++++++++++++++++++
2 files changed, 414 insertions(+), 201 deletions(-)
delete mode 100644 Documentation/devicetree/bindings/trivial-devices.txt
create mode 100644 Documentation/devicetree/bindings/trivial-devices.yaml
diff --git a/Documentation/devicetree/bindings/trivial-devices.txt b/Documentation/devicetree/bindings/trivial-devices.txt
deleted file mode 100644
index 763a2808a95c..000000000000
--- a/Documentation/devicetree/bindings/trivial-devices.txt
+++ /dev/null
@@ -1,201 +0,0 @@
-This is a list of trivial i2c devices that have simple device tree
-bindings, consisting only of a compatible field, an address and
-possibly an interrupt line.
-
-If a device needs more specific bindings, such as properties to
-describe some aspect of it, there needs to be a specific binding
-document for it just like any other devices.
-
-
-Compatible Vendor / Chip
-========== =============
-abracon,abb5zes3 AB-RTCMC-32.768kHz-B5ZE-S3: Real Time Clock/Calendar Module with I2C Interface
-ad,ad7414 SMBus/I2C Digital Temperature Sensor in 6-Pin SOT with SMBus Alert and Over Temperature Pin
-ad,adm9240 ADM9240: Complete System Hardware Monitor for uProcessor-Based Systems
-adi,adt7461 +/-1C TDM Extended Temp Range I.C
-adt7461 +/-1C TDM Extended Temp Range I.C
-adi,adt7473 +/-1C TDM Extended Temp Range I.C
-adi,adt7475 +/-1C TDM Extended Temp Range I.C
-adi,adt7476 +/-1C TDM Extended Temp Range I.C
-adi,adt7490 +/-1C TDM Extended Temp Range I.C
-adi,adxl345 Three-Axis Digital Accelerometer
-adi,adxl346 Three-Axis Digital Accelerometer (backward-compatibility value "adi,adxl345" must be listed too)
-ams,iaq-core AMS iAQ-Core VOC Sensor
-amstaos,tsl2571 AMS/TAOS ALS and proximity sensor
-amstaos,tsl2671 AMS/TAOS ALS and proximity sensor
-amstaos,tmd2671 AMS/TAOS ALS and proximity sensor
-amstaos,tsl2771 AMS/TAOS ALS and proximity sensor
-amstaos,tmd2771 AMS/TAOS ALS and proximity sensor
-amstaos,tsl2572 AMS/TAOS ALS and proximity sensor
-amstaos,tsl2672 AMS/TAOS ALS and proximity sensor
-amstaos,tmd2672 AMS/TAOS ALS and proximity sensor
-amstaos,tsl2772 AMS/TAOS ALS and proximity sensor
-amstaos,tmd2772 AMS/TAOS ALS and proximity sensor
-at,24c08 i2c serial eeprom (24cxx)
-atmel,at97sc3204t i2c trusted platform module (TPM)
-capella,cm32181 CM32181: Ambient Light Sensor
-capella,cm3232 CM3232: Ambient Light Sensor
-cirrus,cs42l51 Cirrus Logic CS42L51 audio codec
-dallas,ds1374 I2C, 32-Bit Binary Counter Watchdog RTC with Trickle Charger and Reset Input/Output
-dallas,ds1631 High-Precision Digital Thermometer
-dallas,ds1672 Dallas DS1672 Real-time Clock
-dallas,ds1682 Total-Elapsed-Time Recorder with Alarm
-dallas,ds1775 Tiny Digital Thermometer and Thermostat
-dallas,ds3232 Extremely Accurate I²C RTC with Integrated Crystal and SRAM
-dallas,ds4510 CPU Supervisor with Nonvolatile Memory and Programmable I/O
-dallas,ds75 Digital Thermometer and Thermostat
-devantech,srf02 Devantech SRF02 ultrasonic ranger in I2C mode
-devantech,srf08 Devantech SRF08 ultrasonic ranger
-devantech,srf10 Devantech SRF10 ultrasonic ranger
-dlg,da9053 DA9053: flexible system level PMIC with multicore support
-dlg,da9063 DA9063: system PMIC for quad-core application processors
-domintech,dmard09 DMARD09: 3-axis Accelerometer
-domintech,dmard10 DMARD10: 3-axis Accelerometer
-epson,rx8010 I2C-BUS INTERFACE REAL TIME CLOCK MODULE
-epson,rx8581 I2C-BUS INTERFACE REAL TIME CLOCK MODULE
-emmicro,em3027 EM Microelectronic EM3027 Real-time Clock
-fsl,mag3110 MAG3110: Xtrinsic High Accuracy, 3D Magnetometer
-fsl,mma7660 MMA7660FC: 3-Axis Orientation/Motion Detection Sensor
-fsl,mma8450 MMA8450Q: Xtrinsic Low-power, 3-axis Xtrinsic Accelerometer
-fsl,mpl3115 MPL3115: Absolute Digital Pressure Sensor
-fsl,mpr121 MPR121: Proximity Capacitive Touch Sensor Controller
-fsl,sgtl5000 SGTL5000: Ultra Low-Power Audio Codec
-gmt,g751 G751: Digital Temperature Sensor and Thermal Watchdog with Two-Wire Interface
-infineon,slb9635tt Infineon SLB9635 (Soft-) I2C TPM (old protocol, max 100khz)
-infineon,slb9645tt Infineon SLB9645 I2C TPM (new protocol, max 400khz)
-infineon,tlv493d-a1b6 Infineon TLV493D-A1B6 I2C 3D Magnetic Sensor
-isil,isl1208 Intersil ISL1208 Low Power RTC with Battery Backed SRAM
-isil,isl1218 Intersil ISL1218 Low Power RTC with Battery Backed SRAM
-isil,isl12022 Intersil ISL12022 Real-time Clock
-isil,isl29028 Intersil ISL29028 Ambient Light and Proximity Sensor
-isil,isl29030 Intersil ISL29030 Ambient Light and Proximity Sensor
-maxim,ds1050 5 Bit Programmable, Pulse-Width Modulator
-maxim,max1237 Low-Power, 4-/12-Channel, 2-Wire Serial, 12-Bit ADCs
-maxim,max6621 PECI-to-I2C translator for PECI-to-SMBus/I2C protocol conversion
-maxim,max6625 9-Bit/12-Bit Temperature Sensors with I²C-Compatible Serial Interface
-mcube,mc3230 mCube 3-axis 8-bit digital accelerometer
-memsic,mxc6225 MEMSIC 2-axis 8-bit digital accelerometer
-microchip,mcp4017-502 Microchip 7-bit Single I2C Digital POT (5k)
-microchip,mcp4017-103 Microchip 7-bit Single I2C Digital POT (10k)
-microchip,mcp4017-503 Microchip 7-bit Single I2C Digital POT (50k)
-microchip,mcp4017-104 Microchip 7-bit Single I2C Digital POT (100k)
-microchip,mcp4018-502 Microchip 7-bit Single I2C Digital POT (5k)
-microchip,mcp4018-103 Microchip 7-bit Single I2C Digital POT (10k)
-microchip,mcp4018-503 Microchip 7-bit Single I2C Digital POT (50k)
-microchip,mcp4018-104 Microchip 7-bit Single I2C Digital POT (100k)
-microchip,mcp4019-502 Microchip 7-bit Single I2C Digital POT (5k)
-microchip,mcp4019-103 Microchip 7-bit Single I2C Digital POT (10k)
-microchip,mcp4019-503 Microchip 7-bit Single I2C Digital POT (50k)
-microchip,mcp4019-104 Microchip 7-bit Single I2C Digital POT (100k)
-microchip,mcp4531-502 Microchip 7-bit Single I2C Digital Potentiometer (5k)
-microchip,mcp4531-103 Microchip 7-bit Single I2C Digital Potentiometer (10k)
-microchip,mcp4531-503 Microchip 7-bit Single I2C Digital Potentiometer (50k)
-microchip,mcp4531-104 Microchip 7-bit Single I2C Digital Potentiometer (100k)
-microchip,mcp4532-502 Microchip 7-bit Single I2C Digital Potentiometer (5k)
-microchip,mcp4532-103 Microchip 7-bit Single I2C Digital Potentiometer (10k)
-microchip,mcp4532-503 Microchip 7-bit Single I2C Digital Potentiometer (50k)
-microchip,mcp4532-104 Microchip 7-bit Single I2C Digital Potentiometer (100k)
-microchip,mcp4541-502 Microchip 7-bit Single I2C Digital Potentiometer with NV Memory (5k)
-microchip,mcp4541-103 Microchip 7-bit Single I2C Digital Potentiometer with NV Memory (10k)
-microchip,mcp4541-503 Microchip 7-bit Single I2C Digital Potentiometer with NV Memory (50k)
-microchip,mcp4541-104 Microchip 7-bit Single I2C Digital Potentiometer with NV Memory (100k)
-microchip,mcp4542-502 Microchip 7-bit Single I2C Digital Potentiometer with NV Memory (5k)
-microchip,mcp4542-103 Microchip 7-bit Single I2C Digital Potentiometer with NV Memory (10k)
-microchip,mcp4542-503 Microchip 7-bit Single I2C Digital Potentiometer with NV Memory (50k)
-microchip,mcp4542-104 Microchip 7-bit Single I2C Digital Potentiometer with NV Memory (100k)
-microchip,mcp4551-502 Microchip 8-bit Single I2C Digital Potentiometer (5k)
-microchip,mcp4551-103 Microchip 8-bit Single I2C Digital Potentiometer (10k)
-microchip,mcp4551-503 Microchip 8-bit Single I2C Digital Potentiometer (50k)
-microchip,mcp4551-104 Microchip 8-bit Single I2C Digital Potentiometer (100k)
-microchip,mcp4552-502 Microchip 8-bit Single I2C Digital Potentiometer (5k)
-microchip,mcp4552-103 Microchip 8-bit Single I2C Digital Potentiometer (10k)
-microchip,mcp4552-503 Microchip 8-bit Single I2C Digital Potentiometer (50k)
-microchip,mcp4552-104 Microchip 8-bit Single I2C Digital Potentiometer (100k)
-microchip,mcp4561-502 Microchip 8-bit Single I2C Digital Potentiometer with NV Memory (5k)
-microchip,mcp4561-103 Microchip 8-bit Single I2C Digital Potentiometer with NV Memory (10k)
-microchip,mcp4561-503 Microchip 8-bit Single I2C Digital Potentiometer with NV Memory (50k)
-microchip,mcp4561-104 Microchip 8-bit Single I2C Digital Potentiometer with NV Memory (100k)
-microchip,mcp4562-502 Microchip 8-bit Single I2C Digital Potentiometer with NV Memory (5k)
-microchip,mcp4562-103 Microchip 8-bit Single I2C Digital Potentiometer with NV Memory (10k)
-microchip,mcp4562-503 Microchip 8-bit Single I2C Digital Potentiometer with NV Memory (50k)
-microchip,mcp4562-104 Microchip 8-bit Single I2C Digital Potentiometer with NV Memory (100k)
-microchip,mcp4631-502 Microchip 7-bit Dual I2C Digital Potentiometer (5k)
-microchip,mcp4631-103 Microchip 7-bit Dual I2C Digital Potentiometer (10k)
-microchip,mcp4631-503 Microchip 7-bit Dual I2C Digital Potentiometer (50k)
-microchip,mcp4631-104 Microchip 7-bit Dual I2C Digital Potentiometer (100k)
-microchip,mcp4632-502 Microchip 7-bit Dual I2C Digital Potentiometer (5k)
-microchip,mcp4632-103 Microchip 7-bit Dual I2C Digital Potentiometer (10k)
-microchip,mcp4632-503 Microchip 7-bit Dual I2C Digital Potentiometer (50k)
-microchip,mcp4632-104 Microchip 7-bit Dual I2C Digital Potentiometer (100k)
-microchip,mcp4641-502 Microchip 7-bit Dual I2C Digital Potentiometer with NV Memory (5k)
-microchip,mcp4641-103 Microchip 7-bit Dual I2C Digital Potentiometer with NV Memory (10k)
-microchip,mcp4641-503 Microchip 7-bit Dual I2C Digital Potentiometer with NV Memory (50k)
-microchip,mcp4641-104 Microchip 7-bit Dual I2C Digital Potentiometer with NV Memory (100k)
-microchip,mcp4642-502 Microchip 7-bit Dual I2C Digital Potentiometer with NV Memory (5k)
-microchip,mcp4642-103 Microchip 7-bit Dual I2C Digital Potentiometer with NV Memory (10k)
-microchip,mcp4642-503 Microchip 7-bit Dual I2C Digital Potentiometer with NV Memory (50k)
-microchip,mcp4642-104 Microchip 7-bit Dual I2C Digital Potentiometer with NV Memory (100k)
-microchip,mcp4651-502 Microchip 8-bit Dual I2C Digital Potentiometer (5k)
-microchip,mcp4651-103 Microchip 8-bit Dual I2C Digital Potentiometer (10k)
-microchip,mcp4651-503 Microchip 8-bit Dual I2C Digital Potentiometer (50k)
-microchip,mcp4651-104 Microchip 8-bit Dual I2C Digital Potentiometer (100k)
-microchip,mcp4652-502 Microchip 8-bit Dual I2C Digital Potentiometer (5k)
-microchip,mcp4652-103 Microchip 8-bit Dual I2C Digital Potentiometer (10k)
-microchip,mcp4652-503 Microchip 8-bit Dual I2C Digital Potentiometer (50k)
-microchip,mcp4652-104 Microchip 8-bit Dual I2C Digital Potentiometer (100k)
-microchip,mcp4661-502 Microchip 8-bit Dual I2C Digital Potentiometer with NV Memory (5k)
-microchip,mcp4661-103 Microchip 8-bit Dual I2C Digital Potentiometer with NV Memory (10k)
-microchip,mcp4661-503 Microchip 8-bit Dual I2C Digital Potentiometer with NV Memory (50k)
-microchip,mcp4661-104 Microchip 8-bit Dual I2C Digital Potentiometer with NV Memory (100k)
-microchip,mcp4662-502 Microchip 8-bit Dual I2C Digital Potentiometer with NV Memory (5k)
-microchip,mcp4662-103 Microchip 8-bit Dual I2C Digital Potentiometer with NV Memory (10k)
-microchip,mcp4662-503 Microchip 8-bit Dual I2C Digital Potentiometer with NV Memory (50k)
-microchip,mcp4662-104 Microchip 8-bit Dual I2C Digital Potentiometer with NV Memory (100k)
-microchip,tc654 PWM Fan Speed Controller With Fan Fault Detection
-microchip,tc655 PWM Fan Speed Controller With Fan Fault Detection
-microcrystal,rv3029 Real Time Clock Module with I2C-Bus
-miramems,da226 MiraMEMS DA226 2-axis 14-bit digital accelerometer
-miramems,da280 MiraMEMS DA280 3-axis 14-bit digital accelerometer
-miramems,da311 MiraMEMS DA311 3-axis 12-bit digital accelerometer
-national,lm63 Temperature sensor with integrated fan control
-national,lm75 I2C TEMP SENSOR
-national,lm80 Serial Interface ACPI-Compatible Microprocessor System Hardware Monitor
-national,lm85 Temperature sensor with integrated fan control
-national,lm92 ±0.33°C Accurate, 12-Bit + Sign Temperature Sensor and Thermal Window Comparator with Two-Wire Interface
-nuvoton,npct501 i2c trusted platform module (TPM)
-nuvoton,npct601 i2c trusted platform module (TPM2)
-nuvoton,w83773g Nuvoton Temperature Sensor
-nxp,pca9556 Octal SMBus and I2C registered interface
-nxp,pca9557 8-bit I2C-bus and SMBus I/O port with reset
-nxp,pcf2127 Real-time clock
-nxp,pcf2129 Real-time clock
-nxp,pcf8523 Real-time Clock
-nxp,pcf8563 Real-time clock/calendar
-nxp,pcf85063 Tiny Real-Time Clock
-oki,ml86v7667 OKI ML86V7667 video decoder
-ovti,ov5642 OV5642: Color CMOS QSXGA (5-megapixel) Image Sensor with OmniBSI and Embedded TrueFocus
-pericom,pt7c4338 Real-time Clock Module
-plx,pex8648 48-Lane, 12-Port PCI Express Gen 2 (5.0 GT/s) Switch
-pulsedlight,lidar-lite-v2 Pulsedlight LIDAR range-finding sensor
-ricoh,r2025sd I2C bus SERIAL INTERFACE REAL-TIME CLOCK IC
-ricoh,r2221tl I2C bus SERIAL INTERFACE REAL-TIME CLOCK IC
-ricoh,rs5c372a I2C bus SERIAL INTERFACE REAL-TIME CLOCK IC
-ricoh,rs5c372b I2C bus SERIAL INTERFACE REAL-TIME CLOCK IC
-ricoh,rv5c386 I2C bus SERIAL INTERFACE REAL-TIME CLOCK IC
-ricoh,rv5c387a I2C bus SERIAL INTERFACE REAL-TIME CLOCK IC
-samsung,24ad0xd1 S524AD0XF1 (128K/256K-bit Serial EEPROM for Low Power)
-sgx,vz89x SGX Sensortech VZ89X Sensors
-sii,s35390a 2-wire CMOS real-time clock
-silabs,si7020 Relative Humidity and Temperature Sensors
-skyworks,sky81452 Skyworks SKY81452: Six-Channel White LED Driver with Touch Panel Bias Supply
-st,24c256 i2c serial eeprom (24cxx)
-taos,tsl2550 Ambient Light Sensor with SMBUS/Two Wire Serial Interface
-ti,ads7828 8-Channels, 12-bit ADC
-ti,ads7830 8-Channels, 8-bit ADC
-ti,amc6821 Temperature Monitoring and Fan Control
-ti,tsc2003 I2C Touch-Screen Controller
-ti,tmp102 Low Power Digital Temperature Sensor with SMBUS/Two Wire Serial Interface
-ti,tmp103 Low Power Digital Temperature Sensor with SMBUS/Two Wire Serial Interface
-ti,tmp275 Digital Temperature Sensor
-winbond,w83793 Winbond/Nuvoton H/W Monitor
-winbond,wpct301 i2c trusted platform module (TPM)
diff --git a/Documentation/devicetree/bindings/trivial-devices.yaml b/Documentation/devicetree/bindings/trivial-devices.yaml
new file mode 100644
index 000000000000..a17278a44699
--- /dev/null
+++ b/Documentation/devicetree/bindings/trivial-devices.yaml
@@ -0,0 +1,414 @@
+# SPDX-License-Identifier: None
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/bindings/trivial-devices.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: Trivial I2C and SPI devices that have simple device tree bindings
+
+maintainers:
+ - Rob Herring <[email protected]>
+
+description: |
+ This is a list of trivial I2C and SPI devices that have simple device tree
+ bindings, consisting only of a compatible field, an address and possibly an
+ interrupt line.
+
+ If a device needs more specific bindings, such as properties to
+ describe some aspect of it, there needs to be a specific binding
+ document for it just like any other devices.
+
+properties:
+ reg:
+ maxItems: 1
+ interrupts:
+ maxItems: 1
+ compatible:
+ items:
+ - enum:
+ # AB-RTCMC-32.768kHz-B5ZE-S3: Real Time Clock/Calendar Module with I2C Interface
+ - abracon,abb5zes3
+ # SMBus/I2C Digital Temperature Sensor in 6-Pin SOT with SMBus Alert and Over Temperature Pin
+ - ad,ad7414
+ # ADM9240: Complete System Hardware Monitor for uProcessor-Based Systems
+ - ad,adm9240
+ # +/-1C TDM Extended Temp Range I.C
+ - adi,adt7461
+ # +/-1C TDM Extended Temp Range I.C
+ - adt7461
+ # +/-1C TDM Extended Temp Range I.C
+ - adi,adt7473
+ # +/-1C TDM Extended Temp Range I.C
+ - adi,adt7475
+ # +/-1C TDM Extended Temp Range I.C
+ - adi,adt7476
+ # +/-1C TDM Extended Temp Range I.C
+ - adi,adt7490
+ # Three-Axis Digital Accelerometer
+ - adi,adxl345
+ # Three-Axis Digital Accelerometer (backward-compatibility value "adi,adxl345" must be listed too)
+ - adi,adxl346
+ # AMS iAQ-Core VOC Sensor
+ - ams,iaq-core
+ # AMS/TAOS ALS and proximity sensor
+ - amstaos,tsl2571
+ # AMS/TAOS ALS and proximity sensor
+ - amstaos,tsl2671
+ # AMS/TAOS ALS and proximity sensor
+ - amstaos,tmd2671
+ # AMS/TAOS ALS and proximity sensor
+ - amstaos,tsl2771
+ # AMS/TAOS ALS and proximity sensor
+ - amstaos,tmd2771
+ # AMS/TAOS ALS and proximity sensor
+ - amstaos,tsl2572
+ # AMS/TAOS ALS and proximity sensor
+ - amstaos,tsl2672
+ # AMS/TAOS ALS and proximity sensor
+ - amstaos,tmd2672
+ # AMS/TAOS ALS and proximity sensor
+ - amstaos,tsl2772
+ # AMS/TAOS ALS and proximity sensor
+ - amstaos,tmd2772
+ # i2c serial eeprom (24cxx)
+ - at,24c08
+ # i2c trusted platform module (TPM)
+ - atmel,at97sc3204t
+ # CM32181: Ambient Light Sensor
+ - capella,cm32181
+ # CM3232: Ambient Light Sensor
+ - capella,cm3232
+ # Cirrus Logic CS42L51 audio codec
+ - cirrus,cs42l51
+ # I2C, 32-Bit Binary Counter Watchdog RTC with Trickle Charger and Reset Input/Output
+ - dallas,ds1374
+ # High-Precision Digital Thermometer
+ - dallas,ds1631
+ # Dallas DS1672 Real-time Clock
+ - dallas,ds1672
+ # Total-Elapsed-Time Recorder with Alarm
+ - dallas,ds1682
+ # Tiny Digital Thermometer and Thermostat
+ - dallas,ds1775
+ # Extremely Accurate I²C RTC with Integrated Crystal and SRAM
+ - dallas,ds3232
+ # CPU Supervisor with Nonvolatile Memory and Programmable I/O
+ - dallas,ds4510
+ # Digital Thermometer and Thermostat
+ - dallas,ds75
+ # Devantech SRF02 ultrasonic ranger in I2C mode
+ - devantech,srf02
+ # Devantech SRF08 ultrasonic ranger
+ - devantech,srf08
+ # Devantech SRF10 ultrasonic ranger
+ - devantech,srf10
+ # DA9053: flexible system level PMIC with multicore support
+ - dlg,da9053
+ # DA9063: system PMIC for quad-core application processors
+ - dlg,da9063
+ # DMARD09: 3-axis Accelerometer
+ - domintech,dmard09
+ # DMARD10: 3-axis Accelerometer
+ - domintech,dmard10
+ # I2C-BUS INTERFACE REAL TIME CLOCK MODULE
+ - epson,rx8010
+ # I2C-BUS INTERFACE REAL TIME CLOCK MODULE
+ - epson,rx8581
+ # EM Microelectronic EM3027 Real-time Clock
+ - emmicro,em3027
+ # MAG3110: Xtrinsic High Accuracy, 3D Magnetometer
+ - fsl,mag3110
+ # MMA7660FC: 3-Axis Orientation/Motion Detection Sensor
+ - fsl,mma7660
+ # MMA8450Q: Xtrinsic Low-power, 3-axis Xtrinsic Accelerometer
+ - fsl,mma8450
+ # MPL3115: Absolute Digital Pressure Sensor
+ - fsl,mpl3115
+ # MPR121: Proximity Capacitive Touch Sensor Controller
+ - fsl,mpr121
+ # SGTL5000: Ultra Low-Power Audio Codec
+ - fsl,sgtl5000
+ # G751: Digital Temperature Sensor and Thermal Watchdog with Two-Wire Interface
+ - gmt,g751
+ # Infineon SLB9635 (Soft-) I2C TPM (old protocol, max 100khz)
+ - infineon,slb9635tt
+ # Infineon SLB9645 I2C TPM (new protocol, max 400khz)
+ - infineon,slb9645tt
+ # Infineon TLV493D-A1B6 I2C 3D Magnetic Sensor
+ - infineon,tlv493d-a1b6
+ # Intersil ISL1208 Low Power RTC with Battery Backed SRAM
+ - isil,isl1208
+ # Intersil ISL1218 Low Power RTC with Battery Backed SRAM
+ - isil,isl1218
+ # Intersil ISL12022 Real-time Clock
+ - isil,isl12022
+ # Intersil ISL29028 Ambient Light and Proximity Sensor
+ - isil,isl29028
+ # Intersil ISL29030 Ambient Light and Proximity Sensor
+ - isil,isl29030
+ # 5 Bit Programmable, Pulse-Width Modulator
+ - maxim,ds1050
+ # Low-Power, 4-/12-Channel, 2-Wire Serial, 12-Bit ADCs
+ - maxim,max1237
+ # PECI-to-I2C translator for PECI-to-SMBus/I2C protocol conversion
+ - maxim,max6621
+ # 9-Bit/12-Bit Temperature Sensors with I²C-Compatible Serial Interface
+ - maxim,max6625
+ # mCube 3-axis 8-bit digital accelerometer
+ - mcube,mc3230
+ # MEMSIC 2-axis 8-bit digital accelerometer
+ - memsic,mxc6225
+ # Microchip 7-bit Single I2C Digital POT (5k)
+ - microchip,mcp4017-502
+ # Microchip 7-bit Single I2C Digital POT (10k)
+ - microchip,mcp4017-103
+ # Microchip 7-bit Single I2C Digital POT (50k)
+ - microchip,mcp4017-503
+ # Microchip 7-bit Single I2C Digital POT (100k)
+ - microchip,mcp4017-104
+ # Microchip 7-bit Single I2C Digital POT (5k)
+ - microchip,mcp4018-502
+ # Microchip 7-bit Single I2C Digital POT (10k)
+ - microchip,mcp4018-103
+ # Microchip 7-bit Single I2C Digital POT (50k)
+ - microchip,mcp4018-503
+ # Microchip 7-bit Single I2C Digital POT (100k)
+ - microchip,mcp4018-104
+ # Microchip 7-bit Single I2C Digital POT (5k)
+ - microchip,mcp4019-502
+ # Microchip 7-bit Single I2C Digital POT (10k)
+ - microchip,mcp4019-103
+ # Microchip 7-bit Single I2C Digital POT (50k)
+ - microchip,mcp4019-503
+ # Microchip 7-bit Single I2C Digital POT (100k)
+ - microchip,mcp4019-104
+ # Microchip 7-bit Single I2C Digital Potentiometer (5k)
+ - microchip,mcp4531-502
+ # Microchip 7-bit Single I2C Digital Potentiometer (10k)
+ - microchip,mcp4531-103
+ # Microchip 7-bit Single I2C Digital Potentiometer (50k)
+ - microchip,mcp4531-503
+ # Microchip 7-bit Single I2C Digital Potentiometer (100k)
+ - microchip,mcp4531-104
+ # Microchip 7-bit Single I2C Digital Potentiometer (5k)
+ - microchip,mcp4532-502
+ # Microchip 7-bit Single I2C Digital Potentiometer (10k)
+ - microchip,mcp4532-103
+ # Microchip 7-bit Single I2C Digital Potentiometer (50k)
+ - microchip,mcp4532-503
+ # Microchip 7-bit Single I2C Digital Potentiometer (100k)
+ - microchip,mcp4532-104
+ # Microchip 7-bit Single I2C Digital Potentiometer with NV Memory (5k)
+ - microchip,mcp4541-502
+ # Microchip 7-bit Single I2C Digital Potentiometer with NV Memory (10k)
+ - microchip,mcp4541-103
+ # Microchip 7-bit Single I2C Digital Potentiometer with NV Memory (50k)
+ - microchip,mcp4541-503
+ # Microchip 7-bit Single I2C Digital Potentiometer with NV Memory (100k)
+ - microchip,mcp4541-104
+ # Microchip 7-bit Single I2C Digital Potentiometer with NV Memory (5k)
+ - microchip,mcp4542-502
+ # Microchip 7-bit Single I2C Digital Potentiometer with NV Memory (10k)
+ - microchip,mcp4542-103
+ # Microchip 7-bit Single I2C Digital Potentiometer with NV Memory (50k)
+ - microchip,mcp4542-503
+ # Microchip 7-bit Single I2C Digital Potentiometer with NV Memory (100k)
+ - microchip,mcp4542-104
+ # Microchip 8-bit Single I2C Digital Potentiometer (5k)
+ - microchip,mcp4551-502
+ # Microchip 8-bit Single I2C Digital Potentiometer (10k)
+ - microchip,mcp4551-103
+ # Microchip 8-bit Single I2C Digital Potentiometer (50k)
+ - microchip,mcp4551-503
+ # Microchip 8-bit Single I2C Digital Potentiometer (100k)
+ - microchip,mcp4551-104
+ # Microchip 8-bit Single I2C Digital Potentiometer (5k)
+ - microchip,mcp4552-502
+ # Microchip 8-bit Single I2C Digital Potentiometer (10k)
+ - microchip,mcp4552-103
+ # Microchip 8-bit Single I2C Digital Potentiometer (50k)
+ - microchip,mcp4552-503
+ # Microchip 8-bit Single I2C Digital Potentiometer (100k)
+ - microchip,mcp4552-104
+ # Microchip 8-bit Single I2C Digital Potentiometer with NV Memory (5k)
+ - microchip,mcp4561-502
+ # Microchip 8-bit Single I2C Digital Potentiometer with NV Memory (10k)
+ - microchip,mcp4561-103
+ # Microchip 8-bit Single I2C Digital Potentiometer with NV Memory (50k)
+ - microchip,mcp4561-503
+ # Microchip 8-bit Single I2C Digital Potentiometer with NV Memory (100k)
+ - microchip,mcp4561-104
+ # Microchip 8-bit Single I2C Digital Potentiometer with NV Memory (5k)
+ - microchip,mcp4562-502
+ # Microchip 8-bit Single I2C Digital Potentiometer with NV Memory (10k)
+ - microchip,mcp4562-103
+ # Microchip 8-bit Single I2C Digital Potentiometer with NV Memory (50k)
+ - microchip,mcp4562-503
+ # Microchip 8-bit Single I2C Digital Potentiometer with NV Memory (100k)
+ - microchip,mcp4562-104
+ # Microchip 7-bit Dual I2C Digital Potentiometer (5k)
+ - microchip,mcp4631-502
+ # Microchip 7-bit Dual I2C Digital Potentiometer (10k)
+ - microchip,mcp4631-103
+ # Microchip 7-bit Dual I2C Digital Potentiometer (50k)
+ - microchip,mcp4631-503
+ # Microchip 7-bit Dual I2C Digital Potentiometer (100k)
+ - microchip,mcp4631-104
+ # Microchip 7-bit Dual I2C Digital Potentiometer (5k)
+ - microchip,mcp4632-502
+ # Microchip 7-bit Dual I2C Digital Potentiometer (10k)
+ - microchip,mcp4632-103
+ # Microchip 7-bit Dual I2C Digital Potentiometer (50k)
+ - microchip,mcp4632-503
+ # Microchip 7-bit Dual I2C Digital Potentiometer (100k)
+ - microchip,mcp4632-104
+ # Microchip 7-bit Dual I2C Digital Potentiometer with NV Memory (5k)
+ - microchip,mcp4641-502
+ # Microchip 7-bit Dual I2C Digital Potentiometer with NV Memory (10k)
+ - microchip,mcp4641-103
+ # Microchip 7-bit Dual I2C Digital Potentiometer with NV Memory (50k)
+ - microchip,mcp4641-503
+ # Microchip 7-bit Dual I2C Digital Potentiometer with NV Memory (100k)
+ - microchip,mcp4641-104
+ # Microchip 7-bit Dual I2C Digital Potentiometer with NV Memory (5k)
+ - microchip,mcp4642-502
+ # Microchip 7-bit Dual I2C Digital Potentiometer with NV Memory (10k)
+ - microchip,mcp4642-103
+ # Microchip 7-bit Dual I2C Digital Potentiometer with NV Memory (50k)
+ - microchip,mcp4642-503
+ # Microchip 7-bit Dual I2C Digital Potentiometer with NV Memory (100k)
+ - microchip,mcp4642-104
+ # Microchip 8-bit Dual I2C Digital Potentiometer (5k)
+ - microchip,mcp4651-502
+ # Microchip 8-bit Dual I2C Digital Potentiometer (10k)
+ - microchip,mcp4651-103
+ # Microchip 8-bit Dual I2C Digital Potentiometer (50k)
+ - microchip,mcp4651-503
+ # Microchip 8-bit Dual I2C Digital Potentiometer (100k)
+ - microchip,mcp4651-104
+ # Microchip 8-bit Dual I2C Digital Potentiometer (5k)
+ - microchip,mcp4652-502
+ # Microchip 8-bit Dual I2C Digital Potentiometer (10k)
+ - microchip,mcp4652-103
+ # Microchip 8-bit Dual I2C Digital Potentiometer (50k)
+ - microchip,mcp4652-503
+ # Microchip 8-bit Dual I2C Digital Potentiometer (100k)
+ - microchip,mcp4652-104
+ # Microchip 8-bit Dual I2C Digital Potentiometer with NV Memory (5k)
+ - microchip,mcp4661-502
+ # Microchip 8-bit Dual I2C Digital Potentiometer with NV Memory (10k)
+ - microchip,mcp4661-103
+ # Microchip 8-bit Dual I2C Digital Potentiometer with NV Memory (50k)
+ - microchip,mcp4661-503
+ # Microchip 8-bit Dual I2C Digital Potentiometer with NV Memory (100k)
+ - microchip,mcp4661-104
+ # Microchip 8-bit Dual I2C Digital Potentiometer with NV Memory (5k)
+ - microchip,mcp4662-502
+ # Microchip 8-bit Dual I2C Digital Potentiometer with NV Memory (10k)
+ - microchip,mcp4662-103
+ # Microchip 8-bit Dual I2C Digital Potentiometer with NV Memory (50k)
+ - microchip,mcp4662-503
+ # Microchip 8-bit Dual I2C Digital Potentiometer with NV Memory (100k)
+ - microchip,mcp4662-104
+ # PWM Fan Speed Controller With Fan Fault Detection
+ - microchip,tc654
+ # PWM Fan Speed Controller With Fan Fault Detection
+ - microchip,tc655
+ # Real Time Clock Module with I2C-Bus
+ - microcrystal,rv3029
+ # MiraMEMS DA226 2-axis 14-bit digital accelerometer
+ - miramems,da226
+ # MiraMEMS DA280 3-axis 14-bit digital accelerometer
+ - miramems,da280
+ # MiraMEMS DA311 3-axis 12-bit digital accelerometer
+ - miramems,da311
+ # Temperature sensor with integrated fan control
+ - national,lm63
+ # I2C TEMP SENSOR
+ - national,lm75
+ # Serial Interface ACPI-Compatible Microprocessor System Hardware Monitor
+ - national,lm80
+ # Temperature sensor with integrated fan control
+ - national,lm85
+ # ±0.33°C Accurate, 12-Bit + Sign Temperature Sensor and Thermal Window Comparator with Two-Wire Interface
+ - national,lm92
+ # i2c trusted platform module (TPM)
+ - nuvoton,npct501
+ # i2c trusted platform module (TPM2)
+ - nuvoton,npct601
+ # Nuvoton Temperature Sensor
+ - nuvoton,w83773g
+ # Octal SMBus and I2C registered interface
+ - nxp,pca9556
+ # 8-bit I2C-bus and SMBus I/O port with reset
+ - nxp,pca9557
+ # Real-time clock
+ - nxp,pcf2127
+ # Real-time clock
+ - nxp,pcf2129
+ # Real-time Clock
+ - nxp,pcf8523
+ # Real-time clock/calendar
+ - nxp,pcf8563
+ # Tiny Real-Time Clock
+ - nxp,pcf85063
+ # OKI ML86V7667 video decoder
+ - oki,ml86v7667
+ # OV5642: Color CMOS QSXGA (5-megapixel) Image Sensor with OmniBSI and Embedded TrueFocus
+ - ovti,ov5642
+ # Real-time Clock Module
+ - pericom,pt7c4338
+ # 48-Lane, 12-Port PCI Express Gen 2 (5.0 GT/s) Switch
+ - plx,pex8648
+ # Pulsedlight LIDAR range-finding sensor
+ - pulsedlight,lidar-lite-v2
+ # I2C bus SERIAL INTERFACE REAL-TIME CLOCK IC
+ - ricoh,r2025sd
+ # I2C bus SERIAL INTERFACE REAL-TIME CLOCK IC
+ - ricoh,r2221tl
+ # I2C bus SERIAL INTERFACE REAL-TIME CLOCK IC
+ - ricoh,rs5c372a
+ # I2C bus SERIAL INTERFACE REAL-TIME CLOCK IC
+ - ricoh,rs5c372b
+ # I2C bus SERIAL INTERFACE REAL-TIME CLOCK IC
+ - ricoh,rv5c386
+ # I2C bus SERIAL INTERFACE REAL-TIME CLOCK IC
+ - ricoh,rv5c387a
+ # S524AD0XF1 (128K/256K-bit Serial EEPROM for Low Power)
+ - samsung,24ad0xd1
+ # SGX Sensortech VZ89X Sensors
+ - sgx,vz89x
+ # 2-wire CMOS real-time clock
+ - sii,s35390a
+ # Relative Humidity and Temperature Sensors
+ - silabs,si7020
+ # Skyworks SKY81452: Six-Channel White LED Driver with Touch Panel Bias Supply
+ - skyworks,sky81452
+ # i2c serial eeprom (24cxx)
+ - st,24c256
+ # Ambient Light Sensor with SMBUS/Two Wire Serial Interface
+ - taos,tsl2550
+ # 8-Channels, 12-bit ADC
+ - ti,ads7828
+ # 8-Channels, 8-bit ADC
+ - ti,ads7830
+ # Temperature Monitoring and Fan Control
+ - ti,amc6821
+ # I2C Touch-Screen Controller
+ - ti,tsc2003
+ # Low Power Digital Temperature Sensor with SMBUS/Two Wire Serial Interface
+ - ti,tmp102
+ # Low Power Digital Temperature Sensor with SMBUS/Two Wire Serial Interface
+ - ti,tmp103
+ # Digital Temperature Sensor
+ - ti,tmp275
+ # Winbond/Nuvoton H/W Monitor
+ - winbond,w83793
+ # i2c trusted platform module (TPM)
+ - winbond,wpct301
+
+required:
+ - compatible
+ - reg
+
+...
--
2.17.1
In preparation to convert board-level bindings to json-schema, move
various misc SoC bindings out to their own file.
Cc: Mark Rutland <[email protected]>
Cc: Nicolas Ferre <[email protected]>
Cc: Alexandre Belloni <[email protected]>
Cc: [email protected]
Cc: [email protected]
Signed-off-by: Rob Herring <[email protected]>
---
.../devicetree/bindings/arm/atmel-at91.txt | 170 -----------------
.../devicetree/bindings/arm/atmel-sysregs.txt | 171 ++++++++++++++++++
2 files changed, 171 insertions(+), 170 deletions(-)
create mode 100644 Documentation/devicetree/bindings/arm/atmel-sysregs.txt
diff --git a/Documentation/devicetree/bindings/arm/atmel-at91.txt b/Documentation/devicetree/bindings/arm/atmel-at91.txt
index 31220b54d85d..4bf1b4da7659 100644
--- a/Documentation/devicetree/bindings/arm/atmel-at91.txt
+++ b/Documentation/devicetree/bindings/arm/atmel-at91.txt
@@ -70,173 +70,3 @@ compatible: must be one of:
- "atmel,samv71q19"
- "atmel,samv71q20"
- "atmel,samv71q21"
-
-Chipid required properties:
-- compatible: Should be "atmel,sama5d2-chipid"
-- reg : Should contain registers location and length
-
-PIT Timer required properties:
-- compatible: Should be "atmel,at91sam9260-pit"
-- reg: Should contain registers location and length
-- interrupts: Should contain interrupt for the PIT which is the IRQ line
- shared across all System Controller members.
-
-System Timer (ST) required properties:
-- compatible: Should be "atmel,at91rm9200-st", "syscon", "simple-mfd"
-- reg: Should contain registers location and length
-- interrupts: Should contain interrupt for the ST which is the IRQ line
- shared across all System Controller members.
-- clocks: phandle to input clock.
-Its subnodes can be:
-- watchdog: compatible should be "atmel,at91rm9200-wdt"
-
-RSTC Reset Controller required properties:
-- compatible: Should be "atmel,<chip>-rstc".
- <chip> can be "at91sam9260" or "at91sam9g45" or "sama5d3"
-- reg: Should contain registers location and length
-- clocks: phandle to input clock.
-
-Example:
-
- rstc@fffffd00 {
- compatible = "atmel,at91sam9260-rstc";
- reg = <0xfffffd00 0x10>;
- clocks = <&clk32k>;
- };
-
-RAMC SDRAM/DDR Controller required properties:
-- compatible: Should be "atmel,at91rm9200-sdramc", "syscon"
- "atmel,at91sam9260-sdramc",
- "atmel,at91sam9g45-ddramc",
- "atmel,sama5d3-ddramc",
-- reg: Should contain registers location and length
-
-Examples:
-
- ramc0: ramc@ffffe800 {
- compatible = "atmel,at91sam9g45-ddramc";
- reg = <0xffffe800 0x200>;
- };
-
-SHDWC Shutdown Controller
-
-required properties:
-- compatible: Should be "atmel,<chip>-shdwc".
- <chip> can be "at91sam9260", "at91sam9rl" or "at91sam9x5".
-- reg: Should contain registers location and length
-- clocks: phandle to input clock.
-
-optional properties:
-- atmel,wakeup-mode: String, operation mode of the wakeup mode.
- Supported values are: "none", "high", "low", "any".
-- atmel,wakeup-counter: Counter on Wake-up 0 (between 0x0 and 0xf).
-
-optional at91sam9260 properties:
-- atmel,wakeup-rtt-timer: boolean to enable Real-time Timer Wake-up.
-
-optional at91sam9rl properties:
-- atmel,wakeup-rtc-timer: boolean to enable Real-time Clock Wake-up.
-- atmel,wakeup-rtt-timer: boolean to enable Real-time Timer Wake-up.
-
-optional at91sam9x5 properties:
-- atmel,wakeup-rtc-timer: boolean to enable Real-time Clock Wake-up.
-
-Example:
-
- shdwc@fffffd10 {
- compatible = "atmel,at91sam9260-shdwc";
- reg = <0xfffffd10 0x10>;
- clocks = <&clk32k>;
- };
-
-SHDWC SAMA5D2-Compatible Shutdown Controller
-
-1) shdwc node
-
-required properties:
-- compatible: should be "atmel,sama5d2-shdwc".
-- reg: should contain registers location and length
-- clocks: phandle to input clock.
-- #address-cells: should be one. The cell is the wake-up input index.
-- #size-cells: should be zero.
-
-optional properties:
-
-- debounce-delay-us: minimum wake-up inputs debouncer period in
- microseconds. It's usually a board-related property.
-- atmel,wakeup-rtc-timer: boolean to enable Real-Time Clock wake-up.
-
-The node contains child nodes for each wake-up input that the platform uses.
-
-2) input nodes
-
-Wake-up input nodes are usually described in the "board" part of the Device
-Tree. Note also that input 0 is linked to the wake-up pin and is frequently
-used.
-
-Required properties:
-- reg: should contain the wake-up input index [0 - 15].
-
-Optional properties:
-- atmel,wakeup-active-high: boolean, the corresponding wake-up input described
- by the child, forces the wake-up of the core power supply on a high level.
- The default is to be active low.
-
-Example:
-
-On the SoC side:
- shdwc@f8048010 {
- compatible = "atmel,sama5d2-shdwc";
- reg = <0xf8048010 0x10>;
- clocks = <&clk32k>;
- #address-cells = <1>;
- #size-cells = <0>;
- atmel,wakeup-rtc-timer;
- };
-
-On the board side:
- shdwc@f8048010 {
- debounce-delay-us = <976>;
-
- input@0 {
- reg = <0>;
- };
-
- input@1 {
- reg = <1>;
- atmel,wakeup-active-high;
- };
- };
-
-Special Function Registers (SFR)
-
-Special Function Registers (SFR) manage specific aspects of the integrated
-memory, bridge implementations, processor and other functionality not controlled
-elsewhere.
-
-required properties:
-- compatible: Should be "atmel,<chip>-sfr", "syscon" or
- "atmel,<chip>-sfrbu", "syscon"
- <chip> can be "sama5d3", "sama5d4" or "sama5d2".
-- reg: Should contain registers location and length
-
- sfr@f0038000 {
- compatible = "atmel,sama5d3-sfr", "syscon";
- reg = <0xf0038000 0x60>;
- };
-
-Security Module (SECUMOD)
-
-The Security Module macrocell provides all necessary secure functions to avoid
-voltage, temperature, frequency and mechanical attacks on the chip. It also
-embeds secure memories that can be scrambled
-
-required properties:
-- compatible: Should be "atmel,<chip>-secumod", "syscon".
- <chip> can be "sama5d2".
-- reg: Should contain registers location and length
-
- secumod@fc040000 {
- compatible = "atmel,sama5d2-secumod", "syscon";
- reg = <0xfc040000 0x100>;
- };
diff --git a/Documentation/devicetree/bindings/arm/atmel-sysregs.txt b/Documentation/devicetree/bindings/arm/atmel-sysregs.txt
new file mode 100644
index 000000000000..4b96608ad692
--- /dev/null
+++ b/Documentation/devicetree/bindings/arm/atmel-sysregs.txt
@@ -0,0 +1,171 @@
+Atmel system registers
+
+Chipid required properties:
+- compatible: Should be "atmel,sama5d2-chipid"
+- reg : Should contain registers location and length
+
+PIT Timer required properties:
+- compatible: Should be "atmel,at91sam9260-pit"
+- reg: Should contain registers location and length
+- interrupts: Should contain interrupt for the PIT which is the IRQ line
+ shared across all System Controller members.
+
+System Timer (ST) required properties:
+- compatible: Should be "atmel,at91rm9200-st", "syscon", "simple-mfd"
+- reg: Should contain registers location and length
+- interrupts: Should contain interrupt for the ST which is the IRQ line
+ shared across all System Controller members.
+- clocks: phandle to input clock.
+Its subnodes can be:
+- watchdog: compatible should be "atmel,at91rm9200-wdt"
+
+RSTC Reset Controller required properties:
+- compatible: Should be "atmel,<chip>-rstc".
+ <chip> can be "at91sam9260" or "at91sam9g45" or "sama5d3"
+- reg: Should contain registers location and length
+- clocks: phandle to input clock.
+
+Example:
+
+ rstc@fffffd00 {
+ compatible = "atmel,at91sam9260-rstc";
+ reg = <0xfffffd00 0x10>;
+ clocks = <&clk32k>;
+ };
+
+RAMC SDRAM/DDR Controller required properties:
+- compatible: Should be "atmel,at91rm9200-sdramc", "syscon"
+ "atmel,at91sam9260-sdramc",
+ "atmel,at91sam9g45-ddramc",
+ "atmel,sama5d3-ddramc",
+- reg: Should contain registers location and length
+
+Examples:
+
+ ramc0: ramc@ffffe800 {
+ compatible = "atmel,at91sam9g45-ddramc";
+ reg = <0xffffe800 0x200>;
+ };
+
+SHDWC Shutdown Controller
+
+required properties:
+- compatible: Should be "atmel,<chip>-shdwc".
+ <chip> can be "at91sam9260", "at91sam9rl" or "at91sam9x5".
+- reg: Should contain registers location and length
+- clocks: phandle to input clock.
+
+optional properties:
+- atmel,wakeup-mode: String, operation mode of the wakeup mode.
+ Supported values are: "none", "high", "low", "any".
+- atmel,wakeup-counter: Counter on Wake-up 0 (between 0x0 and 0xf).
+
+optional at91sam9260 properties:
+- atmel,wakeup-rtt-timer: boolean to enable Real-time Timer Wake-up.
+
+optional at91sam9rl properties:
+- atmel,wakeup-rtc-timer: boolean to enable Real-time Clock Wake-up.
+- atmel,wakeup-rtt-timer: boolean to enable Real-time Timer Wake-up.
+
+optional at91sam9x5 properties:
+- atmel,wakeup-rtc-timer: boolean to enable Real-time Clock Wake-up.
+
+Example:
+
+ shdwc@fffffd10 {
+ compatible = "atmel,at91sam9260-shdwc";
+ reg = <0xfffffd10 0x10>;
+ clocks = <&clk32k>;
+ };
+
+SHDWC SAMA5D2-Compatible Shutdown Controller
+
+1) shdwc node
+
+required properties:
+- compatible: should be "atmel,sama5d2-shdwc".
+- reg: should contain registers location and length
+- clocks: phandle to input clock.
+- #address-cells: should be one. The cell is the wake-up input index.
+- #size-cells: should be zero.
+
+optional properties:
+
+- debounce-delay-us: minimum wake-up inputs debouncer period in
+ microseconds. It's usually a board-related property.
+- atmel,wakeup-rtc-timer: boolean to enable Real-Time Clock wake-up.
+
+The node contains child nodes for each wake-up input that the platform uses.
+
+2) input nodes
+
+Wake-up input nodes are usually described in the "board" part of the Device
+Tree. Note also that input 0 is linked to the wake-up pin and is frequently
+used.
+
+Required properties:
+- reg: should contain the wake-up input index [0 - 15].
+
+Optional properties:
+- atmel,wakeup-active-high: boolean, the corresponding wake-up input described
+ by the child, forces the wake-up of the core power supply on a high level.
+ The default is to be active low.
+
+Example:
+
+On the SoC side:
+ shdwc@f8048010 {
+ compatible = "atmel,sama5d2-shdwc";
+ reg = <0xf8048010 0x10>;
+ clocks = <&clk32k>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+ atmel,wakeup-rtc-timer;
+ };
+
+On the board side:
+ shdwc@f8048010 {
+ debounce-delay-us = <976>;
+
+ input@0 {
+ reg = <0>;
+ };
+
+ input@1 {
+ reg = <1>;
+ atmel,wakeup-active-high;
+ };
+ };
+
+Special Function Registers (SFR)
+
+Special Function Registers (SFR) manage specific aspects of the integrated
+memory, bridge implementations, processor and other functionality not controlled
+elsewhere.
+
+required properties:
+- compatible: Should be "atmel,<chip>-sfr", "syscon" or
+ "atmel,<chip>-sfrbu", "syscon"
+ <chip> can be "sama5d3", "sama5d4" or "sama5d2".
+- reg: Should contain registers location and length
+
+ sfr@f0038000 {
+ compatible = "atmel,sama5d3-sfr", "syscon";
+ reg = <0xf0038000 0x60>;
+ };
+
+Security Module (SECUMOD)
+
+The Security Module macrocell provides all necessary secure functions to avoid
+voltage, temperature, frequency and mechanical attacks on the chip. It also
+embeds secure memories that can be scrambled
+
+required properties:
+- compatible: Should be "atmel,<chip>-secumod", "syscon".
+ <chip> can be "sama5d2".
+- reg: Should contain registers location and length
+
+ secumod@fc040000 {
+ compatible = "atmel,sama5d2-secumod", "syscon";
+ reg = <0xfc040000 0x100>;
+ };
--
2.17.1
Convert Actions Semi SoC bindings to DT schema format using json-schema.
Cc: "Andreas Färber" <[email protected]>
Cc: Mark Rutland <[email protected]>
Cc: [email protected]
Cc: [email protected]
Signed-off-by: Rob Herring <[email protected]>
---
.../devicetree/bindings/arm/actions.txt | 56 -------------------
.../devicetree/bindings/arm/actions.yaml | 34 +++++++++++
2 files changed, 34 insertions(+), 56 deletions(-)
delete mode 100644 Documentation/devicetree/bindings/arm/actions.txt
create mode 100644 Documentation/devicetree/bindings/arm/actions.yaml
diff --git a/Documentation/devicetree/bindings/arm/actions.txt b/Documentation/devicetree/bindings/arm/actions.txt
deleted file mode 100644
index d54f33c4e0da..000000000000
--- a/Documentation/devicetree/bindings/arm/actions.txt
+++ /dev/null
@@ -1,56 +0,0 @@
-Actions Semi platforms device tree bindings
--------------------------------------------
-
-
-S500 SoC
-========
-
-Required root node properties:
-
- - compatible : must contain "actions,s500"
-
-
-Modules:
-
-Root node property compatible must contain, depending on module:
-
- - LeMaker Guitar: "lemaker,guitar"
-
-
-Boards:
-
-Root node property compatible must contain, depending on board:
-
- - Allo.com Sparky: "allo,sparky"
- - Cubietech CubieBoard6: "cubietech,cubieboard6"
- - LeMaker Guitar Base Board rev. B: "lemaker,guitar-bb-rev-b", "lemaker,guitar"
-
-
-S700 SoC
-========
-
-Required root node properties:
-
-- compatible : must contain "actions,s700"
-
-
-Boards:
-
-Root node property compatible must contain, depending on board:
-
- - Cubietech CubieBoard7: "cubietech,cubieboard7"
-
-
-S900 SoC
-========
-
-Required root node properties:
-
-- compatible : must contain "actions,s900"
-
-
-Boards:
-
-Root node property compatible must contain, depending on board:
-
- - uCRobotics Bubblegum-96: "ucrobotics,bubblegum-96"
diff --git a/Documentation/devicetree/bindings/arm/actions.yaml b/Documentation/devicetree/bindings/arm/actions.yaml
new file mode 100644
index 000000000000..af9345a228b4
--- /dev/null
+++ b/Documentation/devicetree/bindings/arm/actions.yaml
@@ -0,0 +1,34 @@
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/soc/arm/actions.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: Actions Semi platforms device tree bindings
+
+maintainers:
+ - Andreas Färber <[email protected]>
+
+description: |
+ The Actions Semi S500 is a quad-core ARM Cortex-A9 SoC. The Actions Semi
+ S900 is a quad-core ARM Cortex-A53 SoC.
+
+properties:
+ compatible:
+ oneOf:
+ - items:
+ - enum:
+ - lemaker,guitar-bb-rev-b
+ - enum:
+ - lemaker,guitar
+ - allo,sparky
+ - cubietech,cubieboard6
+ - const: actions,s500
+ minItems: 2
+ maxItems: 3
+ additionalItems: false
+ - items:
+ - const: cubietech,cubieboard7
+ - const: actions,s700
+ - items:
+ - const: ucrobotics,bubblegum-96
+ - const: actions,s900
--
2.17.1
Add a how-to doc on writing DT schema documentation. This gives a
description of each section and details on how to validate the DT schema
file. The DT schema are written using json-schema vocabulary in a YAML
encoded document. Using jsonschema gives us access to existing tooling.
A YAML encoding gives us something easy to edit. The example is
annotated to help explain what each section does.
This example is just the tip of the iceberg, but is it the part most
developers writing bindings will interact with. Backing all this up
are meta-schema (to validate the binding schemas), some DT core schema,
YAML encoded DT output with dtc, and a small number of python scripts to
run validation.
Cc: Mark Rutland <[email protected]>
Cc: [email protected]
Signed-off-by: Rob Herring <[email protected]>
---
.../devicetree/bindings/example-schema.yaml | 155 ++++++++++++++++++
Documentation/devicetree/writing-schema.md | 111 +++++++++++++
2 files changed, 266 insertions(+)
create mode 100644 Documentation/devicetree/bindings/example-schema.yaml
create mode 100644 Documentation/devicetree/writing-schema.md
diff --git a/Documentation/devicetree/bindings/example-schema.yaml b/Documentation/devicetree/bindings/example-schema.yaml
new file mode 100644
index 000000000000..4cbdbf59695f
--- /dev/null
+++ b/Documentation/devicetree/bindings/example-schema.yaml
@@ -0,0 +1,155 @@
+# SPDX-License-Identifier: BSD-2-Clause
+# Copyright 2018 Linaro Ltd.
+%YAML 1.2
+---
+# All the top-level keys are standard json-schema keywords except for
+# 'maintainers' and 'select'
+
+# $id is a unique idenifier based on the filename
+$id: "http://devicetree.org/schemas/example-schema.yaml#"
+$schema: "http://devicetree.org/meta-schemas/core.yaml#"
+
+title: An example schema annotated with jsonschema details
+
+maintainers:
+ - Rob Herring <[email protected]>
+
+description: |
+ A more detailed multi-line description of the binding.
+
+ Details about the hardware device and any links to datasheets can go here.
+
+ Literal blocks are marked with the '|' at the beginning. The end is marked by
+ indentation less than the first line of the literal block.
+
+select: false
+ # 'select' is a schema applied to a DT node to determine if this binding
+ # schema should be applied to the node. It is optional and by default the
+ # possible compatible strings are extracted and used to match.
+
+properties:
+ # A dictionary of DT properties for this binding schema
+ compatible:
+ # More complicated schema can use oneOf (XOR), anyOf (OR), or allOf (AND)
+ # to handle different conditions.
+ # In this case, it's needed to handle a variable number of values as there
+ # isn't another way to express a constraint of the last string value.
+ # The boolean schema must be a list of schemas.
+ oneOf:
+ - items:
+ # items is a list of possible values for the property. The number of
+ # values is determined by the number of elements in the list.
+ # Order in lists is significant, order in dicts is not
+ # Must be one of the 1st enums followed by the 2nd enum
+ #
+ # Each element in items should be 'enum' or 'const'
+ - enum:
+ - vendor,soc4-ip
+ - vendor,soc3-ip
+ - vendor,soc2-ip
+ - enum:
+ - vendor,soc1-ip
+ # additionalItems being false is implied
+ # minItems/maxItems equal to 2 is implied
+ - items:
+ # 'const' is just a special case of an enum with a single possible value
+ - const: vendor,soc1-ip
+
+ reg:
+ # The description of each element defines the order and implicitly defines
+ # the number of reg entries
+ items:
+ - description: core registers
+ - description: aux registers
+ # minItems/maxItems equal to 2 is implied
+
+ reg-names:
+ # The core schema enforces this is a string array
+ items:
+ - const: core
+ - const: aux
+
+ clocks:
+ maxItems: 1
+ # Only a single entry, so just need to set the max number of items.
+ description: hello
+
+ clock-names:
+ items:
+ - const: bus
+
+ interrupts:
+ # Either 1 or 2 interrupts can be present
+ minItems: 1
+ maxItems: 2
+ items:
+ - description: tx or combined interrupt
+ - description: rx interrupt
+
+ description:
+ A variable number of interrupts warrants a description of what conditions
+ affect the number of interrupts. Otherwise, descriptions on standard
+ properties are not necessary.
+
+ interrupt-names:
+ # minItems must be specified here because the default would be 2
+ minItems: 1
+ maxItems: 2
+ items:
+ - const: "tx irq"
+ - const: "rx irq"
+
+ # Property names starting with '#' must be quoted
+ '#interrupt-cells':
+ # A simple case where the value must always be '2'.
+ # The core schema handles that this must be a single integer.
+ const: 2
+
+ interrupt-controller: true
+ # The core checks this is a boolean, so just have to list it here to be
+ # valid for this binding.
+
+ clock-frequency:
+ # The type is set in the core schema. Per device schema only need to set
+ # constraints on the possible values.
+ minimum: 100
+ maximum: 400000
+ # The value that should be used if the property is not present
+ default: 200
+
+ foo-gpios:
+ maxItems: 1
+ description: A connection of the 'foo' gpio line.
+
+ vendor,int-property:
+ description: Vendor specific properties must have a description
+ allOf:
+ - $ref: "/schemas/types.yaml#/definitions/uint32"
+ - enum: [2, 4, 6, 8, 10]
+
+ vendor,bool-property:
+ description: Vendor specific properties must have a description
+ type: boolean
+
+ vendor,string-array-property:
+ description: Vendor specific properties may refer to core schema
+ allOf:
+ - $ref: '/schemas/types.yaml#/definitions/stringarray'
+ - maxItems: 2
+
+required:
+ - compatible
+ - reg
+ - interrupts
+ - interrupt-controller
+
+examples:
+ - |
+ node@1000 {
+ compatible = "vendor,soc4-ip", "vendor,soc1-ip";
+ reg = <0x1000 0x80>,
+ <0x3000 0x80>;
+ reg-names = "core", "aux";
+ interrupts = <10>;
+ interrupt-controller;
+ };
diff --git a/Documentation/devicetree/writing-schema.md b/Documentation/devicetree/writing-schema.md
new file mode 100644
index 000000000000..b1d9798ca3e4
--- /dev/null
+++ b/Documentation/devicetree/writing-schema.md
@@ -0,0 +1,111 @@
+# Writing DeviceTree Bindings in json-schema
+
+Devicetree bindings are written using json-schema vocabulary. Schema files are
+written in a JSON compatible subset of YAML. YAML is used instead of JSON as it
+considered more human readable and has some advantages such as allowing
+comments (Prefixed with '#').
+
+## Schema Contents
+
+Each schema doc is a structured json-schema which is defined by a set of
+top-level properties:
+
+- __$id__ - A json-schema unique identifier string. The string must be a valid
+URI typically containing the binding's filename and path. DT schema it must
+begin with "http://devicetree.org/schema/". The URL is used for non file local
+"$ref" lookups. A URL is used even for local files, and there may not actually
+be files present at those locations.
+
+- __$schema__ - Indicates the meta-schema the schema file adheres to.
+
+- __title__ - A one line description on the contents of the binding schema.
+
+- __maintainers__ - A DT specific property. Contains a list of email address(es)
+for maintainers of this binding.
+
+- __description__ - Optional. A multi-line text block containing any detailed
+information about this binding. It should contain things such as what the block
+or device does, standards the device conforms to, and links to datasheets for
+more information.
+
+- __select__ - Optional. A json-schema to match nodes for applying the schema.
+By default, nodes are matched against their possible compatible string values
+or node name and select is not necessary.
+
+- __properties__ - A set of sub-schema defining all the DT properties for the
+binding. The exact schema depends on the type of property. A property can also
+define a child DT node with child properties defined under it.
+
+- __patternProperties__ - Optional. Similar to 'properties', but names are regex.
+
+- __required__ - A list of DT properties from the 'properties' section that
+must always be present.
+
+- __examples__ - Optional. A list of one or more DTS hunks implementing the
+binding.
+
+Unless noted otherwise, all properties are required.
+
+## Property Schema
+
+The 'properties' section of the schema contains all the DT properties for a
+binding. Each property contains a set of constraints using json-schema
+vocabulary for that property. The properties schemas are what is used for
+validation of DT files.
+
+For common properties, only additional constraints not covered by the common
+binding schema need to be defined such as how many values are valid or what
+possible values are valid.
+
+Vendor specific properties will typically need more detailed schema. With the
+exception of boolean properties, they should have a reference to a type in
+schemas/types.yaml. A "description" property is always required.
+
+The Devicetree schemas don't exactly match the YAML encoded DT data produced by
+dtc. They are simplified to make them more compact and avoid a bunch of
+boilerplate. The tools process the schema files to produce the final schema for
+validation. There are currently 2 transformations the tools perform.
+
+The default for arrays in json-schema is they are variable sized and allow more
+entries than explicitly defined. This can be restricted by defining 'minItems',
+'maxItems', and 'additionalItems'. However, for DeviceTree Schemas, a fixed
+size is desired in most cases, so these properties are added based on the
+number of entries in an 'items' list.
+
+The YAML Devicetree format also makes all string values an array and scalar
+values a matrix (in order to define groupings) even when only a single value
+is present. Single entries in schemas are fixed up to match this encoding.
+
+## Testing
+
+### Dependencies
+
+The DT schema project must be installed in order to validate the DT schema
+binding documents and validate DTS files using the DT schema. The DT schema
+project can be installed with pip:
+
+`pip3 install git+https://github.com/robherring/yaml-bindings.git@master --process-dependency-links`
+
+dtc must also be built with YAML output support enabled. This requires that
+libyaml and its headers be installed on the host system.
+
+### Running checks
+
+The DT schema binding documents must be validated using the meta-schema (the
+schema for the schema) to ensure they are both valid json-schema and valid
+binding schema. All of the DT binding documents can be validated using the
+`dt_binding_check` target:
+
+`make dt_binding_check`
+
+In order to perform validation of DT source files, use the `dtbs_check` target:
+
+`make dtbs_check`
+
+This will first run the `dt_binding_check` which generates the processed schema.
+
+## json-schema Resources
+
+[JSON-Schema Specifications](http://json-schema.org/)
+
+[Using JSON Schema Book](http://usingjsonschema.com/)
--
2.17.1
In preparation to convert board-level bindings to json-schema, move
various misc SoC bindings out to their own file.
Cc: Mark Rutland <[email protected]>
Cc: Simon Horman <[email protected]>
Cc: Magnus Damm <[email protected]>
Cc: [email protected]
Cc: [email protected]
Signed-off-by: Rob Herring <[email protected]>
---
.../devicetree/bindings/arm/renesas,prr.txt | 18 ++++++++++++++++++
.../devicetree/bindings/arm/shmobile.txt | 18 ------------------
2 files changed, 18 insertions(+), 18 deletions(-)
create mode 100644 Documentation/devicetree/bindings/arm/renesas,prr.txt
diff --git a/Documentation/devicetree/bindings/arm/renesas,prr.txt b/Documentation/devicetree/bindings/arm/renesas,prr.txt
new file mode 100644
index 000000000000..5000bf492f70
--- /dev/null
+++ b/Documentation/devicetree/bindings/arm/renesas,prr.txt
@@ -0,0 +1,18 @@
+Renesas Product Register
+
+Most Renesas ARM SoCs have a Product Register that allows to retrieve SoC
+product and revision information. If present, a device node for this register
+should be added.
+
+Required properties:
+ - compatible: Must be "renesas,prr".
+ - reg: Base address and length of the register block.
+
+
+Examples
+--------
+
+ prr: chipid@ff000044 {
+ compatible = "renesas,prr";
+ reg = <0 0xff000044 0 4>;
+ };
diff --git a/Documentation/devicetree/bindings/arm/shmobile.txt b/Documentation/devicetree/bindings/arm/shmobile.txt
index 89b4a389fbc7..619b765e5bee 100644
--- a/Documentation/devicetree/bindings/arm/shmobile.txt
+++ b/Documentation/devicetree/bindings/arm/shmobile.txt
@@ -141,21 +141,3 @@ Boards:
compatible = "renesas,v3msk", "renesas,r8a77970"
- Wheat (RTP0RC7792ASKB0000JE)
compatible = "renesas,wheat", "renesas,r8a7792"
-
-
-Most Renesas ARM SoCs have a Product Register that allows to retrieve SoC
-product and revision information. If present, a device node for this register
-should be added.
-
-Required properties:
- - compatible: Must be "renesas,prr".
- - reg: Base address and length of the register block.
-
-
-Examples
---------
-
- prr: chipid@ff000044 {
- compatible = "renesas,prr";
- reg = <0 0xff000044 0 4>;
- };
--
2.17.1
In preparation to convert board-level bindings to json-schema, move
various misc SoC bindings out to their own file.
Cc: Shawn Guo <[email protected]>
Cc: Mark Rutland <[email protected]>
Cc: [email protected]
Signed-off-by: Rob Herring <[email protected]>
---
.../arm/freescale/fsl,layerscape-dcfg.txt | 19 +++++++++
.../arm/freescale/fsl,layerscape-scfg.txt | 19 +++++++++
Documentation/devicetree/bindings/arm/fsl.txt | 39 -------------------
3 files changed, 38 insertions(+), 39 deletions(-)
create mode 100644 Documentation/devicetree/bindings/arm/freescale/fsl,layerscape-dcfg.txt
create mode 100644 Documentation/devicetree/bindings/arm/freescale/fsl,layerscape-scfg.txt
diff --git a/Documentation/devicetree/bindings/arm/freescale/fsl,layerscape-dcfg.txt b/Documentation/devicetree/bindings/arm/freescale/fsl,layerscape-dcfg.txt
new file mode 100644
index 000000000000..b5cb374dc47d
--- /dev/null
+++ b/Documentation/devicetree/bindings/arm/freescale/fsl,layerscape-dcfg.txt
@@ -0,0 +1,19 @@
+Freescale DCFG
+
+DCFG is the device configuration unit, that provides general purpose
+configuration and status for the device. Such as setting the secondary
+core start address and release the secondary core from holdoff and startup.
+
+Required properties:
+ - compatible: Should contain a chip-specific compatible string,
+ Chip-specific strings are of the form "fsl,<chip>-dcfg",
+ The following <chip>s are known to be supported:
+ ls1012a, ls1021a, ls1043a, ls1046a, ls2080a.
+
+ - reg : should contain base address and length of DCFG memory-mapped registers
+
+Example:
+ dcfg: dcfg@1ee0000 {
+ compatible = "fsl,ls1021a-dcfg";
+ reg = <0x0 0x1ee0000 0x0 0x10000>;
+ };
diff --git a/Documentation/devicetree/bindings/arm/freescale/fsl,layerscape-scfg.txt b/Documentation/devicetree/bindings/arm/freescale/fsl,layerscape-scfg.txt
new file mode 100644
index 000000000000..0ab67b0b216d
--- /dev/null
+++ b/Documentation/devicetree/bindings/arm/freescale/fsl,layerscape-scfg.txt
@@ -0,0 +1,19 @@
+Freescale SCFG
+
+SCFG is the supplemental configuration unit, that provides SoC specific
+configuration and status registers for the chip. Such as getting PEX port
+status.
+
+Required properties:
+ - compatible: Should contain a chip-specific compatible string,
+ Chip-specific strings are of the form "fsl,<chip>-scfg",
+ The following <chip>s are known to be supported:
+ ls1012a, ls1021a, ls1043a, ls1046a, ls2080a.
+
+ - reg: should contain base address and length of SCFG memory-mapped registers
+
+Example:
+ scfg: scfg@1570000 {
+ compatible = "fsl,ls1021a-scfg";
+ reg = <0x0 0x1570000 0x0 0x10000>;
+ };
diff --git a/Documentation/devicetree/bindings/arm/fsl.txt b/Documentation/devicetree/bindings/arm/fsl.txt
index 8a1baa2b9723..1e775aaa5c5b 100644
--- a/Documentation/devicetree/bindings/arm/fsl.txt
+++ b/Documentation/devicetree/bindings/arm/fsl.txt
@@ -101,45 +101,6 @@ Freescale LS1021A Platform Device Tree Bindings
Required root node compatible properties:
- compatible = "fsl,ls1021a";
-Freescale SoC-specific Device Tree Bindings
--------------------------------------------
-
-Freescale SCFG
- SCFG is the supplemental configuration unit, that provides SoC specific
-configuration and status registers for the chip. Such as getting PEX port
-status.
- Required properties:
- - compatible: Should contain a chip-specific compatible string,
- Chip-specific strings are of the form "fsl,<chip>-scfg",
- The following <chip>s are known to be supported:
- ls1012a, ls1021a, ls1043a, ls1046a, ls2080a.
-
- - reg: should contain base address and length of SCFG memory-mapped registers
-
-Example:
- scfg: scfg@1570000 {
- compatible = "fsl,ls1021a-scfg";
- reg = <0x0 0x1570000 0x0 0x10000>;
- };
-
-Freescale DCFG
- DCFG is the device configuration unit, that provides general purpose
-configuration and status for the device. Such as setting the secondary
-core start address and release the secondary core from holdoff and startup.
- Required properties:
- - compatible: Should contain a chip-specific compatible string,
- Chip-specific strings are of the form "fsl,<chip>-dcfg",
- The following <chip>s are known to be supported:
- ls1012a, ls1021a, ls1043a, ls1046a, ls2080a.
-
- - reg : should contain base address and length of DCFG memory-mapped registers
-
-Example:
- dcfg: dcfg@1ee0000 {
- compatible = "fsl,ls1021a-dcfg";
- reg = <0x0 0x1ee0000 0x0 0x10000>;
- };
-
Freescale ARMv8 based Layerscape SoC family Device Tree Bindings
----------------------------------------------------------------
--
2.17.1
It is best practice to have 1 binding per file, so board level bindings
should be separate for various misc SoC bindings.
Cc: Mark Rutland <[email protected]>
Cc: Carlo Caione <[email protected]>
Cc: Kevin Hilman <[email protected]>
Cc: [email protected]
Cc: [email protected]
Cc: [email protected]
Signed-off-by: Rob Herring <[email protected]>
---
.../devicetree/bindings/arm/amlogic.txt | 29 -------------------
.../amlogic/amlogic,meson-gx-ao-secure.txt | 28 ++++++++++++++++++
2 files changed, 28 insertions(+), 29 deletions(-)
create mode 100644 Documentation/devicetree/bindings/arm/amlogic/amlogic,meson-gx-ao-secure.txt
diff --git a/Documentation/devicetree/bindings/arm/amlogic.txt b/Documentation/devicetree/bindings/arm/amlogic.txt
index b5c2b5c35766..2f2d01a00c54 100644
--- a/Documentation/devicetree/bindings/arm/amlogic.txt
+++ b/Documentation/devicetree/bindings/arm/amlogic.txt
@@ -100,32 +100,3 @@ Board compatible values (alphabetically, grouped by SoC):
- "tronsmart,vega-s96" (Meson gxm s912)
- "amlogic,s400" (Meson axg a113d)
-
-Amlogic Meson Firmware registers Interface
-------------------------------------------
-
-The Meson SoCs have a register bank with status and data shared with the
-secure firmware.
-
-Required properties:
- - compatible: For Meson GX SoCs, must be "amlogic,meson-gx-ao-secure", "syscon"
-
-Properties should indentify components of this register interface :
-
-Meson GX SoC Information
-------------------------
-A firmware register encodes the SoC type, package and revision information on
-the Meson GX SoCs.
-If present, the following property should be added :
-
-Optional properties:
- - amlogic,has-chip-id: If present, the interface gives the current SoC version.
-
-Example
--------
-
-ao-secure@140 {
- compatible = "amlogic,meson-gx-ao-secure", "syscon";
- reg = <0x0 0x140 0x0 0x140>;
- amlogic,has-chip-id;
-};
diff --git a/Documentation/devicetree/bindings/arm/amlogic/amlogic,meson-gx-ao-secure.txt b/Documentation/devicetree/bindings/arm/amlogic/amlogic,meson-gx-ao-secure.txt
new file mode 100644
index 000000000000..c67d9f48fb91
--- /dev/null
+++ b/Documentation/devicetree/bindings/arm/amlogic/amlogic,meson-gx-ao-secure.txt
@@ -0,0 +1,28 @@
+Amlogic Meson Firmware registers Interface
+------------------------------------------
+
+The Meson SoCs have a register bank with status and data shared with the
+secure firmware.
+
+Required properties:
+ - compatible: For Meson GX SoCs, must be "amlogic,meson-gx-ao-secure", "syscon"
+
+Properties should indentify components of this register interface :
+
+Meson GX SoC Information
+------------------------
+A firmware register encodes the SoC type, package and revision information on
+the Meson GX SoCs.
+If present, the following property should be added :
+
+Optional properties:
+ - amlogic,has-chip-id: If present, the interface gives the current SoC version.
+
+Example
+-------
+
+ao-secure@140 {
+ compatible = "amlogic,meson-gx-ao-secure", "syscon";
+ reg = <0x0 0x140 0x0 0x140>;
+ amlogic,has-chip-id;
+};
--
2.17.1
It is best practice to have 1 binding per file, so board level bindings
should be separate for various misc SoC bindings. Move the Alpine CPU
control to al,alpine-smp and we can also remove a cross reference.
Cc: Tsahee Zidenberg <[email protected]>
Cc: Antoine Tenart <[email protected]>
Cc: Mark Rutland <[email protected]>
Cc: [email protected]
Signed-off-by: Rob Herring <[email protected]>
---
.../devicetree/bindings/arm/al,alpine.txt | 72 -------------------
.../arm/cpu-enable-method/al,alpine-smp | 34 ++++++++-
2 files changed, 31 insertions(+), 75 deletions(-)
diff --git a/Documentation/devicetree/bindings/arm/al,alpine.txt b/Documentation/devicetree/bindings/arm/al,alpine.txt
index f404a4f9b165..d00debe2e86f 100644
--- a/Documentation/devicetree/bindings/arm/al,alpine.txt
+++ b/Documentation/devicetree/bindings/arm/al,alpine.txt
@@ -14,75 +14,3 @@ compatible: must contain "al,alpine"
...
}
-
-* CPU node:
-
-The Alpine platform includes cortex-a15 cores.
-enable-method: must be "al,alpine-smp" to allow smp [1]
-
-Example:
-
-cpus {
- #address-cells = <1>;
- #size-cells = <0>;
- enable-method = "al,alpine-smp";
-
- cpu@0 {
- compatible = "arm,cortex-a15";
- device_type = "cpu";
- reg = <0>;
- };
-
- cpu@1 {
- compatible = "arm,cortex-a15";
- device_type = "cpu";
- reg = <1>;
- };
-
- cpu@2 {
- compatible = "arm,cortex-a15";
- device_type = "cpu";
- reg = <2>;
- };
-
- cpu@3 {
- compatible = "arm,cortex-a15";
- device_type = "cpu";
- reg = <3>;
- };
-};
-
-
-* Alpine CPU resume registers
-
-The CPU resume register are used to define required resume address after
-reset.
-
-Properties:
-- compatible : Should contain "al,alpine-cpu-resume".
-- reg : Offset and length of the register set for the device
-
-Example:
-
-cpu_resume {
- compatible = "al,alpine-cpu-resume";
- reg = <0xfbff5ed0 0x30>;
-};
-
-* Alpine System-Fabric Service Registers
-
-The System-Fabric Service Registers allow various operation on CPU and
-system fabric, like powering CPUs off.
-
-Properties:
-- compatible : Should contain "al,alpine-sysfabric-service" and "syscon".
-- reg : Offset and length of the register set for the device
-
-Example:
-
-nb_service {
- compatible = "al,alpine-sysfabric-service", "syscon";
- reg = <0xfb070000 0x10000>;
-};
-
-[1] arm/cpu-enable-method/al,alpine-smp
diff --git a/Documentation/devicetree/bindings/arm/cpu-enable-method/al,alpine-smp b/Documentation/devicetree/bindings/arm/cpu-enable-method/al,alpine-smp
index c2e0cc5e4cfd..35e5afb6d9ad 100644
--- a/Documentation/devicetree/bindings/arm/cpu-enable-method/al,alpine-smp
+++ b/Documentation/devicetree/bindings/arm/cpu-enable-method/al,alpine-smp
@@ -14,7 +14,28 @@ Related properties: (none)
Note:
This enable method requires valid nodes compatible with
-"al,alpine-cpu-resume" and "al,alpine-nb-service"[1].
+"al,alpine-cpu-resume" and "al,alpine-nb-service".
+
+
+* Alpine CPU resume registers
+
+The CPU resume register are used to define required resume address after
+reset.
+
+Properties:
+- compatible : Should contain "al,alpine-cpu-resume".
+- reg : Offset and length of the register set for the device
+
+
+* Alpine System-Fabric Service Registers
+
+The System-Fabric Service Registers allow various operation on CPU and
+system fabric, like powering CPUs off.
+
+Properties:
+- compatible : Should contain "al,alpine-sysfabric-service" and "syscon".
+- reg : Offset and length of the register set for the device
+
Example:
@@ -48,5 +69,12 @@ cpus {
};
};
---
-[1] arm/al,alpine.txt
+cpu_resume {
+ compatible = "al,alpine-cpu-resume";
+ reg = <0xfbff5ed0 0x30>;
+};
+
+nb_service {
+ compatible = "al,alpine-sysfabric-service", "syscon";
+ reg = <0xfb070000 0x10000>;
+};
--
2.17.1
Convert Altera clkmgr to DT schema format using json-schema.
Cc: Mark Rutland <[email protected]>
Cc: Dinh Nguyen <[email protected]>
Cc: [email protected]
Signed-off-by: Rob Herring <[email protected]>
---
.../arm/altera/socfpga-clk-manager.txt | 11 -------
.../arm/altera/socfpga-clk-manager.yaml | 30 +++++++++++++++++++
2 files changed, 30 insertions(+), 11 deletions(-)
delete mode 100644 Documentation/devicetree/bindings/arm/altera/socfpga-clk-manager.txt
create mode 100644 Documentation/devicetree/bindings/arm/altera/socfpga-clk-manager.yaml
diff --git a/Documentation/devicetree/bindings/arm/altera/socfpga-clk-manager.txt b/Documentation/devicetree/bindings/arm/altera/socfpga-clk-manager.txt
deleted file mode 100644
index 2c28f1d12f45..000000000000
--- a/Documentation/devicetree/bindings/arm/altera/socfpga-clk-manager.txt
+++ /dev/null
@@ -1,11 +0,0 @@
-Altera SOCFPGA Clock Manager
-
-Required properties:
-- compatible : "altr,clk-mgr"
-- reg : Should contain base address and length for Clock Manager
-
-Example:
- clkmgr@ffd04000 {
- compatible = "altr,clk-mgr";
- reg = <0xffd04000 0x1000>;
- };
diff --git a/Documentation/devicetree/bindings/arm/altera/socfpga-clk-manager.yaml b/Documentation/devicetree/bindings/arm/altera/socfpga-clk-manager.yaml
new file mode 100644
index 000000000000..37c2cf08fae0
--- /dev/null
+++ b/Documentation/devicetree/bindings/arm/altera/socfpga-clk-manager.yaml
@@ -0,0 +1,30 @@
+# SPDX-License-Identifier: None
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/bindings/arm/altera/socfpga-clk-manager.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: Altera SOCFPGA Clock Manager
+
+maintainers:
+ - Dinh Nguyen <[email protected]>
+description: test
+
+properties:
+ compatible:
+ items:
+ - const: altr,clk-mgr
+ reg:
+ maxItems: 1
+
+required:
+ - compatible
+
+examples:
+ - |
+ clkmgr@ffd04000 {
+ compatible = "altr,clk-mgr";
+ reg = <0xffd04000 0x1000>;
+ };
+
+...
--
2.17.1
Hello,
On 05/10/2018 11:58:31-0500, Rob Herring wrote:
> diff --git a/Documentation/devicetree/bindings/arm/atmel-at91.yaml b/Documentation/devicetree/bindings/arm/atmel-at91.yaml
> new file mode 100644
> index 000000000000..f788315b94fa
> --- /dev/null
> +++ b/Documentation/devicetree/bindings/arm/atmel-at91.yaml
> @@ -0,0 +1,132 @@
> +# SPDX-License-Identifier: None
> +%YAML 1.2
> +---
> +$id: http://devicetree.org/schemas/bindings/arm/atmel-at91.yaml#
> +$schema: http://devicetree.org/meta-schemas/core.yaml#
> +
> +title: Atmel AT91 device tree bindings.
> +
> +maintainers:
> + - Alexandre Belloni <[email protected]>
> + - Jean-Christophe PLAGNIOL-VILLARD <[email protected]>
Jean-Christophe has not been active for years, I'd mention Ludovic
instead.
> +description: |
> + Boards with a SoC of the Atmel AT91 or SMART family shall have the following
> +
> +properties:
> + $nodename:
> + const: '/'
> + compatible:
> + oneOf:
> + - items:
> + - const: atmel,at91rm9200
> + - items:
> + - enum:
> + - olimex,sam9-l9260
> + - enum:
> + - atmel,at91sam9260
> + - atmel,at91sam9261
> + - atmel,at91sam9263
> + - atmel,at91sam9g20
> + - atmel,at91sam9g45
> + - atmel,at91sam9n12
> + - atmel,at91sam9rl
> + - atmel,at91sam9xe
> + - const: atmel,at91sam9
> +
> + - items:
> + - enum:
> + - atmel,at91sam9g15
> + - atmel,at91sam9g25
> + - atmel,at91sam9g35
> + - atmel,at91sam9x25
> + - atmel,at91sam9x35
> + - const: atmel,at91sam9x5
> + - const: atmel,at91sam9
> +
> + - items:
> + - const: atmel,sama5d27
> + - const: atmel,sama5d2
> + - const: atmel,sama5
> +
> + - description: Nattis v2 board with Natte v2 power board
> + items:
> + - const: axentia,nattis-2
> + - const: axentia,natte-2
> + - const: axentia,linea
Shouldn't we have the board specific compatibles in a separate file to
avoid mixing everything with the SoC compatibles?
--
Alexandre Belloni, Bootlin
Embedded Linux and Kernel engineering
https://bootlin.com
On Fri, Oct 5, 2018 at 1:07 PM Alexandre Belloni
<[email protected]> wrote:
>
> Hello,
>
> On 05/10/2018 11:58:31-0500, Rob Herring wrote:
> > diff --git a/Documentation/devicetree/bindings/arm/atmel-at91.yaml b/Documentation/devicetree/bindings/arm/atmel-at91.yaml
> > new file mode 100644
> > index 000000000000..f788315b94fa
> > --- /dev/null
> > +++ b/Documentation/devicetree/bindings/arm/atmel-at91.yaml
> > @@ -0,0 +1,132 @@
> > +# SPDX-License-Identifier: None
> > +%YAML 1.2
> > +---
> > +$id: http://devicetree.org/schemas/bindings/arm/atmel-at91.yaml#
> > +$schema: http://devicetree.org/meta-schemas/core.yaml#
> > +
> > +title: Atmel AT91 device tree bindings.
> > +
> > +maintainers:
> > + - Alexandre Belloni <[email protected]>
> > + - Jean-Christophe PLAGNIOL-VILLARD <[email protected]>
>
> Jean-Christophe has not been active for years, I'd mention Ludovic
> instead.
Will update. I generated these out of git log. I didn't use
get_maintainers.pl because it seems lots of files don't have
maintainers listed (other than Mark and me) and I didn't want to be
it.
>
> > +description: |
> > + Boards with a SoC of the Atmel AT91 or SMART family shall have the following
> > +
> > +properties:
> > + $nodename:
> > + const: '/'
> > + compatible:
> > + oneOf:
> > + - items:
> > + - const: atmel,at91rm9200
> > + - items:
> > + - enum:
> > + - olimex,sam9-l9260
> > + - enum:
> > + - atmel,at91sam9260
> > + - atmel,at91sam9261
> > + - atmel,at91sam9263
> > + - atmel,at91sam9g20
> > + - atmel,at91sam9g45
> > + - atmel,at91sam9n12
> > + - atmel,at91sam9rl
> > + - atmel,at91sam9xe
> > + - const: atmel,at91sam9
> > +
> > + - items:
> > + - enum:
> > + - atmel,at91sam9g15
> > + - atmel,at91sam9g25
> > + - atmel,at91sam9g35
> > + - atmel,at91sam9x25
> > + - atmel,at91sam9x35
> > + - const: atmel,at91sam9x5
> > + - const: atmel,at91sam9
> > +
> > + - items:
> > + - const: atmel,sama5d27
> > + - const: atmel,sama5d2
> > + - const: atmel,sama5
> > +
> > + - description: Nattis v2 board with Natte v2 power board
> > + items:
> > + - const: axentia,nattis-2
> > + - const: axentia,natte-2
> > + - const: axentia,linea
>
> Shouldn't we have the board specific compatibles in a separate file to
> avoid mixing everything with the SoC compatibles?
You can't validate it that way. I have to say "must be compatible A,
B, C and in that order" and you can't if A, B, and C are in different
files. We could do board vendor files, but then we have to duplicate
the SoC compatibles. I don't think there's any board vendor with
enough boards to justify that. The only place I've found that the
compatible lists get kind of messy is when platforms have a variable
number of compatible strings.
We generally have not split things this way for most platforms except
i.MX which this series changes. Looks like I forgot to remove the
axentia.txt for Atmel.
Rob
Hi Rob
On Fri, 2018-10-05 at 11:58 -0500, Rob Herring wrote:
> Convert Tegra SoC bindings to DT schema format using json-schema.
>
> Cc: Mark Rutland <[email protected]>
> Cc: Thierry Reding <[email protected]>
> Cc: Jonathan Hunter <[email protected]>
> Cc: [email protected]
> Cc: [email protected]
> Signed-off-by: Rob Herring <[email protected]>
> ---
> .../devicetree/bindings/arm/tegra.txt | 60 -------------
> .../devicetree/bindings/arm/tegra.yaml | 88
> +++++++++++++++++++
> 2 files changed, 88 insertions(+), 60 deletions(-)
> delete mode 100644 Documentation/devicetree/bindings/arm/tegra.txt
> create mode 100644 Documentation/devicetree/bindings/arm/tegra.yaml
>
> diff --git a/Documentation/devicetree/bindings/arm/tegra.txt
> b/Documentation/devicetree/bindings/arm/tegra.txt
> deleted file mode 100644
> index 32f62bb7006d..000000000000
> --- a/Documentation/devicetree/bindings/arm/tegra.txt
> +++ /dev/null
> @@ -1,60 +0,0 @@
> -NVIDIA Tegra device tree bindings
> --------------------------------------------
> -
> -SoCs
> --------------------------------------------
> -
> -Each device tree must specify which Tegra SoC it uses, using one of
> the
> -following compatible values:
> -
> - nvidia,tegra20
> - nvidia,tegra30
> - nvidia,tegra114
> - nvidia,tegra124
> - nvidia,tegra132
> - nvidia,tegra210
> - nvidia,tegra186
> - nvidia,tegra194
> -
> -Boards
> --------------------------------------------
> -
> -Each device tree must specify which one or more of the following
> -board-specific compatible values:
> -
> - ad,medcom-wide
> - ad,plutux
> - ad,tamonten
> - ad,tec
> - compal,paz00
> - compulab,trimslice
> - nvidia,beaver
> - nvidia,cardhu
> - nvidia,cardhu-a02
> - nvidia,cardhu-a04
> - nvidia,dalmore
> - nvidia,harmony
> - nvidia,jetson-tk1
> - nvidia,norrin
> - nvidia,p2371-0000
> - nvidia,p2371-2180
> - nvidia,p2571
> - nvidia,p2771-0000
> - nvidia,p2972-0000
> - nvidia,roth
> - nvidia,seaboard
> - nvidia,tn7
> - nvidia,ventana
> - toradex,apalis_t30
> - toradex,apalis_t30-eval
> - toradex,apalis-tk1
> - toradex,apalis-tk1-eval
> - toradex,colibri_t20-512
> - toradex,colibri_t30
> - toradex,colibri_t30-eval-v3
> - toradex,iris
Are you aware that -next already features a few updating commits
thereof from around the beginning of September one of which even bears
your reviewed-by.
> -
> -Trusted Foundations
> --------------------------------------------
> -Tegra supports the Trusted Foundation secure monitor. See the
> -"tlm,trusted-foundations" binding's documentation for more details.
> diff --git a/Documentation/devicetree/bindings/arm/tegra.yaml
> b/Documentation/devicetree/bindings/arm/tegra.yaml
> new file mode 100644
> index 000000000000..9cebcfaaad1e
> --- /dev/null
> +++ b/Documentation/devicetree/bindings/arm/tegra.yaml
> @@ -0,0 +1,88 @@
> +# SPDX-License-Identifier: None
> +%YAML 1.2
> +---
> +$id: http://devicetree.org/schemas/bindings/arm/tegra.yaml#
> +$schema: http://devicetree.org/meta-schemas/core.yaml#
> +
> +title: NVIDIA Tegra device tree bindings
> +
> +maintainers:
> + - Marcel Ziswiler <[email protected]>
Wow, seems I got promoted to maintainer now. I guess that may make
sense at least for the Toradex based boards.
> + - Peter De Schrijver <[email protected]>
> +
> +properties:
> + compatible:
> + oneOf:
> + - items:
> + - enum:
> + - compal,paz00
> + - compulab,trimslice
> + - nvidia,harmony
> + - nvidia,seaboard
> + - nvidia,ventana
> + - const: nvidia,tegra20
> + - items:
> + - enum:
> + - ad,medcom-wide
> + - ad,plutux
> + - ad,tec
> + - const: ad,tamonten
> + - const: nvidia,tegra20
> + - items:
> + - const: toradex,iris
> + - const: toradex,colibri_t20-512
> + - const: nvidia,tegra20
> + - items:
> + - enum:
> + - nvidia,beaver
> + - const: nvidia,tegra30
> + - items:
> + - enum:
> + - nvidia,cardhu-a02
> + - nvidia,cardhu-a04
> + - const: nvidia,cardhu
> + - const: nvidia,tegra30
> + - items:
> + - enum:
> + - toradex,apalis_t30-eval
> + - const: toradex,apalis_t30
> + - const: nvidia,tegra30
> + - items:
> + - enum:
> + - toradex,colibri_t30-eval-v3
> + - const: toradex,colibri_t30
> + - const: nvidia,tegra30
> + - items:
> + - enum:
> + - nvidia,dalmore
> + - nvidia,roth
> + - nvidia,tn7
> + - const: nvidia,tegra114
> + - items:
> + - enum:
> + - nvidia,jetson-tk1
> + - nvidia,venice2
> + - const: nvidia,tegra124
> + - items:
> + - const: toradex,apalis-tk1-eval
> + - const: toradex,apalis-tk1
> + - const: nvidia,tegra124
> + - items:
> + - enum:
> + - nvidia,norrin
> + - const: nvidia,tegra132
> + - const: nvidia,tegra124
> + - items:
> + - enum:
> + - nvidia,p2371-0000
> + - nvidia,p2371-2180
> + - nvidia,p2571
> + - const: nvidia,tegra210
> + - items:
> + - enum:
> + - nvidia,p2771-0000
> + - const: nvidia,tegra186
> + - items:
> + - enum:
> + - nvidia,p2972-0000
> + - const: nvidia,tegra194
Other than that I'm all in to move towards more structured bindings documentation.
Cheers
Marcel
On Fri, Oct 5, 2018 at 5:20 PM Marcel Ziswiler
<[email protected]> wrote:
>
> Hi Rob
>
> On Fri, 2018-10-05 at 11:58 -0500, Rob Herring wrote:
> > Convert Tegra SoC bindings to DT schema format using json-schema.
> >
[...]
> Are you aware that -next already features a few updating commits
> thereof from around the beginning of September one of which even bears
> your reviewed-by.
I'm not targeting 4.20, but rather early in the 4.21 cycle. So I'll be
rebasing on rc1 and will update with any changes. I've been doing that
a couple of cycles already.
Rob
Hi Rob,
Am 05.10.18 um 18:58 schrieb Rob Herring:
> Convert Actions Semi SoC bindings to DT schema format using json-schema.
This sounds like the next Yanny vs. Laurel... I fail to see any json. ;)
Also, it may help my understanding to be CC'ed on the cover letter, too?
>
> Cc: "Andreas Färber" <[email protected]>
> Cc: Mark Rutland <[email protected]>
> Cc: [email protected]
> Cc: [email protected]
> Signed-off-by: Rob Herring <[email protected]>
> ---
> .../devicetree/bindings/arm/actions.txt | 56 -------------------
> .../devicetree/bindings/arm/actions.yaml | 34 +++++++++++
> 2 files changed, 34 insertions(+), 56 deletions(-)
> delete mode 100644 Documentation/devicetree/bindings/arm/actions.txt
> create mode 100644 Documentation/devicetree/bindings/arm/actions.yaml
>
> diff --git a/Documentation/devicetree/bindings/arm/actions.txt b/Documentation/devicetree/bindings/arm/actions.txt
> deleted file mode 100644
> index d54f33c4e0da..000000000000
> --- a/Documentation/devicetree/bindings/arm/actions.txt
> +++ /dev/null
> @@ -1,56 +0,0 @@
> -Actions Semi platforms device tree bindings
> --------------------------------------------
> -
> -
> -S500 SoC
> -========
> -
> -Required root node properties:
> -
> - - compatible : must contain "actions,s500"
> -
> -
> -Modules:
> -
> -Root node property compatible must contain, depending on module:
> -
> - - LeMaker Guitar: "lemaker,guitar"
> -
> -
> -Boards:
> -
> -Root node property compatible must contain, depending on board:
> -
> - - Allo.com Sparky: "allo,sparky"
> - - Cubietech CubieBoard6: "cubietech,cubieboard6"
> - - LeMaker Guitar Base Board rev. B: "lemaker,guitar-bb-rev-b", "lemaker,guitar"
> -
> -
> -S700 SoC
> -========
> -
> -Required root node properties:
> -
> -- compatible : must contain "actions,s700"
> -
> -
> -Boards:
> -
> -Root node property compatible must contain, depending on board:
> -
> - - Cubietech CubieBoard7: "cubietech,cubieboard7"
> -
> -
> -S900 SoC
> -========
> -
> -Required root node properties:
> -
> -- compatible : must contain "actions,s900"
> -
> -
> -Boards:
> -
> -Root node property compatible must contain, depending on board:
> -
> - - uCRobotics Bubblegum-96: "ucrobotics,bubblegum-96"
> diff --git a/Documentation/devicetree/bindings/arm/actions.yaml b/Documentation/devicetree/bindings/arm/actions.yaml
> new file mode 100644
> index 000000000000..af9345a228b4
> --- /dev/null
> +++ b/Documentation/devicetree/bindings/arm/actions.yaml
> @@ -0,0 +1,34 @@
> +%YAML 1.2
> +---
> +$id: http://devicetree.org/schemas/soc/arm/actions.yaml#
> +$schema: http://devicetree.org/meta-schemas/core.yaml#
404 for the schema. Where does one find an explanation?
> +
> +title: Actions Semi platforms device tree bindings
> +
> +maintainers:
> + - Andreas Färber <[email protected]>
Mani is now officially reviewer and the closest I have to a
co-maintainer. I suggest we add him here in some form. I assume this is
independent of MAINTAINERS patterns though, or will get_maintainers.pl
parse this, too?
> +
> +description: |
Does the | have any meaning, or a stray typo?
> + The Actions Semi S500 is a quad-core ARM Cortex-A9 SoC. The Actions Semi
> + S900 is a quad-core ARM Cortex-A53 SoC.
You forgot the S700 as another quad-core Cortex-A53 SoC.
Also, arm or Arm rather than ARM these days?
> +
> +properties:
> + compatible:
> + oneOf:
> + - items:
> + - enum:
> + - lemaker,guitar-bb-rev-b
> + - enum:
> + - lemaker,guitar
> + - allo,sparky
> + - cubietech,cubieboard6
> + - const: actions,s500
> + minItems: 2
> + maxItems: 3
> + additionalItems: false
Objection. You've managed to turn a perfectly human-comprehensible text
into a machine-parseable representation incomprehensible for humans.
First, there should remain some free-text explanation of the values
defined here. Are comments allowed after the value or indented maybe?
Alternatively we could have a per-vendor file à la vendor-prefixes.txt,
but that would seem inefficient.
Next, the above items construct is horrible. What about nested oneOf:
+ - items:
+ - oneOf:
+ - items:
+ - enum:
+ - lemaker,guitar-bb-rev-b
+ - const: lemaker,guitar
+ - items:
+ - enum:
+ - allo,sparky
+ - cubietech,cubieboard6
+ - const: actions,s500
This grouping is much clearer to me and hopefully to anyone adding
further base boards for the module.
We will have the same issue for the BPi-S64 module with S700 below.
> + - items:
> + - const: cubietech,cubieboard7
> + - const: actions,s700
> + - items:
> + - const: ucrobotics,bubblegum-96
> + - const: actions,s900
Please make the board compatible an enum, even if only one is listed
today. That makes it clearer where/how (and easier) to add new boards.
Regards,
Andreas
--
SUSE Linux GmbH, Maxfeldstr. 5, 90409 Nürnberg, Germany
GF: Felix Imendörffer, Jane Smithard, Graham Norton
HRB 21284 (AG Nürnberg)
Am 05.10.18 um 18:58 schrieb Rob Herring:
> Convert Realtek SoC bindings to DT schema format using json-schema.
YAML (2x)
>
> Cc: "Andreas Färber" <[email protected]>
> Cc: Mark Rutland <[email protected]>
> Cc: [email protected]
> Cc: [email protected]
> Signed-off-by: Rob Herring <[email protected]>
> ---
> .../devicetree/bindings/arm/realtek.txt | 22 ----------------
> .../devicetree/bindings/arm/realtek.yaml | 25 +++++++++++++++++++
> 2 files changed, 25 insertions(+), 22 deletions(-)
> delete mode 100644 Documentation/devicetree/bindings/arm/realtek.txt
> create mode 100644 Documentation/devicetree/bindings/arm/realtek.yaml
>
> diff --git a/Documentation/devicetree/bindings/arm/realtek.txt b/Documentation/devicetree/bindings/arm/realtek.txt
> deleted file mode 100644
> index 95839e19ae92..000000000000
> --- a/Documentation/devicetree/bindings/arm/realtek.txt
> +++ /dev/null
> @@ -1,22 +0,0 @@
> -Realtek platforms device tree bindings
> ---------------------------------------
> -
> -
> -RTD1295 SoC
> -===========
> -
> -Required root node properties:
> -
> - - compatible : must contain "realtek,rtd1295"
> -
> -
> -Root node property compatible must contain, depending on board:
> -
> - - MeLE V9: "mele,v9"
> - - ProBox2 AVA: "probox2,ava"
> - - Zidoo X9S: "zidoo,x9s"
> -
> -
> -Example:
> -
> - compatible = "zidoo,x9s", "realtek,rtd1295";
> diff --git a/Documentation/devicetree/bindings/arm/realtek.yaml b/Documentation/devicetree/bindings/arm/realtek.yaml
> new file mode 100644
> index 000000000000..9e3bb3249c77
> --- /dev/null
> +++ b/Documentation/devicetree/bindings/arm/realtek.yaml
> @@ -0,0 +1,25 @@
> +# SPDX-License-Identifier: None
What is the expected license for such bindings?
You did not add such a line for actions.yaml.
> +%YAML 1.2
> +---
> +$id: http://devicetree.org/schemas/bindings/arm/realtek.yaml#
> +$schema: http://devicetree.org/meta-schemas/core.yaml#
> +
> +title: Realtek platforms device tree bindings
> +
> +maintainers:
> + - Andreas Färber <[email protected]>
> +
> +description: |+
"|+"?
> + RTD1295 SoC
> +
> +properties:
> + $nodename:
> + const: '/'
> + compatible:
> + items:
> + - enum:
> + - mele,v9
> + - probox2,ava
> + - zidoo,x9s
> + - const: realtek,rtd1295
> +...
That does not look like a full "PATCH" yet? It also confuses me whether
or when leading dashes are necessary - for Actions Semi "items" had one.
I have preparations on my GitHub staging tree for three more SoCs, so we
should prepare the structure to ease adding SoCs and avoid re-indenting
patches - adding SoCs was much easier in the original flat text format.
Please also consider for other vendors.
Same comment as for Actions: We're losing a human description of the
enum values.
Regards,
Andreas
--
SUSE Linux GmbH, Maxfeldstr. 5, 90409 Nürnberg, Germany
GF: Felix Imendörffer, Jane Smithard, Graham Norton
HRB 21284 (AG Nürnberg)
On Sat, Oct 6, 2018 at 5:54 AM Andreas Färber <[email protected]> wrote:
>
> Am 05.10.18 um 18:58 schrieb Rob Herring:
> > Convert Realtek SoC bindings to DT schema format using json-schema.
>
> YAML (2x)
?
> > Cc: "Andreas Färber" <[email protected]>
> > Cc: Mark Rutland <[email protected]>
> > Cc: [email protected]
> > Cc: [email protected]
> > Signed-off-by: Rob Herring <[email protected]>
> > ---
> > .../devicetree/bindings/arm/realtek.txt | 22 ----------------
> > .../devicetree/bindings/arm/realtek.yaml | 25 +++++++++++++++++++
> > 2 files changed, 25 insertions(+), 22 deletions(-)
> > delete mode 100644 Documentation/devicetree/bindings/arm/realtek.txt
> > create mode 100644 Documentation/devicetree/bindings/arm/realtek.yaml
> >
> > diff --git a/Documentation/devicetree/bindings/arm/realtek.txt b/Documentation/devicetree/bindings/arm/realtek.txt
> > deleted file mode 100644
> > index 95839e19ae92..000000000000
> > --- a/Documentation/devicetree/bindings/arm/realtek.txt
> > +++ /dev/null
> > @@ -1,22 +0,0 @@
> > -Realtek platforms device tree bindings
> > ---------------------------------------
> > -
> > -
> > -RTD1295 SoC
> > -===========
> > -
> > -Required root node properties:
> > -
> > - - compatible : must contain "realtek,rtd1295"
> > -
> > -
> > -Root node property compatible must contain, depending on board:
> > -
> > - - MeLE V9: "mele,v9"
> > - - ProBox2 AVA: "probox2,ava"
> > - - Zidoo X9S: "zidoo,x9s"
> > -
> > -
> > -Example:
> > -
> > - compatible = "zidoo,x9s", "realtek,rtd1295";
> > diff --git a/Documentation/devicetree/bindings/arm/realtek.yaml b/Documentation/devicetree/bindings/arm/realtek.yaml
> > new file mode 100644
> > index 000000000000..9e3bb3249c77
> > --- /dev/null
> > +++ b/Documentation/devicetree/bindings/arm/realtek.yaml
> > @@ -0,0 +1,25 @@
> > +# SPDX-License-Identifier: None
>
> What is the expected license for such bindings?
Good question. I'd meant to figure something out for this placeholder.
The default would be GPL-2 inheriting from the old doc. My preference
would be to dual license these with BSD as they're not just kernel
files, but I don't really want to track down copyright holders (also
not explicitly declared) to do that.
> You did not add such a line for actions.yaml.
>
> > +%YAML 1.2
> > +---
> > +$id: http://devicetree.org/schemas/bindings/arm/realtek.yaml#
> > +$schema: http://devicetree.org/meta-schemas/core.yaml#
> > +
> > +title: Realtek platforms device tree bindings
> > +
> > +maintainers:
> > + - Andreas Färber <[email protected]>
> > +
> > +description: |+
>
> "|+"?
The '|' means a literal block. The '+' is a block chomping indicator:
http://yaml.org/spec/1.2/spec.html#id2794534
This was all converted using my doc2yaml script and ruamel.yaml
decided it needed the '+'. I'm not sure exactly why. It may be based
on how many trailing newlines the text had.
> > + RTD1295 SoC
In this case, this isn't really useful and we should just remove
description unless you want to add something.
> > +
> > +properties:
> > + $nodename:
> > + const: '/'
> > + compatible:
> > + items:
> > + - enum:
> > + - mele,v9
> > + - probox2,ava
> > + - zidoo,x9s
> > + - const: realtek,rtd1295
> > +...
>
> That does not look like a full "PATCH" yet? It also confuses me whether
> or when leading dashes are necessary - for Actions Semi "items" had one.
'...' is the end of YAML document marker.
'-' means a list item (a YAML/JSON list, not to be confused with
'items' the json-schema keyword). Actions uses 'oneOf' (which is a
list of schemas) because there are multiple SoCs.
And also 'items' itself can be a list or dict, but we restrict it to
lists for the DT meta-schema.
> I have preparations on my GitHub staging tree for three more SoCs, so we
> should prepare the structure to ease adding SoCs and avoid re-indenting
> patches - adding SoCs was much easier in the original flat text format.
> Please also consider for other vendors.
Good point.
One option is always use 'oneOf' even if just 1 item. The problem is
that the use of oneOf/allOf/anyOf makes the error reporting pretty
vague.
Another option is to make each SoC a separate schema which could be
either separate docs or multiple yaml docs within a file. The downside
is just repeating all the top-level properties.
>
> Same comment as for Actions: We're losing a human description of the
> enum values.
I kept those as comments when there was meaningful information. I did
not feel that "MeLE V9" as a description of "mele,v9" added any value.
If you want to add 'model' schema that would be better than having
just comments, but I'm not going to find all the values of model which
aren't documented.
Rob
On Sat, Oct 6, 2018 at 5:40 AM Andreas Färber <[email protected]> wrote:
>
> Hi Rob,
>
> Am 05.10.18 um 18:58 schrieb Rob Herring:
> > Convert Actions Semi SoC bindings to DT schema format using json-schema.
>
> This sounds like the next Yanny vs. Laurel... I fail to see any json. ;)
Read the docs in patch 8.
> Also, it may help my understanding to be CC'ed on the cover letter, too?
Sorry, trying to avoid a huge Cc list.
> > Cc: "Andreas Färber" <[email protected]>
> > Cc: Mark Rutland <[email protected]>
> > Cc: [email protected]
> > Cc: [email protected]
> > Signed-off-by: Rob Herring <[email protected]>
> > ---
> > .../devicetree/bindings/arm/actions.txt | 56 -------------------
> > .../devicetree/bindings/arm/actions.yaml | 34 +++++++++++
> > 2 files changed, 34 insertions(+), 56 deletions(-)
> > delete mode 100644 Documentation/devicetree/bindings/arm/actions.txt
> > create mode 100644 Documentation/devicetree/bindings/arm/actions.yaml
> >
> > diff --git a/Documentation/devicetree/bindings/arm/actions.txt b/Documentation/devicetree/bindings/arm/actions.txt
> > deleted file mode 100644
> > index d54f33c4e0da..000000000000
> > --- a/Documentation/devicetree/bindings/arm/actions.txt
> > +++ /dev/null
> > @@ -1,56 +0,0 @@
> > -Actions Semi platforms device tree bindings
> > --------------------------------------------
> > -
> > -
> > -S500 SoC
> > -========
> > -
> > -Required root node properties:
> > -
> > - - compatible : must contain "actions,s500"
> > -
> > -
> > -Modules:
> > -
> > -Root node property compatible must contain, depending on module:
> > -
> > - - LeMaker Guitar: "lemaker,guitar"
> > -
> > -
> > -Boards:
> > -
> > -Root node property compatible must contain, depending on board:
> > -
> > - - Allo.com Sparky: "allo,sparky"
> > - - Cubietech CubieBoard6: "cubietech,cubieboard6"
> > - - LeMaker Guitar Base Board rev. B: "lemaker,guitar-bb-rev-b", "lemaker,guitar"
> > -
> > -
> > -S700 SoC
> > -========
> > -
> > -Required root node properties:
> > -
> > -- compatible : must contain "actions,s700"
> > -
> > -
> > -Boards:
> > -
> > -Root node property compatible must contain, depending on board:
> > -
> > - - Cubietech CubieBoard7: "cubietech,cubieboard7"
> > -
> > -
> > -S900 SoC
> > -========
> > -
> > -Required root node properties:
> > -
> > -- compatible : must contain "actions,s900"
> > -
> > -
> > -Boards:
> > -
> > -Root node property compatible must contain, depending on board:
> > -
> > - - uCRobotics Bubblegum-96: "ucrobotics,bubblegum-96"
> > diff --git a/Documentation/devicetree/bindings/arm/actions.yaml b/Documentation/devicetree/bindings/arm/actions.yaml
> > new file mode 100644
> > index 000000000000..af9345a228b4
> > --- /dev/null
> > +++ b/Documentation/devicetree/bindings/arm/actions.yaml
> > @@ -0,0 +1,34 @@
> > +%YAML 1.2
> > +---
> > +$id: http://devicetree.org/schemas/soc/arm/actions.yaml#
> > +$schema: http://devicetree.org/meta-schemas/core.yaml#
>
> 404 for the schema. Where does one find an explanation?
In the docs. This could someday actually be hosted on devicetree.org,
but for now only the path, not the host, matters.
>
> > +
> > +title: Actions Semi platforms device tree bindings
> > +
> > +maintainers:
> > + - Andreas Färber <[email protected]>
>
> Mani is now officially reviewer and the closest I have to a
> co-maintainer.
Okay, NP.
> I suggest we add him here in some form. I assume this is
> independent of MAINTAINERS patterns though, or will get_maintainers.pl
> parse this, too?
It is independent. Not really ideal, but the bindings don't live just
in the kernel. (And lots are missing a maintainer anyways).
> > +
> > +description: |
>
> Does the | have any meaning, or a stray typo?
Explained in other patch.
> > + The Actions Semi S500 is a quad-core ARM Cortex-A9 SoC. The Actions Semi
> > + S900 is a quad-core ARM Cortex-A53 SoC.
>
> You forgot the S700 as another quad-core Cortex-A53 SoC.
> Also, arm or Arm rather than ARM these days?
I was going to say it's just copied out from the old file, but that
doesn't seem to be the case here. I am sure I didn't spend time on
nice descriptions. :)
> > +
> > +properties:
> > + compatible:
> > + oneOf:
> > + - items:
> > + - enum:
> > + - lemaker,guitar-bb-rev-b
> > + - enum:
> > + - lemaker,guitar
> > + - allo,sparky
> > + - cubietech,cubieboard6
> > + - const: actions,s500
> > + minItems: 2
> > + maxItems: 3
> > + additionalItems: false
>
> Objection. You've managed to turn a perfectly human-comprehensible text
> into a machine-parseable representation incomprehensible for humans.
>
> First, there should remain some free-text explanation of the values
> defined here. Are comments allowed after the value or indented maybe?
Yes, both. Comments are the major reason for using YAML over JSON file format.
> Alternatively we could have a per-vendor file à la vendor-prefixes.txt,
> but that would seem inefficient.
You mean per board vendor files? We'd have to duplicate the SoC
compatibles then as you can't really split the schema to 2 files.
There's 2 SoC families doing per board vendor files: Atmel (only one
vendor though) and i.MX. This series makes those 2 a single file like
all other SoCs. I don't really care which way it is done, but I think
we should be consistent and I'm not going to convert everyone's
bindings to per board vendor files.
> Next, the above items construct is horrible. What about nested oneOf:
>
> + - items:
> + - oneOf:
> + - items:
> + - enum:
> + - lemaker,guitar-bb-rev-b
> + - const: lemaker,guitar
> + - items:
> + - enum:
> + - allo,sparky
> + - cubietech,cubieboard6
> + - const: actions,s500
That's not actually doing what you think. That's saying the first item
is a list of items (1 or 2 items). For example, you'd have to have
data like this to be valid:
[ [ allo,sparky ], actions,s500 ]
(Note that [] are more json style list format, but allowed in yaml too.)
Probably the best thing to do here is separate the 2 and 3 item cases.
That also would eliminate some combinations here that are allowed, but
not valid.
>
> This grouping is much clearer to me and hopefully to anyone adding
> further base boards for the module.
> We will have the same issue for the BPi-S64 module with S700 below.
>
> > + - items:
> > + - const: cubietech,cubieboard7
> > + - const: actions,s700
> > + - items:
> > + - const: ucrobotics,bubblegum-96
> > + - const: actions,s900
>
> Please make the board compatible an enum, even if only one is listed
> today. That makes it clearer where/how (and easier) to add new boards.
Yes, I did that in most cases, but not here some reason.
Rob
On Fri, Oct 05, 2018 at 11:58:16AM -0500, Rob Herring wrote:
> In preparation to convert board-level bindings to json-schema, move
> various misc SoC bindings out to their own file.
>
> Cc: Shawn Guo <[email protected]>
> Cc: Mark Rutland <[email protected]>
> Cc: [email protected]
> Signed-off-by: Rob Herring <[email protected]>
Acked-by: Shawn Guo <[email protected]>
On Fri, Oct 05, 2018 at 11:58:18AM -0500, Rob Herring wrote:
> In preparation to convert board-level bindings to json-schema, move
> various misc SoC bindings out to their own file.
>
> Cc: Mark Rutland <[email protected]>
> Cc: Jun Nie <[email protected]>
> Cc: Baoyou Xie <[email protected]>
> Cc: Shawn Guo <[email protected]>
> Cc: [email protected]
> Cc: [email protected]
> Signed-off-by: Rob Herring <[email protected]>
> ---
> .../devicetree/bindings/arm/zte-sysctrl.txt | 30 +++++++++++++++++++
zte,sysctrl.txt to be consistent with other files like
fsl,layerscape-dcfg.txt? I'm fine with either way, but just want to
see more consistent naming convention? Other than that,
Acked-by: Shawn Guo <[email protected]>
On Fri, Oct 05, 2018 at 11:58:34AM -0500, Rob Herring wrote:
> Convert Freescale SoC bindings to DT schema format using json-schema.
>
> Cc: Shawn Guo <[email protected]>
> Cc: Mark Rutland <[email protected]>
> Cc: [email protected]
> Signed-off-by: Rob Herring <[email protected]>
> ---
> .../devicetree/bindings/arm/armadeus.txt | 6 -
> Documentation/devicetree/bindings/arm/bhf.txt | 6 -
> .../bindings/arm/compulab-boards.txt | 25 ---
> Documentation/devicetree/bindings/arm/fsl.txt | 185 ------------------
> .../devicetree/bindings/arm/fsl.yaml | 166 ++++++++++++++++
> .../devicetree/bindings/arm/i2se.txt | 22 ---
> .../devicetree/bindings/arm/olimex.txt | 10 -
> .../devicetree/bindings/arm/technologic.txt | 23 ---
> 8 files changed, 166 insertions(+), 277 deletions(-)
> delete mode 100644 Documentation/devicetree/bindings/arm/armadeus.txt
> delete mode 100644 Documentation/devicetree/bindings/arm/bhf.txt
> delete mode 100644 Documentation/devicetree/bindings/arm/compulab-boards.txt
> delete mode 100644 Documentation/devicetree/bindings/arm/fsl.txt
> create mode 100644 Documentation/devicetree/bindings/arm/fsl.yaml
> delete mode 100644 Documentation/devicetree/bindings/arm/i2se.txt
> delete mode 100644 Documentation/devicetree/bindings/arm/olimex.txt
> delete mode 100644 Documentation/devicetree/bindings/arm/technologic.txt
>
> diff --git a/Documentation/devicetree/bindings/arm/armadeus.txt b/Documentation/devicetree/bindings/arm/armadeus.txt
> deleted file mode 100644
> index 9821283ff516..000000000000
> --- a/Documentation/devicetree/bindings/arm/armadeus.txt
> +++ /dev/null
> @@ -1,6 +0,0 @@
> -Armadeus i.MX Platforms Device Tree Bindings
> ------------------------------------------------
> -
> -APF51: i.MX51 based module.
> -Required root node properties:
> - - compatible = "armadeus,imx51-apf51", "fsl,imx51";
> diff --git a/Documentation/devicetree/bindings/arm/bhf.txt b/Documentation/devicetree/bindings/arm/bhf.txt
> deleted file mode 100644
> index 886b503caf9c..000000000000
> --- a/Documentation/devicetree/bindings/arm/bhf.txt
> +++ /dev/null
> @@ -1,6 +0,0 @@
> -Beckhoff Automation Platforms Device Tree Bindings
> ---------------------------------------------------
> -
> -CX9020 Embedded PC
> -Required root node properties:
> - - compatible = "bhf,cx9020", "fsl,imx53";
> diff --git a/Documentation/devicetree/bindings/arm/compulab-boards.txt b/Documentation/devicetree/bindings/arm/compulab-boards.txt
> deleted file mode 100644
> index 42a10285af9c..000000000000
> --- a/Documentation/devicetree/bindings/arm/compulab-boards.txt
> +++ /dev/null
> @@ -1,25 +0,0 @@
> -CompuLab SB-SOM is a multi-module baseboard capable of carrying:
> - - CM-T43
> - - CM-T54
> - - CM-QS600
> - - CL-SOM-AM57x
> - - CL-SOM-iMX7
> -modules with minor modifications to the SB-SOM assembly.
> -
> -Required root node properties:
> - - compatible = should be "compulab,sb-som"
> -
> -Compulab CL-SOM-iMX7 is a miniature System-on-Module (SoM) based on
> -Freescale i.MX7 ARM Cortex-A7 System-on-Chip.
> -
> -Required root node properties:
> - - compatible = "compulab,cl-som-imx7", "fsl,imx7d";
> -
> -Compulab SBC-iMX7 is a single board computer based on the
> -Freescale i.MX7 system-on-chip. SBC-iMX7 is implemented with
> -the CL-SOM-iMX7 System-on-Module providing most of the functions,
> -and SB-SOM-iMX7 carrier board providing additional peripheral
> -functions and connectors.
> -
> -Required root node properties:
> - - compatible = "compulab,sbc-imx7", "compulab,cl-som-imx7", "fsl,imx7d";
> diff --git a/Documentation/devicetree/bindings/arm/fsl.txt b/Documentation/devicetree/bindings/arm/fsl.txt
> deleted file mode 100644
> index 1e775aaa5c5b..000000000000
> --- a/Documentation/devicetree/bindings/arm/fsl.txt
> +++ /dev/null
> @@ -1,185 +0,0 @@
> -Freescale i.MX Platforms Device Tree Bindings
> ------------------------------------------------
> -
> -i.MX23 Evaluation Kit
> -Required root node properties:
> - - compatible = "fsl,imx23-evk", "fsl,imx23";
> -
> -i.MX25 Product Development Kit
> -Required root node properties:
> - - compatible = "fsl,imx25-pdk", "fsl,imx25";
> -
> -i.MX27 Product Development Kit
> -Required root node properties:
> - - compatible = "fsl,imx27-pdk", "fsl,imx27";
> -
> -i.MX28 Evaluation Kit
> -Required root node properties:
> - - compatible = "fsl,imx28-evk", "fsl,imx28";
> -
> -i.MX51 Babbage Board
> -Required root node properties:
> - - compatible = "fsl,imx51-babbage", "fsl,imx51";
> -
> -i.MX53 Automotive Reference Design Board
> -Required root node properties:
> - - compatible = "fsl,imx53-ard", "fsl,imx53";
> -
> -i.MX53 Evaluation Kit
> -Required root node properties:
> - - compatible = "fsl,imx53-evk", "fsl,imx53";
> -
> -i.MX53 Quick Start Board
> -Required root node properties:
> - - compatible = "fsl,imx53-qsb", "fsl,imx53";
> -
> -i.MX53 Smart Mobile Reference Design Board
> -Required root node properties:
> - - compatible = "fsl,imx53-smd", "fsl,imx53";
> -
> -i.MX6 Quad Armadillo2 Board
> -Required root node properties:
> - - compatible = "fsl,imx6q-arm2", "fsl,imx6q";
> -
> -i.MX6 Quad SABRE Lite Board
> -Required root node properties:
> - - compatible = "fsl,imx6q-sabrelite", "fsl,imx6q";
> -
> -i.MX6 Quad SABRE Smart Device Board
> -Required root node properties:
> - - compatible = "fsl,imx6q-sabresd", "fsl,imx6q";
> -
> -i.MX6 Quad SABRE Automotive Board
> -Required root node properties:
> - - compatible = "fsl,imx6q-sabreauto", "fsl,imx6q";
> -
> -i.MX6SLL EVK board
> -Required root node properties:
> - - compatible = "fsl,imx6sll-evk", "fsl,imx6sll";
> -
> -Generic i.MX boards
> --------------------
> -
> -No iomux setup is done for these boards, so this must have been configured
> -by the bootloader for boards to work with the generic bindings.
> -
> -i.MX27 generic board
> -Required root node properties:
> - - compatible = "fsl,imx27";
> -
> -i.MX51 generic board
> -Required root node properties:
> - - compatible = "fsl,imx51";
> -
> -i.MX53 generic board
> -Required root node properties:
> - - compatible = "fsl,imx53";
> -
> -i.MX6q generic board
> -Required root node properties:
> - - compatible = "fsl,imx6q";
> -
> -Freescale Vybrid Platform Device Tree Bindings
> -----------------------------------------------
> -
> -For the Vybrid SoC familiy all variants with DDR controller are supported,
> -which is the VF5xx and VF6xx series. Out of historical reasons, in most
> -places the kernel uses vf610 to refer to the whole familiy.
> -The compatible string "fsl,vf610m4" is used for the secondary Cortex-M4
> -core support.
> -
> -Required root node compatible property (one of them):
> - - compatible = "fsl,vf500";
> - - compatible = "fsl,vf510";
> - - compatible = "fsl,vf600";
> - - compatible = "fsl,vf610";
> - - compatible = "fsl,vf610m4";
> -
> -Freescale LS1021A Platform Device Tree Bindings
> -------------------------------------------------
> -
> -Required root node compatible properties:
> - - compatible = "fsl,ls1021a";
> -
> -Freescale ARMv8 based Layerscape SoC family Device Tree Bindings
> -----------------------------------------------------------------
> -
> -LS1012A SoC
> -Required root node properties:
> - - compatible = "fsl,ls1012a";
> -
> -LS1012A ARMv8 based RDB Board
> -Required root node properties:
> - - compatible = "fsl,ls1012a-rdb", "fsl,ls1012a";
> -
> -LS1012A ARMv8 based FRDM Board
> -Required root node properties:
> - - compatible = "fsl,ls1012a-frdm", "fsl,ls1012a";
> -
> -LS1012A ARMv8 based QDS Board
> -Required root node properties:
> - - compatible = "fsl,ls1012a-qds", "fsl,ls1012a";
> -
> -LS1043A SoC
> -Required root node properties:
> - - compatible = "fsl,ls1043a";
> -
> -LS1043A ARMv8 based RDB Board
> -Required root node properties:
> - - compatible = "fsl,ls1043a-rdb", "fsl,ls1043a";
> -
> -LS1043A ARMv8 based QDS Board
> -Required root node properties:
> - - compatible = "fsl,ls1043a-qds", "fsl,ls1043a";
> -
> -LS1046A SoC
> -Required root node properties:
> - - compatible = "fsl,ls1046a";
> -
> -LS1046A ARMv8 based QDS Board
> -Required root node properties:
> - - compatible = "fsl,ls1046a-qds", "fsl,ls1046a";
> -
> -LS1046A ARMv8 based RDB Board
> -Required root node properties:
> - - compatible = "fsl,ls1046a-rdb", "fsl,ls1046a";
> -
> -LS1088A SoC
> -Required root node properties:
> - - compatible = "fsl,ls1088a";
> -
> -LS1088A ARMv8 based QDS Board
> -Required root node properties:
> - - compatible = "fsl,ls1088a-qds", "fsl,ls1088a";
> -
> -LS1088A ARMv8 based RDB Board
> -Required root node properties:
> - - compatible = "fsl,ls1088a-rdb", "fsl,ls1088a";
> -
> -LS2080A SoC
> -Required root node properties:
> - - compatible = "fsl,ls2080a";
> -
> -LS2080A ARMv8 based Simulator model
> -Required root node properties:
> - - compatible = "fsl,ls2080a-simu", "fsl,ls2080a";
> -
> -LS2080A ARMv8 based QDS Board
> -Required root node properties:
> - - compatible = "fsl,ls2080a-qds", "fsl,ls2080a";
> -
> -LS2080A ARMv8 based RDB Board
> -Required root node properties:
> - - compatible = "fsl,ls2080a-rdb", "fsl,ls2080a";
> -
> -LS2088A SoC
> -Required root node properties:
> - - compatible = "fsl,ls2088a";
> -
> -LS2088A ARMv8 based QDS Board
> -Required root node properties:
> - - compatible = "fsl,ls2088a-qds", "fsl,ls2088a";
> -
> -LS2088A ARMv8 based RDB Board
> -Required root node properties:
> - - compatible = "fsl,ls2088a-rdb", "fsl,ls2088a";
> diff --git a/Documentation/devicetree/bindings/arm/fsl.yaml b/Documentation/devicetree/bindings/arm/fsl.yaml
> new file mode 100644
> index 000000000000..5241fa92e3d1
> --- /dev/null
> +++ b/Documentation/devicetree/bindings/arm/fsl.yaml
> @@ -0,0 +1,166 @@
> +# SPDX-License-Identifier: None
> +%YAML 1.2
> +---
> +$id: http://devicetree.org/schemas/bindings/arm/fsl.yaml#
> +$schema: http://devicetree.org/meta-schemas/core.yaml#
> +
> +title: Freescale i.MX Platforms Device Tree Bindings
> +
> +maintainers:
> + - Shawn Guo <[email protected]>
The email address has been unavailable for long time. Please use
Shawn Guo <[email protected]>.
> + - Shaohui Xie <[email protected]>
Li Yang <[email protected]> is the co-maintainer for Layerscape.
> +
> +properties:
> + $nodename:
> + const: '/'
> + compatible:
> + oneOf:
> + - description: i.MX23 based Boards
> + items:
> + - enum:
> + - fsl,imx23-evk
> + - olimex,imx23-olinuxino
> + - const: fsl,imx23
> +
> + - description: i.MX25 Product Development Kit
> + items:
> + - enum:
> + - fsl,imx25-pdk
> + - const: fsl,imx25
> +
> + - description: i.MX27 Product Development Kit
> + items:
> + - enum:
> + - fsl,imx27-pdk
> + - const: fsl,imx27
> +
> + - description: i.MX28 based Boards
> + items:
> + - enum:
> + - fsl,imx28-evk
> + - i2se,duckbill
> + - i2se,duckbill-2
> + - technologic,imx28-ts4600
> + - const: fsl,imx28
> + - items:
The schema is new to me. This line looks unusual to me, so you may want
to double check.
> + - enum:
> + - i2se,duckbill-2-485
> + - i2se,duckbill-2-enocean
> + - i2se,duckbill-2-spi
> + - const: i2se,duckbill-2
> + - const: fsl,imx28
> +
> + - description: i.MX51 Babbage Board
i.MX51 based Boards
> + items:
> + - enum:
> + - armadeus,imx51-apf51
> + - fsl,imx51-babbage
> + - technologic,imx51-ts4800
> + - const: fsl,imx51
> +
> + - description: i.MX53 Boards
i.MX53 based Boards
Shawn
> + items:
> + - enum:
> + - bhf,cx9020
> + - fsl,imx53-ard
> + - fsl,imx53-evk
> + - fsl,imx53-qsb
> + - fsl,imx53-smd
> + - const: fsl,imx53
> +
> + - description: i.MX6Q based Boards
> + items:
> + - enum:
> + - fsl,imx6q-arm2
> + - fsl,imx6q-sabrelite
> + - fsl,imx6q-sabresd
> + - fsl,imx6q-sabreauto
> + - technologic,imx6q-ts4900
> + - technologic,imx6q-ts7970
> + - const: fsl,imx6q
> +
> + - description: i.MX6DL based Boards
> + items:
> + - enum:
> + - technologic,imx6dl-ts4900
> + - technologic,imx6dl-ts7970
> + - const: fsl,imx6dl
> +
> + - description: i.MX6SLL based Boards
> + items:
> + - enum:
> + - fsl,imx6sll-evk
> + - const: fsl,imx6sll
> +
> + - description:
> + Compulab SBC-iMX7 is a single board computer based on the
> + Freescale i.MX7 system-on-chip. SBC-iMX7 is implemented with
> + the CL-SOM-iMX7 System-on-Module providing most of the functions,
> + and SB-SOM-iMX7 carrier board providing additional peripheral
> + functions and connectors.
> + items:
> + - const: compulab,sbc-imx7
> + - const: compulab,cl-som-imx7
> + - const: fsl,imx7d
> +
> + - description:
> + Freescale Vybrid Platform Device Tree Bindings
> +
> + For the Vybrid SoC familiy all variants with DDR controller are supported,
> + which is the VF5xx and VF6xx series. Out of historical reasons, in most
> + places the kernel uses vf610 to refer to the whole familiy.
> + The compatible string "fsl,vf610m4" is used for the secondary Cortex-M4
> + core support.
> + items:
> + - enum:
> + - fsl,vf500
> + - fsl,vf510
> + - fsl,vf600
> + - fsl,vf610
> + - fsl,vf610m4
> +
> + - description: LS1021A based Boards
> + items:
> + - enum:
> + - fsl,ls1012a-rdb
> + - fsl,ls1012a-frdm
> + - fsl,ls1012a-qds
> + - const: fsl,ls1021a
> +
> + - description: LS1043A based Boards
> + items:
> + - enum:
> + - fsl,ls1043a-rdb
> + - fsl,ls1043a-qds
> + - const: fsl,ls1043a
> +
> + - description: LS1046A based Boards
> + items:
> + - enum:
> + - fsl,ls1046a-qds
> + - fsl,ls1046a-rdb
> + - const: fsl,ls1046a
> +
> + - description: LS1088A based Boards
> + items:
> + - enum:
> + - fsl,ls1088a-qds
> + - fsl,ls1088a-rdb
> + - const: fsl,ls1088a
> +
> + - description: LS2080A based Boards
> + items:
> + - enum:
> + - fsl,ls2080a-simu
> + - fsl,ls2080a-qds
> + - fsl,ls2080a-rdb
> + - const: fsl,ls2080a
> +
> + - description: LS2088A based Boards
> + items:
> + - enum:
> + - fsl,ls2088a-qds
> + - fsl,ls2088a-rdb
> + - const: fsl,ls2088a
> +
> +...
> diff --git a/Documentation/devicetree/bindings/arm/i2se.txt b/Documentation/devicetree/bindings/arm/i2se.txt
> deleted file mode 100644
> index dbd54a3aa07d..000000000000
> --- a/Documentation/devicetree/bindings/arm/i2se.txt
> +++ /dev/null
> @@ -1,22 +0,0 @@
> -I2SE Device Tree Bindings
> --------------------------
> -
> -Duckbill Board
> -Required root node properties:
> - - compatible = "i2se,duckbill", "fsl,imx28";
> -
> -Duckbill 2 Board
> -Required root node properties:
> - - compatible = "i2se,duckbill-2", "fsl,imx28";
> -
> -Duckbill 2 485 Board
> -Required root node properties:
> - - compatible = "i2se,duckbill-2-485", "i2se,duckbill-2", "fsl,imx28";
> -
> -Duckbill 2 EnOcean Board
> -Required root node properties:
> - - compatible = "i2se,duckbill-2-enocean", "i2se,duckbill-2", "fsl,imx28";
> -
> -Duckbill 2 SPI Board
> -Required root node properties:
> - - compatible = "i2se,duckbill-2-spi", "i2se,duckbill-2", "fsl,imx28";
> diff --git a/Documentation/devicetree/bindings/arm/olimex.txt b/Documentation/devicetree/bindings/arm/olimex.txt
> deleted file mode 100644
> index d726aeca56be..000000000000
> --- a/Documentation/devicetree/bindings/arm/olimex.txt
> +++ /dev/null
> @@ -1,10 +0,0 @@
> -Olimex Device Tree Bindings
> ----------------------------
> -
> -SAM9-L9260 Board
> -Required root node properties:
> - - compatible = "olimex,sam9-l9260", "atmel,at91sam9260";
> -
> -i.MX23 Olinuxino Low Cost Board
> -Required root node properties:
> - - compatible = "olimex,imx23-olinuxino", "fsl,imx23";
> diff --git a/Documentation/devicetree/bindings/arm/technologic.txt b/Documentation/devicetree/bindings/arm/technologic.txt
> deleted file mode 100644
> index f1cedc00dcab..000000000000
> --- a/Documentation/devicetree/bindings/arm/technologic.txt
> +++ /dev/null
> @@ -1,23 +0,0 @@
> -Technologic Systems Platforms Device Tree Bindings
> ---------------------------------------------------
> -
> -TS-4600 is a System-on-Module based on the Freescale i.MX28 System-on-Chip.
> -It can be mounted on a carrier board providing additional peripheral connectors.
> -Required root node properties:
> - - compatible = "technologic,imx28-ts4600", "fsl,imx28"
> -
> -TS-4800 board
> -Required root node properties:
> - - compatible = "technologic,imx51-ts4800", "fsl,imx51";
> -
> -TS-4900 is a System-on-Module based on the Freescale i.MX6 System-on-Chip.
> -It can be mounted on a carrier board providing additional peripheral connectors.
> -Required root node properties:
> - - compatible = "technologic,imx6dl-ts4900", "fsl,imx6dl"
> - - compatible = "technologic,imx6q-ts4900", "fsl,imx6q"
> -
> -TS-7970 is a System-on-Module based on the Freescale i.MX6 System-on-Chip.
> -It can be mounted on a carrier board providing additional peripheral connectors.
> -Required root node properties:
> - - compatible = "technologic,imx6dl-ts7970", "fsl,imx6dl"
> - - compatible = "technologic,imx6q-ts7970", "fsl,imx6q"
> --
> 2.17.1
>
Hi Rob,
On Fri, Oct 5, 2018 at 6:58 PM Rob Herring <[email protected]> wrote:
> In preparation to convert board-level bindings to json-schema, move
> various misc SoC bindings out to their own file.
>
> Cc: Mark Rutland <[email protected]>
> Cc: Simon Horman <[email protected]>
> Cc: Magnus Damm <[email protected]>
> Cc: [email protected]
> Cc: [email protected]
> Signed-off-by: Rob Herring <[email protected]>
Looks good to me, but needs a rebase, as the PRR section has been extended
in -next.
Gr{oetje,eeting}s,
Geert
--
Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- [email protected]
In personal conversations with technical people, I call myself a hacker. But
when I'm talking to journalists I just say "programmer" or something like that.
-- Linus Torvalds
On Fri, Oct 05, 2018 at 11:58:48AM -0500, Rob Herring wrote:
> Convert ZTE SoC bindings to DT schema format using json-schema.
>
> Cc: Jun Nie <[email protected]>
> Cc: Baoyou Xie <[email protected]>
> Cc: Shawn Guo <[email protected]>
> Cc: Mark Rutland <[email protected]>
> Cc: [email protected]
> Cc: [email protected]
> Signed-off-by: Rob Herring <[email protected]>
Acked-by: Shawn Guo <[email protected]>
Hi Rob,
On Fri, Oct 5, 2018 at 6:59 PM Rob Herring <[email protected]> wrote:
> Convert Renesas SoC bindings to DT schema format using json-schema.
>
> Cc: Simon Horman <[email protected]>
> Cc: Magnus Damm <[email protected]>
> Cc: Mark Rutland <[email protected]>
> Cc: [email protected]
> Cc: [email protected]
> Signed-off-by: Rob Herring <[email protected]>
Thanks for your patch!
Note that this will need a rebase, as more SoCs/boards have been added
in -next.
> --- /dev/null
> +++ b/Documentation/devicetree/bindings/arm/shmobile.yaml
> @@ -0,0 +1,205 @@
> +# SPDX-License-Identifier: None
The old file didn't have an SPDX header, so it was GPL-2.0, implicitly?
> +%YAML 1.2
> +---
> +$id: http://devicetree.org/schemas/bindings/arm/shmobile.yaml#
> +$schema: http://devicetree.org/meta-schemas/core.yaml#
> +
> +title: Renesas SH-Mobile, R-Mobile, and R-Car Platform Device Tree Bindings
> +
> +maintainers:
> + - Geert Uytterhoeven <[email protected]>
Simon Horman <[email protected]> (supporter:ARM/SHMOBILE ARM ARCHITECTURE)
Magnus Damm <[email protected]> (supporter:ARM/SHMOBILE ARM ARCHITECTURE)
You had it right in the CC list, though...
> + - description: RZ/G1M (R8A77430)
> + items:
> + - enum:
> + # iWave Systems RZ/G1M Qseven Development Platform (iW-RainboW-G20D-Qseven)
> + - iwave,g20d
> + - const: iwave,g20m
> + - const: renesas,r8a7743
> +
> + - items:
> + - enum:
> + # iWave Systems RZ/G1M Qseven System On Module (iW-RainboW-G20M-Qseven)
> + - iwave,g20m
> + - const: renesas,r8a7743
> +
> + - description: RZ/G1N (R8A77440)
> + items:
> + - enum:
> + - renesas,sk-rzg1m # SK-RZG1M (YR8A77430S000BE)
This board belongs under the RZ/G1M section above
(see also the 7743 in the part number).
> + - const: renesas,r8a7744
> + - description: Kingfisher (SBEV-RCAR-KF-M03)
> + items:
> + - const: shimafuji,kingfisher
> + - enum:
> + - renesas,h3ulcb
> + - renesas,m3ulcb
> + - enum:
> + - renesas,r8a7795
> + - renesas,r8a7796
This looks a bit funny: all other entries have the "const" last, and
use it for the
SoC number. May be correct, though.
To clarify, this is an extension board that can fit both the [HM]3ULCB
boards (actually also the new M3NULCB, I think).
Gr{oetje,eeting}s,
Geert
--
Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- [email protected]
In personal conversations with technical people, I call myself a hacker. But
when I'm talking to journalists I just say "programmer" or something like that.
-- Linus Torvalds
On Fri, Oct 05, 2018 at 11:58:41AM -0500, Rob Herring wrote:
> Convert Renesas SoC bindings to DT schema format using json-schema.
>
> Cc: Simon Horman <[email protected]>
> Cc: Magnus Damm <[email protected]>
> Cc: Mark Rutland <[email protected]>
> Cc: [email protected]
> Cc: [email protected]
> Signed-off-by: Rob Herring <[email protected]>
This seems fine to me other than that it does not seem
to apply cleanly to next.
shmobile.txt sees a couple of updates per release cycle so from my point of
view it would ideal if this change could hit -rc1 to allow patches for
v4.21 to be accepted smoothly (already one from Sergei will need rebasing).
> ---
> .../devicetree/bindings/arm/shmobile.txt | 143 ------------
> .../devicetree/bindings/arm/shmobile.yaml | 205 ++++++++++++++++++
> 2 files changed, 205 insertions(+), 143 deletions(-)
> delete mode 100644 Documentation/devicetree/bindings/arm/shmobile.txt
> create mode 100644 Documentation/devicetree/bindings/arm/shmobile.yaml
>
> diff --git a/Documentation/devicetree/bindings/arm/shmobile.txt b/Documentation/devicetree/bindings/arm/shmobile.txt
> deleted file mode 100644
> index 619b765e5bee..000000000000
> --- a/Documentation/devicetree/bindings/arm/shmobile.txt
> +++ /dev/null
> @@ -1,143 +0,0 @@
> -Renesas SH-Mobile, R-Mobile, and R-Car Platform Device Tree Bindings
> ---------------------------------------------------------------------
> -
> -SoCs:
> -
> - - Emma Mobile EV2
> - compatible = "renesas,emev2"
> - - RZ/A1H (R7S72100)
> - compatible = "renesas,r7s72100"
> - - SH-Mobile AG5 (R8A73A00/SH73A0)
> - compatible = "renesas,sh73a0"
> - - R-Mobile APE6 (R8A73A40)
> - compatible = "renesas,r8a73a4"
> - - R-Mobile A1 (R8A77400)
> - compatible = "renesas,r8a7740"
> - - RZ/G1H (R8A77420)
> - compatible = "renesas,r8a7742"
> - - RZ/G1M (R8A77430)
> - compatible = "renesas,r8a7743"
> - - RZ/G1N (R8A77440)
> - compatible = "renesas,r8a7744"
> - - RZ/G1E (R8A77450)
> - compatible = "renesas,r8a7745"
> - - RZ/G1C (R8A77470)
> - compatible = "renesas,r8a77470"
> - - R-Car M1A (R8A77781)
> - compatible = "renesas,r8a7778"
> - - R-Car H1 (R8A77790)
> - compatible = "renesas,r8a7779"
> - - R-Car H2 (R8A77900)
> - compatible = "renesas,r8a7790"
> - - R-Car M2-W (R8A77910)
> - compatible = "renesas,r8a7791"
> - - R-Car V2H (R8A77920)
> - compatible = "renesas,r8a7792"
> - - R-Car M2-N (R8A77930)
> - compatible = "renesas,r8a7793"
> - - R-Car E2 (R8A77940)
> - compatible = "renesas,r8a7794"
> - - R-Car H3 (R8A77950)
> - compatible = "renesas,r8a7795"
> - - R-Car M3-W (R8A77960)
> - compatible = "renesas,r8a7796"
> - - R-Car M3-N (R8A77965)
> - compatible = "renesas,r8a77965"
> - - R-Car V3M (R8A77970)
> - compatible = "renesas,r8a77970"
> - - R-Car V3H (R8A77980)
> - compatible = "renesas,r8a77980"
> - - R-Car E3 (R8A77990)
> - compatible = "renesas,r8a77990"
> - - R-Car D3 (R8A77995)
> - compatible = "renesas,r8a77995"
> - - RZ/N1D (R9A06G032)
> - compatible = "renesas,r9a06g032"
> -
> -Boards:
> -
> - - Alt (RTP0RC7794SEB00010S)
> - compatible = "renesas,alt", "renesas,r8a7794"
> - - APE6-EVM
> - compatible = "renesas,ape6evm", "renesas,r8a73a4"
> - - Atmark Techno Armadillo-800 EVA
> - compatible = "renesas,armadillo800eva", "renesas,r8a7740"
> - - Blanche (RTP0RC7792SEB00010S)
> - compatible = "renesas,blanche", "renesas,r8a7792"
> - - BOCK-W
> - compatible = "renesas,bockw", "renesas,r8a7778"
> - - Condor (RTP0RC77980SEB0010SS/RTP0RC77980SEB0010SA01)
> - compatible = "renesas,condor", "renesas,r8a77980"
> - - Draak (RTP0RC77995SEB0010S)
> - compatible = "renesas,draak", "renesas,r8a77995"
> - - Eagle (RTP0RC77970SEB0010S)
> - compatible = "renesas,eagle", "renesas,r8a77970"
> - - Ebisu (RTP0RC77990SEB0010S)
> - compatible = "renesas,ebisu", "renesas,r8a77990"
> - - Genmai (RTK772100BC00000BR)
> - compatible = "renesas,genmai", "renesas,r7s72100"
> - - GR-Peach (X28A-M01-E/F)
> - compatible = "renesas,gr-peach", "renesas,r7s72100"
> - - Gose (RTP0RC7793SEB00010S)
> - compatible = "renesas,gose", "renesas,r8a7793"
> - - H3ULCB (R-Car Starter Kit Premier, RTP0RC7795SKBX0010SA00 (H3 ES1.1))
> - H3ULCB (R-Car Starter Kit Premier, RTP0RC77951SKBX010SA00 (H3 ES2.0))
> - compatible = "renesas,h3ulcb", "renesas,r8a7795"
> - - Henninger
> - compatible = "renesas,henninger", "renesas,r8a7791"
> - - iWave Systems RZ/G1C Single Board Computer (iW-RainboW-G23S)
> - compatible = "iwave,g23s", "renesas,r8a77470"
> - - iWave Systems RZ/G1E SODIMM SOM Development Platform (iW-RainboW-G22D)
> - compatible = "iwave,g22d", "iwave,g22m", "renesas,r8a7745"
> - - iWave Systems RZ/G1E SODIMM System On Module (iW-RainboW-G22M-SM)
> - compatible = "iwave,g22m", "renesas,r8a7745"
> - - iWave Systems RZ/G1M Qseven Development Platform (iW-RainboW-G20D-Qseven)
> - compatible = "iwave,g20d", "iwave,g20m", "renesas,r8a7743"
> - - iWave Systems RZ/G1M Qseven System On Module (iW-RainboW-G20M-Qseven)
> - compatible = "iwave,g20m", "renesas,r8a7743"
> - - Kingfisher (SBEV-RCAR-KF-M03)
> - compatible = "shimafuji,kingfisher"
> - - Koelsch (RTP0RC7791SEB00010S)
> - compatible = "renesas,koelsch", "renesas,r8a7791"
> - - Kyoto Microcomputer Co. KZM-A9-Dual
> - compatible = "renesas,kzm9d", "renesas,emev2"
> - - Kyoto Microcomputer Co. KZM-A9-GT
> - compatible = "renesas,kzm9g", "renesas,sh73a0"
> - - Lager (RTP0RC7790SEB00010S)
> - compatible = "renesas,lager", "renesas,r8a7790"
> - - M3ULCB (R-Car Starter Kit Pro, RTP0RC7796SKBX0010SA09 (M3 ES1.0))
> - compatible = "renesas,m3ulcb", "renesas,r8a7796"
> - - Marzen (R0P7779A00010S)
> - compatible = "renesas,marzen", "renesas,r8a7779"
> - - Porter (M2-LCDP)
> - compatible = "renesas,porter", "renesas,r8a7791"
> - - RSKRZA1 (YR0K77210C000BE)
> - compatible = "renesas,rskrza1", "renesas,r7s72100"
> - - RZN1D-DB (RZ/N1D Demo Board for the RZ/N1D 400 pins package)
> - compatible = "renesas,rzn1d400-db", "renesas,r9a06g032"
> - - Salvator-X (RTP0RC7795SIPB0010S)
> - compatible = "renesas,salvator-x", "renesas,r8a7795"
> - - Salvator-X (RTP0RC7796SIPB0011S)
> - compatible = "renesas,salvator-x", "renesas,r8a7796"
> - - Salvator-X (RTP0RC7796SIPB0011S (M3-N))
> - compatible = "renesas,salvator-x", "renesas,r8a77965"
> - - Salvator-XS (Salvator-X 2nd version, RTP0RC7795SIPB0012S)
> - compatible = "renesas,salvator-xs", "renesas,r8a7795"
> - - Salvator-XS (Salvator-X 2nd version, RTP0RC7796SIPB0012S)
> - compatible = "renesas,salvator-xs", "renesas,r8a7796"
> - - Salvator-XS (Salvator-X 2nd version, RTP0RC77965SIPB012S)
> - compatible = "renesas,salvator-xs", "renesas,r8a77965"
> - - SILK (RTP0RC7794LCB00011S)
> - compatible = "renesas,silk", "renesas,r8a7794"
> - - SK-RZG1E (YR8A77450S000BE)
> - compatible = "renesas,sk-rzg1e", "renesas,r8a7745"
> - - SK-RZG1M (YR8A77430S000BE)
> - compatible = "renesas,sk-rzg1m", "renesas,r8a7743"
> - - Stout (ADAS Starterkit, Y-R-CAR-ADAS-SKH2-BOARD)
> - compatible = "renesas,stout", "renesas,r8a7790"
> - - V3HSK (Y-ASK-RCAR-V3H-WS10)
> - compatible = "renesas,v3hsk", "renesas,r8a77980"
> - - V3MSK (Y-ASK-RCAR-V3M-WS10)
> - compatible = "renesas,v3msk", "renesas,r8a77970"
> - - Wheat (RTP0RC7792ASKB0000JE)
> - compatible = "renesas,wheat", "renesas,r8a7792"
> diff --git a/Documentation/devicetree/bindings/arm/shmobile.yaml b/Documentation/devicetree/bindings/arm/shmobile.yaml
> new file mode 100644
> index 000000000000..31009e7fb0ea
> --- /dev/null
> +++ b/Documentation/devicetree/bindings/arm/shmobile.yaml
> @@ -0,0 +1,205 @@
> +# SPDX-License-Identifier: None
> +%YAML 1.2
> +---
> +$id: http://devicetree.org/schemas/bindings/arm/shmobile.yaml#
> +$schema: http://devicetree.org/meta-schemas/core.yaml#
> +
> +title: Renesas SH-Mobile, R-Mobile, and R-Car Platform Device Tree Bindings
> +
> +maintainers:
> + - Geert Uytterhoeven <[email protected]>
> +
> +properties:
> + $nodename:
> + const: '/'
> + compatible:
> + oneOf:
> + - description: Emma Mobile EV2
> + items:
> + - enum:
> + - renesas,kzm9d # Kyoto Microcomputer Co. KZM-A9-Dual
> + - const: renesas,emev2
> +
> + - description: RZ/A1H (R7S72100)
> + items:
> + - enum:
> + - renesas,genmai # Genmai (RTK772100BC00000BR)
> + - renesas,gr-peach # GR-Peach (X28A-M01-E/F)
> + - renesas,rskrza1 # RSKRZA1 (YR0K77210C000BE)
> + - const: renesas,r7s72100
> +
> + - description: SH-Mobile AG5 (R8A73A00/SH73A0)
> + items:
> + - enum:
> + - renesas,kzm9g # Kyoto Microcomputer Co. KZM-A9-GT
> + - const: renesas,sh73a0
> +
> + - description: R-Mobile APE6 (R8A73A40)
> + items:
> + - enum:
> + - renesas,ape6evm
> + - const: renesas,r8a73a4
> +
> + - description: R-Mobile A1 (R8A77400)
> + items:
> + - enum:
> + - renesas,armadillo800eva # Atmark Techno Armadillo-800 EVA
> + - const: renesas,r8a7740
> +
> + - description: RZ/G1H (R8A77420)
> + items:
> + - const: renesas,r8a7742
> +
> + - description: RZ/G1M (R8A77430)
> + items:
> + - enum:
> + # iWave Systems RZ/G1M Qseven Development Platform (iW-RainboW-G20D-Qseven)
> + - iwave,g20d
> + - const: iwave,g20m
> + - const: renesas,r8a7743
> +
> + - items:
> + - enum:
> + # iWave Systems RZ/G1M Qseven System On Module (iW-RainboW-G20M-Qseven)
> + - iwave,g20m
> + - const: renesas,r8a7743
> +
> + - description: RZ/G1N (R8A77440)
> + items:
> + - enum:
> + - renesas,sk-rzg1m # SK-RZG1M (YR8A77430S000BE)
> + - const: renesas,r8a7744
> +
> + - description: RZ/G1E (R8A77450)
> + items:
> + - enum:
> + - iwave,g22m # iWave Systems RZ/G1E SODIMM System On Module (iW-RainboW-G22M-SM)
> + - renesas,sk-rzg1e # SK-RZG1E (YR8A77450S000BE)
> + - const: renesas,r8a7745
> + - items:
> + # iWave Systems RZ/G1E SODIMM SOM Development Platform (iW-RainboW-G22D)
> + - const: iwave,g22d
> + - const: iwave,g22m
> + - const: renesas,r8a7745
> +
> + - description: RZ/G1C (R8A77470)
> + items:
> + - enum:
> + - iwave,g23s #iWave Systems RZ/G1C Single Board Computer (iW-RainboW-G23S)
> + - const: renesas,r8a77470
> +
> + - description: R-Car M1A (R8A77781)
> + items:
> + - enum:
> + - renesas,bockw
> + - const: renesas,r8a7778
> +
> + - description: R-Car H1 (R8A77790)
> + items:
> + - enum:
> + - renesas,marzen # Marzen (R0P7779A00010S)
> + - renesas,stout # Stout (ADAS Starterkit, Y-R-CAR-ADAS-SKH2-BOARD)
> + - const: renesas,r8a7779
> +
> + - description: R-Car H2 (R8A77900)
> + items:
> + - enum:
> + - renesas,lager # Lager (RTP0RC7790SEB00010S)
> + - const: renesas,r8a7790
> +
> + - description: R-Car M2-W (R8A77910)
> + items:
> + - enum:
> + - renesas,henninger
> + - renesas,koelsch # Koelsch (RTP0RC7791SEB00010S)
> + - renesas,porter # Porter (M2-LCDP)
> + - const: renesas,r8a7791
> +
> + - description: R-Car V2H (R8A77920)
> + items:
> + - enum:
> + - renesas,blanche # Blanche (RTP0RC7792SEB00010S)
> + - renesas,wheat # Wheat (RTP0RC7792ASKB0000JE)
> + - const: renesas,r8a7792
> +
> + - description: R-Car M2-N (R8A77930)
> + items:
> + - enum:
> + - renesas,gose # Gose (RTP0RC7793SEB00010S)
> + - const: renesas,r8a7793
> +
> + - description: R-Car E2 (R8A77940)
> + items:
> + - enum:
> + - renesas,alt # Alt (RTP0RC7794SEB00010S)
> + - renesas,silk # SILK (RTP0RC7794LCB00011S)
> + - const: renesas,r8a7794
> +
> + - description: R-Car H3 (R8A77950)
> + items:
> + - enum:
> + # H3ULCB (R-Car Starter Kit Premier, RTP0RC7795SKBX0010SA00 (H3 ES1.1))
> + # H3ULCB (R-Car Starter Kit Premier, RTP0RC77951SKBX010SA00 (H3 ES2.0))
> + - renesas,h3ulcb
> + - renesas,salvator-x # Salvator-X (RTP0RC7795SIPB0010S)
> + - renesas,salvator-xs # Salvator-XS (Salvator-X 2nd version, RTP0RC7795SIPB0012S)
> + - const: renesas,r8a7795
> +
> + - description: R-Car M3-W (R8A77960)
> + items:
> + - enum:
> + - renesas,m3ulcb # M3ULCB (R-Car Starter Kit Pro, RTP0RC7796SKBX0010SA09 (M3 ES1.0))
> + - renesas,salvator-x # Salvator-X (RTP0RC7796SIPB0011S)
> + - renesas,salvator-xs # Salvator-XS (Salvator-X 2nd version, RTP0RC7796SIPB0012S)
> + - const: renesas,r8a7796
> +
> + - description: Kingfisher (SBEV-RCAR-KF-M03)
> + items:
> + - const: shimafuji,kingfisher
> + - enum:
> + - renesas,h3ulcb
> + - renesas,m3ulcb
> + - enum:
> + - renesas,r8a7795
> + - renesas,r8a7796
> +
> + - description: R-Car M3-N (R8A77965)
> + items:
> + - enum:
> + - renesas,salvator-x # Salvator-X (RTP0RC7796SIPB0011S (M3-N))
> + - renesas,salvator-xs # Salvator-XS (Salvator-X 2nd version, RTP0RC77965SIPB012S)
> + - const: renesas,r8a77965
> +
> + - description: R-Car V3M (R8A77970)
> + items:
> + - enum:
> + - renesas,eagle # Eagle (RTP0RC77970SEB0010S)
> + - renesas,v3msk # V3MSK (Y-ASK-RCAR-V3M-WS10)
> + - const: renesas,r8a77970
> +
> + - description: R-Car V3H (R8A77980)
> + items:
> + - enum:
> + - renesas,condor # Condor (RTP0RC77980SEB0010SS/RTP0RC77980SEB0010SA01)
> + - renesas,v3hsk # V3HSK (Y-ASK-RCAR-V3H-WS10)
> + - const: renesas,r8a77980
> +
> + - description: R-Car E3 (R8A77990)
> + items:
> + - enum:
> + - renesas,ebisu # Ebisu (RTP0RC77990SEB0010S)
> + - const: renesas,r8a77990
> +
> + - description: R-Car D3 (R8A77995)
> + items:
> + - enum:
> + - renesas,draak # Draak (RTP0RC77995SEB0010S)
> + - const: renesas,r8a77995
> +
> + - description: RZ/N1D (R9A06G032)
> + items:
> + - enum:
> + - renesas,rzn1d400-db # RZN1D-DB (RZ/N1D Demo Board for the RZ/N1D 400 pins package)
> + - const: renesas,r9a06g032
> +
> +...
> --
> 2.17.1
>
Hi Rob,
either I'm misunderstanding that, or something did go a bit wrong during
the conversion, as pointed out below:
Am Freitag, 5. Oktober 2018, 18:58:40 CEST schrieb Rob Herring:
> Convert Rockchip SoC bindings to DT schema format using json-schema.
>
> Cc: Mark Rutland <[email protected]>
> Cc: Heiko Stuebner <[email protected]>
> Cc: [email protected]
> Cc: [email protected]
> Cc: [email protected]
> Signed-off-by: Rob Herring <[email protected]>
> ---
> .../devicetree/bindings/arm/rockchip.txt | 220 ----------------
> .../devicetree/bindings/arm/rockchip.yaml | 242 ++++++++++++++++++
> 2 files changed, 242 insertions(+), 220 deletions(-)
> delete mode 100644 Documentation/devicetree/bindings/arm/rockchip.txt
> create mode 100644 Documentation/devicetree/bindings/arm/rockchip.yaml
>
> +properties:
> + $nodename:
> + const: '/'
> + compatible:
> + oneOf:
> + - items:
> + - enum:
> + - amarula,vyasa-rk3288
> + - asus,rk3288-tinker
> + - radxa,rock2-square
> + - chipspark,popmetal-rk3288
> + - netxeon,r89
> + - firefly,firefly-rk3288
> + - firefly,firefly-rk3288-beta
> + - firefly,firefly-rk3288-reload
> + - mqmaker,miqi
> + - rockchip,rk3288-fennec
> + - const: rockchip,rk3288
These are very much distinct boards, so shouldn't they also get
individual entries including their existing description like the phytec
or google boards below?
Similarly why is it an enum for those, while the Google boards get a
const for each compatible string?
Most non-google boards below also lost their description and where lumped
together into combined entries. Was that intentional?
Thanks
Heiko
> +
> + - description: Phytec phyCORE-RK3288 Rapid Development Kit
> + items:
> + - const: phytec,rk3288-pcm-947
> + - const: phytec,rk3288-phycore-som
> + - const: rockchip,rk3288
> +
> + - description: Google Mickey (Asus Chromebit CS10)
> + items:
> + - const: google,veyron-mickey-rev8
> + - const: google,veyron-mickey-rev7
> + - const: google,veyron-mickey-rev6
> + - const: google,veyron-mickey-rev5
> + - const: google,veyron-mickey-rev4
> + - const: google,veyron-mickey-rev3
> + - const: google,veyron-mickey-rev2
> + - const: google,veyron-mickey-rev1
> + - const: google,veyron-mickey-rev0
> + - const: google,veyron-mickey
> + - const: google,veyron
> + - const: rockchip,rk3288
> +
> + - description: Google Minnie (Asus Chromebook Flip C100P)
> + items:
> + - const: google,veyron-minnie-rev4
> + - const: google,veyron-minnie-rev3
> + - const: google,veyron-minnie-rev2
> + - const: google,veyron-minnie-rev1
> + - const: google,veyron-minnie-rev0
> + - const: google,veyron-minnie
> + - const: google,veyron
> + - const: rockchip,rk3288
> +
> + - description: Google Pinky (dev-board)
> + items:
> + - const: google,veyron-pinky-rev2
> + - const: google,veyron-pinky
> + - const: google,veyron
> + - const: rockchip,rk3288
> +
> + - description: Google Speedy (Asus C201 Chromebook)
> + items:
> + - const: google,veyron-speedy-rev9
> + - const: google,veyron-speedy-rev8
> + - const: google,veyron-speedy-rev7
> + - const: google,veyron-speedy-rev6
> + - const: google,veyron-speedy-rev5
> + - const: google,veyron-speedy-rev4
> + - const: google,veyron-speedy-rev3
> + - const: google,veyron-speedy-rev2
> + - const: google,veyron-speedy
> + - const: google,veyron
> + - const: rockchip,rk3288
> +
> + - description: Google Jaq (Haier Chromebook 11 and more)
> + items:
> + - const: google,veyron-jaq-rev5
> + - const: google,veyron-jaq-rev4
> + - const: google,veyron-jaq-rev3
> + - const: google,veyron-jaq-rev2
> + - const: google,veyron-jaq-rev1
> + - const: google,veyron-jaq
> + - const: google,veyron
> + - const: rockchip,rk3288
> +
> + - description: Google Jerry (Hisense Chromebook C11 and more)
> + items:
> + - const: google,veyron-jerry-rev7
> + - const: google,veyron-jerry-rev6
> + - const: google,veyron-jerry-rev5
> + - const: google,veyron-jerry-rev4
> + - const: google,veyron-jerry-rev3
> + - const: google,veyron-jerry
> + - const: google,veyron
> + - const: rockchip,rk3288
> +
> + - description: Google Brain (dev-board)
> + items:
> + - const: google,veyron-brain-rev0
> + - const: google,veyron-brain
> + - const: google,veyron
> + - const: rockchip,rk3288
> +
> + - items:
> + - enum:
> + - rockchip,kylin-rk3036
> + - const: rockchip,rk3036
> +
> + - items:
> + - enum:
> + - haoyu,marsboard-rk3066
> + - mundoreader,bq-curie2
> + - chipspark,rayeager-px2
> + - rikomagic,mk80
> + - const: rockchip,rk3066a
> +
> + - items:
> + - enum:
> + - radxa,rock
> + - const: rockchip,rk3188
> +
> + - items:
> + - const: rockchip,px3-evb
> + - const: rockchip,px3
> + - const: rockchip,rk3188
> +
> + - items:
> + - enum:
> + - firefly,roc-rk3328-cc
> + - pine64,rock64
> + - rockchip,rk3328-evb
> + - const: rockchip,rk3328
> +
> + - items:
> + - enum:
> + - geekbuying,geekbox
> + - rockchip,rk3368-evb-act8846
> + - rockchip,r88
> + - tsd,rk3368-uq7-haikou
> + - tronsmart,orion-r68-meta
> + - const: rockchip,rk3368
> +
> + - items:
> + - enum:
> + - geekbuying,geekbox
> + - rockchip,rk3368-evb-act8846
> + - rockchip,r88
> + - tsd,rk3368-uq7-haikou
> + - tronsmart,orion-r68-meta
> + - const: rockchip,rk3368
> +
> + - items:
> + - const: rockchip,px5-evb
> + - const: rockchip,px5
> + - const: rockchip,rk3368
> +
> + - items:
> + - enum:
> + - firefly,firefly-rk3399
> + - rockchip,rk3399-evb
> + - rockchip,rk3399-sapphire
> + - rockchip,rk3399-sapphire-excavator
> + - tsd,rk3399-q7-haikou
> + - vamrs,ficus
> + - const: rockchip,rk3399
> +
> + - description: Google Bob (Asus Chromebook Flip C101PA)
> + items:
> + - const: google,bob-rev13
> + - const: google,bob-rev12
> + - const: google,bob-rev11
> + - const: google,bob-rev10
> + - const: google,bob-rev9
> + - const: google,bob-rev8
> + - const: google,bob-rev7
> + - const: google,bob-rev6
> + - const: google,bob-rev5
> + - const: google,bob-rev4
> + - const: google,bob
> + - const: google,gru
> + - const: rockchip,rk3399
> +
> + - description: Google Gru (dev-board)
> + items:
> + - const: google,gru-rev15
> + - const: google,gru-rev14
> + - const: google,gru-rev13
> + - const: google,gru-rev12
> + - const: google,gru-rev11
> + - const: google,gru-rev10
> + - const: google,gru-rev9
> + - const: google,gru-rev8
> + - const: google,gru-rev7
> + - const: google,gru-rev6
> + - const: google,gru-rev5
> + - const: google,gru-rev4
> + - const: google,gru-rev3
> + - const: google,gru-rev2
> + - const: google,gru
> + - const: rockchip,rk3399
> +
> + - description: Google Kevin (Samsung Chromebook Plus)
> + items:
> + - const: google,kevin-rev15
> + - const: google,kevin-rev14
> + - const: google,kevin-rev13
> + - const: google,kevin-rev12
> + - const: google,kevin-rev11
> + - const: google,kevin-rev10
> + - const: google,kevin-rev9
> + - const: google,kevin-rev8
> + - const: google,kevin-rev7
> + - const: google,kevin-rev6
> + - const: google,kevin
> + - const: google,gru
> + - const: rockchip,rk3399
> +
> + - items:
> + - enum:
> + - rockchip,rv1108-evb
> + - const: rockchip,rv1108
> +
> + - items:
> + - enum:
> + - rockchip,rk3228-evb
> + - const: rockchip,rk3228
> +
> + - items:
> + - enum:
> + - rockchip,rk3229-evb
> + - const: rockchip,rk3229
> +...
>
On Mon, Oct 8, 2018 at 2:02 AM Shawn Guo <[email protected]> wrote:
>
> On Fri, Oct 05, 2018 at 11:58:34AM -0500, Rob Herring wrote:
> > Convert Freescale SoC bindings to DT schema format using json-schema.
> > +properties:
> > + $nodename:
> > + const: '/'
> > + compatible:
> > + oneOf:
> > + - description: i.MX23 based Boards
> > + items:
> > + - enum:
> > + - fsl,imx23-evk
> > + - olimex,imx23-olinuxino
> > + - const: fsl,imx23
> > +
> > + - description: i.MX25 Product Development Kit
> > + items:
> > + - enum:
> > + - fsl,imx25-pdk
> > + - const: fsl,imx25
> > +
> > + - description: i.MX27 Product Development Kit
> > + items:
> > + - enum:
> > + - fsl,imx27-pdk
> > + - const: fsl,imx27
> > +
> > + - description: i.MX28 based Boards
> > + items:
> > + - enum:
> > + - fsl,imx28-evk
> > + - i2se,duckbill
> > + - i2se,duckbill-2
> > + - technologic,imx28-ts4600
> > + - const: fsl,imx28
> > + - items:
>
> The schema is new to me. This line looks unusual to me, so you may want
> to double check.
It's fine. There's just no description schema on this one as it's a
continuation of the previous one (logically, but not from a schema
perspective). Perhaps add "i.MX28 I2SE Duckbill 2 based boards".
> > + - enum:
> > + - i2se,duckbill-2-485
> > + - i2se,duckbill-2-enocean
> > + - i2se,duckbill-2-spi
> > + - const: i2se,duckbill-2
> > + - const: fsl,imx28
> > +
> > + - description: i.MX51 Babbage Board
On Mon, Oct 8, 2018 at 4:45 AM Heiko Stuebner <[email protected]> wrote:
>
> Hi Rob,
>
> either I'm misunderstanding that, or something did go a bit wrong during
> the conversion, as pointed out below:
>
> Am Freitag, 5. Oktober 2018, 18:58:40 CEST schrieb Rob Herring:
> > Convert Rockchip SoC bindings to DT schema format using json-schema.
> >
> > Cc: Mark Rutland <[email protected]>
> > Cc: Heiko Stuebner <[email protected]>
> > Cc: [email protected]
> > Cc: [email protected]
> > Cc: [email protected]
> > Signed-off-by: Rob Herring <[email protected]>
> > ---
> > .../devicetree/bindings/arm/rockchip.txt | 220 ----------------
> > .../devicetree/bindings/arm/rockchip.yaml | 242 ++++++++++++++++++
> > 2 files changed, 242 insertions(+), 220 deletions(-)
> > delete mode 100644 Documentation/devicetree/bindings/arm/rockchip.txt
> > create mode 100644 Documentation/devicetree/bindings/arm/rockchip.yaml
> >
>
>
>
> > +properties:
> > + $nodename:
> > + const: '/'
> > + compatible:
> > + oneOf:
> > + - items:
> > + - enum:
> > + - amarula,vyasa-rk3288
> > + - asus,rk3288-tinker
> > + - radxa,rock2-square
> > + - chipspark,popmetal-rk3288
> > + - netxeon,r89
> > + - firefly,firefly-rk3288
> > + - firefly,firefly-rk3288-beta
> > + - firefly,firefly-rk3288-reload
> > + - mqmaker,miqi
> > + - rockchip,rk3288-fennec
> > + - const: rockchip,rk3288
>
> These are very much distinct boards, so shouldn't they also get
> individual entries including their existing description like the phytec
> or google boards below?
It is grouped by SoC compatible and # of compatible strings. So this
one is all the cases that have 2 compatible strings. It is simply
saying the 1st compatible string must be one of the enums and the 2nd
compatible string must be "rockchip,rk3288".
>
> Similarly why is it an enum for those, while the Google boards get a
> const for each compatible string?
Because each Google board is a fixed list of strings.
> Most non-google boards below also lost their description and where lumped
> together into combined entries. Was that intentional?
If the description was just repeating the compatible string with
spaces and capitalization, then yes it was intentional. If your
description matches what you have for 'model', then I'd prefer to see
model added as a property schema.
Rob
On Mon, Oct 8, 2018 at 3:02 AM Simon Horman <[email protected]> wrote:
>
> On Fri, Oct 05, 2018 at 11:58:41AM -0500, Rob Herring wrote:
> > Convert Renesas SoC bindings to DT schema format using json-schema.
> >
> > Cc: Simon Horman <[email protected]>
> > Cc: Magnus Damm <[email protected]>
> > Cc: Mark Rutland <[email protected]>
> > Cc: [email protected]
> > Cc: [email protected]
> > Signed-off-by: Rob Herring <[email protected]>
>
> This seems fine to me other than that it does not seem
> to apply cleanly to next.
>
> shmobile.txt sees a couple of updates per release cycle so from my point of
> view it would ideal if this change could hit -rc1 to allow patches for
> v4.21 to be accepted smoothly (already one from Sergei will need rebasing).
When we get to the point of merging (which isn't going to be 4.20),
you and other maintainers can probably take all these patches. Other
than the few restructuring patches, the only dependency is the build
support which isn't a dependency to apply it, but build it. I plan to
build any patches as part of reviewing at least early on. OTOH, the
build support is small enough and self contained that maybe it can
just be applied for 4.20.
Rob
On Mon, Oct 8, 2018 at 2:47 AM Geert Uytterhoeven <[email protected]> wrote:
>
> Hi Rob,
>
> On Fri, Oct 5, 2018 at 6:59 PM Rob Herring <[email protected]> wrote:
> > Convert Renesas SoC bindings to DT schema format using json-schema.
> >
> > Cc: Simon Horman <[email protected]>
> > Cc: Magnus Damm <[email protected]>
> > Cc: Mark Rutland <[email protected]>
> > Cc: [email protected]
> > Cc: [email protected]
> > Signed-off-by: Rob Herring <[email protected]>
>
> Thanks for your patch!
>
> Note that this will need a rebase, as more SoCs/boards have been added
> in -next.
>
> > --- /dev/null
> > +++ b/Documentation/devicetree/bindings/arm/shmobile.yaml
> > @@ -0,0 +1,205 @@
> > +# SPDX-License-Identifier: None
>
> The old file didn't have an SPDX header, so it was GPL-2.0, implicitly?
Right. I meant to update this with something. I'd prefer it be dual
licensed as these aren't just kernel files, but I don't really want to
try to gather permissions from all the copyright holders. And who is
the copyright holder when it is implicit? Everyone listed by git
blame?
> > +%YAML 1.2
> > +---
> > +$id: http://devicetree.org/schemas/bindings/arm/shmobile.yaml#
> > +$schema: http://devicetree.org/meta-schemas/core.yaml#
> > +
> > +title: Renesas SH-Mobile, R-Mobile, and R-Car Platform Device Tree Bindings
> > +
> > +maintainers:
> > + - Geert Uytterhoeven <[email protected]>
>
> Simon Horman <[email protected]> (supporter:ARM/SHMOBILE ARM ARCHITECTURE)
> Magnus Damm <[email protected]> (supporter:ARM/SHMOBILE ARM ARCHITECTURE)
>
> You had it right in the CC list, though...
I generated it here from git log rather get_maintainers.pl because
get_maintainers.pl just lists me for a bunch of them.
> > + - description: RZ/G1M (R8A77430)
> > + items:
> > + - enum:
> > + # iWave Systems RZ/G1M Qseven Development Platform (iW-RainboW-G20D-Qseven)
> > + - iwave,g20d
> > + - const: iwave,g20m
> > + - const: renesas,r8a7743
> > +
> > + - items:
> > + - enum:
> > + # iWave Systems RZ/G1M Qseven System On Module (iW-RainboW-G20M-Qseven)
> > + - iwave,g20m
> > + - const: renesas,r8a7743
> > +
> > + - description: RZ/G1N (R8A77440)
> > + items:
> > + - enum:
> > + - renesas,sk-rzg1m # SK-RZG1M (YR8A77430S000BE)
>
> This board belongs under the RZ/G1M section above
> (see also the 7743 in the part number).
Indeed. Not sure how I screwed that one up.
> > + - const: renesas,r8a7744
>
> > + - description: Kingfisher (SBEV-RCAR-KF-M03)
> > + items:
> > + - const: shimafuji,kingfisher
> > + - enum:
> > + - renesas,h3ulcb
> > + - renesas,m3ulcb
> > + - enum:
> > + - renesas,r8a7795
> > + - renesas,r8a7796
>
> This looks a bit funny: all other entries have the "const" last, and
> use it for the
> SoC number. May be correct, though.
> To clarify, this is an extension board that can fit both the [HM]3ULCB
> boards (actually also the new M3NULCB, I think).
This being Kingfisher?
I wrote this based on dts files in the tree. There's 2 combinations that I see:
"shimafuji,kingfisher", "renesas,h3ulcb", "renesas,r8a7795"
"shimafuji,kingfisher", "renesas,m3ulcb", "renesas,r8a7796"
The schema allows 4 combinations (1 * 2 * 2). I have no idea if the
other combinations are possible. If not, then we could rewrite this as
2 entries with 3 const values each.
Rob
On Mon, Oct 8, 2018 at 2:05 AM Geert Uytterhoeven <[email protected]> wrote:
>
> Hi Rob,
>
> On Fri, Oct 5, 2018 at 6:58 PM Rob Herring <[email protected]> wrote:
> > In preparation to convert board-level bindings to json-schema, move
> > various misc SoC bindings out to their own file.
> >
> > Cc: Mark Rutland <[email protected]>
> > Cc: Simon Horman <[email protected]>
> > Cc: Magnus Damm <[email protected]>
> > Cc: [email protected]
> > Cc: [email protected]
> > Signed-off-by: Rob Herring <[email protected]>
>
> Looks good to me, but needs a rebase, as the PRR section has been extended
> in -next.
Is this something you all can apply still for 4.20?
Rob
Hi Rob,
On Mon, Oct 8, 2018 at 4:57 PM Rob Herring <[email protected]> wrote:
> On Mon, Oct 8, 2018 at 2:47 AM Geert Uytterhoeven <[email protected]> wrote:
> > On Fri, Oct 5, 2018 at 6:59 PM Rob Herring <[email protected]> wrote:
> > > Convert Renesas SoC bindings to DT schema format using json-schema.
> > > --- /dev/null
> > > +++ b/Documentation/devicetree/bindings/arm/shmobile.yaml
> > > @@ -0,0 +1,205 @@
> > > + - description: Kingfisher (SBEV-RCAR-KF-M03)
> > > + items:
> > > + - const: shimafuji,kingfisher
> > > + - enum:
> > > + - renesas,h3ulcb
> > > + - renesas,m3ulcb
> > > + - enum:
> > > + - renesas,r8a7795
> > > + - renesas,r8a7796
> >
> > This looks a bit funny: all other entries have the "const" last, and
> > use it for the
> > SoC number. May be correct, though.
> > To clarify, this is an extension board that can fit both the [HM]3ULCB
> > boards (actually also the new M3NULCB, I think).
>
> This being Kingfisher?
Correct.
> I wrote this based on dts files in the tree. There's 2 combinations that I see:
>
> "shimafuji,kingfisher", "renesas,h3ulcb", "renesas,r8a7795"
> "shimafuji,kingfisher", "renesas,m3ulcb", "renesas,r8a7796"
>
> The schema allows 4 combinations (1 * 2 * 2). I have no idea if the
> other combinations are possible. If not, then we could rewrite this as
> 2 entries with 3 const values each.
I expect there will soon be a third one:
"shimafuji,kingfisher", "renesas,m3nulcb", "renesas,r8a77965"
Technically, {h3,m3,m3n}ulcb are the same board (although there may be
minor revision differences), with a different SiP mounted.
But they are called/marketed depending on which SiP is mounted.
And on top of that, you can plug in a Kingfisher daughterboard. Could be an
overlay ;-)
Gr{oetje,eeting}s,
Geert
--
Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- [email protected]
In personal conversations with technical people, I call myself a hacker. But
when I'm talking to journalists I just say "programmer" or something like that.
-- Linus Torvalds
On Mon, Oct 8, 2018 at 10:13 AM Geert Uytterhoeven <[email protected]> wrote:
>
> Hi Rob,
>
> On Mon, Oct 8, 2018 at 4:57 PM Rob Herring <[email protected]> wrote:
> > On Mon, Oct 8, 2018 at 2:47 AM Geert Uytterhoeven <[email protected]> wrote:
> > > On Fri, Oct 5, 2018 at 6:59 PM Rob Herring <[email protected]> wrote:
> > > > Convert Renesas SoC bindings to DT schema format using json-schema.
>
> > > > --- /dev/null
> > > > +++ b/Documentation/devicetree/bindings/arm/shmobile.yaml
> > > > @@ -0,0 +1,205 @@
>
> > > > + - description: Kingfisher (SBEV-RCAR-KF-M03)
> > > > + items:
> > > > + - const: shimafuji,kingfisher
> > > > + - enum:
> > > > + - renesas,h3ulcb
> > > > + - renesas,m3ulcb
> > > > + - enum:
> > > > + - renesas,r8a7795
> > > > + - renesas,r8a7796
> > >
> > > This looks a bit funny: all other entries have the "const" last, and
> > > use it for the
> > > SoC number. May be correct, though.
> > > To clarify, this is an extension board that can fit both the [HM]3ULCB
> > > boards (actually also the new M3NULCB, I think).
> >
> > This being Kingfisher?
>
> Correct.
>
> > I wrote this based on dts files in the tree. There's 2 combinations that I see:
> >
> > "shimafuji,kingfisher", "renesas,h3ulcb", "renesas,r8a7795"
> > "shimafuji,kingfisher", "renesas,m3ulcb", "renesas,r8a7796"
> >
> > The schema allows 4 combinations (1 * 2 * 2). I have no idea if the
> > other combinations are possible. If not, then we could rewrite this as
> > 2 entries with 3 const values each.
>
> I expect there will soon be a third one:
>
> "shimafuji,kingfisher", "renesas,m3nulcb", "renesas,r8a77965"
>
> Technically, {h3,m3,m3n}ulcb are the same board (although there may be
> minor revision differences), with a different SiP mounted.
> But they are called/marketed depending on which SiP is mounted.
>
> And on top of that, you can plug in a Kingfisher daughterboard. Could be an
> overlay ;-)
We probably shouldn't have put kingfisher as a top-level compatible
then. But we did, so not really much point to discuss that now.
As to whether there's a better way to express it in the schema, I'm
not sure. I don't think there's a way with json-schema to express a
list, but the 1st item is optional.
Rob
Hi Rob,
On Fri, Oct 05, 2018 at 11:58:25AM -0500, Rob Herring wrote:
> Convert ARM PMU binding to DT schema format using json-schema.
>
> Cc: Will Deacon <[email protected]>
> Cc: Mark Rutland <[email protected]>
> Cc: [email protected]
> Cc: [email protected]
> Signed-off-by: Rob Herring <[email protected]>
> ---
> Documentation/devicetree/bindings/arm/pmu.txt | 70 --------------
> .../devicetree/bindings/arm/pmu.yaml | 96 +++++++++++++++++++
> 2 files changed, 96 insertions(+), 70 deletions(-)
> delete mode 100644 Documentation/devicetree/bindings/arm/pmu.txt
> create mode 100644 Documentation/devicetree/bindings/arm/pmu.yaml
[...]
> -- interrupts : 1 combined interrupt or 1 per core. If the interrupt is a per-cpu
> - interrupt (PPI) then 1 interrupt should be specified.
[...]
> + interrupts:
> + oneOf:
> + - maxItems: 1
> + - minItems: 2
> + maxItems: 8
> + description: 1 interrupt per core.
> +
> + interrupts-extended:
> + $ref: '#/properties/interrupts'
This seems like a semantic different between the two representations, or am
I missing something here? Specifically, both the introduction of
interrupts-extended and also dropping any mention of using a single per-cpu
interrupt (the single combined case is no longer support by Linux; not sure
if you want to keep it in the binding).
Will
On Friday 05 October 2018 10:28 PM, Rob Herring wrote:
> Convert TI Davinci SoC bindings to DT schema format using json-schema.
>
> Cc: Sekhar Nori <[email protected]>
> Cc: Kevin Hilman <[email protected]>
> Cc: Mark Rutland <[email protected]>
> Cc: [email protected]
> Signed-off-by: Rob Herring <[email protected]>
> ---
> .../devicetree/bindings/arm/davinci.txt | 25 ------------------
> .../bindings/arm/ti/ti,davinci.yaml | 26 +++++++++++++++++++
> 2 files changed, 26 insertions(+), 25 deletions(-)
> delete mode 100644 Documentation/devicetree/bindings/arm/davinci.txt
> create mode 100644 Documentation/devicetree/bindings/arm/ti/ti,davinci.yaml
>
> diff --git a/Documentation/devicetree/bindings/arm/davinci.txt b/Documentation/devicetree/bindings/arm/davinci.txt
> deleted file mode 100644
> index 715622c36260..000000000000
> --- a/Documentation/devicetree/bindings/arm/davinci.txt
> +++ /dev/null
> @@ -1,25 +0,0 @@
> -Texas Instruments DaVinci Platforms Device Tree Bindings
> ---------------------------------------------------------
> -
> -DA850/OMAP-L138/AM18x Evaluation Module (EVM) board
> -Required root node properties:
> - - compatible = "ti,da850-evm", "ti,da850";
> -
> -DA850/OMAP-L138/AM18x L138/C6748 Development Kit (LCDK) board
> -Required root node properties:
> - - compatible = "ti,da850-lcdk", "ti,da850";
> -
> -EnBW AM1808 based CMC board
> -Required root node properties:
> - - compatible = "enbw,cmc", "ti,da850;
> -
> -LEGO MINDSTORMS EV3 (AM1808 based)
> -Required root node properties:
> - - compatible = "lego,ev3", "ti,da850";
> -
> -Generic DaVinci Boards
> -----------------------
> -
> -DA850/OMAP-L138/AM18x generic board
> -Required root node properties:
> - - compatible = "ti,da850";
> diff --git a/Documentation/devicetree/bindings/arm/ti/ti,davinci.yaml b/Documentation/devicetree/bindings/arm/ti/ti,davinci.yaml
> new file mode 100644
> index 000000000000..2675cae91a60
> --- /dev/null
> +++ b/Documentation/devicetree/bindings/arm/ti/ti,davinci.yaml
> @@ -0,0 +1,26 @@
> +# SPDX-License-Identifier: None
> +%YAML 1.2
> +---
> +$id: http://devicetree.org/schemas/bindings/arm/davinci.yaml#
> +$schema: http://devicetree.org/meta-schemas/core.yaml#
> +
> +title: Texas Instruments DaVinci Platforms Device Tree Bindings
> +
> +maintainers:
> + - Sekhar Nori <[email protected]>
> +description: |
> + DA850/OMAP-L138/AM18x based boards
> +
> +
> +properties:
> + $nodename:
> + const: '/'
> + compatible:
> + items:
> + - enum:
> + - ti,da850-evm
> + - ti,da850-lcdk
> + - enbw,cmc
> + - lego,ev3
The boards had some reasonable human readable description earlier, which
has been lost now. Is there a way to bring that back?
Apart from that, looks good to me.
Thanks,
Sekhar
> + - const: ti,da850
> +...
> --
> 2.17.1
>
On Tue, Oct 9, 2018 at 6:57 AM Will Deacon <[email protected]> wrote:
>
> Hi Rob,
>
> On Fri, Oct 05, 2018 at 11:58:25AM -0500, Rob Herring wrote:
> > Convert ARM PMU binding to DT schema format using json-schema.
> >
> > Cc: Will Deacon <[email protected]>
> > Cc: Mark Rutland <[email protected]>
> > Cc: [email protected]
> > Cc: [email protected]
> > Signed-off-by: Rob Herring <[email protected]>
> > ---
> > Documentation/devicetree/bindings/arm/pmu.txt | 70 --------------
> > .../devicetree/bindings/arm/pmu.yaml | 96 +++++++++++++++++++
> > 2 files changed, 96 insertions(+), 70 deletions(-)
> > delete mode 100644 Documentation/devicetree/bindings/arm/pmu.txt
> > create mode 100644 Documentation/devicetree/bindings/arm/pmu.yaml
>
> [...]
>
> > -- interrupts : 1 combined interrupt or 1 per core. If the interrupt is a per-cpu
> > - interrupt (PPI) then 1 interrupt should be specified.
>
> [...]
>
> > + interrupts:
> > + oneOf:
> > + - maxItems: 1
> > + - minItems: 2
> > + maxItems: 8
> > + description: 1 interrupt per core.
> > +
> > + interrupts-extended:
> > + $ref: '#/properties/interrupts'
>
> This seems like a semantic different between the two representations, or am
> I missing something here? Specifically, both the introduction of
> interrupts-extended and also dropping any mention of using a single per-cpu
> interrupt (the single combined case is no longer support by Linux; not sure
> if you want to keep it in the binding).
'interrupts-extended' was implied before as it is always supported and
outside the scope of the binding. But now it is needed to validate
bindings. There must be some use of it and that's why I added it.
However, thinking some more about this, I think it may be better to
have the tools add this in automatically whenever we have an
interrupts property.
I guess the single interrupt case is less obvious now with no
description (it's the first list item of 'oneOf'). The schema If the
single interrupt is not supported, then we can drop it here.
Rob
On Sat, 2018-10-06 at 12:40 +0200, Andreas F?rber wrote:
> > +++ b/Documentation/devicetree/bindings/arm/actions.yaml
[]
> > +
> > +title: Actions Semi platforms device tree bindings
> > +
> > +maintainers:
> > + - Andreas F?rber <[email protected]>
>
> Mani is now officially reviewer and the closest I have to a
> co-maintainer. I suggest we add him here in some form. I assume this is
> independent of MAINTAINERS patterns though, or will get_maintainers.pl
> parse this, too?
It _could_, if using the get_maintainers --file-emails option.
Ideally, it would be added to the MAINTAINERS somewhere.
Hi Rob
On 10/05/2018 06:58 PM, Rob Herring wrote:
> Convert ST STi SoC bindings to DT schema format using json-schema.
>
> Cc: Patrice Chotard <[email protected]>
> Cc: Mark Rutland <[email protected]>
> Cc: [email protected]
> Signed-off-by: Rob Herring <[email protected]>
> ---
> Documentation/devicetree/bindings/arm/sti.txt | 23 -------------------
> .../devicetree/bindings/arm/sti.yaml | 23 +++++++++++++++++++
> 2 files changed, 23 insertions(+), 23 deletions(-)
> delete mode 100644 Documentation/devicetree/bindings/arm/sti.txt
> create mode 100644 Documentation/devicetree/bindings/arm/sti.yaml
>
> diff --git a/Documentation/devicetree/bindings/arm/sti.txt b/Documentation/devicetree/bindings/arm/sti.txt
> deleted file mode 100644
> index 8d27f6b084c7..000000000000
> --- a/Documentation/devicetree/bindings/arm/sti.txt
> +++ /dev/null
> @@ -1,23 +0,0 @@
> -ST STi Platforms Device Tree Bindings
> ----------------------------------------
> -
> -Boards with the ST STiH415 SoC shall have the following properties:
> -Required root node property:
> -compatible = "st,stih415";
> -
> -Boards with the ST STiH416 SoC shall have the following properties:
> -Required root node property:
> -compatible = "st,stih416";
> -
> -Boards with the ST STiH407 SoC shall have the following properties:
> -Required root node property:
> -compatible = "st,stih407";
> -
> -Boards with the ST STiH410 SoC shall have the following properties:
> -Required root node property:
> -compatible = "st,stih410";
> -
> -Boards with the ST STiH418 SoC shall have the following properties:
> -Required root node property:
> -compatible = "st,stih418";
> -
> diff --git a/Documentation/devicetree/bindings/arm/sti.yaml b/Documentation/devicetree/bindings/arm/sti.yaml
> new file mode 100644
> index 000000000000..10814334cfc9
> --- /dev/null
> +++ b/Documentation/devicetree/bindings/arm/sti.yaml
> @@ -0,0 +1,23 @@
> +# SPDX-License-Identifier: None
> +%YAML 1.2
> +---
> +$id: http://devicetree.org/schemas/bindings/arm/sti.yaml#
> +$schema: http://devicetree.org/meta-schemas/core.yaml#
> +
> +title: ST STi Platforms Device Tree Bindings
> +
> +maintainers:
> + - Maxime Coquelin <[email protected]>
Maxime has left STMicroelectronics, you can replace its email by mine
Patrice Chotard <[email protected]>
Thanks
Patrice
> +
> +properties:
> + $nodename:
> + const: '/'
> + compatible:
> + items:
> + - enum:
> + - st,stih415
> + - st,stih416
> + - st,stih407
> + - st,stih410
> + - st,stih418
> +...
>
On Tue, Oct 09, 2018 at 01:14:02PM -0500, Rob Herring wrote:
> On Tue, Oct 9, 2018 at 6:57 AM Will Deacon <[email protected]> wrote:
> >
> > Hi Rob,
> >
> > On Fri, Oct 05, 2018 at 11:58:25AM -0500, Rob Herring wrote:
> > > Convert ARM PMU binding to DT schema format using json-schema.
> > >
> > > Cc: Will Deacon <[email protected]>
> > > Cc: Mark Rutland <[email protected]>
> > > Cc: [email protected]
> > > Cc: [email protected]
> > > Signed-off-by: Rob Herring <[email protected]>
> > > ---
> > > Documentation/devicetree/bindings/arm/pmu.txt | 70 --------------
> > > .../devicetree/bindings/arm/pmu.yaml | 96 +++++++++++++++++++
> > > 2 files changed, 96 insertions(+), 70 deletions(-)
> > > delete mode 100644 Documentation/devicetree/bindings/arm/pmu.txt
> > > create mode 100644 Documentation/devicetree/bindings/arm/pmu.yaml
> >
> > [...]
> >
> > > -- interrupts : 1 combined interrupt or 1 per core. If the interrupt is a per-cpu
> > > - interrupt (PPI) then 1 interrupt should be specified.
> >
> > [...]
> >
> > > + interrupts:
> > > + oneOf:
> > > + - maxItems: 1
> > > + - minItems: 2
> > > + maxItems: 8
> > > + description: 1 interrupt per core.
> > > +
> > > + interrupts-extended:
> > > + $ref: '#/properties/interrupts'
> >
> > This seems like a semantic different between the two representations, or am
> > I missing something here? Specifically, both the introduction of
> > interrupts-extended and also dropping any mention of using a single per-cpu
> > interrupt (the single combined case is no longer support by Linux; not sure
> > if you want to keep it in the binding).
>
> 'interrupts-extended' was implied before as it is always supported and
> outside the scope of the binding. But now it is needed to validate
> bindings. There must be some use of it and that's why I added it.
> However, thinking some more about this, I think it may be better to
> have the tools add this in automatically whenever we have an
> interrupts property.
To be honest, if you'd included that in the commit message I'd have been
happy :)
> I guess the single interrupt case is less obvious now with no
> description (it's the first list item of 'oneOf'). The schema If the
> single interrupt is not supported, then we can drop it here.
Well the description says "1 interrupt per core" which is incorrect. I also
don't understand why maxItems is 8.
Will
On Wed, Oct 10, 2018 at 11:50 AM Will Deacon <[email protected]> wrote:
>
> On Tue, Oct 09, 2018 at 01:14:02PM -0500, Rob Herring wrote:
> > On Tue, Oct 9, 2018 at 6:57 AM Will Deacon <[email protected]> wrote:
> > >
> > > Hi Rob,
> > >
> > > On Fri, Oct 05, 2018 at 11:58:25AM -0500, Rob Herring wrote:
> > > > Convert ARM PMU binding to DT schema format using json-schema.
> > > >
> > > > Cc: Will Deacon <[email protected]>
> > > > Cc: Mark Rutland <[email protected]>
> > > > Cc: [email protected]
> > > > Cc: [email protected]
> > > > Signed-off-by: Rob Herring <[email protected]>
> > > > ---
> > > > Documentation/devicetree/bindings/arm/pmu.txt | 70 --------------
> > > > .../devicetree/bindings/arm/pmu.yaml | 96 +++++++++++++++++++
> > > > 2 files changed, 96 insertions(+), 70 deletions(-)
> > > > delete mode 100644 Documentation/devicetree/bindings/arm/pmu.txt
> > > > create mode 100644 Documentation/devicetree/bindings/arm/pmu.yaml
> > >
> > > [...]
> > >
> > > > -- interrupts : 1 combined interrupt or 1 per core. If the interrupt is a per-cpu
> > > > - interrupt (PPI) then 1 interrupt should be specified.
> > >
> > > [...]
> > >
> > > > + interrupts:
> > > > + oneOf:
> > > > + - maxItems: 1
> > > > + - minItems: 2
> > > > + maxItems: 8
> > > > + description: 1 interrupt per core.
> > > > +
> > > > + interrupts-extended:
> > > > + $ref: '#/properties/interrupts'
> > >
> > > This seems like a semantic different between the two representations, or am
> > > I missing something here? Specifically, both the introduction of
> > > interrupts-extended and also dropping any mention of using a single per-cpu
> > > interrupt (the single combined case is no longer support by Linux; not sure
> > > if you want to keep it in the binding).
> >
> > 'interrupts-extended' was implied before as it is always supported and
> > outside the scope of the binding. But now it is needed to validate
> > bindings. There must be some use of it and that's why I added it.
> > However, thinking some more about this, I think it may be better to
> > have the tools add this in automatically whenever we have an
> > interrupts property.
>
> To be honest, if you'd included that in the commit message I'd have been
> happy :)
>
> > I guess the single interrupt case is less obvious now with no
> > description (it's the first list item of 'oneOf'). The schema If the
> > single interrupt is not supported, then we can drop it here.
>
> Well the description says "1 interrupt per core" which is incorrect.
You are reading the schema wrong. There are 2 cases supported as
defined by each '-'. The 2nd case is all the keywords until the
indentation decreases. So 'description' is just description of the 2nd
case. The first case is just "maxItems: 1". I probably didn't put a
description because why write in free form text what the schema says
(other than of course no one knows json-schema...).
YAML combines the best of Makefiles and python. You can't have tabs
and Indentation is significant. :)
> I also
> don't understand why maxItems is 8.
Humm, I probably just made that up based on GICv2 limitations. What
should it be? If there's not any inherit maximum, can we put something
reasonable? There's not really any way to express that it should match
the number of cores in the system.
Rob
On Mon, Oct 08, 2018 at 09:05:58AM -0500, Rob Herring wrote:
> On Mon, Oct 8, 2018 at 3:02 AM Simon Horman <[email protected]> wrote:
> >
> > On Fri, Oct 05, 2018 at 11:58:41AM -0500, Rob Herring wrote:
> > > Convert Renesas SoC bindings to DT schema format using json-schema.
> > >
> > > Cc: Simon Horman <[email protected]>
> > > Cc: Magnus Damm <[email protected]>
> > > Cc: Mark Rutland <[email protected]>
> > > Cc: [email protected]
> > > Cc: [email protected]
> > > Signed-off-by: Rob Herring <[email protected]>
> >
> > This seems fine to me other than that it does not seem
> > to apply cleanly to next.
> >
> > shmobile.txt sees a couple of updates per release cycle so from my point of
> > view it would ideal if this change could hit -rc1 to allow patches for
> > v4.21 to be accepted smoothly (already one from Sergei will need rebasing).
>
> When we get to the point of merging (which isn't going to be 4.20),
> you and other maintainers can probably take all these patches. Other
> than the few restructuring patches, the only dependency is the build
> support which isn't a dependency to apply it, but build it. I plan to
> build any patches as part of reviewing at least early on. OTOH, the
> build support is small enough and self contained that maybe it can
> just be applied for 4.20.
Thanks, understood.
My preference would be to, as you suggest, take changes like
this through the renesas tree.
On Mon, Oct 08, 2018 at 09:59:19AM -0500, Rob Herring wrote:
> On Mon, Oct 8, 2018 at 2:05 AM Geert Uytterhoeven <[email protected]> wrote:
> >
> > Hi Rob,
> >
> > On Fri, Oct 5, 2018 at 6:58 PM Rob Herring <[email protected]> wrote:
> > > In preparation to convert board-level bindings to json-schema, move
> > > various misc SoC bindings out to their own file.
> > >
> > > Cc: Mark Rutland <[email protected]>
> > > Cc: Simon Horman <[email protected]>
> > > Cc: Magnus Damm <[email protected]>
> > > Cc: [email protected]
> > > Cc: [email protected]
> > > Signed-off-by: Rob Herring <[email protected]>
> >
> > Looks good to me, but needs a rebase, as the PRR section has been extended
> > in -next.
>
> Is this something you all can apply still for 4.20?
Sorry, missing this until now. It was too late.
Shall I take it for v4.21?
Hi Rob,
On Wed, Oct 10, 2018 at 01:51:24PM -0500, Rob Herring wrote:
> On Wed, Oct 10, 2018 at 11:50 AM Will Deacon <[email protected]> wrote:
> > On Tue, Oct 09, 2018 at 01:14:02PM -0500, Rob Herring wrote:
> > > I guess the single interrupt case is less obvious now with no
> > > description (it's the first list item of 'oneOf'). The schema If the
> > > single interrupt is not supported, then we can drop it here.
> >
> > Well the description says "1 interrupt per core" which is incorrect.
>
> You are reading the schema wrong. There are 2 cases supported as
> defined by each '-'. The 2nd case is all the keywords until the
> indentation decreases. So 'description' is just description of the 2nd
> case. The first case is just "maxItems: 1". I probably didn't put a
> description because why write in free form text what the schema says
> (other than of course no one knows json-schema...).
Apologies, I've not read one of these things before and looks like I
completely misread it.
> YAML combines the best of Makefiles and python. You can't have tabs
> and Indentation is significant. :)
Oh wow, I'm in way over my head here!
> > I also
> > don't understand why maxItems is 8.
>
> Humm, I probably just made that up based on GICv2 limitations. What
> should it be? If there's not any inherit maximum, can we put something
> reasonable? There's not really any way to express that it should match
> the number of cores in the system.
What's the largest number you can think of?
Will
On Tue, Oct 9, 2018 at 6:57 AM Will Deacon <[email protected]> wrote:
>
> Hi Rob,
>
> On Fri, Oct 05, 2018 at 11:58:25AM -0500, Rob Herring wrote:
> > Convert ARM PMU binding to DT schema format using json-schema.
> >
> > Cc: Will Deacon <[email protected]>
> > Cc: Mark Rutland <[email protected]>
> > Cc: [email protected]
> > Cc: [email protected]
> > Signed-off-by: Rob Herring <[email protected]>
> > ---
> > Documentation/devicetree/bindings/arm/pmu.txt | 70 --------------
> > .../devicetree/bindings/arm/pmu.yaml | 96 +++++++++++++++++++
> > 2 files changed, 96 insertions(+), 70 deletions(-)
> > delete mode 100644 Documentation/devicetree/bindings/arm/pmu.txt
> > create mode 100644 Documentation/devicetree/bindings/arm/pmu.yaml
>
> [...]
>
> > -- interrupts : 1 combined interrupt or 1 per core. If the interrupt is a per-cpu
> > - interrupt (PPI) then 1 interrupt should be specified.
>
> [...]
>
> > + interrupts:
> > + oneOf:
> > + - maxItems: 1
> > + - minItems: 2
> > + maxItems: 8
> > + description: 1 interrupt per core.
> > +
> > + interrupts-extended:
> > + $ref: '#/properties/interrupts'
>
> This seems like a semantic different between the two representations, or am
> I missing something here? Specifically, both the introduction of
> interrupts-extended and also dropping any mention of using a single per-cpu
> interrupt (the single combined case is no longer support by Linux; not sure
> if you want to keep it in the binding).
In regards to no support for the single combined interrupt, it looks
like Marvell Armada SoCs at least (armada-375 is what I'm looking at)
have only a single interrupt. Though the interrupt gets routed to MPIC
which then has a GIC PPI. So it isn't supported or happens to work
still since it is a PPI?
Rob
Hi Rob,
On 05. 10. 18 18:58, Rob Herring wrote:
> Convert ARM CPU binding to DT schema format using json-schema.
>
> Cc: Mark Rutland <[email protected]>
> Cc: Matthias Brugger <[email protected]>
> Cc: [email protected]
> Cc: [email protected]
> Cc: [email protected]
> Signed-off-by: Rob Herring <[email protected]>
> ---
> .../devicetree/bindings/arm/cpus.txt | 490 -----------------
> .../devicetree/bindings/arm/cpus.yaml | 503 ++++++++++++++++++
> 2 files changed, 503 insertions(+), 490 deletions(-)
> delete mode 100644 Documentation/devicetree/bindings/arm/cpus.txt
> create mode 100644 Documentation/devicetree/bindings/arm/cpus.yaml
>
> diff --git a/Documentation/devicetree/bindings/arm/cpus.txt b/Documentation/devicetree/bindings/arm/cpus.txt
> deleted file mode 100644
> index b0198a1cf403..000000000000
> --- a/Documentation/devicetree/bindings/arm/cpus.txt
> +++ /dev/null
> @@ -1,490 +0,0 @@
> -=================
> -ARM CPUs bindings
> -=================
> -
> -The device tree allows to describe the layout of CPUs in a system through
> -the "cpus" node, which in turn contains a number of subnodes (ie "cpu")
> -defining properties for every cpu.
> -
> -Bindings for CPU nodes follow the Devicetree Specification, available from:
> -
> -https://www.devicetree.org/specifications/
> -
> -with updates for 32-bit and 64-bit ARM systems provided in this document.
> -
> -================================
> -Convention used in this document
> -================================
> -
> -This document follows the conventions described in the Devicetree
> -Specification, with the addition:
> -
> -- square brackets define bitfields, eg reg[7:0] value of the bitfield in
> - the reg property contained in bits 7 down to 0
> -
> -=====================================
> -cpus and cpu node bindings definition
> -=====================================
> -
> -The ARM architecture, in accordance with the Devicetree Specification,
> -requires the cpus and cpu nodes to be present and contain the properties
> -described below.
> -
> -- cpus node
> -
> - Description: Container of cpu nodes
> -
> - The node name must be "cpus".
> -
> - A cpus node must define the following properties:
> -
> - - #address-cells
> - Usage: required
> - Value type: <u32>
> -
> - Definition depends on ARM architecture version and
> - configuration:
> -
> - # On uniprocessor ARM architectures previous to v7
> - value must be 1, to enable a simple enumeration
> - scheme for processors that do not have a HW CPU
> - identification register.
> - # On 32-bit ARM 11 MPcore, ARM v7 or later systems
> - value must be 1, that corresponds to CPUID/MPIDR
> - registers sizes.
> - # On ARM v8 64-bit systems value should be set to 2,
> - that corresponds to the MPIDR_EL1 register size.
> - If MPIDR_EL1[63:32] value is equal to 0 on all CPUs
> - in the system, #address-cells can be set to 1, since
> - MPIDR_EL1[63:32] bits are not used for CPUs
> - identification.
> - - #size-cells
> - Usage: required
> - Value type: <u32>
> - Definition: must be set to 0
> -
> -- cpu node
> -
> - Description: Describes a CPU in an ARM based system
> -
> - PROPERTIES
> -
> - - device_type
> - Usage: required
> - Value type: <string>
> - Definition: must be "cpu"
> - - reg
> - Usage and definition depend on ARM architecture version and
> - configuration:
> -
> - # On uniprocessor ARM architectures previous to v7
> - this property is required and must be set to 0.
> -
> - # On ARM 11 MPcore based systems this property is
> - required and matches the CPUID[11:0] register bits.
> -
> - Bits [11:0] in the reg cell must be set to
> - bits [11:0] in CPU ID register.
> -
> - All other bits in the reg cell must be set to 0.
> -
> - # On 32-bit ARM v7 or later systems this property is
> - required and matches the CPU MPIDR[23:0] register
> - bits.
> -
> - Bits [23:0] in the reg cell must be set to
> - bits [23:0] in MPIDR.
> -
> - All other bits in the reg cell must be set to 0.
> -
> - # On ARM v8 64-bit systems this property is required
> - and matches the MPIDR_EL1 register affinity bits.
> -
> - * If cpus node's #address-cells property is set to 2
> -
> - The first reg cell bits [7:0] must be set to
> - bits [39:32] of MPIDR_EL1.
> -
> - The second reg cell bits [23:0] must be set to
> - bits [23:0] of MPIDR_EL1.
> -
> - * If cpus node's #address-cells property is set to 1
> -
> - The reg cell bits [23:0] must be set to bits [23:0]
> - of MPIDR_EL1.
> -
> - All other bits in the reg cells must be set to 0.
> -
> - - compatible:
> - Usage: required
> - Value type: <string>
> - Definition: should be one of:
> - "arm,arm710t"
> - "arm,arm720t"
> - "arm,arm740t"
> - "arm,arm7ej-s"
> - "arm,arm7tdmi"
> - "arm,arm7tdmi-s"
> - "arm,arm9es"
> - "arm,arm9ej-s"
> - "arm,arm920t"
> - "arm,arm922t"
> - "arm,arm925"
> - "arm,arm926e-s"
> - "arm,arm926ej-s"
> - "arm,arm940t"
> - "arm,arm946e-s"
> - "arm,arm966e-s"
> - "arm,arm968e-s"
> - "arm,arm9tdmi"
> - "arm,arm1020e"
> - "arm,arm1020t"
> - "arm,arm1022e"
> - "arm,arm1026ej-s"
> - "arm,arm1136j-s"
> - "arm,arm1136jf-s"
> - "arm,arm1156t2-s"
> - "arm,arm1156t2f-s"
> - "arm,arm1176jzf"
> - "arm,arm1176jz-s"
> - "arm,arm1176jzf-s"
> - "arm,arm11mpcore"
> - "arm,cortex-a5"
> - "arm,cortex-a7"
> - "arm,cortex-a8"
> - "arm,cortex-a9"
> - "arm,cortex-a12"
> - "arm,cortex-a15"
> - "arm,cortex-a17"
> - "arm,cortex-a53"
> - "arm,cortex-a57"
> - "arm,cortex-a72"
> - "arm,cortex-a73"
> - "arm,cortex-m0"
> - "arm,cortex-m0+"
> - "arm,cortex-m1"
> - "arm,cortex-m3"
> - "arm,cortex-m4"
> - "arm,cortex-r4"
> - "arm,cortex-r5"
> - "arm,cortex-r7"
> - "brcm,brahma-b15"
> - "brcm,brahma-b53"
> - "brcm,vulcan"
> - "cavium,thunder"
> - "cavium,thunder2"
> - "faraday,fa526"
> - "intel,sa110"
> - "intel,sa1100"
> - "marvell,feroceon"
> - "marvell,mohawk"
> - "marvell,pj4a"
> - "marvell,pj4b"
> - "marvell,sheeva-v5"
> - "nvidia,tegra132-denver"
> - "nvidia,tegra186-denver"
> - "nvidia,tegra194-carmel"
> - "qcom,krait"
> - "qcom,kryo"
> - "qcom,kryo385"
> - "qcom,scorpion"
> - - enable-method
> - Value type: <stringlist>
> - Usage and definition depend on ARM architecture version.
> - # On ARM v8 64-bit this property is required and must
> - be one of:
> - "psci"
> - "spin-table"
> - # On ARM 32-bit systems this property is optional and
> - can be one of:
> - "actions,s500-smp"
> - "allwinner,sun6i-a31"
> - "allwinner,sun8i-a23"
> - "allwinner,sun9i-a80-smp"
> - "amlogic,meson8-smp"
> - "amlogic,meson8b-smp"
> - "arm,realview-smp"
> - "brcm,bcm11351-cpu-method"
> - "brcm,bcm23550"
> - "brcm,bcm2836-smp"
> - "brcm,bcm-nsp-smp"
> - "brcm,brahma-b15"
> - "marvell,armada-375-smp"
> - "marvell,armada-380-smp"
> - "marvell,armada-390-smp"
> - "marvell,armada-xp-smp"
> - "marvell,98dx3236-smp"
> - "mediatek,mt6589-smp"
> - "mediatek,mt81xx-tz-smp"
> - "qcom,gcc-msm8660"
> - "qcom,kpss-acc-v1"
> - "qcom,kpss-acc-v2"
> - "renesas,apmu"
> - "renesas,r9a06g032-smp"
> - "rockchip,rk3036-smp"
> - "rockchip,rk3066-smp"
> - "ste,dbx500-smp"
> -
> - - cpu-release-addr
> - Usage: required for systems that have an "enable-method"
> - property value of "spin-table".
> - Value type: <prop-encoded-array>
> - Definition:
> - # On ARM v8 64-bit systems must be a two cell
> - property identifying a 64-bit zero-initialised
> - memory location.
> -
> - - qcom,saw
> - Usage: required for systems that have an "enable-method"
> - property value of "qcom,kpss-acc-v1" or
> - "qcom,kpss-acc-v2"
> - Value type: <phandle>
> - Definition: Specifies the SAW[1] node associated with this CPU.
> -
> - - qcom,acc
> - Usage: required for systems that have an "enable-method"
> - property value of "qcom,kpss-acc-v1" or
> - "qcom,kpss-acc-v2"
> - Value type: <phandle>
> - Definition: Specifies the ACC[2] node associated with this CPU.
> -
> - - cpu-idle-states
> - Usage: Optional
> - Value type: <prop-encoded-array>
> - Definition:
> - # List of phandles to idle state nodes supported
> - by this cpu [3].
> -
> - - capacity-dmips-mhz
> - Usage: Optional
> - Value type: <u32>
> - Definition:
> - # u32 value representing CPU capacity [4] in
> - DMIPS/MHz, relative to highest capacity-dmips-mhz
> - in the system.
> -
> - - rockchip,pmu
> - Usage: optional for systems that have an "enable-method"
> - property value of "rockchip,rk3066-smp"
> - While optional, it is the preferred way to get access to
> - the cpu-core power-domains.
> - Value type: <phandle>
> - Definition: Specifies the syscon node controlling the cpu core
> - power domains.
> -
> - - dynamic-power-coefficient
> - Usage: optional
> - Value type: <prop-encoded-array>
> - Definition: A u32 value that represents the running time dynamic
> - power coefficient in units of uW/MHz/V^2. The
> - coefficient can either be calculated from power
> - measurements or derived by analysis.
> -
> - The dynamic power consumption of the CPU is
> - proportional to the square of the Voltage (V) and
> - the clock frequency (f). The coefficient is used to
> - calculate the dynamic power as below -
> -
> - Pdyn = dynamic-power-coefficient * V^2 * f
> -
> - where voltage is in V, frequency is in MHz.
> -
> -Example 1 (dual-cluster big.LITTLE system 32-bit):
> -
> - cpus {
> - #size-cells = <0>;
> - #address-cells = <1>;
> -
> - cpu@0 {
> - device_type = "cpu";
> - compatible = "arm,cortex-a15";
> - reg = <0x0>;
> - };
> -
> - cpu@1 {
> - device_type = "cpu";
> - compatible = "arm,cortex-a15";
> - reg = <0x1>;
> - };
> -
> - cpu@100 {
> - device_type = "cpu";
> - compatible = "arm,cortex-a7";
> - reg = <0x100>;
> - };
> -
> - cpu@101 {
> - device_type = "cpu";
> - compatible = "arm,cortex-a7";
> - reg = <0x101>;
> - };
> - };
> -
> -Example 2 (Cortex-A8 uniprocessor 32-bit system):
> -
> - cpus {
> - #size-cells = <0>;
> - #address-cells = <1>;
> -
> - cpu@0 {
> - device_type = "cpu";
> - compatible = "arm,cortex-a8";
> - reg = <0x0>;
> - };
> - };
> -
> -Example 3 (ARM 926EJ-S uniprocessor 32-bit system):
> -
> - cpus {
> - #size-cells = <0>;
> - #address-cells = <1>;
> -
> - cpu@0 {
> - device_type = "cpu";
> - compatible = "arm,arm926ej-s";
> - reg = <0x0>;
> - };
> - };
> -
> -Example 4 (ARM Cortex-A57 64-bit system):
> -
> -cpus {
> - #size-cells = <0>;
> - #address-cells = <2>;
> -
> - cpu@0 {
> - device_type = "cpu";
> - compatible = "arm,cortex-a57";
> - reg = <0x0 0x0>;
> - enable-method = "spin-table";
> - cpu-release-addr = <0 0x20000000>;
> - };
> -
> - cpu@1 {
> - device_type = "cpu";
> - compatible = "arm,cortex-a57";
> - reg = <0x0 0x1>;
> - enable-method = "spin-table";
> - cpu-release-addr = <0 0x20000000>;
> - };
> -
> - cpu@100 {
> - device_type = "cpu";
> - compatible = "arm,cortex-a57";
> - reg = <0x0 0x100>;
> - enable-method = "spin-table";
> - cpu-release-addr = <0 0x20000000>;
> - };
> -
> - cpu@101 {
> - device_type = "cpu";
> - compatible = "arm,cortex-a57";
> - reg = <0x0 0x101>;
> - enable-method = "spin-table";
> - cpu-release-addr = <0 0x20000000>;
> - };
> -
> - cpu@10000 {
> - device_type = "cpu";
> - compatible = "arm,cortex-a57";
> - reg = <0x0 0x10000>;
> - enable-method = "spin-table";
> - cpu-release-addr = <0 0x20000000>;
> - };
> -
> - cpu@10001 {
> - device_type = "cpu";
> - compatible = "arm,cortex-a57";
> - reg = <0x0 0x10001>;
> - enable-method = "spin-table";
> - cpu-release-addr = <0 0x20000000>;
> - };
> -
> - cpu@10100 {
> - device_type = "cpu";
> - compatible = "arm,cortex-a57";
> - reg = <0x0 0x10100>;
> - enable-method = "spin-table";
> - cpu-release-addr = <0 0x20000000>;
> - };
> -
> - cpu@10101 {
> - device_type = "cpu";
> - compatible = "arm,cortex-a57";
> - reg = <0x0 0x10101>;
> - enable-method = "spin-table";
> - cpu-release-addr = <0 0x20000000>;
> - };
> -
> - cpu@100000000 {
> - device_type = "cpu";
> - compatible = "arm,cortex-a57";
> - reg = <0x1 0x0>;
> - enable-method = "spin-table";
> - cpu-release-addr = <0 0x20000000>;
> - };
> -
> - cpu@100000001 {
> - device_type = "cpu";
> - compatible = "arm,cortex-a57";
> - reg = <0x1 0x1>;
> - enable-method = "spin-table";
> - cpu-release-addr = <0 0x20000000>;
> - };
> -
> - cpu@100000100 {
> - device_type = "cpu";
> - compatible = "arm,cortex-a57";
> - reg = <0x1 0x100>;
> - enable-method = "spin-table";
> - cpu-release-addr = <0 0x20000000>;
> - };
> -
> - cpu@100000101 {
> - device_type = "cpu";
> - compatible = "arm,cortex-a57";
> - reg = <0x1 0x101>;
> - enable-method = "spin-table";
> - cpu-release-addr = <0 0x20000000>;
> - };
> -
> - cpu@100010000 {
> - device_type = "cpu";
> - compatible = "arm,cortex-a57";
> - reg = <0x1 0x10000>;
> - enable-method = "spin-table";
> - cpu-release-addr = <0 0x20000000>;
> - };
> -
> - cpu@100010001 {
> - device_type = "cpu";
> - compatible = "arm,cortex-a57";
> - reg = <0x1 0x10001>;
> - enable-method = "spin-table";
> - cpu-release-addr = <0 0x20000000>;
> - };
> -
> - cpu@100010100 {
> - device_type = "cpu";
> - compatible = "arm,cortex-a57";
> - reg = <0x1 0x10100>;
> - enable-method = "spin-table";
> - cpu-release-addr = <0 0x20000000>;
> - };
> -
> - cpu@100010101 {
> - device_type = "cpu";
> - compatible = "arm,cortex-a57";
> - reg = <0x1 0x10101>;
> - enable-method = "spin-table";
> - cpu-release-addr = <0 0x20000000>;
> - };
> -};
> -
> ---
> -[1] arm/msm/qcom,saw2.txt
> -[2] arm/msm/qcom,kpss-acc.txt
> -[3] ARM Linux kernel documentation - idle states bindings
> - Documentation/devicetree/bindings/arm/idle-states.txt
> -[4] ARM Linux kernel documentation - cpu capacity bindings
> - Documentation/devicetree/bindings/arm/cpu-capacity.txt
> diff --git a/Documentation/devicetree/bindings/arm/cpus.yaml b/Documentation/devicetree/bindings/arm/cpus.yaml
> new file mode 100644
> index 000000000000..bb75914324a3
> --- /dev/null
> +++ b/Documentation/devicetree/bindings/arm/cpus.yaml
> @@ -0,0 +1,503 @@
> +# SPDX-License-Identifier: None
> +%YAML 1.2
> +---
> +$id: http://devicetree.org/schemas/bindings/arm/cpus.yaml#
> +$schema: http://devicetree.org/meta-schemas/core.yaml#
> +
> +title: ARM CPUs bindings
> +
> +maintainers:
> + - Lorenzo Pieralisi <[email protected]>
> +
> +description: |+
> + The device tree allows to describe the layout of CPUs in a system through
> + the "cpus" node, which in turn contains a number of subnodes (ie "cpu")
> + defining properties for every cpu.
> +
> + Bindings for CPU nodes follow the Devicetree Specification, available from:
> +
> + https://www.devicetree.org/specifications/
> +
> + with updates for 32-bit and 64-bit ARM systems provided in this document.
> +
> + ================================
> + Convention used in this document
> + ================================
> +
> + This document follows the conventions described in the Devicetree
> + Specification, with the addition:
> +
> + - square brackets define bitfields, eg reg[7:0] value of the bitfield in
> + the reg property contained in bits 7 down to 0
> +
> + =====================================
> + cpus and cpu node bindings definition
> + =====================================
> +
> + The ARM architecture, in accordance with the Devicetree Specification,
> + requires the cpus and cpu nodes to be present and contain the properties
> + described below.
> +
> +properties:
> + $nodename:
> + const: cpus
> + description: Container of cpu nodes
> +
> + '#address-cells':
> + enum: [1, 2]
> + description: |
> + Definition depends on ARM architecture version and configuration:
> +
> + On uniprocessor ARM architectures previous to v7
> + value must be 1, to enable a simple enumeration
> + scheme for processors that do not have a HW CPU
> + identification register.
> + On 32-bit ARM 11 MPcore, ARM v7 or later systems
> + value must be 1, that corresponds to CPUID/MPIDR
> + registers sizes.
> + On ARM v8 64-bit systems value should be set to 2,
> + that corresponds to the MPIDR_EL1 register size.
> + If MPIDR_EL1[63:32] value is equal to 0 on all CPUs
> + in the system, #address-cells can be set to 1, since
> + MPIDR_EL1[63:32] bits are not used for CPUs
> + identification.
> +
> + '#size-cells':
> + const: 0
> +
> +patternProperties:
> + '^cpu@[0-9a-f]+$':
> + properties:
> + device_type:
> + const: cpu
> +
> + reg:
> + maxItems: 1
> + description: |
> + Usage and definition depend on ARM architecture version and
> + configuration:
> +
> + On uniprocessor ARM architectures previous to v7
> + this property is required and must be set to 0.
> +
> + On ARM 11 MPcore based systems this property is
> + required and matches the CPUID[11:0] register bits.
> +
> + Bits [11:0] in the reg cell must be set to
> + bits [11:0] in CPU ID register.
> +
> + All other bits in the reg cell must be set to 0.
> +
> + On 32-bit ARM v7 or later systems this property is
> + required and matches the CPU MPIDR[23:0] register
> + bits.
> +
> + Bits [23:0] in the reg cell must be set to
> + bits [23:0] in MPIDR.
> +
> + All other bits in the reg cell must be set to 0.
> +
> + On ARM v8 64-bit systems this property is required
> + and matches the MPIDR_EL1 register affinity bits.
> +
> + * If cpus node's #address-cells property is set to 2
> +
> + The first reg cell bits [7:0] must be set to
> + bits [39:32] of MPIDR_EL1.
> +
> + The second reg cell bits [23:0] must be set to
> + bits [23:0] of MPIDR_EL1.
> +
> + * If cpus node's #address-cells property is set to 1
> +
> + The reg cell bits [23:0] must be set to bits [23:0]
> + of MPIDR_EL1.
> +
> + All other bits in the reg cells must be set to 0.
> +
> + compatible:
> + items:
> + - enum:
> + - arm,arm710t
> + - arm,arm720t
> + - arm,arm740t
> + - arm,arm7ej-s
> + - arm,arm7tdmi
> + - arm,arm7tdmi-s
> + - arm,arm9es
> + - arm,arm9ej-s
> + - arm,arm920t
> + - arm,arm922t
> + - arm,arm925
> + - arm,arm926e-s
> + - arm,arm926ej-s
> + - arm,arm940t
> + - arm,arm946e-s
> + - arm,arm966e-s
> + - arm,arm968e-s
> + - arm,arm9tdmi
> + - arm,arm1020e
> + - arm,arm1020t
> + - arm,arm1022e
> + - arm,arm1026ej-s
> + - arm,arm1136j-s
> + - arm,arm1136jf-s
> + - arm,arm1156t2-s
> + - arm,arm1156t2f-s
> + - arm,arm1176jzf
> + - arm,arm1176jz-s
> + - arm,arm1176jzf-s
> + - arm,arm11mpcore
> + - arm,cortex-a5
> + - arm,cortex-a7
> + - arm,cortex-a8
> + - arm,cortex-a9
> + - arm,cortex-a12
> + - arm,cortex-a15
> + - arm,cortex-a17
> + - arm,cortex-a53
> + - arm,cortex-a57
> + - arm,cortex-a72
> + - arm,cortex-a73
> + - arm,cortex-m0
> + - arm,cortex-m0+
> + - arm,cortex-m1
> + - arm,cortex-m3
> + - arm,cortex-m4
> + - arm,cortex-r4
> + - arm,cortex-r5
> + - arm,cortex-r7
> + - brcm,brahma-b15
> + - brcm,brahma-b53
> + - brcm,vulcan
> + - cavium,thunder
> + - cavium,thunder2
> + - faraday,fa526
> + - intel,sa110
> + - intel,sa1100
> + - marvell,feroceon
> + - marvell,mohawk
> + - marvell,pj4a
> + - marvell,pj4b
> + - marvell,sheeva-v5
> + - nvidia,tegra132-denver
> + - nvidia,tegra186-denver
> + - nvidia,tegra194-carmel
> + - qcom,krait
> + - qcom,kryo
> + - qcom,kryo385
> + - qcom,scorpion
> +
> + enable-method:
> + allOf:
> + - $ref: '/schemas/types.yaml#/definitions/string'
> + - oneOf:
> + # On ARM v8 64-bit this property is required
> + - enum:
> + - psci
> + - spin-table
> + # On ARM 32-bit systems this property is optional
> + - enum:
> + - actions,s500-smp
> + - allwinner,sun6i-a31
> + - allwinner,sun8i-a23
> + - allwinner,sun9i-a80-smp
> + - allwinner,sun8i-a83t-smp
> + - amlogic,meson8-smp
> + - amlogic,meson8b-smp
> + - arm,realview-smp
> + - brcm,bcm11351-cpu-method
> + - brcm,bcm23550
> + - brcm,bcm2836-smp
> + - brcm,bcm63138
> + - brcm,bcm-nsp-smp
> + - brcm,brahma-b15
> + - marvell,armada-375-smp
> + - marvell,armada-380-smp
> + - marvell,armada-390-smp
> + - marvell,armada-xp-smp
> + - marvell,98dx3236-smp
> + - mediatek,mt6589-smp
> + - mediatek,mt81xx-tz-smp
> + - qcom,gcc-msm8660
> + - qcom,kpss-acc-v1
> + - qcom,kpss-acc-v2
> + - renesas,apmu
> + - renesas,r9a06g032-smp
> + - rockchip,rk3036-smp
> + - rockchip,rk3066-smp
> + - ste,dbx500-smp
> +
> + cpu-release-addr:
> + $ref: '/schemas/types.yaml#/definitions/uint64'
> +
> + description:
> + Required for systems that have an "enable-method"
> + property value of "spin-table".
> + On ARM v8 64-bit systems must be a two cell
> + property identifying a 64-bit zero-initialised
> + memory location.
> +
> + qcom,saw:
> + $ref: '/schemas/types.yaml#/definitions/phandle'
> + description: |
> + Usage: required for systems that have an "enable-method"
> + property value of "qcom,kpss-acc-v1" or
> + "qcom,kpss-acc-v2"
> + Definition: Specifies the SAW[1] node associated with this CPU.
> +
> + qcom,acc:
> + $ref: '/schemas/types.yaml#/definitions/phandle'
> + description: |
> + Usage: required for systems that have an "enable-method"
> + property value of "qcom,kpss-acc-v1" or
> + "qcom,kpss-acc-v2"
> + Definition: Specifies the ACC[2] node associated with this CPU.
> +
> + cpu-idle-states:
> + $ref: '/schemas/types.yaml#/definitions/phandle-array'
> + description: |
> + Usage: Optional
> + Value type: <prop-encoded-array>
> + description: List of phandles to idle state nodes supported
> + by this cpu [3].
> +
> + capacity-dmips-mhz:
> + $ref: '/schemas/types.yaml#/definitions/uint32'
> + description:
> + u32 value representing CPU capacity [4] in
> + DMIPS/MHz, relative to highest capacity-dmips-mhz
> + in the system.
> +
> + rockchip,pmu:
> + description: |
> + Optional for systems that have an "enable-method"
> + property value of "rockchip,rk3066-smp"
> + While optional, it is the preferred way to get access to
> + the cpu-core power-domains.
> + Value type: <phandle>
> + Definition: Specifies the syscon node controlling the cpu core
> + power domains.
> +
> + dynamic-power-coefficient:
> + $ref: '/schemas/types.yaml#/definitions/uint32'
> + description:
> + A u32 value that represents the running time dynamic
> + power coefficient in units of uW/MHz/V^2. The
> + coefficient can either be calculated from power
> + measurements or derived by analysis.
> +
> + The dynamic power consumption of the CPU is
> + proportional to the square of the Voltage (V) and
> + the clock frequency (f). The coefficient is used to
> + calculate the dynamic power as below -
> +
> + Pdyn = dynamic-power-coefficient * V^2 * f
> +
> + where voltage is in V, frequency is in MHz.
> +
> + required:
> + - device_type
> + - reg
> + - compatible
> +
> + dependencies:
> + cpu-release-addr: [enable-method]
> + rockchip,pmu: [enable-method]
> +
> +required:
> + - '#address-cells'
> + - '#size-cells'
> +
> +examples:
> + - |
> + cpus {
> + #size-cells = <0>;
> + #address-cells = <1>;
> +
> + cpu@0 {
> + device_type = "cpu";
> + compatible = "arm,cortex-a15";
> + reg = <0x0>;
> + };
> +
> + cpu@1 {
> + device_type = "cpu";
> + compatible = "arm,cortex-a15";
> + reg = <0x1>;
> + };
> +
> + cpu@100 {
> + device_type = "cpu";
> + compatible = "arm,cortex-a7";
> + reg = <0x100>;
> + };
> +
> + cpu@101 {
> + device_type = "cpu";
> + compatible = "arm,cortex-a7";
> + reg = <0x101>;
> + };
> + };
> +
> + - |
> + // Example 2 (Cortex-A8 uniprocessor 32-bit system):
> + cpus {
> + #size-cells = <0>;
> + #address-cells = <1>;
> +
> + cpu@0 {
> + device_type = "cpu";
> + compatible = "arm,cortex-a8";
> + reg = <0x0>;
> + };
> + };
> +
> + - |
> + // Example 3 (ARM 926EJ-S uniprocessor 32-bit system):
> + cpus {
> + #size-cells = <0>;
> + #address-cells = <1>;
> +
> + cpu@0 {
> + device_type = "cpu";
> + compatible = "arm,arm926ej-s";
> + reg = <0x0>;
> + };
> + };
> +
> + - |
> + // Example 4 (ARM Cortex-A57 64-bit system):
> + cpus {
> + #size-cells = <0>;
> + #address-cells = <2>;
> +
> + cpu@0 {
> + device_type = "cpu";
> + compatible = "arm,cortex-a57";
> + reg = <0x0 0x0>;
> + enable-method = "spin-table";
> + cpu-release-addr = <0 0x20000000>;
> + };
> +
> + cpu@1 {
> + device_type = "cpu";
> + compatible = "arm,cortex-a57";
> + reg = <0x0 0x1>;
> + enable-method = "spin-table";
> + cpu-release-addr = <0 0x20000000>;
> + };
> +
> + cpu@100 {
> + device_type = "cpu";
> + compatible = "arm,cortex-a57";
> + reg = <0x0 0x100>;
> + enable-method = "spin-table";
> + cpu-release-addr = <0 0x20000000>;
> + };
> +
> + cpu@101 {
> + device_type = "cpu";
> + compatible = "arm,cortex-a57";
> + reg = <0x0 0x101>;
> + enable-method = "spin-table";
> + cpu-release-addr = <0 0x20000000>;
> + };
> +
> + cpu@10000 {
> + device_type = "cpu";
> + compatible = "arm,cortex-a57";
> + reg = <0x0 0x10000>;
> + enable-method = "spin-table";
> + cpu-release-addr = <0 0x20000000>;
> + };
> +
> + cpu@10001 {
> + device_type = "cpu";
> + compatible = "arm,cortex-a57";
> + reg = <0x0 0x10001>;
> + enable-method = "spin-table";
> + cpu-release-addr = <0 0x20000000>;
> + };
> +
> + cpu@10100 {
> + device_type = "cpu";
> + compatible = "arm,cortex-a57";
> + reg = <0x0 0x10100>;
> + enable-method = "spin-table";
> + cpu-release-addr = <0 0x20000000>;
> + };
> +
> + cpu@10101 {
> + device_type = "cpu";
> + compatible = "arm,cortex-a57";
> + reg = <0x0 0x10101>;
> + enable-method = "spin-table";
> + cpu-release-addr = <0 0x20000000>;
> + };
> +
> + cpu@100000000 {
> + device_type = "cpu";
> + compatible = "arm,cortex-a57";
> + reg = <0x1 0x0>;
> + enable-method = "spin-table";
> + cpu-release-addr = <0 0x20000000>;
> + };
> +
> + cpu@100000001 {
> + device_type = "cpu";
> + compatible = "arm,cortex-a57";
> + reg = <0x1 0x1>;
> + enable-method = "spin-table";
> + cpu-release-addr = <0 0x20000000>;
> + };
> +
> + cpu@100000100 {
> + device_type = "cpu";
> + compatible = "arm,cortex-a57";
> + reg = <0x1 0x100>;
> + enable-method = "spin-table";
> + cpu-release-addr = <0 0x20000000>;
> + };
> +
> + cpu@100000101 {
> + device_type = "cpu";
> + compatible = "arm,cortex-a57";
> + reg = <0x1 0x101>;
> + enable-method = "spin-table";
> + cpu-release-addr = <0 0x20000000>;
> + };
> +
> + cpu@100010000 {
> + device_type = "cpu";
> + compatible = "arm,cortex-a57";
> + reg = <0x1 0x10000>;
> + enable-method = "spin-table";
> + cpu-release-addr = <0 0x20000000>;
> + };
> +
> + cpu@100010001 {
> + device_type = "cpu";
> + compatible = "arm,cortex-a57";
> + reg = <0x1 0x10001>;
> + enable-method = "spin-table";
> + cpu-release-addr = <0 0x20000000>;
> + };
> +
> + cpu@100010100 {
> + device_type = "cpu";
> + compatible = "arm,cortex-a57";
> + reg = <0x1 0x10100>;
> + enable-method = "spin-table";
> + cpu-release-addr = <0 0x20000000>;
> + };
> +
> + cpu@100010101 {
> + device_type = "cpu";
> + compatible = "arm,cortex-a57";
> + reg = <0x1 0x10101>;
> + enable-method = "spin-table";
> + cpu-release-addr = <0 0x20000000>;
> + };
> + };
> +...
>
I have take a look at xilinx part of this and try to build it for arm64
platforms and I see errors coming from this cpu description.
/root/linux/arch/arm64/boot/dts/xilinx/zynqmp-zcu100-revC.dt.yaml:
cpu@0:compatible: ['arm,cortex-a53', 'arm,armv8'] is too long
/root/linux/arch/arm64/boot/dts/xilinx/zynqmp-zcu100-revC.dt.yaml:
cpu@0:compatible: Additional items are not allowed ('arm,armv8' was
unexpected)
Based on grep this is used in a lot of places
compatible = "arm,cortex-a53", "arm,armv8";
Should this be moved to just simple?
compatible = "arm,cortex-a53";
Thanks,
Michal
On 05. 10. 18 18:58, Rob Herring wrote:
> Convert Xilinx SoC bindings to DT schema format using json-schema.
>
> Cc: Mark Rutland <[email protected]>
> Cc: Michal Simek <[email protected]>
> Cc: [email protected]
> Cc: [email protected]
> Signed-off-by: Rob Herring <[email protected]>
> ---
> .../devicetree/bindings/arm/xilinx.txt | 83 -------------------
> .../devicetree/bindings/arm/xilinx.yaml | 81 ++++++++++++++++++
> 2 files changed, 81 insertions(+), 83 deletions(-)
> delete mode 100644 Documentation/devicetree/bindings/arm/xilinx.txt
> create mode 100644 Documentation/devicetree/bindings/arm/xilinx.yaml
>
> diff --git a/Documentation/devicetree/bindings/arm/xilinx.txt b/Documentation/devicetree/bindings/arm/xilinx.txt
> deleted file mode 100644
> index 26fe5ecc4332..000000000000
> --- a/Documentation/devicetree/bindings/arm/xilinx.txt
> +++ /dev/null
> @@ -1,83 +0,0 @@
> -Xilinx Zynq Platforms Device Tree Bindings
> -
> -Boards with Zynq-7000 SOC based on an ARM Cortex A9 processor
> -shall have the following properties.
> -
> -Required root node properties:
> - - compatible = "xlnx,zynq-7000";
> -
> -Additional compatible strings:
> -
> -- Adapteva Parallella board
> - "adapteva,parallella"
> -
> -- Avnet MicroZed board
> - "avnet,zynq-microzed"
> - "xlnx,zynq-microzed"
> -
> -- Avnet ZedBoard board
> - "avnet,zynq-zed"
> - "xlnx,zynq-zed"
> -
> -- Digilent Zybo board
> - "digilent,zynq-zybo"
> -
> -- Digilent Zybo Z7 board
> - "digilent,zynq-zybo-z7"
> -
> -- Xilinx CC108 internal board
> - "xlnx,zynq-cc108"
> -
> -- Xilinx ZC702 internal board
> - "xlnx,zynq-zc702"
> -
> -- Xilinx ZC706 internal board
> - "xlnx,zynq-zc706"
> -
> -- Xilinx ZC770 internal board, with different FMC cards
> - "xlnx,zynq-zc770-xm010"
> - "xlnx,zynq-zc770-xm011"
> - "xlnx,zynq-zc770-xm012"
> - "xlnx,zynq-zc770-xm013"
> -
> ----------------------------------------------------------------
> -
> -Xilinx Zynq UltraScale+ MPSoC Platforms Device Tree Bindings
> -
> -Boards with ZynqMP SOC based on an ARM Cortex A53 processor
> -shall have the following properties.
> -
> -Required root node properties:
> - - compatible = "xlnx,zynqmp";
> -
> -
> -Additional compatible strings:
> -
> -- Xilinx internal board zc1232
> - "xlnx,zynqmp-zc1232-revA", "xlnx,zynqmp-zc1232"
> -
> -- Xilinx internal board zc1254
> - "xlnx,zynqmp-zc1254-revA", "xlnx,zynqmp-zc1254"
> -
> -- Xilinx internal board zc1275
> - "xlnx,zynqmp-zc1275-revA", "xlnx,zynqmp-zc1275"
> -
> -- Xilinx internal board zc1751
> - "xlnx,zynqmp-zc1751"
> -
> -- Xilinx 96boards compatible board zcu100
> - "xlnx,zynqmp-zcu100-revC", "xlnx,zynqmp-zcu100"
> -
> -- Xilinx evaluation board zcu102
> - "xlnx,zynqmp-zcu102-revA", "xlnx,zynqmp-zcu102"
> - "xlnx,zynqmp-zcu102-revB", "xlnx,zynqmp-zcu102"
> - "xlnx,zynqmp-zcu102-rev1.0", "xlnx,zynqmp-zcu102"
> -
> -- Xilinx evaluation board zcu104
> - "xlnx,zynqmp-zcu104-revA", "xlnx,zynqmp-zcu104"
> -
> -- Xilinx evaluation board zcu106
> - "xlnx,zynqmp-zcu106-revA", "xlnx,zynqmp-zcu106"
> -
> -- Xilinx evaluation board zcu111
> - "xlnx,zynqmp-zcu111-revA", "xlnx,zynqmp-zcu111"
> diff --git a/Documentation/devicetree/bindings/arm/xilinx.yaml b/Documentation/devicetree/bindings/arm/xilinx.yaml
> new file mode 100644
> index 000000000000..dd227bccf015
> --- /dev/null
> +++ b/Documentation/devicetree/bindings/arm/xilinx.yaml
> @@ -0,0 +1,81 @@
> +%YAML 1.2
> +---
> +$id: http://devicetree.org/schemas/soc/arm/xilinx.yaml#
> +$schema: http://devicetree.org/meta-schemas/core.yaml#
> +
> +title: Xilinx Zynq Platforms Device Tree Bindings
> +
> +maintainers:
> + - Michal Simek <[email protected]>
> +
> +description: |
> + Xilinx boards with Zynq-7000 SOC or Zynq UltraScale+ MPSoC
> +
> +properties:
> + $nodename:
> + const: '/'
> + compatible:
> + oneOf:
> + - items:
> + - enum:
> + - adapteva,parallella
> + - digilent,zynq-zybo
> + - digilent,zynq-zybo-z7
> + - xlnx,zynq-cc108
> + - xlnx,zynq-zc702
> + - xlnx,zynq-zc706
> + - xlnx,zynq-zc770-xm010
> + - xlnx,zynq-zc770-xm011
> + - xlnx,zynq-zc770-xm012
> + - xlnx,zynq-zc770-xm013
> + - const: xlnx,zynq-7000
> +
> + - items:
> + - const: avnet,zynq-microzed
> + - const: xlnx,zynq-microzed
> + - const: xlnx,zynq-7000
> +
> + - items:
> + - const: avnet,zynq-zed
> + - const: xlnx,zynq-zed
> + - const: xlnx,zynq-7000
> +
> + - items:
> + - enum:
> + - xlnx,zynqmp-zc1751
> + - const: xlnx,zynqmp
> +
> + - description: Xilinx internal board zc1232
> + items:
> + - const: xlnx,zynqmp-zc1232-revA
> + - const: xlnx,zynqmp-zc1232
> + - const: xlnx,zynqmp
> +
> + - description: Xilinx internal board zc1254
> + items:
> + - const: xlnx,zynqmp-zc1254-revA
> + - const: xlnx,zynqmp-zc1254
> + - const: xlnx,zynqmp
> +
> + - description: Xilinx internal board zc1275
> + items:
> + - const: xlnx,zynqmp-zc1275-revA
> + - const: xlnx,zynqmp-zc1275
> + - const: xlnx,zynqmp
> +
> + - description: Xilinx 96boards compatible board zcu100
> + items:
> + - const: xlnx,zynqmp-zcu100-revC
> + - const: xlnx,zynqmp-zcu100
> + - const: xlnx,zynqmp
> +
> + - description: Xilinx evaluation board zcu102
> + items:
> + - enum:
> + - xlnx,zynqmp-zcu102-revA
> + - xlnx,zynqmp-zcu102-revB
> + - xlnx,zynqmp-zcu102-rev1.0
> + - const: xlnx,zynqmp-zcu102
> + - const: xlnx,zynqmp
> +
> +...
>
Conversion looks good. I have also found that we are missing some boards
when I was playing with your branch. But this can be added on the top of
this patch.
I have sent you separate patch for that.
Also I have found that we are missing one property which can go to the
tree directly and I am going to send a patch for it too.
Acked-by: Michal Simek <[email protected]>
Thanks,
Michal
On 01/11/2018 19:32, Rob Herring wrote:
> On Tue, Oct 9, 2018 at 6:57 AM Will Deacon <[email protected]> wrote:
>>
>> Hi Rob,
>>
>> On Fri, Oct 05, 2018 at 11:58:25AM -0500, Rob Herring wrote:
>>> Convert ARM PMU binding to DT schema format using json-schema.
>>>
>>> Cc: Will Deacon <[email protected]>
>>> Cc: Mark Rutland <[email protected]>
>>> Cc: [email protected]
>>> Cc: [email protected]
>>> Signed-off-by: Rob Herring <[email protected]>
>>> ---
>>> Documentation/devicetree/bindings/arm/pmu.txt | 70 --------------
>>> .../devicetree/bindings/arm/pmu.yaml | 96 +++++++++++++++++++
>>> 2 files changed, 96 insertions(+), 70 deletions(-)
>>> delete mode 100644 Documentation/devicetree/bindings/arm/pmu.txt
>>> create mode 100644 Documentation/devicetree/bindings/arm/pmu.yaml
>>
>> [...]
>>
>>> -- interrupts : 1 combined interrupt or 1 per core. If the interrupt is a per-cpu
>>> - interrupt (PPI) then 1 interrupt should be specified.
>>
>> [...]
>>
>>> + interrupts:
>>> + oneOf:
>>> + - maxItems: 1
>>> + - minItems: 2
>>> + maxItems: 8
>>> + description: 1 interrupt per core.
>>> +
>>> + interrupts-extended:
>>> + $ref: '#/properties/interrupts'
>>
>> This seems like a semantic different between the two representations, or am
>> I missing something here? Specifically, both the introduction of
>> interrupts-extended and also dropping any mention of using a single per-cpu
>> interrupt (the single combined case is no longer support by Linux; not sure
>> if you want to keep it in the binding).
>
> In regards to no support for the single combined interrupt, it looks
> like Marvell Armada SoCs at least (armada-375 is what I'm looking at)
> have only a single interrupt. Though the interrupt gets routed to MPIC
> which then has a GIC PPI. So it isn't supported or happens to work
> still since it is a PPI?
Well, the description of the MPIC in the Armada XP functional spec says:
"Interrupt sources ID0–ID28 are private events per CPU. Thus, each
processor has a different set of events map interrupts ID0–ID28."
Odd grammar aside, that would seem to imply that <&mpic 3> is a per-cpu
interrupt itself, thus AFAICS so long as it's cascaded to a GIC PPI and
not an SPI then there's no issue there.
Robin.
Hello,
I'm jumping into the discussion, but I clearly don't have all the
context of the discussion.
On Thu, 8 Nov 2018 15:54:31 +0000, Robin Murphy wrote:
> >> This seems like a semantic different between the two representations, or am
> >> I missing something here? Specifically, both the introduction of
> >> interrupts-extended and also dropping any mention of using a single per-cpu
> >> interrupt (the single combined case is no longer support by Linux; not sure
> >> if you want to keep it in the binding).
> >
> > In regards to no support for the single combined interrupt, it looks
> > like Marvell Armada SoCs at least (armada-375 is what I'm looking at)
> > have only a single interrupt. Though the interrupt gets routed to MPIC
> > which then has a GIC PPI. So it isn't supported or happens to work
> > still since it is a PPI?
>
> Well, the description of the MPIC in the Armada XP functional spec says:
>
> "Interrupt sources ID0–ID28 are private events per CPU. Thus, each
> processor has a different set of events map interrupts ID0–ID28."
>
> Odd grammar aside, that would seem to imply that <&mpic 3> is a per-cpu
> interrupt itself, thus AFAICS so long as it's cascaded to a GIC PPI and
> not an SPI then there's no issue there.
The Armada XP does not have a GIC at all, but only a MPIC as the
primary interrupt controller.
However the Armada 38x has both a GIC and a MPIC, and indeed the parent
interrupts of the MPIC towards the GIC is:
interrupts = <GIC_PPI 15 IRQ_TYPE_LEVEL_HIGH>;
Best regards,
Thomas
--
Thomas Petazzoni, CTO, Bootlin
Embedded Linux and Kernel engineering
https://bootlin.com
On 08/11/2018 15:59, Thomas Petazzoni wrote:
> Hello,
>
> I'm jumping into the discussion, but I clearly don't have all the
> context of the discussion.
>
> On Thu, 8 Nov 2018 15:54:31 +0000, Robin Murphy wrote:
>
>>>> This seems like a semantic different between the two representations, or am
>>>> I missing something here? Specifically, both the introduction of
>>>> interrupts-extended and also dropping any mention of using a single per-cpu
>>>> interrupt (the single combined case is no longer support by Linux; not sure
>>>> if you want to keep it in the binding).
>>>
>>> In regards to no support for the single combined interrupt, it looks
>>> like Marvell Armada SoCs at least (armada-375 is what I'm looking at)
>>> have only a single interrupt. Though the interrupt gets routed to MPIC
>>> which then has a GIC PPI. So it isn't supported or happens to work
>>> still since it is a PPI?
>>
>> Well, the description of the MPIC in the Armada XP functional spec says:
>>
>> "Interrupt sources ID0–ID28 are private events per CPU. Thus, each
>> processor has a different set of events map interrupts ID0–ID28."
>>
>> Odd grammar aside, that would seem to imply that <&mpic 3> is a per-cpu
>> interrupt itself, thus AFAICS so long as it's cascaded to a GIC PPI and
>> not an SPI then there's no issue there.
>
> The Armada XP does not have a GIC at all, but only a MPIC as the
> primary interrupt controller.
>
> However the Armada 38x has both a GIC and a MPIC, and indeed the parent
> interrupts of the MPIC towards the GIC is:
>
> interrupts = <GIC_PPI 15 IRQ_TYPE_LEVEL_HIGH>;
Yeah, perhaps I should have clarified that the XP manual was the only
publicly-available one I could find, but I'm inferring from the binding
and driver that the MPIC in 375/38x still behaves the same.
Robin.
On Thu, Nov 8, 2018 at 2:49 AM Michal Simek <[email protected]> wrote:
>
> Hi Rob,
>
> On 05. 10. 18 18:58, Rob Herring wrote:
> > Convert ARM CPU binding to DT schema format using json-schema.
> >
> > Cc: Mark Rutland <[email protected]>
> > Cc: Matthias Brugger <[email protected]>
> > Cc: [email protected]
> > Cc: [email protected]
> > Cc: [email protected]
> > Signed-off-by: Rob Herring <[email protected]>
> > ---
> > .../devicetree/bindings/arm/cpus.txt | 490 -----------------
> > .../devicetree/bindings/arm/cpus.yaml | 503 ++++++++++++++++++
> > 2 files changed, 503 insertions(+), 490 deletions(-)
> > delete mode 100644 Documentation/devicetree/bindings/arm/cpus.txt
> > create mode 100644 Documentation/devicetree/bindings/arm/cpus.yaml
[...]
> I have take a look at xilinx part of this and try to build it for arm64
> platforms and I see errors coming from this cpu description.
> /root/linux/arch/arm64/boot/dts/xilinx/zynqmp-zcu100-revC.dt.yaml:
> cpu@0:compatible: ['arm,cortex-a53', 'arm,armv8'] is too long
> /root/linux/arch/arm64/boot/dts/xilinx/zynqmp-zcu100-revC.dt.yaml:
> cpu@0:compatible: Additional items are not allowed ('arm,armv8' was
> unexpected)
Thanks for actually giving this a spin!
> Based on grep this is used in a lot of places
> compatible = "arm,cortex-a53", "arm,armv8";
>
> Should this be moved to just simple?
> compatible = "arm,cortex-a53";
I'd normally go with the majority which would be to keep it. However,
'arm,armv8' is of questionable value, isn't actually documented, and
doesn't exist for any other version of the architecture. So we should
kill it IMO.
Paging Mark Rutland and other arm folks...
Rob
On Fri, Nov 30, 2018 at 12:00:05PM -0600, Rob Herring wrote:
> On Thu, Nov 8, 2018 at 2:49 AM Michal Simek <[email protected]> wrote:
> >
> > Hi Rob,
> >
> > On 05. 10. 18 18:58, Rob Herring wrote:
> > > Convert ARM CPU binding to DT schema format using json-schema.
> > >
> > > Cc: Mark Rutland <[email protected]>
> > > Cc: Matthias Brugger <[email protected]>
> > > Cc: [email protected]
> > > Cc: [email protected]
> > > Cc: [email protected]
> > > Signed-off-by: Rob Herring <[email protected]>
> > > ---
> > > .../devicetree/bindings/arm/cpus.txt | 490 -----------------
> > > .../devicetree/bindings/arm/cpus.yaml | 503 ++++++++++++++++++
> > > 2 files changed, 503 insertions(+), 490 deletions(-)
> > > delete mode 100644 Documentation/devicetree/bindings/arm/cpus.txt
> > > create mode 100644 Documentation/devicetree/bindings/arm/cpus.yaml
>
> [...]
>
> > I have take a look at xilinx part of this and try to build it for arm64
> > platforms and I see errors coming from this cpu description.
> > /root/linux/arch/arm64/boot/dts/xilinx/zynqmp-zcu100-revC.dt.yaml:
> > cpu@0:compatible: ['arm,cortex-a53', 'arm,armv8'] is too long
> > /root/linux/arch/arm64/boot/dts/xilinx/zynqmp-zcu100-revC.dt.yaml:
> > cpu@0:compatible: Additional items are not allowed ('arm,armv8' was
> > unexpected)
>
> Thanks for actually giving this a spin!
>
> > Based on grep this is used in a lot of places
> > compatible = "arm,cortex-a53", "arm,armv8";
> >
> > Should this be moved to just simple?
> > compatible = "arm,cortex-a53";
>
> I'd normally go with the majority which would be to keep it. However,
> 'arm,armv8' is of questionable value, isn't actually documented, and
> doesn't exist for any other version of the architecture. So we should
> kill it IMO.
I'd prefer to keep it around, since that's what's used to describe the CPUs
on the fastmodel iirc.
Will
On Mon, Dec 3, 2018 at 6:40 AM Will Deacon <[email protected]> wrote:
>
> On Fri, Nov 30, 2018 at 12:00:05PM -0600, Rob Herring wrote:
> > On Thu, Nov 8, 2018 at 2:49 AM Michal Simek <[email protected]> wrote:
> > >
> > > Hi Rob,
> > >
> > > On 05. 10. 18 18:58, Rob Herring wrote:
> > > > Convert ARM CPU binding to DT schema format using json-schema.
> > > >
> > > > Cc: Mark Rutland <[email protected]>
> > > > Cc: Matthias Brugger <[email protected]>
> > > > Cc: [email protected]
> > > > Cc: [email protected]
> > > > Cc: [email protected]
> > > > Signed-off-by: Rob Herring <[email protected]>
> > > > ---
> > > > .../devicetree/bindings/arm/cpus.txt | 490 -----------------
> > > > .../devicetree/bindings/arm/cpus.yaml | 503 ++++++++++++++++++
> > > > 2 files changed, 503 insertions(+), 490 deletions(-)
> > > > delete mode 100644 Documentation/devicetree/bindings/arm/cpus.txt
> > > > create mode 100644 Documentation/devicetree/bindings/arm/cpus.yaml
> >
> > [...]
> >
> > > I have take a look at xilinx part of this and try to build it for arm64
> > > platforms and I see errors coming from this cpu description.
> > > /root/linux/arch/arm64/boot/dts/xilinx/zynqmp-zcu100-revC.dt.yaml:
> > > cpu@0:compatible: ['arm,cortex-a53', 'arm,armv8'] is too long
> > > /root/linux/arch/arm64/boot/dts/xilinx/zynqmp-zcu100-revC.dt.yaml:
> > > cpu@0:compatible: Additional items are not allowed ('arm,armv8' was
> > > unexpected)
> >
> > Thanks for actually giving this a spin!
> >
> > > Based on grep this is used in a lot of places
> > > compatible = "arm,cortex-a53", "arm,armv8";
> > >
> > > Should this be moved to just simple?
> > > compatible = "arm,cortex-a53";
> >
> > I'd normally go with the majority which would be to keep it. However,
> > 'arm,armv8' is of questionable value, isn't actually documented, and
> > doesn't exist for any other version of the architecture. So we should
> > kill it IMO.
>
> I'd prefer to keep it around, since that's what's used to describe the CPUs
> on the fastmodel iirc.
We can and should keep it for that purpose, but do we need it as a
fallback? For real cores though, we have mixture of with and without
and one of those need to be fixed.
Rob