LinuxLists.cc - [PATCH v4 0/5] Add new series Micron SPI NAND devices

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Subject: [PATCH v4 1/5] mtd: spinand: micron: Generalize the OOB layout structure and function names

From: Shivamurthy Shastri <[email protected]>

In order to add new Micron SPI NAND devices, we generalized the OOB
layout structure and function names.

Signed-off-by: Shivamurthy Shastri <[email protected]>
---
drivers/mtd/nand/spi/micron.c | 28 ++++++++++++++--------------
1 file changed, 14 insertions(+), 14 deletions(-)

diff --git a/drivers/mtd/nand/spi/micron.c b/drivers/mtd/nand/spi/micron.c
index 7d7b1f7fcf71..c028d0d7e236 100644
--- a/drivers/mtd/nand/spi/micron.c
+++ b/drivers/mtd/nand/spi/micron.c
@@ -34,38 +34,38 @@ static SPINAND_OP_VARIANTS(update_cache_variants,
SPINAND_PROG_LOAD_X4(false, 0, NULL, 0),
SPINAND_PROG_LOAD(false, 0, NULL, 0));

-static int mt29f2g01abagd_ooblayout_ecc(struct mtd_info *mtd, int section,
- struct mtd_oob_region *region)
+static int micron_8_ooblayout_ecc(struct mtd_info *mtd, int section,
+ struct mtd_oob_region *region)
{
if (section)
return -ERANGE;

- region->offset = 64;
- region->length = 64;
+ region->offset = mtd->oobsize / 2;
+ region->length = mtd->oobsize / 2;

return 0;
}

-static int mt29f2g01abagd_ooblayout_free(struct mtd_info *mtd, int section,
- struct mtd_oob_region *region)
+static int micron_8_ooblayout_free(struct mtd_info *mtd, int section,
+ struct mtd_oob_region *region)
{
if (section)
return -ERANGE;

/* Reserve 2 bytes for the BBM. */
region->offset = 2;
- region->length = 62;
+ region->length = (mtd->oobsize / 2) - 2;

return 0;
}

-static const struct mtd_ooblayout_ops mt29f2g01abagd_ooblayout = {
- .ecc = mt29f2g01abagd_ooblayout_ecc,
- .free = mt29f2g01abagd_ooblayout_free,
+static const struct mtd_ooblayout_ops micron_8_ooblayout = {
+ .ecc = micron_8_ooblayout_ecc,
+ .free = micron_8_ooblayout_free,
};

-static int mt29f2g01abagd_ecc_get_status(struct spinand_device *spinand,
- u8 status)
+static int micron_8_ecc_get_status(struct spinand_device *spinand,
+ u8 status)
{
switch (status & MICRON_STATUS_ECC_MASK) {
case STATUS_ECC_NO_BITFLIPS:
@@ -98,8 +98,8 @@ static const struct spinand_info micron_spinand_table[] = {
&write_cache_variants,
&update_cache_variants),
0,
- SPINAND_ECCINFO(&mt29f2g01abagd_ooblayout,
- mt29f2g01abagd_ecc_get_status)),
+ SPINAND_ECCINFO(&micron_8_ooblayout,
+ micron_8_ecc_get_status)),
};

static int micron_spinand_detect(struct spinand_device *spinand)
--
2.17.1

2020-02-06 20:25:54

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Subject: [PATCH v4 2/5] mtd: spinand: micron: Add new Micron SPI NAND devices

From: Shivamurthy Shastri <[email protected]>

Add device table for M79A and M78A series Micron SPI NAND devices.

Signed-off-by: Shivamurthy Shastri <[email protected]>
---
drivers/mtd/nand/spi/micron.c | 31 +++++++++++++++++++++++++++++++
1 file changed, 31 insertions(+)

diff --git a/drivers/mtd/nand/spi/micron.c b/drivers/mtd/nand/spi/micron.c
index c028d0d7e236..5fd1f921ef12 100644
--- a/drivers/mtd/nand/spi/micron.c
+++ b/drivers/mtd/nand/spi/micron.c
@@ -91,6 +91,7 @@ static int micron_8_ecc_get_status(struct spinand_device *spinand,
}

static const struct spinand_info micron_spinand_table[] = {
+ /* M79A 2Gb 3.3V */
SPINAND_INFO("MT29F2G01ABAGD", 0x24,
NAND_MEMORG(1, 2048, 128, 64, 2048, 40, 2, 1, 1),
NAND_ECCREQ(8, 512),
@@ -100,6 +101,36 @@ static const struct spinand_info micron_spinand_table[] = {
0,
SPINAND_ECCINFO(&micron_8_ooblayout,
micron_8_ecc_get_status)),
+ /* M79A 2Gb 1.8V */
+ SPINAND_INFO("MT29F2G01ABBGD", 0x25,
+ NAND_MEMORG(1, 2048, 128, 64, 2048, 40, 2, 1, 1),
+ NAND_ECCREQ(8, 512),
+ SPINAND_INFO_OP_VARIANTS(&read_cache_variants,
+ &write_cache_variants,
+ &update_cache_variants),
+ 0,
+ SPINAND_ECCINFO(&micron_8_ooblayout,
+ micron_8_ecc_get_status)),
+ /* M78A 1Gb 3.3V */
+ SPINAND_INFO("MT29F1G01ABAFD", 0x14,
+ NAND_MEMORG(1, 2048, 128, 64, 1024, 20, 1, 1, 1),
+ NAND_ECCREQ(8, 512),
+ SPINAND_INFO_OP_VARIANTS(&read_cache_variants,
+ &write_cache_variants,
+ &update_cache_variants),
+ 0,
+ SPINAND_ECCINFO(&micron_8_ooblayout,
+ micron_8_ecc_get_status)),
+ /* M78A 1Gb 1.8V */
+ SPINAND_INFO("MT29F1G01ABAFD", 0x15,
+ NAND_MEMORG(1, 2048, 128, 64, 1024, 20, 1, 1, 1),
+ NAND_ECCREQ(8, 512),
+ SPINAND_INFO_OP_VARIANTS(&read_cache_variants,
+ &write_cache_variants,
+ &update_cache_variants),
+ 0,
+ SPINAND_ECCINFO(&micron_8_ooblayout,
+ micron_8_ecc_get_status)),
};

static int micron_spinand_detect(struct spinand_device *spinand)
--
2.17.1

2020-02-06 20:26:30

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Subject: [PATCH v4 5/5] mtd: spinand: micron: Add new Micron SPI NAND devices with multiple dies

From: Shivamurthy Shastri <[email protected]>

Add device table for new Micron SPI NAND devices, which have multiple
dies.

Also, enable support to select the dies.

Signed-off-by: Shivamurthy Shastri <[email protected]>
---
drivers/mtd/nand/spi/micron.c | 58 +++++++++++++++++++++++++++++++++++
1 file changed, 58 insertions(+)

diff --git a/drivers/mtd/nand/spi/micron.c b/drivers/mtd/nand/spi/micron.c
index 3d3734afc35e..84e1c109ad0c 100644
--- a/drivers/mtd/nand/spi/micron.c
+++ b/drivers/mtd/nand/spi/micron.c
@@ -20,6 +20,15 @@

#define MICRON_CFG_CONTI_READ BIT(0)

+/*
+ * As per datasheet, die selection is done by the 6th bit of Die
+ * Select Register (Address 0xD0).
+ */
+#define MICRON_DIE_SELECT_REG 0xD0
+
+#define MICRON_SELECT_DIE_0 0x00
+#define MICRON_SELECT_DIE_1 0x40
+
static SPINAND_OP_VARIANTS(read_cache_variants,
SPINAND_PAGE_READ_FROM_CACHE_QUADIO_OP(0, 2, NULL, 0),
SPINAND_PAGE_READ_FROM_CACHE_X4_OP(0, 1, NULL, 0),
@@ -66,6 +75,22 @@ static const struct mtd_ooblayout_ops micron_8_ooblayout = {
.free = micron_8_ooblayout_free,
};

+static int micron_select_target(struct spinand_device *spinand,
+ unsigned int target)
+{
+ struct spi_mem_op op = SPINAND_SET_FEATURE_OP(MICRON_DIE_SELECT_REG,
+ spinand->scratchbuf);
+
+ if (target == 0)
+ *spinand->scratchbuf = MICRON_SELECT_DIE_0;
+ else if (target == 1)
+ *spinand->scratchbuf = MICRON_SELECT_DIE_1;
+ else
+ return -EINVAL;
+
+ return spi_mem_exec_op(spinand->spimem, &op);
+}
+
static int micron_8_ecc_get_status(struct spinand_device *spinand,
u8 status)
{
@@ -133,6 +158,17 @@ static const struct spinand_info micron_spinand_table[] = {
0,
SPINAND_ECCINFO(&micron_8_ooblayout,
micron_8_ecc_get_status)),
+ /* M79A 4Gb 3.3V */
+ SPINAND_INFO("MT29F4G01ADAGD", 0x36,
+ NAND_MEMORG(1, 2048, 128, 64, 2048, 80, 2, 1, 2),
+ NAND_ECCREQ(8, 512),
+ SPINAND_INFO_OP_VARIANTS(&read_cache_variants,
+ &write_cache_variants,
+ &update_cache_variants),
+ 0,
+ SPINAND_ECCINFO(&micron_8_ooblayout,
+ micron_8_ecc_get_status),
+ SPINAND_SELECT_TARGET(micron_select_target)),
/* M70A 4Gb 3.3V */
SPINAND_INFO("MT29F4G01ABAFD", 0x34,
NAND_MEMORG(1, 4096, 256, 64, 2048, 40, 1, 1, 1),
@@ -153,6 +189,28 @@ static const struct spinand_info micron_spinand_table[] = {
SPINAND_HAS_CR_FEAT_BIT,
SPINAND_ECCINFO(&micron_8_ooblayout,
micron_8_ecc_get_status)),
+ /* M70A 8Gb 3.3V */
+ SPINAND_INFO("MT29F8G01ADAFD", 0x46,
+ NAND_MEMORG(1, 4096, 256, 64, 2048, 40, 1, 1, 2),
+ NAND_ECCREQ(8, 512),
+ SPINAND_INFO_OP_VARIANTS(&read_cache_variants,
+ &write_cache_variants,
+ &update_cache_variants),
+ SPINAND_HAS_CR_FEAT_BIT,
+ SPINAND_ECCINFO(&micron_8_ooblayout,
+ micron_8_ecc_get_status),
+ SPINAND_SELECT_TARGET(micron_select_target)),
+ /* M70A 8Gb 1.8V */
+ SPINAND_INFO("MT29F8G01ADBFD", 0x47,
+ NAND_MEMORG(1, 4096, 256, 64, 2048, 40, 1, 1, 2),
+ NAND_ECCREQ(8, 512),
+ SPINAND_INFO_OP_VARIANTS(&read_cache_variants,
+ &write_cache_variants,
+ &update_cache_variants),
+ SPINAND_HAS_CR_FEAT_BIT,
+ SPINAND_ECCINFO(&micron_8_ooblayout,
+ micron_8_ecc_get_status),
+ SPINAND_SELECT_TARGET(micron_select_target)),
};

static int micron_spinand_detect(struct spinand_device *spinand)
--
2.17.1

2020-02-06 20:26:40

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Subject: [PATCH v4 3/5] mtd: spinand: micron: identify SPI NAND device with Continuous Read mode

From: Shivamurthy Shastri <[email protected]>

Add SPINAND_HAS_CR_FEAT_BIT flag to identify the SPI NAND device with
the Continuous Read mode.

Some of the Micron SPI NAND devices have the "Continuous Read" feature
enabled by default, which does not fit the subsystem needs.

In this mode, the READ CACHE command doesn't require the starting column
address. The device always output the data starting from the first
column of the cache register, and once the end of the cache register
reached, the data output continues through the next page. With the
continuous read mode, it is possible to read out the entire block using
a single READ command, and once the end of the block reached, the output
pins become High-Z state. However, during this mode the read command
doesn't output the OOB area.

Hence, we disable the feature at probe time.

Signed-off-by: Shivamurthy Shastri <[email protected]>
---
drivers/mtd/nand/spi/micron.c | 16 ++++++++++++++++
include/linux/mtd/spinand.h | 1 +
2 files changed, 17 insertions(+)

diff --git a/drivers/mtd/nand/spi/micron.c b/drivers/mtd/nand/spi/micron.c
index 5fd1f921ef12..a8e947609cd9 100644
--- a/drivers/mtd/nand/spi/micron.c
+++ b/drivers/mtd/nand/spi/micron.c
@@ -18,6 +18,8 @@
#define MICRON_STATUS_ECC_4TO6_BITFLIPS (3 << 4)
#define MICRON_STATUS_ECC_7TO8_BITFLIPS (5 << 4)

+#define MICRON_CFG_CONTI_READ BIT(0)
+
static SPINAND_OP_VARIANTS(read_cache_variants,
SPINAND_PAGE_READ_FROM_CACHE_QUADIO_OP(0, 2, NULL, 0),
SPINAND_PAGE_READ_FROM_CACHE_X4_OP(0, 1, NULL, 0),
@@ -153,8 +155,22 @@ static int micron_spinand_detect(struct spinand_device *spinand)
return 1;
}

+static int micron_spinand_init(struct spinand_device *spinand)
+{
+ /*
+ * M70A device series enable Continuous Read feature at Power-up,
+ * which is not supported. Disable this bit to avoid any possible
+ * failure.
+ */
+ if (spinand->flags == SPINAND_HAS_CR_FEAT_BIT)
+ return spinand_upd_cfg(spinand, MICRON_CFG_CONTI_READ, 0);
+
+ return 0;
+}
+
static const struct spinand_manufacturer_ops micron_spinand_manuf_ops = {
.detect = micron_spinand_detect,
+ .init = micron_spinand_init,
};

const struct spinand_manufacturer micron_spinand_manufacturer = {
diff --git a/include/linux/mtd/spinand.h b/include/linux/mtd/spinand.h
index 4ea558bd3c46..333149b2855f 100644
--- a/include/linux/mtd/spinand.h
+++ b/include/linux/mtd/spinand.h
@@ -270,6 +270,7 @@ struct spinand_ecc_info {
};

#define SPINAND_HAS_QE_BIT BIT(0)
+#define SPINAND_HAS_CR_FEAT_BIT BIT(1)

/**
* struct spinand_info - Structure used to describe SPI NAND chips
--
2.17.1

2020-02-06 20:27:15

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Subject: [PATCH v4 4/5] mtd: spinand: micron: Add M70A series Micron SPI NAND devices

From: Shivamurthy Shastri <[email protected]>

Add device table for M70A series Micron SPI NAND devices.

Signed-off-by: Shivamurthy Shastri <[email protected]>
---
drivers/mtd/nand/spi/micron.c | 20 ++++++++++++++++++++
1 file changed, 20 insertions(+)

diff --git a/drivers/mtd/nand/spi/micron.c b/drivers/mtd/nand/spi/micron.c
index a8e947609cd9..3d3734afc35e 100644
--- a/drivers/mtd/nand/spi/micron.c
+++ b/drivers/mtd/nand/spi/micron.c
@@ -133,6 +133,26 @@ static const struct spinand_info micron_spinand_table[] = {
0,
SPINAND_ECCINFO(&micron_8_ooblayout,
micron_8_ecc_get_status)),
+ /* M70A 4Gb 3.3V */
+ SPINAND_INFO("MT29F4G01ABAFD", 0x34,
+ NAND_MEMORG(1, 4096, 256, 64, 2048, 40, 1, 1, 1),
+ NAND_ECCREQ(8, 512),
+ SPINAND_INFO_OP_VARIANTS(&read_cache_variants,
+ &write_cache_variants,
+ &update_cache_variants),
+ SPINAND_HAS_CR_FEAT_BIT,
+ SPINAND_ECCINFO(&micron_8_ooblayout,
+ micron_8_ecc_get_status)),
+ /* M70A 4Gb 1.8V */
+ SPINAND_INFO("MT29F4G01ABBFD", 0x35,
+ NAND_MEMORG(1, 4096, 256, 64, 2048, 40, 1, 1, 1),
+ NAND_ECCREQ(8, 512),
+ SPINAND_INFO_OP_VARIANTS(&read_cache_variants,
+ &write_cache_variants,
+ &update_cache_variants),
+ SPINAND_HAS_CR_FEAT_BIT,
+ SPINAND_ECCINFO(&micron_8_ooblayout,
+ micron_8_ecc_get_status)),
};

static int micron_spinand_detect(struct spinand_device *spinand)
--
2.17.1

2020-02-26 17:06:58

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Subject: RE: [EXT] [PATCH v4 0/5] Add new series Micron SPI NAND devices

Hello Miquel,

Just a gentle reminder that I'd like some feedback.

Thanks,
Shiva

>
> From: Shivamurthy Shastri <[email protected]>
>
> This patchset is for the new series of Micron SPI NAND devices, and the
> following links are their datasheets.
>
> M78A:
> [1] https://www.micron.com/~/media/documents/products/data-
> sheet/nand-flash/70-series/m78a_1gb_3v_nand_spi.pdf
> [2] https://www.micron.com/~/media/documents/products/data-
> sheet/nand-flash/70-series/m78a_1gb_1_8v_nand_spi.pdf
>
> M79A:
> [3] https://www.micron.com/~/media/documents/products/data-
> sheet/nand-flash/70-series/m79a_2gb_1_8v_nand_spi.pdf
> [4] https://www.micron.com/~/media/documents/products/data-
> sheet/nand-flash/70-series/m79a_ddp_4gb_3v_nand_spi.pdf
>
> M70A:
> [5] https://www.micron.com/~/media/documents/products/data-
> sheet/nand-flash/70-series/m70a_4gb_3v_nand_spi.pdf
> [6] https://www.micron.com/~/media/documents/products/data-
> sheet/nand-flash/70-series/m70a_4gb_1_8v_nand_spi.pdf
> [7] https://www.micron.com/~/media/documents/products/data-
> sheet/nand-flash/70-series/m70a_ddp_8gb_3v_nand_spi.pdf
> [8] https://www.micron.com/~/media/documents/products/data-
> sheet/nand-flash/70-series/m70a_ddp_8gb_1_8v_nand_spi.pdf
>
> Changes since v3:
> -----------------
>
> 1. Patch 3 and 4 reworked as follows
> - Patch 3 introducing the Continuous read feature
> - Patch 4 adding devices with the feature
>
> Changes since v2:
> -----------------
>
> 1. Patch commit messages have been modified.
> 2. Handled devices with Continuous Read feature with vendor specific flag.
> 3. Reworked die selection function as per the comment.
>
> Changes since v1:
> -----------------
>
> 1. The patch split into multiple patches.
> 2. Added comments for selecting the die.
>
> Shivamurthy Shastri (5):
> mtd: spinand: micron: Generalize the OOB layout structure and function
> names
> mtd: spinand: micron: Add new Micron SPI NAND devices
> mtd: spinand: micron: identify SPI NAND device with Continuous Read
> mode
> mtd: spinand: micron: Add M70A series Micron SPI NAND devices
> mtd: spinand: micron: Add new Micron SPI NAND devices with multiple
> dies
>
> drivers/mtd/nand/spi/micron.c | 153
> ++++++++++++++++++++++++++++++----
> include/linux/mtd/spinand.h | 1 +
> 2 files changed, 140 insertions(+), 14 deletions(-)
>
> --
> 2.17.1

2020-02-27 18:08:18

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Subject: Re: [PATCH v4 3/5] mtd: spinand: micron: identify SPI NAND device with Continuous Read mode

On Thu, 6 Feb 2020 21:22:04 +0100
[email protected] wrote:

> From: Shivamurthy Shastri <[email protected]>
>
> Add SPINAND_HAS_CR_FEAT_BIT flag to identify the SPI NAND device with
> the Continuous Read mode.
>
> Some of the Micron SPI NAND devices have the "Continuous Read" feature
> enabled by default, which does not fit the subsystem needs.
>
> In this mode, the READ CACHE command doesn't require the starting column
> address. The device always output the data starting from the first
> column of the cache register, and once the end of the cache register
> reached, the data output continues through the next page. With the
> continuous read mode, it is possible to read out the entire block using
> a single READ command, and once the end of the block reached, the output
> pins become High-Z state. However, during this mode the read command
> doesn't output the OOB area.
>
> Hence, we disable the feature at probe time.
>
> Signed-off-by: Shivamurthy Shastri <[email protected]>
> ---
> drivers/mtd/nand/spi/micron.c | 16 ++++++++++++++++
> include/linux/mtd/spinand.h | 1 +
> 2 files changed, 17 insertions(+)
>
> diff --git a/drivers/mtd/nand/spi/micron.c b/drivers/mtd/nand/spi/micron.c
> index 5fd1f921ef12..a8e947609cd9 100644
> --- a/drivers/mtd/nand/spi/micron.c
> +++ b/drivers/mtd/nand/spi/micron.c
> @@ -18,6 +18,8 @@
> #define MICRON_STATUS_ECC_4TO6_BITFLIPS (3 << 4)
> #define MICRON_STATUS_ECC_7TO8_BITFLIPS (5 << 4)
>
> +#define MICRON_CFG_CONTI_READ BIT(0)

Let's try to use consistent names. The feature bit is
SPINAND_HAS_CR_FEAT_BIT, so maybe MICRON_CFG_CR. BTW, is this really a
micron-specific bit?

> +
> static SPINAND_OP_VARIANTS(read_cache_variants,
> SPINAND_PAGE_READ_FROM_CACHE_QUADIO_OP(0, 2, NULL, 0),
> SPINAND_PAGE_READ_FROM_CACHE_X4_OP(0, 1, NULL, 0),
> @@ -153,8 +155,22 @@ static int micron_spinand_detect(struct spinand_device *spinand)
> return 1;
> }
>
> +static int micron_spinand_init(struct spinand_device *spinand)
> +{
> + /*
> + * M70A device series enable Continuous Read feature at Power-up,
> + * which is not supported. Disable this bit to avoid any possible
> + * failure.
> + */
> + if (spinand->flags == SPINAND_HAS_CR_FEAT_BIT)

if (spinand->flags & SPINAND_HAS_CR_FEAT_BIT)

> + return spinand_upd_cfg(spinand, MICRON_CFG_CONTI_READ, 0);
> +
> + return 0;
> +}
> +
> static const struct spinand_manufacturer_ops micron_spinand_manuf_ops = {
> .detect = micron_spinand_detect,
> + .init = micron_spinand_init,
> };
>
> const struct spinand_manufacturer micron_spinand_manufacturer = {
> diff --git a/include/linux/mtd/spinand.h b/include/linux/mtd/spinand.h
> index 4ea558bd3c46..333149b2855f 100644
> --- a/include/linux/mtd/spinand.h
> +++ b/include/linux/mtd/spinand.h
> @@ -270,6 +270,7 @@ struct spinand_ecc_info {
> };
>
> #define SPINAND_HAS_QE_BIT BIT(0)
> +#define SPINAND_HAS_CR_FEAT_BIT BIT(1)
>
> /**
> * struct spinand_info - Structure used to describe SPI NAND chips

2020-02-27 18:16:23

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Subject: Re: [PATCH v4 5/5] mtd: spinand: micron: Add new Micron SPI NAND devices with multiple dies

On Thu, 6 Feb 2020 21:22:06 +0100
[email protected] wrote:

> From: Shivamurthy Shastri <[email protected]>
>
> Add device table for new Micron SPI NAND devices, which have multiple
> dies.
>
> Also, enable support to select the dies.
>
> Signed-off-by: Shivamurthy Shastri <[email protected]>
> ---
> drivers/mtd/nand/spi/micron.c | 58 +++++++++++++++++++++++++++++++++++
> 1 file changed, 58 insertions(+)
>
> diff --git a/drivers/mtd/nand/spi/micron.c b/drivers/mtd/nand/spi/micron.c
> index 3d3734afc35e..84e1c109ad0c 100644
> --- a/drivers/mtd/nand/spi/micron.c
> +++ b/drivers/mtd/nand/spi/micron.c
> @@ -20,6 +20,15 @@
>
> #define MICRON_CFG_CONTI_READ BIT(0)
>
> +/*
> + * As per datasheet, die selection is done by the 6th bit of Die
> + * Select Register (Address 0xD0).
> + */
> +#define MICRON_DIE_SELECT_REG 0xD0
> +
> +#define MICRON_SELECT_DIE_0 0x00
> +#define MICRON_SELECT_DIE_1 0x40

#define MICRON_SELECT_DIE(x) ((x) << 6)

> +
> static SPINAND_OP_VARIANTS(read_cache_variants,
> SPINAND_PAGE_READ_FROM_CACHE_QUADIO_OP(0, 2, NULL, 0),
> SPINAND_PAGE_READ_FROM_CACHE_X4_OP(0, 1, NULL, 0),
> @@ -66,6 +75,22 @@ static const struct mtd_ooblayout_ops micron_8_ooblayout = {
> .free = micron_8_ooblayout_free,
> };
>
> +static int micron_select_target(struct spinand_device *spinand,
> + unsigned int target)
> +{
> + struct spi_mem_op op = SPINAND_SET_FEATURE_OP(MICRON_DIE_SELECT_REG,
> + spinand->scratchbuf);
> +
> + if (target == 0)
> + *spinand->scratchbuf = MICRON_SELECT_DIE_0;
> + else if (target == 1)
> + *spinand->scratchbuf = MICRON_SELECT_DIE_1;
> + else
> + return -EINVAL;

if (target > 1)
return -EINVAL;

*spinand->scratchbuf = MICRON_SELECT_DIE(target);

> +
> + return spi_mem_exec_op(spinand->spimem, &op);
> +}
> +
> static int micron_8_ecc_get_status(struct spinand_device *spinand,
> u8 status)
> {
> @@ -133,6 +158,17 @@ static const struct spinand_info micron_spinand_table[] = {
> 0,
> SPINAND_ECCINFO(&micron_8_ooblayout,
> micron_8_ecc_get_status)),
> + /* M79A 4Gb 3.3V */
> + SPINAND_INFO("MT29F4G01ADAGD", 0x36,
> + NAND_MEMORG(1, 2048, 128, 64, 2048, 80, 2, 1, 2),
> + NAND_ECCREQ(8, 512),
> + SPINAND_INFO_OP_VARIANTS(&read_cache_variants,
> + &write_cache_variants,
> + &update_cache_variants),
> + 0,
> + SPINAND_ECCINFO(&micron_8_ooblayout,
> + micron_8_ecc_get_status),
> + SPINAND_SELECT_TARGET(micron_select_target)),
> /* M70A 4Gb 3.3V */
> SPINAND_INFO("MT29F4G01ABAFD", 0x34,
> NAND_MEMORG(1, 4096, 256, 64, 2048, 40, 1, 1, 1),
> @@ -153,6 +189,28 @@ static const struct spinand_info micron_spinand_table[] = {
> SPINAND_HAS_CR_FEAT_BIT,
> SPINAND_ECCINFO(&micron_8_ooblayout,
> micron_8_ecc_get_status)),
> + /* M70A 8Gb 3.3V */
> + SPINAND_INFO("MT29F8G01ADAFD", 0x46,
> + NAND_MEMORG(1, 4096, 256, 64, 2048, 40, 1, 1, 2),
> + NAND_ECCREQ(8, 512),
> + SPINAND_INFO_OP_VARIANTS(&read_cache_variants,
> + &write_cache_variants,
> + &update_cache_variants),
> + SPINAND_HAS_CR_FEAT_BIT,
> + SPINAND_ECCINFO(&micron_8_ooblayout,
> + micron_8_ecc_get_status),
> + SPINAND_SELECT_TARGET(micron_select_target)),
> + /* M70A 8Gb 1.8V */
> + SPINAND_INFO("MT29F8G01ADBFD", 0x47,
> + NAND_MEMORG(1, 4096, 256, 64, 2048, 40, 1, 1, 2),
> + NAND_ECCREQ(8, 512),
> + SPINAND_INFO_OP_VARIANTS(&read_cache_variants,
> + &write_cache_variants,
> + &update_cache_variants),
> + SPINAND_HAS_CR_FEAT_BIT,
> + SPINAND_ECCINFO(&micron_8_ooblayout,
> + micron_8_ecc_get_status),
> + SPINAND_SELECT_TARGET(micron_select_target)),
> };
>
> static int micron_spinand_detect(struct spinand_device *spinand)

2020-02-27 18:22:40

[permalink] [raw]

Subject: Re: [PATCH v4 1/5] mtd: spinand: micron: Generalize the OOB layout structure and function names

On Thu, 6 Feb 2020 21:22:02 +0100
[email protected] wrote:

> From: Shivamurthy Shastri <[email protected]>
>
> In order to add new Micron SPI NAND devices, we generalized the OOB
> layout structure and function names.
>
> Signed-off-by: Shivamurthy Shastri <[email protected]>

Reviewed-by: Boris Brezillon <[email protected]>

> ---
> drivers/mtd/nand/spi/micron.c | 28 ++++++++++++++--------------
> 1 file changed, 14 insertions(+), 14 deletions(-)
>
> diff --git a/drivers/mtd/nand/spi/micron.c b/drivers/mtd/nand/spi/micron.c
> index 7d7b1f7fcf71..c028d0d7e236 100644
> --- a/drivers/mtd/nand/spi/micron.c
> +++ b/drivers/mtd/nand/spi/micron.c
> @@ -34,38 +34,38 @@ static SPINAND_OP_VARIANTS(update_cache_variants,
> SPINAND_PROG_LOAD_X4(false, 0, NULL, 0),
> SPINAND_PROG_LOAD(false, 0, NULL, 0));
>
> -static int mt29f2g01abagd_ooblayout_ecc(struct mtd_info *mtd, int section,
> - struct mtd_oob_region *region)
> +static int micron_8_ooblayout_ecc(struct mtd_info *mtd, int section,
> + struct mtd_oob_region *region)
> {
> if (section)
> return -ERANGE;
>
> - region->offset = 64;
> - region->length = 64;
> + region->offset = mtd->oobsize / 2;
> + region->length = mtd->oobsize / 2;
>
> return 0;
> }
>
> -static int mt29f2g01abagd_ooblayout_free(struct mtd_info *mtd, int section,
> - struct mtd_oob_region *region)
> +static int micron_8_ooblayout_free(struct mtd_info *mtd, int section,
> + struct mtd_oob_region *region)
> {
> if (section)
> return -ERANGE;
>
> /* Reserve 2 bytes for the BBM. */
> region->offset = 2;
> - region->length = 62;
> + region->length = (mtd->oobsize / 2) - 2;
>
> return 0;
> }
>
> -static const struct mtd_ooblayout_ops mt29f2g01abagd_ooblayout = {
> - .ecc = mt29f2g01abagd_ooblayout_ecc,
> - .free = mt29f2g01abagd_ooblayout_free,
> +static const struct mtd_ooblayout_ops micron_8_ooblayout = {
> + .ecc = micron_8_ooblayout_ecc,
> + .free = micron_8_ooblayout_free,
> };
>
> -static int mt29f2g01abagd_ecc_get_status(struct spinand_device *spinand,
> - u8 status)
> +static int micron_8_ecc_get_status(struct spinand_device *spinand,
> + u8 status)
> {
> switch (status & MICRON_STATUS_ECC_MASK) {
> case STATUS_ECC_NO_BITFLIPS:
> @@ -98,8 +98,8 @@ static const struct spinand_info micron_spinand_table[] = {
> &write_cache_variants,
> &update_cache_variants),
> 0,
> - SPINAND_ECCINFO(&mt29f2g01abagd_ooblayout,
> - mt29f2g01abagd_ecc_get_status)),
> + SPINAND_ECCINFO(&micron_8_ooblayout,
> + micron_8_ecc_get_status)),
> };
>
> static int micron_spinand_detect(struct spinand_device *spinand)

2020-02-27 18:23:48

[permalink] [raw]

Subject: Re: [PATCH v4 2/5] mtd: spinand: micron: Add new Micron SPI NAND devices

On Thu, 6 Feb 2020 21:22:03 +0100
[email protected] wrote:

> From: Shivamurthy Shastri <[email protected]>
>
> Add device table for M79A and M78A series Micron SPI NAND devices.
>
> Signed-off-by: Shivamurthy Shastri <[email protected]>
> ---
> drivers/mtd/nand/spi/micron.c | 31 +++++++++++++++++++++++++++++++
> 1 file changed, 31 insertions(+)
>
> diff --git a/drivers/mtd/nand/spi/micron.c b/drivers/mtd/nand/spi/micron.c
> index c028d0d7e236..5fd1f921ef12 100644
> --- a/drivers/mtd/nand/spi/micron.c
> +++ b/drivers/mtd/nand/spi/micron.c
> @@ -91,6 +91,7 @@ static int micron_8_ecc_get_status(struct spinand_device *spinand,
> }
>
> static const struct spinand_info micron_spinand_table[] = {
> + /* M79A 2Gb 3.3V */

Should be added in a separate patch.

> SPINAND_INFO("MT29F2G01ABAGD", 0x24,
> NAND_MEMORG(1, 2048, 128, 64, 2048, 40, 2, 1, 1),
> NAND_ECCREQ(8, 512),
> @@ -100,6 +101,36 @@ static const struct spinand_info micron_spinand_table[] = {
> 0,
> SPINAND_ECCINFO(&micron_8_ooblayout,
> micron_8_ecc_get_status)),
> + /* M79A 2Gb 1.8V */
> + SPINAND_INFO("MT29F2G01ABBGD", 0x25,
> + NAND_MEMORG(1, 2048, 128, 64, 2048, 40, 2, 1, 1),
> + NAND_ECCREQ(8, 512),
> + SPINAND_INFO_OP_VARIANTS(&read_cache_variants,
> + &write_cache_variants,
> + &update_cache_variants),
> + 0,
> + SPINAND_ECCINFO(&micron_8_ooblayout,
> + micron_8_ecc_get_status)),
> + /* M78A 1Gb 3.3V */
> + SPINAND_INFO("MT29F1G01ABAFD", 0x14,
> + NAND_MEMORG(1, 2048, 128, 64, 1024, 20, 1, 1, 1),
> + NAND_ECCREQ(8, 512),
> + SPINAND_INFO_OP_VARIANTS(&read_cache_variants,
> + &write_cache_variants,
> + &update_cache_variants),
> + 0,
> + SPINAND_ECCINFO(&micron_8_ooblayout,
> + micron_8_ecc_get_status)),
> + /* M78A 1Gb 1.8V */
> + SPINAND_INFO("MT29F1G01ABAFD", 0x15,
> + NAND_MEMORG(1, 2048, 128, 64, 1024, 20, 1, 1, 1),
> + NAND_ECCREQ(8, 512),
> + SPINAND_INFO_OP_VARIANTS(&read_cache_variants,
> + &write_cache_variants,
> + &update_cache_variants),
> + 0,
> + SPINAND_ECCINFO(&micron_8_ooblayout,
> + micron_8_ecc_get_status)),
> };
>
> static int micron_spinand_detect(struct spinand_device *spinand)

2020-02-27 18:24:17

[permalink] [raw]

Subject: Re: [PATCH v4 4/5] mtd: spinand: micron: Add M70A series Micron SPI NAND devices

On Thu, 6 Feb 2020 21:22:05 +0100
[email protected] wrote:

> From: Shivamurthy Shastri <[email protected]>
>
> Add device table for M70A series Micron SPI NAND devices.
>
> Signed-off-by: Shivamurthy Shastri <[email protected]>

Reviewed-by: Boris Brezillon <[email protected]>

> ---
> drivers/mtd/nand/spi/micron.c | 20 ++++++++++++++++++++
> 1 file changed, 20 insertions(+)
>
> diff --git a/drivers/mtd/nand/spi/micron.c b/drivers/mtd/nand/spi/micron.c
> index a8e947609cd9..3d3734afc35e 100644
> --- a/drivers/mtd/nand/spi/micron.c
> +++ b/drivers/mtd/nand/spi/micron.c
> @@ -133,6 +133,26 @@ static const struct spinand_info micron_spinand_table[] = {
> 0,
> SPINAND_ECCINFO(&micron_8_ooblayout,
> micron_8_ecc_get_status)),
> + /* M70A 4Gb 3.3V */
> + SPINAND_INFO("MT29F4G01ABAFD", 0x34,
> + NAND_MEMORG(1, 4096, 256, 64, 2048, 40, 1, 1, 1),
> + NAND_ECCREQ(8, 512),
> + SPINAND_INFO_OP_VARIANTS(&read_cache_variants,
> + &write_cache_variants,
> + &update_cache_variants),
> + SPINAND_HAS_CR_FEAT_BIT,
> + SPINAND_ECCINFO(&micron_8_ooblayout,
> + micron_8_ecc_get_status)),
> + /* M70A 4Gb 1.8V */
> + SPINAND_INFO("MT29F4G01ABBFD", 0x35,
> + NAND_MEMORG(1, 4096, 256, 64, 2048, 40, 1, 1, 1),
> + NAND_ECCREQ(8, 512),
> + SPINAND_INFO_OP_VARIANTS(&read_cache_variants,
> + &write_cache_variants,
> + &update_cache_variants),
> + SPINAND_HAS_CR_FEAT_BIT,
> + SPINAND_ECCINFO(&micron_8_ooblayout,
> + micron_8_ecc_get_status)),
> };
>
> static int micron_spinand_detect(struct spinand_device *spinand)

2020-02-27 20:17:17

[permalink] [raw]

Subject: RE: [EXT] Re: [PATCH v4 2/5] mtd: spinand: micron: Add new Micron SPI NAND devices

Hi Boris,

Thanks for the review.

>
> On Thu, 6 Feb 2020 21:22:03 +0100
> [email protected] wrote:
>
> > From: Shivamurthy Shastri <[email protected]>
> >
> > Add device table for M79A and M78A series Micron SPI NAND devices.
> >
> > Signed-off-by: Shivamurthy Shastri <[email protected]>
> > ---
> > drivers/mtd/nand/spi/micron.c | 31
> +++++++++++++++++++++++++++++++
> > 1 file changed, 31 insertions(+)
> >
> > diff --git a/drivers/mtd/nand/spi/micron.c
> b/drivers/mtd/nand/spi/micron.c
> > index c028d0d7e236..5fd1f921ef12 100644
> > --- a/drivers/mtd/nand/spi/micron.c
> > +++ b/drivers/mtd/nand/spi/micron.c
> > @@ -91,6 +91,7 @@ static int micron_8_ecc_get_status(struct
> spinand_device *spinand,
> > }
> >
> > static const struct spinand_info micron_spinand_table[] = {
> > + /* M79A 2Gb 3.3V */
>
> Should be added in a separate patch.

Okay, I will create separate patch for each device.

>
> > SPINAND_INFO("MT29F2G01ABAGD", 0x24,
> > NAND_MEMORG(1, 2048, 128, 64, 2048, 40, 2, 1, 1),
> > NAND_ECCREQ(8, 512),
> > @@ -100,6 +101,36 @@ static const struct spinand_info
> micron_spinand_table[] = {
> > 0,
> > SPINAND_ECCINFO(&micron_8_ooblayout,
> > micron_8_ecc_get_status)),
> > + /* M79A 2Gb 1.8V */
> > + SPINAND_INFO("MT29F2G01ABBGD", 0x25,
> > + NAND_MEMORG(1, 2048, 128, 64, 2048, 40, 2, 1, 1),
> > + NAND_ECCREQ(8, 512),
> > + SPINAND_INFO_OP_VARIANTS(&read_cache_variants,
> > + &write_cache_variants,
> > + &update_cache_variants),
> > + 0,
> > + SPINAND_ECCINFO(&micron_8_ooblayout,
> > + micron_8_ecc_get_status)),
> > + /* M78A 1Gb 3.3V */
> > + SPINAND_INFO("MT29F1G01ABAFD", 0x14,
> > + NAND_MEMORG(1, 2048, 128, 64, 1024, 20, 1, 1, 1),
> > + NAND_ECCREQ(8, 512),
> > + SPINAND_INFO_OP_VARIANTS(&read_cache_variants,
> > + &write_cache_variants,
> > + &update_cache_variants),
> > + 0,
> > + SPINAND_ECCINFO(&micron_8_ooblayout,
> > + micron_8_ecc_get_status)),
> > + /* M78A 1Gb 1.8V */
> > + SPINAND_INFO("MT29F1G01ABAFD", 0x15,
> > + NAND_MEMORG(1, 2048, 128, 64, 1024, 20, 1, 1, 1),
> > + NAND_ECCREQ(8, 512),
> > + SPINAND_INFO_OP_VARIANTS(&read_cache_variants,
> > + &write_cache_variants,
> > + &update_cache_variants),
> > + 0,
> > + SPINAND_ECCINFO(&micron_8_ooblayout,
> > + micron_8_ecc_get_status)),
> > };
> >
> > static int micron_spinand_detect(struct spinand_device *spinand)

2020-02-27 20:19:29

[permalink] [raw]

Subject: Re: [EXT] Re: [PATCH v4 2/5] mtd: spinand: micron: Add new Micron SPI NAND devices

On Thu, 27 Feb 2020 20:16:46 +0000
"Shivamurthy Shastri (sshivamurthy)" <[email protected]> wrote:

> Hi Boris,
>
> Thanks for the review.
>
> >
> > On Thu, 6 Feb 2020 21:22:03 +0100
> > [email protected] wrote:
> >
> > > From: Shivamurthy Shastri <[email protected]>
> > >
> > > Add device table for M79A and M78A series Micron SPI NAND devices.
> > >
> > > Signed-off-by: Shivamurthy Shastri <[email protected]>
> > > ---
> > > drivers/mtd/nand/spi/micron.c | 31
> > +++++++++++++++++++++++++++++++
> > > 1 file changed, 31 insertions(+)
> > >
> > > diff --git a/drivers/mtd/nand/spi/micron.c
> > b/drivers/mtd/nand/spi/micron.c
> > > index c028d0d7e236..5fd1f921ef12 100644
> > > --- a/drivers/mtd/nand/spi/micron.c
> > > +++ b/drivers/mtd/nand/spi/micron.c
> > > @@ -91,6 +91,7 @@ static int micron_8_ecc_get_status(struct
> > spinand_device *spinand,
> > > }
> > >
> > > static const struct spinand_info micron_spinand_table[] = {
> > > + /* M79A 2Gb 3.3V */
> >
> > Should be added in a separate patch.
>
> Okay, I will create separate patch for each device.

No, I meant just for this line.

2020-02-27 20:25:41

[permalink] [raw]

Subject: RE: [EXT] Re: [PATCH v4 2/5] mtd: spinand: micron: Add new Micron SPI NAND devices

Hi Boris,

>
> On Thu, 27 Feb 2020 20:16:46 +0000
> "Shivamurthy Shastri (sshivamurthy)" <[email protected]> wrote:
>
> > Hi Boris,
> >
> > Thanks for the review.
> >
> > >
> > > On Thu, 6 Feb 2020 21:22:03 +0100
> > > [email protected] wrote:
> > >
> > > > From: Shivamurthy Shastri <[email protected]>
> > > >
> > > > Add device table for M79A and M78A series Micron SPI NAND devices.
> > > >
> > > > Signed-off-by: Shivamurthy Shastri <[email protected]>
> > > > ---
> > > > drivers/mtd/nand/spi/micron.c | 31
> > > +++++++++++++++++++++++++++++++
> > > > 1 file changed, 31 insertions(+)
> > > >
> > > > diff --git a/drivers/mtd/nand/spi/micron.c
> > > b/drivers/mtd/nand/spi/micron.c
> > > > index c028d0d7e236..5fd1f921ef12 100644
> > > > --- a/drivers/mtd/nand/spi/micron.c
> > > > +++ b/drivers/mtd/nand/spi/micron.c
> > > > @@ -91,6 +91,7 @@ static int micron_8_ecc_get_status(struct
> > > spinand_device *spinand,
> > > > }
> > > >
> > > > static const struct spinand_info micron_spinand_table[] = {
> > > > + /* M79A 2Gb 3.3V */
> > >
> > > Should be added in a separate patch.
> >
> > Okay, I will create separate patch for each device.
>
> No, I meant just for this line.

How about including this line with 1st Patch?

2020-02-27 20:35:19

[permalink] [raw]

Subject: RE: [EXT] Re: [PATCH v4 3/5] mtd: spinand: micron: identify SPI NAND device with Continuous Read mode

Hi Boris,

Thanks for the review.

>
> On Thu, 6 Feb 2020 21:22:04 +0100
> [email protected] wrote:
>
> > From: Shivamurthy Shastri <[email protected]>
> >
> > Add SPINAND_HAS_CR_FEAT_BIT flag to identify the SPI NAND device with
> > the Continuous Read mode.
> >
> > Some of the Micron SPI NAND devices have the "Continuous Read" feature
> > enabled by default, which does not fit the subsystem needs.
> >
> > In this mode, the READ CACHE command doesn't require the starting
> column
> > address. The device always output the data starting from the first
> > column of the cache register, and once the end of the cache register
> > reached, the data output continues through the next page. With the
> > continuous read mode, it is possible to read out the entire block using
> > a single READ command, and once the end of the block reached, the
> output
> > pins become High-Z state. However, during this mode the read command
> > doesn't output the OOB area.
> >
> > Hence, we disable the feature at probe time.
> >
> > Signed-off-by: Shivamurthy Shastri <[email protected]>
> > ---
> > drivers/mtd/nand/spi/micron.c | 16 ++++++++++++++++
> > include/linux/mtd/spinand.h | 1 +
> > 2 files changed, 17 insertions(+)
> >
> > diff --git a/drivers/mtd/nand/spi/micron.c
> b/drivers/mtd/nand/spi/micron.c
> > index 5fd1f921ef12..a8e947609cd9 100644
> > --- a/drivers/mtd/nand/spi/micron.c
> > +++ b/drivers/mtd/nand/spi/micron.c
> > @@ -18,6 +18,8 @@
> > #define MICRON_STATUS_ECC_4TO6_BITFLIPS (3 << 4)
> > #define MICRON_STATUS_ECC_7TO8_BITFLIPS (5 << 4)
> >
> > +#define MICRON_CFG_CONTI_READ BIT(0)
>
> Let's try to use consistent names. The feature bit is
> SPINAND_HAS_CR_FEAT_BIT, so maybe MICRON_CFG_CR. BTW, is this really
> a
> micron-specific bit?

I will change the name.
Yes, only Micron uses this BIT for Continuous Read feature.

>
> > +
> > static SPINAND_OP_VARIANTS(read_cache_variants,
> > SPINAND_PAGE_READ_FROM_CACHE_QUADIO_OP(0, 2,
> NULL, 0),
> > SPINAND_PAGE_READ_FROM_CACHE_X4_OP(0, 1, NULL, 0),
> > @@ -153,8 +155,22 @@ static int micron_spinand_detect(struct
> spinand_device *spinand)
> > return 1;
> > }
> >
> > +static int micron_spinand_init(struct spinand_device *spinand)
> > +{
> > + /*
> > + * M70A device series enable Continuous Read feature at Power-up,
> > + * which is not supported. Disable this bit to avoid any possible
> > + * failure.
> > + */
> > + if (spinand->flags == SPINAND_HAS_CR_FEAT_BIT)
>
> if (spinand->flags & SPINAND_HAS_CR_FEAT_BIT)

Okay.

>
> > + return spinand_upd_cfg(spinand,
> MICRON_CFG_CONTI_READ, 0);
> > +
> > + return 0;
> > +}
> > +
> > static const struct spinand_manufacturer_ops
> micron_spinand_manuf_ops = {
> > .detect = micron_spinand_detect,
> > + .init = micron_spinand_init,
> > };
> >
> > const struct spinand_manufacturer micron_spinand_manufacturer = {
> > diff --git a/include/linux/mtd/spinand.h b/include/linux/mtd/spinand.h
> > index 4ea558bd3c46..333149b2855f 100644
> > --- a/include/linux/mtd/spinand.h
> > +++ b/include/linux/mtd/spinand.h
> > @@ -270,6 +270,7 @@ struct spinand_ecc_info {
> > };
> >
> > #define SPINAND_HAS_QE_BIT BIT(0)
> > +#define SPINAND_HAS_CR_FEAT_BIT BIT(1)
> >
> > /**
> > * struct spinand_info - Structure used to describe SPI NAND chips

2020-02-27 20:53:09