Sync msr-index.h with the kernel sources by adding the new AMD Last Branch
Record Extension Version 2 (LbrExtV2) MSRs.
Signed-off-by: Sandipan Das <[email protected]>
---
tools/arch/x86/include/asm/msr-index.h | 5 +++++
1 file changed, 5 insertions(+)
diff --git a/tools/arch/x86/include/asm/msr-index.h b/tools/arch/x86/include/asm/msr-index.h
index cc615be27a54..7f9eaf497947 100644
--- a/tools/arch/x86/include/asm/msr-index.h
+++ b/tools/arch/x86/include/asm/msr-index.h
@@ -574,6 +574,9 @@
#define MSR_AMD64_PERF_CNTR_GLOBAL_CTL 0xc0000301
#define MSR_AMD64_PERF_CNTR_GLOBAL_STATUS_CLR 0xc0000302
+/* AMD Last Branch Record MSRs */
+#define MSR_AMD64_LBR_SELECT 0xc000010e
+
/* Fam 17h MSRs */
#define MSR_F17H_IRPERF 0xc00000e9
@@ -745,6 +748,8 @@
#define MSR_AMD_DBG_EXTN_CFG 0xc000010f
#define MSR_AMD_SAMP_BR_FROM 0xc0010300
+#define DBG_EXTN_CFG_LBRV2EN BIT_ULL(6)
+
#define MSR_IA32_MPERF 0x000000e7
#define MSR_IA32_APERF 0x000000e8
--
2.34.1
On Thu, Aug 11, 2022 at 06:16:47PM +0530, Sandipan Das wrote:
> Sync msr-index.h with the kernel sources by adding the new AMD Last Branch
> Record Extension Version 2 (LbrExtV2) MSRs.
>
> Signed-off-by: Sandipan Das <[email protected]>
> ---
> tools/arch/x86/include/asm/msr-index.h | 5 +++++
> 1 file changed, 5 insertions(+)
>
> diff --git a/tools/arch/x86/include/asm/msr-index.h b/tools/arch/x86/include/asm/msr-index.h
> index cc615be27a54..7f9eaf497947 100644
> --- a/tools/arch/x86/include/asm/msr-index.h
> +++ b/tools/arch/x86/include/asm/msr-index.h
> @@ -574,6 +574,9 @@
> #define MSR_AMD64_PERF_CNTR_GLOBAL_CTL 0xc0000301
> #define MSR_AMD64_PERF_CNTR_GLOBAL_STATUS_CLR 0xc0000302
>
> +/* AMD Last Branch Record MSRs */
> +#define MSR_AMD64_LBR_SELECT 0xc000010e
curious do we actualy use this in tools somewhere?
jirka
> +
> /* Fam 17h MSRs */
> #define MSR_F17H_IRPERF 0xc00000e9
>
> @@ -745,6 +748,8 @@
> #define MSR_AMD_DBG_EXTN_CFG 0xc000010f
> #define MSR_AMD_SAMP_BR_FROM 0xc0010300
>
> +#define DBG_EXTN_CFG_LBRV2EN BIT_ULL(6)
> +
> #define MSR_IA32_MPERF 0x000000e7
> #define MSR_IA32_APERF 0x000000e8
>
> --
> 2.34.1
>
Hi Jiri,
On 8/12/2022 2:03 PM, Jiri Olsa wrote:
> On Thu, Aug 11, 2022 at 06:16:47PM +0530, Sandipan Das wrote:
>> Sync msr-index.h with the kernel sources by adding the new AMD Last Branch
>> Record Extension Version 2 (LbrExtV2) MSRs.
>>
>> Signed-off-by: Sandipan Das <[email protected]>
>> ---
>> tools/arch/x86/include/asm/msr-index.h | 5 +++++
>> 1 file changed, 5 insertions(+)
>>
>> diff --git a/tools/arch/x86/include/asm/msr-index.h b/tools/arch/x86/include/asm/msr-index.h
>> index cc615be27a54..7f9eaf497947 100644
>> --- a/tools/arch/x86/include/asm/msr-index.h
>> +++ b/tools/arch/x86/include/asm/msr-index.h
>> @@ -574,6 +574,9 @@
>> #define MSR_AMD64_PERF_CNTR_GLOBAL_CTL 0xc0000301
>> #define MSR_AMD64_PERF_CNTR_GLOBAL_STATUS_CLR 0xc0000302
>>
>> +/* AMD Last Branch Record MSRs */
>> +#define MSR_AMD64_LBR_SELECT 0xc000010e
>
> curious do we actualy use this in tools somewhere?
>
> jirka
>
Commit 9dde6cadb92b ("tools arch x86: Sync the msr-index.h copy with the kernel sources")
from Arnaldo says that adding these new MSR definitions in the tools headers allows the
beautification scripts to pick up new entries which can be used for filtering MSR access
traces.
E.g. one can trace the hardware LBR branch filter bits getting written to the LBR_SELECT
MSR while recording branches.
$ perf record -j any,u true
$ perf record -j any_call,u true
$ sudo perf trace -e msr:write_msr/max-stack=32/ --filter="msr == AMD64_LBR_SELECT"
[...]
224568.130 perf/9093 msr:write_msr(msr: AMD64_LBR_SELECT, val: 1)
do_trace_write_msr ([kernel.kallsyms])
do_trace_write_msr ([kernel.kallsyms])
native_write_msr ([kernel.kallsyms])
amd_pmu_lbr_enable_all ([kernel.kallsyms])
amd_pmu_v2_enable_all ([kernel.kallsyms])
x86_pmu_enable ([kernel.kallsyms])
ctx_resched ([kernel.kallsyms])
perf_event_exec ([kernel.kallsyms])
begin_new_exec ([kernel.kallsyms])
load_elf_binary ([kernel.kallsyms])
bprm_execve ([kernel.kallsyms])
do_execveat_common.isra.0 ([kernel.kallsyms])
__x64_sys_execve ([kernel.kallsyms])
do_syscall_64 ([kernel.kallsyms])
entry_SYSCALL_64 ([kernel.kallsyms])
execve (/usr/lib/x86_64-linux-gnu/libc.so.6)
[...]
302748.439 perf/9126 msr:write_msr(msr: AMD64_LBR_SELECT, val: 229)
do_trace_write_msr ([kernel.kallsyms])
do_trace_write_msr ([kernel.kallsyms])
native_write_msr ([kernel.kallsyms])
amd_pmu_lbr_enable_all ([kernel.kallsyms])
amd_pmu_v2_enable_all ([kernel.kallsyms])
x86_pmu_enable ([kernel.kallsyms])
ctx_resched ([kernel.kallsyms])
perf_event_exec ([kernel.kallsyms])
begin_new_exec ([kernel.kallsyms])
load_elf_binary ([kernel.kallsyms])
bprm_execve ([kernel.kallsyms])
do_execveat_common.isra.0 ([kernel.kallsyms])
__x64_sys_execve ([kernel.kallsyms])
do_syscall_64 ([kernel.kallsyms])
entry_SYSCALL_64 ([kernel.kallsyms])
execve (/usr/lib/x86_64-linux-gnu/libc.so.6)
[...]
I can add this example to the commit message in the next revision.
- Sandipan
Em Fri, Aug 12, 2022 at 02:33:46PM +0530, Sandipan Das escreveu:
> Hi Jiri,
>
> On 8/12/2022 2:03 PM, Jiri Olsa wrote:
> > On Thu, Aug 11, 2022 at 06:16:47PM +0530, Sandipan Das wrote:
> >> Sync msr-index.h with the kernel sources by adding the new AMD Last Branch
> >> Record Extension Version 2 (LbrExtV2) MSRs.
> >>
> >> Signed-off-by: Sandipan Das <[email protected]>
> >> ---
> >> tools/arch/x86/include/asm/msr-index.h | 5 +++++
> >> 1 file changed, 5 insertions(+)
> >>
> >> diff --git a/tools/arch/x86/include/asm/msr-index.h b/tools/arch/x86/include/asm/msr-index.h
> >> index cc615be27a54..7f9eaf497947 100644
> >> --- a/tools/arch/x86/include/asm/msr-index.h
> >> +++ b/tools/arch/x86/include/asm/msr-index.h
> >> @@ -574,6 +574,9 @@
> >> #define MSR_AMD64_PERF_CNTR_GLOBAL_CTL 0xc0000301
> >> #define MSR_AMD64_PERF_CNTR_GLOBAL_STATUS_CLR 0xc0000302
> >>
> >> +/* AMD Last Branch Record MSRs */
> >> +#define MSR_AMD64_LBR_SELECT 0xc000010e
> >
> > curious do we actualy use this in tools somewhere?
> >
> > jirka
> >
>
> Commit 9dde6cadb92b ("tools arch x86: Sync the msr-index.h copy with the kernel sources")
> from Arnaldo says that adding these new MSR definitions in the tools headers allows the
> beautification scripts to pick up new entries which can be used for filtering MSR access
> traces.
Right, in this specific case that header should be moved to
tools/perf/trace/beauty/include/, as it is only used to harvest new MSRs
by:
⬢[acme@toolbox perf]$ tools/perf/trace/beauty/tracepoints/x86_msr.sh | wc -l
328
⬢[acme@toolbox perf]$ tools/perf/trace/beauty/tracepoints/x86_msr.sh | head
static const char *x86_MSRs[] = {
[0x00000000] = "IA32_P5_MC_ADDR",
[0x00000001] = "IA32_P5_MC_TYPE",
[0x00000010] = "IA32_TSC",
[0x00000017] = "IA32_PLATFORM_ID",
[0x0000001b] = "IA32_APICBASE",
[0x00000020] = "KNC_PERFCTR0",
[0x00000021] = "KNC_PERFCTR1",
[0x00000028] = "KNC_EVNTSEL0",
[0x00000029] = "KNC_EVNTSEL1",
⬢[acme@toolbox perf]$
Other headers we have copies from the kernel may be used both for
harvesting non-enum enumerations like those to pretty print and use in
tracepoint filter expressions in 'perf trace', and in building perf on
older systems.
The preferred way is for kernel developers not to update the copies when
they add new stuff to the original file, so that perf developers have
the opportunity of checking if the new original file in the kernel don't
break the scripts in tools/perf/, or if the new additions are note
matched by regexps in the perf/tools/trace/beauty/ extraction scripts.
But kernel developers are welcome to update it iif they do these checks
themselves, at the very least do a 'make -C tools/perf' to check if it
builds before/after the update.
- Arnaldo
> E.g. one can trace the hardware LBR branch filter bits getting written to the LBR_SELECT
> MSR while recording branches.
>
> $ perf record -j any,u true
> $ perf record -j any_call,u true
>
> $ sudo perf trace -e msr:write_msr/max-stack=32/ --filter="msr == AMD64_LBR_SELECT"
>
> [...]
> 224568.130 perf/9093 msr:write_msr(msr: AMD64_LBR_SELECT, val: 1)
> do_trace_write_msr ([kernel.kallsyms])
> do_trace_write_msr ([kernel.kallsyms])
> native_write_msr ([kernel.kallsyms])
> amd_pmu_lbr_enable_all ([kernel.kallsyms])
> amd_pmu_v2_enable_all ([kernel.kallsyms])
> x86_pmu_enable ([kernel.kallsyms])
> ctx_resched ([kernel.kallsyms])
> perf_event_exec ([kernel.kallsyms])
> begin_new_exec ([kernel.kallsyms])
> load_elf_binary ([kernel.kallsyms])
> bprm_execve ([kernel.kallsyms])
> do_execveat_common.isra.0 ([kernel.kallsyms])
> __x64_sys_execve ([kernel.kallsyms])
> do_syscall_64 ([kernel.kallsyms])
> entry_SYSCALL_64 ([kernel.kallsyms])
> execve (/usr/lib/x86_64-linux-gnu/libc.so.6)
> [...]
> 302748.439 perf/9126 msr:write_msr(msr: AMD64_LBR_SELECT, val: 229)
> do_trace_write_msr ([kernel.kallsyms])
> do_trace_write_msr ([kernel.kallsyms])
> native_write_msr ([kernel.kallsyms])
> amd_pmu_lbr_enable_all ([kernel.kallsyms])
> amd_pmu_v2_enable_all ([kernel.kallsyms])
> x86_pmu_enable ([kernel.kallsyms])
> ctx_resched ([kernel.kallsyms])
> perf_event_exec ([kernel.kallsyms])
> begin_new_exec ([kernel.kallsyms])
> load_elf_binary ([kernel.kallsyms])
> bprm_execve ([kernel.kallsyms])
> do_execveat_common.isra.0 ([kernel.kallsyms])
> __x64_sys_execve ([kernel.kallsyms])
> do_syscall_64 ([kernel.kallsyms])
> entry_SYSCALL_64 ([kernel.kallsyms])
> execve (/usr/lib/x86_64-linux-gnu/libc.so.6)
> [...]
>
> I can add this example to the commit message in the next revision.
>
>
> - Sandipan
--
- Arnaldo
Em Fri, Aug 12, 2022 at 02:33:46PM +0530, Sandipan Das escreveu:
> Hi Jiri,
>
> On 8/12/2022 2:03 PM, Jiri Olsa wrote:
> > On Thu, Aug 11, 2022 at 06:16:47PM +0530, Sandipan Das wrote:
> >> Sync msr-index.h with the kernel sources by adding the new AMD Last Branch
> >> Record Extension Version 2 (LbrExtV2) MSRs.
> >>
> >> Signed-off-by: Sandipan Das <[email protected]>
> >> ---
> >> tools/arch/x86/include/asm/msr-index.h | 5 +++++
> >> 1 file changed, 5 insertions(+)
> >>
> >> diff --git a/tools/arch/x86/include/asm/msr-index.h b/tools/arch/x86/include/asm/msr-index.h
> >> index cc615be27a54..7f9eaf497947 100644
> >> --- a/tools/arch/x86/include/asm/msr-index.h
> >> +++ b/tools/arch/x86/include/asm/msr-index.h
> >> @@ -574,6 +574,9 @@
> >> #define MSR_AMD64_PERF_CNTR_GLOBAL_CTL 0xc0000301
> >> #define MSR_AMD64_PERF_CNTR_GLOBAL_STATUS_CLR 0xc0000302
> >>
> >> +/* AMD Last Branch Record MSRs */
> >> +#define MSR_AMD64_LBR_SELECT 0xc000010e
> >
> > curious do we actualy use this in tools somewhere?
> >
> > jirka
> >
>
> Commit 9dde6cadb92b ("tools arch x86: Sync the msr-index.h copy with the kernel sources")
> from Arnaldo says that adding these new MSR definitions in the tools headers allows the
> beautification scripts to pick up new entries which can be used for filtering MSR access
> traces.
>
> E.g. one can trace the hardware LBR branch filter bits getting written to the LBR_SELECT
> MSR while recording branches.
>
> $ perf record -j any,u true
> $ perf record -j any_call,u true
>
> $ sudo perf trace -e msr:write_msr/max-stack=32/ --filter="msr == AMD64_LBR_SELECT"
>
> [...]
> 224568.130 perf/9093 msr:write_msr(msr: AMD64_LBR_SELECT, val: 1)
> do_trace_write_msr ([kernel.kallsyms])
> do_trace_write_msr ([kernel.kallsyms])
> native_write_msr ([kernel.kallsyms])
> amd_pmu_lbr_enable_all ([kernel.kallsyms])
> amd_pmu_v2_enable_all ([kernel.kallsyms])
> x86_pmu_enable ([kernel.kallsyms])
> ctx_resched ([kernel.kallsyms])
> perf_event_exec ([kernel.kallsyms])
> begin_new_exec ([kernel.kallsyms])
> load_elf_binary ([kernel.kallsyms])
> bprm_execve ([kernel.kallsyms])
> do_execveat_common.isra.0 ([kernel.kallsyms])
> __x64_sys_execve ([kernel.kallsyms])
> do_syscall_64 ([kernel.kallsyms])
> entry_SYSCALL_64 ([kernel.kallsyms])
> execve (/usr/lib/x86_64-linux-gnu/libc.so.6)
> [...]
> 302748.439 perf/9126 msr:write_msr(msr: AMD64_LBR_SELECT, val: 229)
> do_trace_write_msr ([kernel.kallsyms])
> do_trace_write_msr ([kernel.kallsyms])
> native_write_msr ([kernel.kallsyms])
> amd_pmu_lbr_enable_all ([kernel.kallsyms])
> amd_pmu_v2_enable_all ([kernel.kallsyms])
> x86_pmu_enable ([kernel.kallsyms])
> ctx_resched ([kernel.kallsyms])
> perf_event_exec ([kernel.kallsyms])
> begin_new_exec ([kernel.kallsyms])
> load_elf_binary ([kernel.kallsyms])
> bprm_execve ([kernel.kallsyms])
> do_execveat_common.isra.0 ([kernel.kallsyms])
> __x64_sys_execve ([kernel.kallsyms])
> do_syscall_64 ([kernel.kallsyms])
> entry_SYSCALL_64 ([kernel.kallsyms])
> execve (/usr/lib/x86_64-linux-gnu/libc.so.6)
> [...]
>
> I can add this example to the commit message in the next revision.
Right, you can reuse something from my messages updating this file or,
better, show an example like you did above, for the thing that you are
working at that moment :-)
One of the things we need to do is:
perf trace -e msr:write_msr/max-stack=32/ --filter-help
And then it should look what are the strings that can be used for that
specific msr:write_msr tracepoint.
Also have tab expansion in the --filter= part :-)
- Arnaldo
Hi Arnaldo,
On 8/13/2022 1:09 AM, Arnaldo Carvalho de Melo wrote:
> Em Fri, Aug 12, 2022 at 02:33:46PM +0530, Sandipan Das escreveu:
>> Hi Jiri,
>>
>> On 8/12/2022 2:03 PM, Jiri Olsa wrote:
>>> On Thu, Aug 11, 2022 at 06:16:47PM +0530, Sandipan Das wrote:
>>>> Sync msr-index.h with the kernel sources by adding the new AMD Last Branch
>>>> Record Extension Version 2 (LbrExtV2) MSRs.
>>>>
>>>> Signed-off-by: Sandipan Das <[email protected]>
>>>> ---
>>>> tools/arch/x86/include/asm/msr-index.h | 5 +++++
>>>> 1 file changed, 5 insertions(+)
>>>>
>>>> diff --git a/tools/arch/x86/include/asm/msr-index.h b/tools/arch/x86/include/asm/msr-index.h
>>>> index cc615be27a54..7f9eaf497947 100644
>>>> --- a/tools/arch/x86/include/asm/msr-index.h
>>>> +++ b/tools/arch/x86/include/asm/msr-index.h
>>>> @@ -574,6 +574,9 @@
>>>> #define MSR_AMD64_PERF_CNTR_GLOBAL_CTL 0xc0000301
>>>> #define MSR_AMD64_PERF_CNTR_GLOBAL_STATUS_CLR 0xc0000302
>>>>
>>>> +/* AMD Last Branch Record MSRs */
>>>> +#define MSR_AMD64_LBR_SELECT 0xc000010e
>>>
>>> curious do we actualy use this in tools somewhere?
>>>
>>> jirka
>>>
>>
>> Commit 9dde6cadb92b ("tools arch x86: Sync the msr-index.h copy with the kernel sources")
>> from Arnaldo says that adding these new MSR definitions in the tools headers allows the
>> beautification scripts to pick up new entries which can be used for filtering MSR access
>> traces.
>>
>> E.g. one can trace the hardware LBR branch filter bits getting written to the LBR_SELECT
>> MSR while recording branches.
>>
>> $ perf record -j any,u true
>> $ perf record -j any_call,u true
>>
>> $ sudo perf trace -e msr:write_msr/max-stack=32/ --filter="msr == AMD64_LBR_SELECT"
>>
>> [...]
>> 224568.130 perf/9093 msr:write_msr(msr: AMD64_LBR_SELECT, val: 1)
>> do_trace_write_msr ([kernel.kallsyms])
>> do_trace_write_msr ([kernel.kallsyms])
>> native_write_msr ([kernel.kallsyms])
>> amd_pmu_lbr_enable_all ([kernel.kallsyms])
>> amd_pmu_v2_enable_all ([kernel.kallsyms])
>> x86_pmu_enable ([kernel.kallsyms])
>> ctx_resched ([kernel.kallsyms])
>> perf_event_exec ([kernel.kallsyms])
>> begin_new_exec ([kernel.kallsyms])
>> load_elf_binary ([kernel.kallsyms])
>> bprm_execve ([kernel.kallsyms])
>> do_execveat_common.isra.0 ([kernel.kallsyms])
>> __x64_sys_execve ([kernel.kallsyms])
>> do_syscall_64 ([kernel.kallsyms])
>> entry_SYSCALL_64 ([kernel.kallsyms])
>> execve (/usr/lib/x86_64-linux-gnu/libc.so.6)
>> [...]
>> 302748.439 perf/9126 msr:write_msr(msr: AMD64_LBR_SELECT, val: 229)
>> do_trace_write_msr ([kernel.kallsyms])
>> do_trace_write_msr ([kernel.kallsyms])
>> native_write_msr ([kernel.kallsyms])
>> amd_pmu_lbr_enable_all ([kernel.kallsyms])
>> amd_pmu_v2_enable_all ([kernel.kallsyms])
>> x86_pmu_enable ([kernel.kallsyms])
>> ctx_resched ([kernel.kallsyms])
>> perf_event_exec ([kernel.kallsyms])
>> begin_new_exec ([kernel.kallsyms])
>> load_elf_binary ([kernel.kallsyms])
>> bprm_execve ([kernel.kallsyms])
>> do_execveat_common.isra.0 ([kernel.kallsyms])
>> __x64_sys_execve ([kernel.kallsyms])
>> do_syscall_64 ([kernel.kallsyms])
>> entry_SYSCALL_64 ([kernel.kallsyms])
>> execve (/usr/lib/x86_64-linux-gnu/libc.so.6)
>> [...]
>>
>> I can add this example to the commit message in the next revision.
>
> Right, you can reuse something from my messages updating this file or,
> better, show an example like you did above, for the thing that you are
> working at that moment :-)
>
> One of the things we need to do is:
>
> perf trace -e msr:write_msr/max-stack=32/ --filter-help
>
> And then it should look what are the strings that can be used for that
> specific msr:write_msr tracepoint.
>
> Also have tab expansion in the --filter= part :-)
>
Thanks for the suggestions. Will incorporate them in the next revision.
- Sandipan