2023-03-24 16:24:38

by Christophe Kerello

[permalink] [raw]
Subject: [PATCH] mtd: rawnand: stm32_fmc2: do not support EDO mode

FMC2 controller does not support EDO mode (timings mode 4 and 5).

Signed-off-by: Christophe Kerello <[email protected]>
Fixes: 2cd457f328c1 ("mtd: rawnand: stm32_fmc2: add STM32 FMC2 NAND flash controller driver")
---
drivers/mtd/nand/raw/stm32_fmc2_nand.c | 3 +++
1 file changed, 3 insertions(+)

diff --git a/drivers/mtd/nand/raw/stm32_fmc2_nand.c b/drivers/mtd/nand/raw/stm32_fmc2_nand.c
index 5d627048c420..3abb63d00a0b 100644
--- a/drivers/mtd/nand/raw/stm32_fmc2_nand.c
+++ b/drivers/mtd/nand/raw/stm32_fmc2_nand.c
@@ -1531,6 +1531,9 @@ static int stm32_fmc2_nfc_setup_interface(struct nand_chip *chip, int chipnr,
if (IS_ERR(sdrt))
return PTR_ERR(sdrt);

+ if (sdrt->tRC_min < 30000)
+ return -EOPNOTSUPP;
+
if (chipnr == NAND_DATA_IFACE_CHECK_ONLY)
return 0;

--
2.25.1


2023-03-24 16:31:48

by Miquel Raynal

[permalink] [raw]
Subject: Re: [PATCH] mtd: rawnand: stm32_fmc2: do not support EDO mode

Hi Christophe,

[email protected] wrote on Fri, 24 Mar 2023 17:09:18 +0100:

> FMC2 controller does not support EDO mode (timings mode 4 and 5).
>
> Signed-off-by: Christophe Kerello <[email protected]>
> Fixes: 2cd457f328c1 ("mtd: rawnand: stm32_fmc2: add STM32 FMC2 NAND flash controller driver")
> ---
> drivers/mtd/nand/raw/stm32_fmc2_nand.c | 3 +++
> 1 file changed, 3 insertions(+)
>
> diff --git a/drivers/mtd/nand/raw/stm32_fmc2_nand.c b/drivers/mtd/nand/raw/stm32_fmc2_nand.c
> index 5d627048c420..3abb63d00a0b 100644
> --- a/drivers/mtd/nand/raw/stm32_fmc2_nand.c
> +++ b/drivers/mtd/nand/raw/stm32_fmc2_nand.c
> @@ -1531,6 +1531,9 @@ static int stm32_fmc2_nfc_setup_interface(struct nand_chip *chip, int chipnr,
> if (IS_ERR(sdrt))
> return PTR_ERR(sdrt);
>
> + if (sdrt->tRC_min < 30000)

When introducing NV-DDR support we as well added a timings.mode field,
perhaps you could use it?

> + return -EOPNOTSUPP;
> +
> if (chipnr == NAND_DATA_IFACE_CHECK_ONLY)
> return 0;
>


Thanks,
Miquèl

2023-03-24 16:36:13

by Christophe Kerello

[permalink] [raw]
Subject: Re: [PATCH] mtd: rawnand: stm32_fmc2: do not support EDO mode

Hello Miquel,

On 3/24/23 17:25, Miquel Raynal wrote:
> Hi Christophe,
>
> [email protected] wrote on Fri, 24 Mar 2023 17:09:18 +0100:
>
>> FMC2 controller does not support EDO mode (timings mode 4 and 5).
>>
>> Signed-off-by: Christophe Kerello <[email protected]>
>> Fixes: 2cd457f328c1 ("mtd: rawnand: stm32_fmc2: add STM32 FMC2 NAND flash controller driver")
>> ---
>> drivers/mtd/nand/raw/stm32_fmc2_nand.c | 3 +++
>> 1 file changed, 3 insertions(+)
>>
>> diff --git a/drivers/mtd/nand/raw/stm32_fmc2_nand.c b/drivers/mtd/nand/raw/stm32_fmc2_nand.c
>> index 5d627048c420..3abb63d00a0b 100644
>> --- a/drivers/mtd/nand/raw/stm32_fmc2_nand.c
>> +++ b/drivers/mtd/nand/raw/stm32_fmc2_nand.c
>> @@ -1531,6 +1531,9 @@ static int stm32_fmc2_nfc_setup_interface(struct nand_chip *chip, int chipnr,
>> if (IS_ERR(sdrt))
>> return PTR_ERR(sdrt);
>>
>> + if (sdrt->tRC_min < 30000)
>
> When introducing NV-DDR support we as well added a timings.mode field,
> perhaps you could use it?

Yes, I can use it. It will be done in V2.

Regards,
Christophe Kerello.

>
>> + return -EOPNOTSUPP;
>> +
>> if (chipnr == NAND_DATA_IFACE_CHECK_ONLY)
>> return 0;
>>
>
>
> Thanks,
> Miquèl

2023-03-27 08:10:09

by Christophe Kerello

[permalink] [raw]
Subject: Re: [PATCH] mtd: rawnand: stm32_fmc2: do not support EDO mode

Hello Miquel,

On 3/24/23 17:34, Christophe Kerello wrote:
> Hello Miquel,
>
> On 3/24/23 17:25, Miquel Raynal wrote:
>> Hi Christophe,
>>
>> [email protected] wrote on Fri, 24 Mar 2023 17:09:18 +0100:
>>
>>> FMC2 controller does not support EDO mode (timings mode 4 and 5).
>>>
>>> Signed-off-by: Christophe Kerello <[email protected]>
>>> Fixes: 2cd457f328c1 ("mtd: rawnand: stm32_fmc2: add STM32 FMC2 NAND
>>> flash controller driver")
>>> ---
>>>   drivers/mtd/nand/raw/stm32_fmc2_nand.c | 3 +++
>>>   1 file changed, 3 insertions(+)
>>>
>>> diff --git a/drivers/mtd/nand/raw/stm32_fmc2_nand.c
>>> b/drivers/mtd/nand/raw/stm32_fmc2_nand.c
>>> index 5d627048c420..3abb63d00a0b 100644
>>> --- a/drivers/mtd/nand/raw/stm32_fmc2_nand.c
>>> +++ b/drivers/mtd/nand/raw/stm32_fmc2_nand.c
>>> @@ -1531,6 +1531,9 @@ static int
>>> stm32_fmc2_nfc_setup_interface(struct nand_chip *chip, int chipnr,
>>>       if (IS_ERR(sdrt))
>>>           return PTR_ERR(sdrt);
>>> +    if (sdrt->tRC_min < 30000)
>>
>> When introducing NV-DDR support we as well added a timings.mode field,
>> perhaps you could use it?
>
> Yes, I can use it. It will be done in V2.
>
> Regards,
> Christophe Kerello.
>

I had a look at Kernel LTS, and timings.mode was introduced on Kernel
LTS 5.10. As this patch has also to be applied on Kernel LTS 5.4, my
proposal is to send a new patch set. The first patch will be the current
patch (fix for all Kernel LTS) and the second patch will use
timings.mode instead of checking tRC_min timings for next Kernel
delivery. Is this proposal acceptable?

Regards,
Christophe Kerello.

>>
>>> +        return -EOPNOTSUPP;
>>> +
>>>       if (chipnr == NAND_DATA_IFACE_CHECK_ONLY)
>>>           return 0;
>>
>>
>> Thanks,
>> Miquèl

2023-03-27 08:21:24

by Miquel Raynal

[permalink] [raw]
Subject: Re: [PATCH] mtd: rawnand: stm32_fmc2: do not support EDO mode

Hi Christophe,

[email protected] wrote on Mon, 27 Mar 2023 10:02:13 +0200:

> Hello Miquel,
>
> On 3/24/23 17:34, Christophe Kerello wrote:
> > Hello Miquel,
> >
> > On 3/24/23 17:25, Miquel Raynal wrote:
> >> Hi Christophe,
> >>
> >> [email protected] wrote on Fri, 24 Mar 2023 17:09:18 +0100:
> >>
> >>> FMC2 controller does not support EDO mode (timings mode 4 and 5).
> >>>
> >>> Signed-off-by: Christophe Kerello <[email protected]>
> >>> Fixes: 2cd457f328c1 ("mtd: rawnand: stm32_fmc2: add STM32 FMC2 NAND >>> flash controller driver")
> >>> ---
> >>>   drivers/mtd/nand/raw/stm32_fmc2_nand.c | 3 +++
> >>>   1 file changed, 3 insertions(+)
> >>>
> >>> diff --git a/drivers/mtd/nand/raw/stm32_fmc2_nand.c >>> b/drivers/mtd/nand/raw/stm32_fmc2_nand.c
> >>> index 5d627048c420..3abb63d00a0b 100644
> >>> --- a/drivers/mtd/nand/raw/stm32_fmc2_nand.c
> >>> +++ b/drivers/mtd/nand/raw/stm32_fmc2_nand.c
> >>> @@ -1531,6 +1531,9 @@ static int >>> stm32_fmc2_nfc_setup_interface(struct nand_chip *chip, int chipnr,
> >>>       if (IS_ERR(sdrt))
> >>>           return PTR_ERR(sdrt);
> >>> +    if (sdrt->tRC_min < 30000)
> >>
> >> When introducing NV-DDR support we as well added a timings.mode field,
> >> perhaps you could use it?
> >
> > Yes, I can use it. It will be done in V2.
> >
> > Regards,
> > Christophe Kerello.
> >
>
> I had a look at Kernel LTS, and timings.mode was introduced on Kernel LTS 5.10. As this patch has also to be applied on Kernel LTS 5.4, my proposal is to send a new patch set. The first patch will be the current patch (fix for all Kernel LTS) and the second patch will use timings.mode instead of checking tRC_min timings for next Kernel delivery. Is this proposal acceptable?

Works for me!

Thanks,
Miquèl