2022-04-06 15:15:39

by Manikanta Pubbisetty

[permalink] [raw]
Subject: [PATCH v4 00/12] add support for WCN6750

WCN6750 is non-DBS 2x2 11AX chipset. Unlike QCA6390/WCN6855 which
are DBS (dual band simultaneous) solutions (2 LMACs), WCN6750 has a
single LMAC supporting 2G, 5G and 6G bands. It can be operated only
on one band at any given point.

WCN6750 is a PCIe device. Unlike other supported ATH11K PCIe devices
which are directly attached to APSS (Application Processor SubSystem),
WCN6750 is not attached to APSS, it is attached to the WPSS
(Wireless Processor SubSystem) Q6 processor, the FW which runs on the
Q6 processor will enumerate the PCIe device. Since APSS is unaware of
such a device, it has to be registered as a platform device(AHB) to the
kernel for device probing. Like other AHB devices, remoteproc APIs are
used to boot up or shutdown of WCN6750.

WCN6750 uses both AHB and PCIe ATH11K APIs for it's operation.
It uses AHB APIs for device probe and booting of the remote processor.
Once device is booted up, it uses ATH11K PCIe APIs for initialization
and register access. Hence, it is referred as hybrid bus device in
the rest of this series.

Since the chip is enumerated by WPSS Q6, device information like
BAR and BAR size is not known to the APSS processor. A new QMI message
called device info QMI request will be sent to the target for fetching
these details.

STA and AP modes are supported; Basic connectivity and ping are
verified in both the modes.

An important point to note is that though WCN6750 is a PCIe device,
it cannot be attached to any other platform except on Qualcomm
Snapdragon SoCs due to the aforementioned reasons.

Tested-on: WCN6750 hw1.0 AHB WLAN.MSL.1.0.1-00573-QCAMSLSWPLZ-1
Tested-on: WCN6855 hw2.0 PCI WLAN.HSP.1.1-01720.1-QCAHSPSWPL_V1_V2_SILICONZ_LITE-1
Tested-on: QCN9074 hw1.0 PCI WLAN.HK.2.5.0.1-01100-QCAHKSWPL_SILICONZ-1
Tested-on: IPQ8074 hw2.0 AHB WLAN.HK.2.4.0.1-00192-QCAHKSWPL_SILICONZ-1

Manikanta Pubbisetty (12):
dt: bindings: net: add bindings of WCN6750 for ath11k
ath11k: Add HW params for WCN6750
ath11k: Add bus params for WCN6750
ath11k: Add register access logic for WCN6750
ath11k: Fetch device information via QMI for WCN6750
ath11k: Add QMI changes for WCN6750
ath11k: HAL changes to support WCN6750
ath11k: Datapath changes to support WCN6750
ath11k: Do not put HW in DBS mode for WCN6750
ath11k: WMI changes to support WCN6750
ath11k: Update WBM idle ring HP after FW mode on
ath11k: Add support for WCN6750 device
---
V4:
- Addressed comments on DT binding (Matthias Kaehlcke <[email protected]>)
- Rebased on ToT SHAID: 607c3dc2750382befa0f3f20063943bd058a2bc1

V3:
- Patch series with 19 patches is split in 2 patch series, this is the second one
- Rebased on ToT SHAID: 7316a74e54318d0cd648242b18ea83cdef6dda96
- Addessed DT binding concerns
- PCI common code is moved to ath11k.ko
- Added a new HW param for WCN6750 which uses fixed firmware memory, this is
needed to differentiate WCN6750 from other ATH11K chipsets
- Modified the logic in patch "ath11k: Add support for WCN6750 device" based on the latest DT binding

V2:
- Rebased on ToT
- Addressed comments on DT binding

.../bindings/net/wireless/qcom,ath11k.yaml | 361 ++++++++++++------
drivers/net/wireless/ath/ath11k/Makefile | 5 +-
drivers/net/wireless/ath/ath11k/ahb.c | 162 +++++++-
drivers/net/wireless/ath/ath11k/ahb.h | 1 +
drivers/net/wireless/ath/ath11k/ce.c | 4 +-
drivers/net/wireless/ath/ath11k/core.c | 118 +++++-
drivers/net/wireless/ath/ath11k/core.h | 5 +
drivers/net/wireless/ath/ath11k/hal.c | 15 +-
drivers/net/wireless/ath/ath11k/hal.h | 15 +-
drivers/net/wireless/ath/ath11k/hw.c | 166 ++++++++
drivers/net/wireless/ath/ath11k/hw.h | 11 +
drivers/net/wireless/ath/ath11k/pci.c | 4 +
drivers/net/wireless/ath/ath11k/pcic.c | 76 ++--
drivers/net/wireless/ath/ath11k/qmi.c | 220 +++++++++--
drivers/net/wireless/ath/ath11k/qmi.h | 26 +-
drivers/net/wireless/ath/ath11k/wmi.c | 13 +-
16 files changed, 976 insertions(+), 226 deletions(-)

--
2.35.1


2022-04-06 15:15:59

by Manikanta Pubbisetty

[permalink] [raw]
Subject: [PATCH v4 02/12] ath11k: Add HW params for WCN6750

Add HW params for WCN6750. It is similar to the HW params
of QCA6390 with few differences wrt DP APIs and register
offsets.

Tested-on: WCN6750 hw1.0 AHB WLAN.MSL.1.0.1-00573-QCAMSLSWPLZ-1
Tested-on: WCN6855 hw2.0 PCI WLAN.HSP.1.1-01720.1-QCAHSPSWPL_V1_V2_SILICONZ_LITE-1
Tested-on: QCN9074 hw1.0 PCI WLAN.HK.2.5.0.1-01100-QCAHKSWPL_SILICONZ-1
Tested-on: IPQ8074 hw2.0 AHB WLAN.HK.2.4.0.1-00192-QCAHKSWPL_SILICONZ-1

Signed-off-by: Manikanta Pubbisetty <[email protected]>
---
drivers/net/wireless/ath/ath11k/core.c | 61 ++++++++++++++++++++++++++
drivers/net/wireless/ath/ath11k/core.h | 1 +
drivers/net/wireless/ath/ath11k/qmi.h | 2 +
3 files changed, 64 insertions(+)

diff --git a/drivers/net/wireless/ath/ath11k/core.c b/drivers/net/wireless/ath/ath11k/core.c
index cbac1919867f..8695f999acb2 100644
--- a/drivers/net/wireless/ath/ath11k/core.c
+++ b/drivers/net/wireless/ath/ath11k/core.c
@@ -427,6 +427,67 @@ static const struct ath11k_hw_params ath11k_hw_params[] = {
.dbr_debug_support = false,
.global_reset = true,
},
+ {
+ .name = "wcn6750 hw1.0",
+ .hw_rev = ATH11K_HW_WCN6750_HW10,
+ .fw = {
+ .dir = "WCN6750/hw1.0",
+ .board_size = 256 * 1024,
+ .cal_offset = 128 * 1024,
+ },
+ .max_radios = 1,
+ .bdf_addr = 0x4B0C0000,
+ .ring_mask = &ath11k_hw_ring_mask_qca6390,
+ .internal_sleep_clock = false,
+ .qmi_service_ins_id = ATH11K_QMI_WLFW_SERVICE_INS_ID_V01_WCN6750,
+ .host_ce_config = ath11k_host_ce_config_qca6390,
+ .ce_count = 9,
+ .target_ce_config = ath11k_target_ce_config_wlan_qca6390,
+ .target_ce_count = 9,
+ .svc_to_ce_map = ath11k_target_service_to_ce_map_wlan_qca6390,
+ .svc_to_ce_map_len = 14,
+ .rfkill_pin = 0,
+ .rfkill_cfg = 0,
+ .rfkill_on_level = 0,
+ .single_pdev_only = true,
+ .rxdma1_enable = false,
+ .num_rxmda_per_pdev = 1,
+ .rx_mac_buf_ring = true,
+ .vdev_start_delay = true,
+ .htt_peer_map_v2 = false,
+
+ .spectral = {
+ .fft_sz = 0,
+ .fft_pad_sz = 0,
+ .summary_pad_sz = 0,
+ .fft_hdr_len = 0,
+ .max_fft_bins = 0,
+ },
+
+ .interface_modes = BIT(NL80211_IFTYPE_STATION) |
+ BIT(NL80211_IFTYPE_AP),
+ .supports_monitor = false,
+ .supports_shadow_regs = true,
+ .idle_ps = true,
+ .supports_sta_ps = true,
+ .cold_boot_calib = false,
+ .fw_mem_mode = 0,
+ .num_vdevs = 16 + 1,
+ .num_peers = 512,
+ .supports_suspend = false,
+ .supports_regdb = true,
+ .fix_l1ss = false,
+ .credit_flow = true,
+ .max_tx_ring = DP_TCL_NUM_RING_MAX_QCA6390,
+ .hal_params = &ath11k_hw_hal_params_qca6390,
+ .supports_dynamic_smps_6ghz = false,
+ .alloc_cacheable_memory = false,
+ .supports_rssi_stats = true,
+ .fw_wmi_diag_event = false,
+ .current_cc_support = true,
+ .dbr_debug_support = false,
+ .global_reset = false,
+ },
};

static inline struct ath11k_pdev *ath11k_core_get_single_pdev(struct ath11k_base *ab)
diff --git a/drivers/net/wireless/ath/ath11k/core.h b/drivers/net/wireless/ath/ath11k/core.h
index fa299bfb4efc..e63b01ba68c8 100644
--- a/drivers/net/wireless/ath/ath11k/core.h
+++ b/drivers/net/wireless/ath/ath11k/core.h
@@ -140,6 +140,7 @@ enum ath11k_hw_rev {
ATH11K_HW_QCN9074_HW10,
ATH11K_HW_WCN6855_HW20,
ATH11K_HW_WCN6855_HW21,
+ ATH11K_HW_WCN6750_HW10,
};

enum ath11k_firmware_mode {
diff --git a/drivers/net/wireless/ath/ath11k/qmi.h b/drivers/net/wireless/ath/ath11k/qmi.h
index 61678de56ac7..872646c3b3ed 100644
--- a/drivers/net/wireless/ath/ath11k/qmi.h
+++ b/drivers/net/wireless/ath/ath11k/qmi.h
@@ -1,6 +1,7 @@
/* SPDX-License-Identifier: BSD-3-Clause-Clear */
/*
* Copyright (c) 2018-2019 The Linux Foundation. All rights reserved.
+ * Copyright (c) 2021-2022, Qualcomm Innovation Center, Inc. All rights reserved.
*/

#ifndef ATH11K_QMI_H
@@ -20,6 +21,7 @@
#define ATH11K_QMI_WLFW_SERVICE_INS_ID_V01_QCA6390 0x01
#define ATH11K_QMI_WLFW_SERVICE_INS_ID_V01_IPQ8074 0x02
#define ATH11K_QMI_WLFW_SERVICE_INS_ID_V01_QCN9074 0x07
+#define ATH11K_QMI_WLFW_SERVICE_INS_ID_V01_WCN6750 0x03
#define ATH11K_QMI_WLANFW_MAX_TIMESTAMP_LEN_V01 32
#define ATH11K_QMI_RESP_LEN_MAX 8192
#define ATH11K_QMI_WLANFW_MAX_NUM_MEM_SEG_V01 52
--
2.35.1

2022-04-06 15:16:00

by Manikanta Pubbisetty

[permalink] [raw]
Subject: [PATCH v4 08/12] ath11k: Datapath changes to support WCN6750

HAL RX descriptor for WCN6750 is same as QCN9074, so use
the DP APIs of QCN9074 for WCN6750. There is one change
wrt to REO configuration though, REO configuration for
WCN6750 is same as WCN6855; Therefore, use reo_setup()
of WCN6855 for WCN6750.

Tested-on: WCN6750 hw1.0 AHB WLAN.MSL.1.0.1-00573-QCAMSLSWPLZ-1
Tested-on: WCN6855 hw2.0 PCI WLAN.HSP.1.1-01720.1-QCAHSPSWPL_V1_V2_SILICONZ_LITE-1
Tested-on: QCN9074 hw1.0 PCI WLAN.HK.2.5.0.1-01100-QCAHKSWPL_SILICONZ-1
Tested-on: IPQ8074 hw2.0 AHB WLAN.HK.2.4.0.1-00192-QCAHKSWPL_SILICONZ-1

Signed-off-by: Manikanta Pubbisetty <[email protected]>
---
drivers/net/wireless/ath/ath11k/core.c | 1 +
drivers/net/wireless/ath/ath11k/hw.c | 32 ++++++++++++++++++++++++++
2 files changed, 33 insertions(+)

diff --git a/drivers/net/wireless/ath/ath11k/core.c b/drivers/net/wireless/ath/ath11k/core.c
index 2ecc9afb3f6c..297d024b1ef9 100644
--- a/drivers/net/wireless/ath/ath11k/core.c
+++ b/drivers/net/wireless/ath/ath11k/core.c
@@ -483,6 +483,7 @@ static const struct ath11k_hw_params ath11k_hw_params[] = {
.num_vdevs = 16 + 1,
.num_peers = 512,
.supports_suspend = false,
+ .hal_desc_sz = sizeof(struct hal_rx_desc_qcn9074),
.supports_regdb = true,
.fix_l1ss = false,
.credit_flow = true,
diff --git a/drivers/net/wireless/ath/ath11k/hw.c b/drivers/net/wireless/ath/ath11k/hw.c
index c39e97e91a8c..3b9e45f9705c 100644
--- a/drivers/net/wireless/ath/ath11k/hw.c
+++ b/drivers/net/wireless/ath/ath11k/hw.c
@@ -1020,6 +1020,38 @@ const struct ath11k_hw_ops wcn6750_ops = {
.wmi_init_config = ath11k_init_wmi_config_qca6390,
.mac_id_to_pdev_id = ath11k_hw_mac_id_to_pdev_id_qca6390,
.mac_id_to_srng_id = ath11k_hw_mac_id_to_srng_id_qca6390,
+ .tx_mesh_enable = ath11k_hw_qcn9074_tx_mesh_enable,
+ .rx_desc_get_first_msdu = ath11k_hw_qcn9074_rx_desc_get_first_msdu,
+ .rx_desc_get_last_msdu = ath11k_hw_qcn9074_rx_desc_get_last_msdu,
+ .rx_desc_get_l3_pad_bytes = ath11k_hw_qcn9074_rx_desc_get_l3_pad_bytes,
+ .rx_desc_get_hdr_status = ath11k_hw_qcn9074_rx_desc_get_hdr_status,
+ .rx_desc_encrypt_valid = ath11k_hw_qcn9074_rx_desc_encrypt_valid,
+ .rx_desc_get_encrypt_type = ath11k_hw_qcn9074_rx_desc_get_encrypt_type,
+ .rx_desc_get_decap_type = ath11k_hw_qcn9074_rx_desc_get_decap_type,
+ .rx_desc_get_mesh_ctl = ath11k_hw_qcn9074_rx_desc_get_mesh_ctl,
+ .rx_desc_get_ldpc_support = ath11k_hw_qcn9074_rx_desc_get_ldpc_support,
+ .rx_desc_get_mpdu_seq_ctl_vld = ath11k_hw_qcn9074_rx_desc_get_mpdu_seq_ctl_vld,
+ .rx_desc_get_mpdu_fc_valid = ath11k_hw_qcn9074_rx_desc_get_mpdu_fc_valid,
+ .rx_desc_get_mpdu_start_seq_no = ath11k_hw_qcn9074_rx_desc_get_mpdu_start_seq_no,
+ .rx_desc_get_msdu_len = ath11k_hw_qcn9074_rx_desc_get_msdu_len,
+ .rx_desc_get_msdu_sgi = ath11k_hw_qcn9074_rx_desc_get_msdu_sgi,
+ .rx_desc_get_msdu_rate_mcs = ath11k_hw_qcn9074_rx_desc_get_msdu_rate_mcs,
+ .rx_desc_get_msdu_rx_bw = ath11k_hw_qcn9074_rx_desc_get_msdu_rx_bw,
+ .rx_desc_get_msdu_freq = ath11k_hw_qcn9074_rx_desc_get_msdu_freq,
+ .rx_desc_get_msdu_pkt_type = ath11k_hw_qcn9074_rx_desc_get_msdu_pkt_type,
+ .rx_desc_get_msdu_nss = ath11k_hw_qcn9074_rx_desc_get_msdu_nss,
+ .rx_desc_get_mpdu_tid = ath11k_hw_qcn9074_rx_desc_get_mpdu_tid,
+ .rx_desc_get_mpdu_peer_id = ath11k_hw_qcn9074_rx_desc_get_mpdu_peer_id,
+ .rx_desc_copy_attn_end_tlv = ath11k_hw_qcn9074_rx_desc_copy_attn_end,
+ .rx_desc_get_mpdu_start_tag = ath11k_hw_qcn9074_rx_desc_get_mpdu_start_tag,
+ .rx_desc_get_mpdu_ppdu_id = ath11k_hw_qcn9074_rx_desc_get_mpdu_ppdu_id,
+ .rx_desc_set_msdu_len = ath11k_hw_qcn9074_rx_desc_set_msdu_len,
+ .rx_desc_get_attention = ath11k_hw_qcn9074_rx_desc_get_attention,
+ .rx_desc_get_msdu_payload = ath11k_hw_qcn9074_rx_desc_get_msdu_payload,
+ .reo_setup = ath11k_hw_wcn6855_reo_setup,
+ .mpdu_info_get_peerid = ath11k_hw_ipq8074_mpdu_info_get_peerid,
+ .rx_desc_mac_addr2_valid = ath11k_hw_ipq9074_rx_desc_mac_addr2_valid,
+ .rx_desc_mpdu_start_addr2 = ath11k_hw_ipq9074_rx_desc_mpdu_start_addr2,
};

#define ATH11K_TX_RING_MASK_0 0x1
--
2.35.1

2022-04-06 15:22:57

by Manikanta Pubbisetty

[permalink] [raw]
Subject: [PATCH v4 01/12] dt: bindings: net: add bindings of WCN6750 for ath11k

WCN6750 is the WLAN chip on Qualcomm Snapdragon SoC SC7280;
Though being a PCIe based solution, it is not attached to
the APSS processor (Application Processor SubSystem), it is
instead attached to another tiny processor called WPSS Q6
processor (Wireless Processor SubSystem) on the SC7280 MSM,
where the WLAN firmware runs, and it is the WLAN firmware
running on the Q6 processor which enumerates WCN6750, as a
result APPS processor would never know such a device being
present in the system and would not detect the WCN6750
hardware unless and otherwise WCN6750 is registered as a
platform device. This is the reason behind adding WCN6750
WLAN node in the device tree.

Add WCN6750 wireless driver support, its based on ath11k driver.

Signed-off-by: Manikanta Pubbisetty <[email protected]>
---
.../bindings/net/wireless/qcom,ath11k.yaml | 361 ++++++++++++------
1 file changed, 252 insertions(+), 109 deletions(-)

diff --git a/Documentation/devicetree/bindings/net/wireless/qcom,ath11k.yaml b/Documentation/devicetree/bindings/net/wireless/qcom,ath11k.yaml
index cdf7b873b419..6b32caa8311c 100644
--- a/Documentation/devicetree/bindings/net/wireless/qcom,ath11k.yaml
+++ b/Documentation/devicetree/bindings/net/wireless/qcom,ath11k.yaml
@@ -20,120 +20,17 @@ properties:
enum:
- qcom,ipq8074-wifi
- qcom,ipq6018-wifi
+ - qcom,wcn6750-wifi

reg:
maxItems: 1

interrupts:
- items:
- - description: misc-pulse1 interrupt events
- - description: misc-latch interrupt events
- - description: sw exception interrupt events
- - description: watchdog interrupt events
- - description: interrupt event for ring CE0
- - description: interrupt event for ring CE1
- - description: interrupt event for ring CE2
- - description: interrupt event for ring CE3
- - description: interrupt event for ring CE4
- - description: interrupt event for ring CE5
- - description: interrupt event for ring CE6
- - description: interrupt event for ring CE7
- - description: interrupt event for ring CE8
- - description: interrupt event for ring CE9
- - description: interrupt event for ring CE10
- - description: interrupt event for ring CE11
- - description: interrupt event for ring host2wbm-desc-feed
- - description: interrupt event for ring host2reo-re-injection
- - description: interrupt event for ring host2reo-command
- - description: interrupt event for ring host2rxdma-monitor-ring3
- - description: interrupt event for ring host2rxdma-monitor-ring2
- - description: interrupt event for ring host2rxdma-monitor-ring1
- - description: interrupt event for ring reo2ost-exception
- - description: interrupt event for ring wbm2host-rx-release
- - description: interrupt event for ring reo2host-status
- - description: interrupt event for ring reo2host-destination-ring4
- - description: interrupt event for ring reo2host-destination-ring3
- - description: interrupt event for ring reo2host-destination-ring2
- - description: interrupt event for ring reo2host-destination-ring1
- - description: interrupt event for ring rxdma2host-monitor-destination-mac3
- - description: interrupt event for ring rxdma2host-monitor-destination-mac2
- - description: interrupt event for ring rxdma2host-monitor-destination-mac1
- - description: interrupt event for ring ppdu-end-interrupts-mac3
- - description: interrupt event for ring ppdu-end-interrupts-mac2
- - description: interrupt event for ring ppdu-end-interrupts-mac1
- - description: interrupt event for ring rxdma2host-monitor-status-ring-mac3
- - description: interrupt event for ring rxdma2host-monitor-status-ring-mac2
- - description: interrupt event for ring rxdma2host-monitor-status-ring-mac1
- - description: interrupt event for ring host2rxdma-host-buf-ring-mac3
- - description: interrupt event for ring host2rxdma-host-buf-ring-mac2
- - description: interrupt event for ring host2rxdma-host-buf-ring-mac1
- - description: interrupt event for ring rxdma2host-destination-ring-mac3
- - description: interrupt event for ring rxdma2host-destination-ring-mac2
- - description: interrupt event for ring rxdma2host-destination-ring-mac1
- - description: interrupt event for ring host2tcl-input-ring4
- - description: interrupt event for ring host2tcl-input-ring3
- - description: interrupt event for ring host2tcl-input-ring2
- - description: interrupt event for ring host2tcl-input-ring1
- - description: interrupt event for ring wbm2host-tx-completions-ring3
- - description: interrupt event for ring wbm2host-tx-completions-ring2
- - description: interrupt event for ring wbm2host-tx-completions-ring1
- - description: interrupt event for ring tcl2host-status-ring
-
+ minItems: 32
+ maxItems: 52

interrupt-names:
- items:
- - const: misc-pulse1
- - const: misc-latch
- - const: sw-exception
- - const: watchdog
- - const: ce0
- - const: ce1
- - const: ce2
- - const: ce3
- - const: ce4
- - const: ce5
- - const: ce6
- - const: ce7
- - const: ce8
- - const: ce9
- - const: ce10
- - const: ce11
- - const: host2wbm-desc-feed
- - const: host2reo-re-injection
- - const: host2reo-command
- - const: host2rxdma-monitor-ring3
- - const: host2rxdma-monitor-ring2
- - const: host2rxdma-monitor-ring1
- - const: reo2ost-exception
- - const: wbm2host-rx-release
- - const: reo2host-status
- - const: reo2host-destination-ring4
- - const: reo2host-destination-ring3
- - const: reo2host-destination-ring2
- - const: reo2host-destination-ring1
- - const: rxdma2host-monitor-destination-mac3
- - const: rxdma2host-monitor-destination-mac2
- - const: rxdma2host-monitor-destination-mac1
- - const: ppdu-end-interrupts-mac3
- - const: ppdu-end-interrupts-mac2
- - const: ppdu-end-interrupts-mac1
- - const: rxdma2host-monitor-status-ring-mac3
- - const: rxdma2host-monitor-status-ring-mac2
- - const: rxdma2host-monitor-status-ring-mac1
- - const: host2rxdma-host-buf-ring-mac3
- - const: host2rxdma-host-buf-ring-mac2
- - const: host2rxdma-host-buf-ring-mac1
- - const: rxdma2host-destination-ring-mac3
- - const: rxdma2host-destination-ring-mac2
- - const: rxdma2host-destination-ring-mac1
- - const: host2tcl-input-ring4
- - const: host2tcl-input-ring3
- - const: host2tcl-input-ring2
- - const: host2tcl-input-ring1
- - const: wbm2host-tx-completions-ring3
- - const: wbm2host-tx-completions-ring2
- - const: wbm2host-tx-completions-ring1
- - const: tcl2host-status-ring
+ maxItems: 52

qcom,rproc:
$ref: /schemas/types.yaml#/definitions/phandle
@@ -151,20 +48,205 @@ properties:
board-2.bin for designs with colliding bus and device specific ids

memory-region:
- maxItems: 1
+ minItems: 1
+ maxItems: 2
description:
phandle to a node describing reserved memory (System RAM memory)
used by ath11k firmware (see bindings/reserved-memory/reserved-memory.txt)

+ iommus:
+ minItems: 1
+ maxItems: 2
+
+ wifi-firmware:
+ type: object
+ description: |
+ WCN6750 wifi node can contain one optional firmware subnode.
+ Firmware subnode is needed when the platform does not have Trustzone.
+ required:
+ - iommus
+
required:
- compatible
- reg
- interrupts
- - interrupt-names
- qcom,rproc

additionalProperties: false

+allOf:
+ - if:
+ properties:
+ compatible:
+ contains:
+ enum:
+ - qcom,ipq8074-wifi
+ - qcom,ipq6018-wifi
+ then:
+ properties:
+ interrupts:
+ items:
+ - description: misc-pulse1 interrupt events
+ - description: misc-latch interrupt events
+ - description: sw exception interrupt events
+ - description: watchdog interrupt events
+ - description: interrupt event for ring CE0
+ - description: interrupt event for ring CE1
+ - description: interrupt event for ring CE2
+ - description: interrupt event for ring CE3
+ - description: interrupt event for ring CE4
+ - description: interrupt event for ring CE5
+ - description: interrupt event for ring CE6
+ - description: interrupt event for ring CE7
+ - description: interrupt event for ring CE8
+ - description: interrupt event for ring CE9
+ - description: interrupt event for ring CE10
+ - description: interrupt event for ring CE11
+ - description: interrupt event for ring host2wbm-desc-feed
+ - description: interrupt event for ring host2reo-re-injection
+ - description: interrupt event for ring host2reo-command
+ - description: interrupt event for ring host2rxdma-monitor-ring3
+ - description: interrupt event for ring host2rxdma-monitor-ring2
+ - description: interrupt event for ring host2rxdma-monitor-ring1
+ - description: interrupt event for ring reo2ost-exception
+ - description: interrupt event for ring wbm2host-rx-release
+ - description: interrupt event for ring reo2host-status
+ - description: interrupt event for ring reo2host-destination-ring4
+ - description: interrupt event for ring reo2host-destination-ring3
+ - description: interrupt event for ring reo2host-destination-ring2
+ - description: interrupt event for ring reo2host-destination-ring1
+ - description: interrupt event for ring rxdma2host-monitor-destination-mac3
+ - description: interrupt event for ring rxdma2host-monitor-destination-mac2
+ - description: interrupt event for ring rxdma2host-monitor-destination-mac1
+ - description: interrupt event for ring ppdu-end-interrupts-mac3
+ - description: interrupt event for ring ppdu-end-interrupts-mac2
+ - description: interrupt event for ring ppdu-end-interrupts-mac1
+ - description: interrupt event for ring rxdma2host-monitor-status-ring-mac3
+ - description: interrupt event for ring rxdma2host-monitor-status-ring-mac2
+ - description: interrupt event for ring rxdma2host-monitor-status-ring-mac1
+ - description: interrupt event for ring host2rxdma-host-buf-ring-mac3
+ - description: interrupt event for ring host2rxdma-host-buf-ring-mac2
+ - description: interrupt event for ring host2rxdma-host-buf-ring-mac1
+ - description: interrupt event for ring rxdma2host-destination-ring-mac3
+ - description: interrupt event for ring rxdma2host-destination-ring-mac2
+ - description: interrupt event for ring rxdma2host-destination-ring-mac1
+ - description: interrupt event for ring host2tcl-input-ring4
+ - description: interrupt event for ring host2tcl-input-ring3
+ - description: interrupt event for ring host2tcl-input-ring2
+ - description: interrupt event for ring host2tcl-input-ring1
+ - description: interrupt event for ring wbm2host-tx-completions-ring3
+ - description: interrupt event for ring wbm2host-tx-completions-ring2
+ - description: interrupt event for ring wbm2host-tx-completions-ring1
+ - description: interrupt event for ring tcl2host-status-ring
+ interrupt-names:
+ items:
+ - const: misc-pulse1
+ - const: misc-latch
+ - const: sw-exception
+ - const: watchdog
+ - const: ce0
+ - const: ce1
+ - const: ce2
+ - const: ce3
+ - const: ce4
+ - const: ce5
+ - const: ce6
+ - const: ce7
+ - const: ce8
+ - const: ce9
+ - const: ce10
+ - const: ce11
+ - const: host2wbm-desc-feed
+ - const: host2reo-re-injection
+ - const: host2reo-command
+ - const: host2rxdma-monitor-ring3
+ - const: host2rxdma-monitor-ring2
+ - const: host2rxdma-monitor-ring1
+ - const: reo2ost-exception
+ - const: wbm2host-rx-release
+ - const: reo2host-status
+ - const: reo2host-destination-ring4
+ - const: reo2host-destination-ring3
+ - const: reo2host-destination-ring2
+ - const: reo2host-destination-ring1
+ - const: rxdma2host-monitor-destination-mac3
+ - const: rxdma2host-monitor-destination-mac2
+ - const: rxdma2host-monitor-destination-mac1
+ - const: ppdu-end-interrupts-mac3
+ - const: ppdu-end-interrupts-mac2
+ - const: ppdu-end-interrupts-mac1
+ - const: rxdma2host-monitor-status-ring-mac3
+ - const: rxdma2host-monitor-status-ring-mac2
+ - const: rxdma2host-monitor-status-ring-mac1
+ - const: host2rxdma-host-buf-ring-mac3
+ - const: host2rxdma-host-buf-ring-mac2
+ - const: host2rxdma-host-buf-ring-mac1
+ - const: rxdma2host-destination-ring-mac3
+ - const: rxdma2host-destination-ring-mac2
+ - const: rxdma2host-destination-ring-mac1
+ - const: host2tcl-input-ring4
+ - const: host2tcl-input-ring3
+ - const: host2tcl-input-ring2
+ - const: host2tcl-input-ring1
+ - const: wbm2host-tx-completions-ring3
+ - const: wbm2host-tx-completions-ring2
+ - const: wbm2host-tx-completions-ring1
+ - const: tcl2host-status-ring
+
+ - if:
+ properties:
+ compatible:
+ contains:
+ enum:
+ - qcom,ipq8074-wifi
+ - qcom,ipq6018-wifi
+ then:
+ required:
+ - interrupt-names
+
+ - if:
+ properties:
+ compatible:
+ contains:
+ enum:
+ - qcom,wcn6750-wifi
+ then:
+ properties:
+ interrupts:
+ items:
+ - description: interrupt event for ring CE1
+ - description: interrupt event for ring CE2
+ - description: interrupt event for ring CE3
+ - description: interrupt event for ring CE4
+ - description: interrupt event for ring CE5
+ - description: interrupt event for ring CE6
+ - description: interrupt event for ring CE7
+ - description: interrupt event for ring CE8
+ - description: interrupt event for ring CE9
+ - description: interrupt event for ring CE10
+ - description: interrupt event for ring DP1
+ - description: interrupt event for ring DP2
+ - description: interrupt event for ring DP3
+ - description: interrupt event for ring DP4
+ - description: interrupt event for ring DP5
+ - description: interrupt event for ring DP6
+ - description: interrupt event for ring DP7
+ - description: interrupt event for ring DP8
+ - description: interrupt event for ring DP9
+ - description: interrupt event for ring DP10
+ - description: interrupt event for ring DP11
+ - description: interrupt event for ring DP12
+ - description: interrupt event for ring DP13
+ - description: interrupt event for ring DP14
+ - description: interrupt event for ring DP15
+ - description: interrupt event for ring DP16
+ - description: interrupt event for ring DP17
+ - description: interrupt event for ring DP18
+ - description: interrupt event for ring DP19
+ - description: interrupt event for ring DP20
+ - description: interrupt event for ring DP21
+ - description: interrupt event for ring DP22
+
examples:
- |

@@ -309,3 +391,64 @@ examples:
};
};
};
+
+ - |
+ #include <dt-bindings/interrupt-controller/arm-gic.h>
+
+ reserved-memory {
+ #address-cells = <2>;
+ #size-cells = <2>;
+
+ wlan_ce_mem: memory@4cd000 {
+ no-map;
+ reg = <0x0 0x004cd000 0x0 0x1000>;
+ };
+
+ wlan_fw_mem: memory@80c00000 {
+ no-map;
+ reg = <0x0 0x80c00000 0x0 0xc00000>;
+ };
+ };
+
+ wifi: wifi@17a10040 {
+ compatible = "qcom,wcn6750-wifi";
+ reg = <0x17a10040 0x0>;
+ iommus = <&apps_smmu 0x1c00 0x1>;
+ interrupts = <GIC_SPI 768 IRQ_TYPE_EDGE_RISING>,
+ <GIC_SPI 769 IRQ_TYPE_EDGE_RISING>,
+ <GIC_SPI 770 IRQ_TYPE_EDGE_RISING>,
+ <GIC_SPI 771 IRQ_TYPE_EDGE_RISING>,
+ <GIC_SPI 772 IRQ_TYPE_EDGE_RISING>,
+ <GIC_SPI 773 IRQ_TYPE_EDGE_RISING>,
+ <GIC_SPI 774 IRQ_TYPE_EDGE_RISING>,
+ <GIC_SPI 775 IRQ_TYPE_EDGE_RISING>,
+ <GIC_SPI 776 IRQ_TYPE_EDGE_RISING>,
+ <GIC_SPI 777 IRQ_TYPE_EDGE_RISING>,
+ <GIC_SPI 778 IRQ_TYPE_EDGE_RISING>,
+ <GIC_SPI 779 IRQ_TYPE_EDGE_RISING>,
+ <GIC_SPI 780 IRQ_TYPE_EDGE_RISING>,
+ <GIC_SPI 781 IRQ_TYPE_EDGE_RISING>,
+ <GIC_SPI 782 IRQ_TYPE_EDGE_RISING>,
+ <GIC_SPI 783 IRQ_TYPE_EDGE_RISING>,
+ <GIC_SPI 784 IRQ_TYPE_EDGE_RISING>,
+ <GIC_SPI 785 IRQ_TYPE_EDGE_RISING>,
+ <GIC_SPI 786 IRQ_TYPE_EDGE_RISING>,
+ <GIC_SPI 787 IRQ_TYPE_EDGE_RISING>,
+ <GIC_SPI 788 IRQ_TYPE_EDGE_RISING>,
+ <GIC_SPI 789 IRQ_TYPE_EDGE_RISING>,
+ <GIC_SPI 790 IRQ_TYPE_EDGE_RISING>,
+ <GIC_SPI 791 IRQ_TYPE_EDGE_RISING>,
+ <GIC_SPI 792 IRQ_TYPE_EDGE_RISING>,
+ <GIC_SPI 793 IRQ_TYPE_EDGE_RISING>,
+ <GIC_SPI 794 IRQ_TYPE_EDGE_RISING>,
+ <GIC_SPI 795 IRQ_TYPE_EDGE_RISING>,
+ <GIC_SPI 796 IRQ_TYPE_EDGE_RISING>,
+ <GIC_SPI 797 IRQ_TYPE_EDGE_RISING>,
+ <GIC_SPI 798 IRQ_TYPE_EDGE_RISING>,
+ <GIC_SPI 799 IRQ_TYPE_EDGE_RISING>;
+ qcom,rproc = <&remoteproc_wpss>;
+ memory-region = <&wlan_fw_mem>, <&wlan_ce_mem>;
+ wifi-firmware {
+ iommus = <&apps_smmu 0x1c02 0x1>;
+ };
+ };
--
2.35.1

2022-04-06 15:23:01

by Manikanta Pubbisetty

[permalink] [raw]
Subject: [PATCH v4 12/12] ath11k: Add support for WCN6750 device

WCN6750 is non-DBS 2x2 11AX chipset. Unlike QCA6390 which is a
DBS (dual band simultaneous) solution (2 LMACs), WCN6750 has a
single LMAC supporting 2G, 5G and 6G bands but will operate only
on one band at any given point.

WCN6750 is a PCIe based solution, but it is attached to the WPSS
(Wireless Processor SubSystem) Q6 processor, hence it is enumerated
by the Q6 processor. It is registered to the APSS processor
(Application Processor SubSystem) as a platform device(AHB) and
remoteproc APIs are used to boot up or shutdown the device like
other AHB devices.

Also, Device information like BAR and it's size is not known to the
APSS processor as the chip is enumerated by WPSS Q6. These details
are fetched over QMI.

STA and AP modes are supported. Verified basic connectivity and ping
in both the modes.

An important point to note is that though WCN6750 is a PCIe device,
it cannot be attached to any other platform except on Qualcomm
Snapdragon SoCs due to the aforementioned reasons.

Tested-on: WCN6750 hw1.0 AHB WLAN.MSL.1.0.1-00573-QCAMSLSWPLZ-1
Tested-on: WCN6855 hw2.0 PCI WLAN.HSP.1.1-01720.1-QCAHSPSWPL_V1_V2_SILICONZ_LITE-1
Tested-on: QCN9074 hw1.0 PCI WLAN.HK.2.5.0.1-01100-QCAHKSWPL_SILICONZ-1
Tested-on: IPQ8074 hw2.0 AHB WLAN.HK.2.4.0.1-00192-QCAHKSWPL_SILICONZ-1

Signed-off-by: Manikanta Pubbisetty <[email protected]>
---
drivers/net/wireless/ath/ath11k/Makefile | 5 +-
drivers/net/wireless/ath/ath11k/ahb.c | 152 ++++++++++++++++++++---
drivers/net/wireless/ath/ath11k/ahb.h | 1 -
drivers/net/wireless/ath/ath11k/core.h | 1 +
drivers/net/wireless/ath/ath11k/pcic.c | 23 ++++
5 files changed, 164 insertions(+), 18 deletions(-)

diff --git a/drivers/net/wireless/ath/ath11k/Makefile b/drivers/net/wireless/ath/ath11k/Makefile
index 0ebfe41d6143..cc47e0114595 100644
--- a/drivers/net/wireless/ath/ath11k/Makefile
+++ b/drivers/net/wireless/ath/ath11k/Makefile
@@ -16,7 +16,8 @@ ath11k-y += core.o \
ce.o \
peer.o \
dbring.o \
- hw.o
+ hw.o \
+ pcic.o

ath11k-$(CONFIG_ATH11K_DEBUGFS) += debugfs.o debugfs_htt_stats.o debugfs_sta.o
ath11k-$(CONFIG_NL80211_TESTMODE) += testmode.o
@@ -29,7 +30,7 @@ obj-$(CONFIG_ATH11K_AHB) += ath11k_ahb.o
ath11k_ahb-y += ahb.o

obj-$(CONFIG_ATH11K_PCI) += ath11k_pci.o
-ath11k_pci-y += mhi.o pci.o pcic.o
+ath11k_pci-y += mhi.o pci.o

# for tracing framework to find trace.h
CFLAGS_trace.o := -I$(src)
diff --git a/drivers/net/wireless/ath/ath11k/ahb.c b/drivers/net/wireless/ath/ath11k/ahb.c
index d27fc7276977..4fa5aba286ff 100644
--- a/drivers/net/wireless/ath/ath11k/ahb.c
+++ b/drivers/net/wireless/ath/ath11k/ahb.c
@@ -13,6 +13,7 @@
#include "debug.h"
#include "hif.h"
#include <linux/remoteproc.h>
+#include "pcic.h"

static const struct of_device_id ath11k_ahb_of_match[] = {
/* TODO: Should we change the compatible string to something similar
@@ -24,19 +25,22 @@ static const struct of_device_id ath11k_ahb_of_match[] = {
{ .compatible = "qcom,ipq6018-wifi",
.data = (void *)ATH11K_HW_IPQ6018_HW10,
},
+ { .compatible = "qcom,wcn6750-wifi",
+ .data = (void *)ATH11K_HW_WCN6750_HW10,
+ },
{ }
};

MODULE_DEVICE_TABLE(of, ath11k_ahb_of_match);

-static const struct ath11k_bus_params ath11k_ahb_bus_params = {
+static const struct ath11k_bus_params ath11k_ahb_bus_params_ipq8074 = {
.mhi_support = false,
.m3_fw_support = false,
.fixed_bdf_addr = true,
.fixed_mem_region = true,
};

-const struct ath11k_bus_params ath11k_ahb_hybrid_bus_params = {
+static const struct ath11k_bus_params ath11k_ahb_bus_params_wcn6750 = {
.mhi_support = false,
.m3_fw_support = false,
.fixed_bdf_addr = false,
@@ -47,6 +51,16 @@ const struct ath11k_bus_params ath11k_ahb_hybrid_bus_params = {
.ce_window_idx = 2,
};

+static int
+ath11k_ahb_get_msi_irq_wcn6750(struct ath11k_base *ab, unsigned int vector)
+{
+ return ab->pci.msi.irqs[vector];
+}
+
+static const struct ath11k_pci_ops ath11k_ahb_pci_ops_wcn6750 = {
+ .get_msi_irq = ath11k_ahb_get_msi_irq_wcn6750,
+};
+
#define ATH11K_IRQ_CE0_OFFSET 4

static const char *irq_name[ATH11K_IRQ_NUM_MAX] = {
@@ -413,6 +427,9 @@ static void ath11k_ahb_free_irq(struct ath11k_base *ab)
int irq_idx;
int i;

+ if (ab->bus_params.hybrid_bus_type)
+ return ath11k_pcic_free_irq(ab);
+
for (i = 0; i < ab->hw_params.ce_count; i++) {
if (ath11k_ce_get_attr_flags(ab, i) & CE_ATTR_DIS_INTR)
continue;
@@ -567,6 +584,9 @@ static int ath11k_ahb_config_irq(struct ath11k_base *ab)
int irq, irq_idx, i;
int ret;

+ if (ab->bus_params.hybrid_bus_type)
+ return ath11k_pcic_config_irq(ab);
+
/* Configure CE irqs */
for (i = 0; i < ab->hw_params.ce_count; i++) {
struct ath11k_ce_pipe *ce_pipe = &ab->ce.ce_pipe[i];
@@ -636,7 +656,7 @@ static int ath11k_ahb_map_service_to_pipe(struct ath11k_base *ab, u16 service_id
return 0;
}

-static const struct ath11k_hif_ops ath11k_ahb_hif_ops = {
+static const struct ath11k_hif_ops ath11k_ahb_hif_ops_ipq8074 = {
.start = ath11k_ahb_start,
.stop = ath11k_ahb_stop,
.read32 = ath11k_ahb_read32,
@@ -648,6 +668,20 @@ static const struct ath11k_hif_ops ath11k_ahb_hif_ops = {
.power_up = ath11k_ahb_power_up,
};

+static const struct ath11k_hif_ops ath11k_ahb_hif_ops_wcn6750 = {
+ .start = ath11k_pcic_start,
+ .stop = ath11k_pcic_stop,
+ .read32 = ath11k_pcic_read32,
+ .write32 = ath11k_pcic_write32,
+ .irq_enable = ath11k_pcic_ext_irq_enable,
+ .irq_disable = ath11k_pcic_ext_irq_disable,
+ .get_msi_address = ath11k_pcic_get_msi_address,
+ .get_user_msi_vector = ath11k_pcic_get_user_msi_assignment,
+ .map_service_to_pipe = ath11k_pcic_map_service_to_pipe,
+ .power_down = ath11k_ahb_power_down,
+ .power_up = ath11k_ahb_power_up,
+};
+
static int ath11k_core_get_rproc(struct ath11k_base *ab)
{
struct ath11k_ahb *ab_ahb = ath11k_ahb_priv(ab);
@@ -670,12 +704,85 @@ static int ath11k_core_get_rproc(struct ath11k_base *ab)
return 0;
}

+static int ath11k_ahb_setup_msi_resources(struct ath11k_base *ab)
+{
+ struct platform_device *pdev = ab->pdev;
+ phys_addr_t msi_addr_pa;
+ dma_addr_t msi_addr_iova;
+ struct resource *res;
+ int int_prop;
+ int ret;
+ int i;
+
+ ret = ath11k_pcic_init_msi_config(ab);
+ if (ret) {
+ ath11k_err(ab, "failed to init msi config: %d\n", ret);
+ return ret;
+ }
+
+ res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
+ if (!res) {
+ ath11k_err(ab, "failed to fetch msi_addr\n");
+ return -ENOENT;
+ }
+
+ msi_addr_pa = res->start;
+ msi_addr_iova = dma_map_resource(ab->dev, msi_addr_pa, PAGE_SIZE,
+ DMA_FROM_DEVICE, 0);
+ if (dma_mapping_error(ab->dev, msi_addr_iova))
+ return -ENOMEM;
+
+ ab->pci.msi.addr_lo = lower_32_bits(msi_addr_iova);
+ ab->pci.msi.addr_hi = upper_32_bits(msi_addr_iova);
+
+ ret = of_property_read_u32_index(ab->dev->of_node, "interrupts", 1, &int_prop);
+ if (ret)
+ return ret;
+
+ ab->pci.msi.ep_base_data = int_prop + 32;
+
+ for (i = 0; i < ab->pci.msi.config->total_vectors; i++) {
+ res = platform_get_resource(pdev, IORESOURCE_IRQ, i);
+ if (!res)
+ return -ENODEV;
+
+ ab->pci.msi.irqs[i] = res->start;
+ }
+
+ set_bit(ATH11K_FLAG_MULTI_MSI_VECTORS, &ab->dev_flags);
+
+ return 0;
+}
+
+static int ath11k_ahb_setup_resources(struct ath11k_base *ab)
+{
+ struct platform_device *pdev = ab->pdev;
+ struct resource *mem_res;
+ void __iomem *mem;
+
+ if (ab->bus_params.hybrid_bus_type)
+ return ath11k_ahb_setup_msi_resources(ab);
+
+ mem = devm_platform_get_and_ioremap_resource(pdev, 0, &mem_res);
+ if (IS_ERR(mem)) {
+ dev_err(&pdev->dev, "ioremap error\n");
+ return PTR_ERR(mem);
+ }
+
+ ab->mem = mem;
+ ab->mem_len = resource_size(mem_res);
+
+ return 0;
+}
+
static int ath11k_ahb_probe(struct platform_device *pdev)
{
struct ath11k_base *ab;
const struct of_device_id *of_id;
- struct resource *mem_res;
- void __iomem *mem;
+ const struct ath11k_bus_params *bus_params;
+ const struct ath11k_hif_ops *hif_ops;
+ const struct ath11k_pci_ops *pci_ops;
+ enum ath11k_hw_rev hw_rev;
int ret;

of_id = of_match_device(ath11k_ahb_of_match, &pdev->dev);
@@ -684,10 +791,23 @@ static int ath11k_ahb_probe(struct platform_device *pdev)
return -EINVAL;
}

- mem = devm_platform_get_and_ioremap_resource(pdev, 0, &mem_res);
- if (IS_ERR(mem)) {
- dev_err(&pdev->dev, "ioremap error\n");
- return PTR_ERR(mem);
+ hw_rev = (enum ath11k_hw_rev)of_id->data;
+
+ switch (hw_rev) {
+ case ATH11K_HW_IPQ8074:
+ case ATH11K_HW_IPQ6018_HW10:
+ bus_params = &ath11k_ahb_bus_params_ipq8074;
+ hif_ops = &ath11k_ahb_hif_ops_ipq8074;
+ pci_ops = NULL;
+ break;
+ case ATH11K_HW_WCN6750_HW10:
+ bus_params = &ath11k_ahb_bus_params_wcn6750;
+ hif_ops = &ath11k_ahb_hif_ops_wcn6750;
+ pci_ops = &ath11k_ahb_pci_ops_wcn6750;
+ break;
+ default:
+ dev_err(&pdev->dev, "unsupported device type %d\n", hw_rev);
+ return -EOPNOTSUPP;
}

ret = dma_set_mask_and_coherent(&pdev->dev, DMA_BIT_MASK(32));
@@ -697,20 +817,22 @@ static int ath11k_ahb_probe(struct platform_device *pdev)
}

ab = ath11k_core_alloc(&pdev->dev, sizeof(struct ath11k_ahb),
- ATH11K_BUS_AHB,
- &ath11k_ahb_bus_params);
+ ATH11K_BUS_AHB, bus_params);
if (!ab) {
dev_err(&pdev->dev, "failed to allocate ath11k base\n");
return -ENOMEM;
}

- ab->hif.ops = &ath11k_ahb_hif_ops;
+ ab->hif.ops = hif_ops;
+ ab->pci.ops = pci_ops;
ab->pdev = pdev;
- ab->hw_rev = (enum ath11k_hw_rev)of_id->data;
- ab->mem = mem;
- ab->mem_len = resource_size(mem_res);
+ ab->hw_rev = hw_rev;
platform_set_drvdata(pdev, ab);

+ ret = ath11k_ahb_setup_resources(ab);
+ if (ret)
+ goto err_core_free;
+
ret = ath11k_core_pre_init(ab);
if (ret)
goto err_core_free;
diff --git a/drivers/net/wireless/ath/ath11k/ahb.h b/drivers/net/wireless/ath/ath11k/ahb.h
index a276e3d1dff8..eeb1feed2c81 100644
--- a/drivers/net/wireless/ath/ath11k/ahb.h
+++ b/drivers/net/wireless/ath/ath11k/ahb.h
@@ -10,7 +10,6 @@

#define ATH11K_AHB_RECOVERY_TIMEOUT (3 * HZ)
struct ath11k_base;
-extern const struct ath11k_bus_params ath11k_ahb_hybrid_bus_params;

struct ath11k_ahb {
struct rproc *tgt_rproc;
diff --git a/drivers/net/wireless/ath/ath11k/core.h b/drivers/net/wireless/ath/ath11k/core.h
index d3bfaafcd571..201af26803d7 100644
--- a/drivers/net/wireless/ath/ath11k/core.h
+++ b/drivers/net/wireless/ath/ath11k/core.h
@@ -936,6 +936,7 @@ struct ath11k_base {
struct {
const struct ath11k_msi_config *config;
u32 ep_base_data;
+ u32 irqs[32];
u32 addr_lo;
u32 addr_hi;
} msi;
diff --git a/drivers/net/wireless/ath/ath11k/pcic.c b/drivers/net/wireless/ath/ath11k/pcic.c
index 6d0b5307d5c7..0f343d768ac2 100644
--- a/drivers/net/wireless/ath/ath11k/pcic.c
+++ b/drivers/net/wireless/ath/ath11k/pcic.c
@@ -106,6 +106,15 @@ static const struct ath11k_msi_config ath11k_msi_config[] = {
},
.hw_rev = ATH11K_HW_WCN6855_HW21,
},
+ {
+ .total_vectors = 28,
+ .total_users = 2,
+ .users = (struct ath11k_msi_user[]) {
+ { .name = "CE", .num_vectors = 10, .base_vector = 0 },
+ { .name = "DP", .num_vectors = 18, .base_vector = 10 },
+ },
+ .hw_rev = ATH11K_HW_WCN6750_HW10,
+ },
};

int ath11k_pcic_init_msi_config(struct ath11k_base *ab)
@@ -173,6 +182,7 @@ void ath11k_pcic_write32(struct ath11k_base *ab, u32 offset, u32 value)
!ret)
ab->pci.ops->release(ab);
}
+EXPORT_SYMBOL(ath11k_pcic_write32);

u32 ath11k_pcic_read32(struct ath11k_base *ab, u32 offset)
{
@@ -204,6 +214,7 @@ u32 ath11k_pcic_read32(struct ath11k_base *ab, u32 offset)

return val;
}
+EXPORT_SYMBOL(ath11k_pcic_read32);

void ath11k_pcic_get_msi_address(struct ath11k_base *ab, u32 *msi_addr_lo,
u32 *msi_addr_hi)
@@ -211,6 +222,7 @@ void ath11k_pcic_get_msi_address(struct ath11k_base *ab, u32 *msi_addr_lo,
*msi_addr_lo = ab->pci.msi.addr_lo;
*msi_addr_hi = ab->pci.msi.addr_hi;
}
+EXPORT_SYMBOL(ath11k_pcic_get_msi_address);

int ath11k_pcic_get_user_msi_assignment(struct ath11k_base *ab, char *user_name,
int *num_vectors, u32 *user_base_data,
@@ -238,6 +250,7 @@ int ath11k_pcic_get_user_msi_assignment(struct ath11k_base *ab, char *user_name,

return -EINVAL;
}
+EXPORT_SYMBOL(ath11k_pcic_get_user_msi_assignment);

void ath11k_pcic_get_ce_msi_idx(struct ath11k_base *ab, u32 ce_id, u32 *msi_idx)
{
@@ -254,6 +267,7 @@ void ath11k_pcic_get_ce_msi_idx(struct ath11k_base *ab, u32 ce_id, u32 *msi_idx)
}
*msi_idx = msi_data_idx;
}
+EXPORT_SYMBOL(ath11k_pcic_get_ce_msi_idx);

static void ath11k_pcic_free_ext_irq(struct ath11k_base *ab)
{
@@ -282,6 +296,7 @@ void ath11k_pcic_free_irq(struct ath11k_base *ab)

ath11k_pcic_free_ext_irq(ab);
}
+EXPORT_SYMBOL(ath11k_pcic_free_irq);

static void ath11k_pcic_ce_irq_enable(struct ath11k_base *ab, u16 ce_id)
{
@@ -432,6 +447,7 @@ void ath11k_pcic_ext_irq_enable(struct ath11k_base *ab)
ath11k_pcic_ext_grp_enable(irq_grp);
}
}
+EXPORT_SYMBOL(ath11k_pcic_ext_irq_enable);

static void ath11k_pcic_sync_ext_irqs(struct ath11k_base *ab)
{
@@ -452,6 +468,7 @@ void ath11k_pcic_ext_irq_disable(struct ath11k_base *ab)
__ath11k_pcic_ext_irq_disable(ab);
ath11k_pcic_sync_ext_irqs(ab);
}
+EXPORT_SYMBOL(ath11k_pcic_ext_irq_disable);

static int ath11k_pcic_ext_grp_napi_poll(struct napi_struct *napi, int budget)
{
@@ -631,6 +648,7 @@ int ath11k_pcic_config_irq(struct ath11k_base *ab)

return 0;
}
+EXPORT_SYMBOL(ath11k_pcic_config_irq);

void ath11k_pcic_ce_irqs_enable(struct ath11k_base *ab)
{
@@ -644,6 +662,7 @@ void ath11k_pcic_ce_irqs_enable(struct ath11k_base *ab)
ath11k_pcic_ce_irq_enable(ab, i);
}
}
+EXPORT_SYMBOL(ath11k_pcic_ce_irqs_enable);

static void ath11k_pcic_kill_tasklets(struct ath11k_base *ab)
{
@@ -665,12 +684,14 @@ void ath11k_pcic_ce_irq_disable_sync(struct ath11k_base *ab)
ath11k_pcic_sync_ce_irqs(ab);
ath11k_pcic_kill_tasklets(ab);
}
+EXPORT_SYMBOL(ath11k_pcic_ce_irq_disable_sync);

void ath11k_pcic_stop(struct ath11k_base *ab)
{
ath11k_pcic_ce_irq_disable_sync(ab);
ath11k_ce_cleanup_pipes(ab);
}
+EXPORT_SYMBOL(ath11k_pcic_stop);

int ath11k_pcic_start(struct ath11k_base *ab)
{
@@ -681,6 +702,7 @@ int ath11k_pcic_start(struct ath11k_base *ab)

return 0;
}
+EXPORT_SYMBOL(ath11k_pcic_start);

int ath11k_pcic_map_service_to_pipe(struct ath11k_base *ab, u16 service_id,
u8 *ul_pipe, u8 *dl_pipe)
@@ -724,3 +746,4 @@ int ath11k_pcic_map_service_to_pipe(struct ath11k_base *ab, u16 service_id,

return 0;
}
+EXPORT_SYMBOL(ath11k_pcic_map_service_to_pipe);
--
2.35.1

2022-04-06 15:23:05

by Manikanta Pubbisetty

[permalink] [raw]
Subject: [PATCH v4 04/12] ath11k: Add register access logic for WCN6750

WCN6750 uses static window mapping to access the HW registers.
Unlike QCN9074 which uses 2nd window for CE and 3rd window
for UMAC register accesses, WCN6750 uses 1st window for UMAC
and 2nd window for CE registers.

Code is refactored so that WCN6750 can use the existing
ath11k_pci_read/write() APIs for accessing the registers.

Tested-on: WCN6750 hw1.0 AHB WLAN.MSL.1.0.1-00573-QCAMSLSWPLZ-1
Tested-on: WCN6855 hw2.0 PCI WLAN.HSP.1.1-01720.1-QCAHSPSWPL_V1_V2_SILICONZ_LITE-1
Tested-on: QCN9074 hw1.0 PCI WLAN.HK.2.5.0.1-01100-QCAHKSWPL_SILICONZ-1
Tested-on: IPQ8074 hw2.0 AHB WLAN.HK.2.4.0.1-00192-QCAHKSWPL_SILICONZ-1

Signed-off-by: Manikanta Pubbisetty <[email protected]>
---
drivers/net/wireless/ath/ath11k/ahb.c | 3 ++
drivers/net/wireless/ath/ath11k/core.h | 2 +
drivers/net/wireless/ath/ath11k/pci.c | 4 ++
drivers/net/wireless/ath/ath11k/pcic.c | 53 +++++++++-----------------
4 files changed, 28 insertions(+), 34 deletions(-)

diff --git a/drivers/net/wireless/ath/ath11k/ahb.c b/drivers/net/wireless/ath/ath11k/ahb.c
index d73643e3e8dd..d27fc7276977 100644
--- a/drivers/net/wireless/ath/ath11k/ahb.c
+++ b/drivers/net/wireless/ath/ath11k/ahb.c
@@ -42,6 +42,9 @@ const struct ath11k_bus_params ath11k_ahb_hybrid_bus_params = {
.fixed_bdf_addr = false,
.fixed_mem_region = false,
.hybrid_bus_type = true,
+ .static_window_map = true,
+ .dp_window_idx = 1,
+ .ce_window_idx = 2,
};

#define ATH11K_IRQ_CE0_OFFSET 4
diff --git a/drivers/net/wireless/ath/ath11k/core.h b/drivers/net/wireless/ath/ath11k/core.h
index b0bb01cc9d04..d3bfaafcd571 100644
--- a/drivers/net/wireless/ath/ath11k/core.h
+++ b/drivers/net/wireless/ath/ath11k/core.h
@@ -730,6 +730,8 @@ struct ath11k_bus_params {
bool fixed_mem_region;
bool static_window_map;
bool hybrid_bus_type;
+ u8 dp_window_idx;
+ u8 ce_window_idx;
};

struct ath11k_pci_ops {
diff --git a/drivers/net/wireless/ath/ath11k/pci.c b/drivers/net/wireless/ath/ath11k/pci.c
index 3fd5b416a564..bd314680f24c 100644
--- a/drivers/net/wireless/ath/ath11k/pci.c
+++ b/drivers/net/wireless/ath/ath11k/pci.c
@@ -771,6 +771,10 @@ static int ath11k_pci_probe(struct pci_dev *pdev,
ab->bus_params.static_window_map = true;
ab->pci.ops = &ath11k_pci_ops_qcn9074;
ab->hw_rev = ATH11K_HW_QCN9074_HW10;
+
+ /* For QCN9074, CE: 2nd window, UMAC: 3rd window */
+ ab->bus_params.ce_window_idx = 2;
+ ab->bus_params.dp_window_idx = 3;
break;
case WCN6855_DEVICE_ID:
ab->id.bdf_search = ATH11K_BDF_SEARCH_BUS_AND_BOARD;
diff --git a/drivers/net/wireless/ath/ath11k/pcic.c b/drivers/net/wireless/ath/ath11k/pcic.c
index 63c678aea29e..6d0b5307d5c7 100644
--- a/drivers/net/wireless/ath/ath11k/pcic.c
+++ b/drivers/net/wireless/ath/ath11k/pcic.c
@@ -134,16 +134,14 @@ EXPORT_SYMBOL(ath11k_pcic_init_msi_config);
static inline u32 ath11k_pcic_get_window_start(struct ath11k_base *ab,
u32 offset)
{
- u32 window_start;
+ u32 window_start = 0;

/* If offset lies within DP register range, use 3rd window */
if ((offset ^ HAL_SEQ_WCSS_UMAC_OFFSET) < ATH11K_PCI_WINDOW_RANGE_MASK)
- window_start = 3 * ATH11K_PCI_WINDOW_START;
- /* If offset lies within CE register range, use 2nd window */
- else if ((offset ^ HAL_CE_WFSS_CE_REG_BASE) < ATH11K_PCI_WINDOW_RANGE_MASK)
- window_start = 2 * ATH11K_PCI_WINDOW_START;
- else
- window_start = ATH11K_PCI_WINDOW_START;
+ window_start = ab->bus_params.dp_window_idx * ATH11K_PCI_WINDOW_START;
+ else if ((offset ^ HAL_SEQ_WCSS_UMAC_CE0_SRC_REG(ab)) <
+ ATH11K_PCI_WINDOW_RANGE_MASK)
+ window_start = ab->bus_params.ce_window_idx * ATH11K_PCI_WINDOW_START;

return window_start;
}
@@ -162,19 +160,12 @@ void ath11k_pcic_write32(struct ath11k_base *ab, u32 offset, u32 value)

if (offset < ATH11K_PCI_WINDOW_START) {
iowrite32(value, ab->mem + offset);
- } else {
- if (ab->bus_params.static_window_map)
- window_start = ath11k_pcic_get_window_start(ab, offset);
- else
- window_start = ATH11K_PCI_WINDOW_START;
-
- if (window_start == ATH11K_PCI_WINDOW_START &&
- ab->pci.ops->window_write32) {
- ab->pci.ops->window_write32(ab, offset, value);
- } else {
- iowrite32(value, ab->mem + window_start +
- (offset & ATH11K_PCI_WINDOW_RANGE_MASK));
- }
+ } else if (ab->bus_params.static_window_map) {
+ window_start = ath11k_pcic_get_window_start(ab, offset);
+ iowrite32(value, ab->mem + window_start +
+ (offset & ATH11K_PCI_WINDOW_RANGE_MASK));
+ } else if (ab->pci.ops->window_write32) {
+ ab->pci.ops->window_write32(ab, offset, value);
}

if (test_bit(ATH11K_FLAG_DEVICE_INIT_DONE, &ab->dev_flags) &&
@@ -185,7 +176,8 @@ void ath11k_pcic_write32(struct ath11k_base *ab, u32 offset, u32 value)

u32 ath11k_pcic_read32(struct ath11k_base *ab, u32 offset)
{
- u32 val, window_start;
+ u32 val = 0;
+ u32 window_start;
int ret = 0;

/* for offset beyond BAR + 4K - 32, may
@@ -197,19 +189,12 @@ u32 ath11k_pcic_read32(struct ath11k_base *ab, u32 offset)

if (offset < ATH11K_PCI_WINDOW_START) {
val = ioread32(ab->mem + offset);
- } else {
- if (ab->bus_params.static_window_map)
- window_start = ath11k_pcic_get_window_start(ab, offset);
- else
- window_start = ATH11K_PCI_WINDOW_START;
-
- if (window_start == ATH11K_PCI_WINDOW_START &&
- ab->pci.ops->window_read32) {
- val = ab->pci.ops->window_read32(ab, offset);
- } else {
- val = ioread32(ab->mem + window_start +
- (offset & ATH11K_PCI_WINDOW_RANGE_MASK));
- }
+ } else if (ab->bus_params.static_window_map) {
+ window_start = ath11k_pcic_get_window_start(ab, offset);
+ val = ioread32(ab->mem + window_start +
+ (offset & ATH11K_PCI_WINDOW_RANGE_MASK));
+ } else if (ab->pci.ops->window_read32) {
+ val = ab->pci.ops->window_read32(ab, offset);
}

if (test_bit(ATH11K_FLAG_DEVICE_INIT_DONE, &ab->dev_flags) &&
--
2.35.1

2022-04-06 15:23:09

by Manikanta Pubbisetty

[permalink] [raw]
Subject: [PATCH v4 10/12] ath11k: WMI changes to support WCN6750

WCN6750 is a single PDEV non-DBS chip which supports 2G, 5G and 6G bands.
It is a single LMAC device which can be either hooked to 2G/5G/6G bands.
Add WMI changes to support WCN6750.

Tested-on: WCN6750 hw1.0 AHB WLAN.MSL.1.0.1-00573-QCAMSLSWPLZ-1
Tested-on: WCN6855 hw2.0 PCI WLAN.HSP.1.1-01720.1-QCAHSPSWPL_V1_V2_SILICONZ_LITE-1
Tested-on: QCN9074 hw1.0 PCI WLAN.HK.2.5.0.1-01100-QCAHKSWPL_SILICONZ-1
Tested-on: IPQ8074 hw2.0 AHB WLAN.HK.2.4.0.1-00192-QCAHKSWPL_SILICONZ-1

Signed-off-by: Manikanta Pubbisetty <[email protected]>
---
drivers/net/wireless/ath/ath11k/wmi.c | 10 +++++++---
1 file changed, 7 insertions(+), 3 deletions(-)

diff --git a/drivers/net/wireless/ath/ath11k/wmi.c b/drivers/net/wireless/ath/ath11k/wmi.c
index 5b9fd9d8f06d..8cd381bec5c1 100644
--- a/drivers/net/wireless/ath/ath11k/wmi.c
+++ b/drivers/net/wireless/ath/ath11k/wmi.c
@@ -391,6 +391,10 @@ ath11k_pull_mac_phy_cap_svc_ready_ext(struct ath11k_pdev_wmi *wmi_handle,
ab->target_pdev_ids[ab->target_pdev_count].pdev_id = mac_phy_caps->pdev_id;
ab->target_pdev_count++;

+ if (!(mac_phy_caps->supported_bands & WMI_HOST_WLAN_2G_CAP) &&
+ !(mac_phy_caps->supported_bands & WMI_HOST_WLAN_5G_CAP))
+ return -EINVAL;
+
/* Take non-zero tx/rx chainmask. If tx/rx chainmask differs from
* band to band for a single radio, need to see how this should be
* handled.
@@ -398,7 +402,9 @@ ath11k_pull_mac_phy_cap_svc_ready_ext(struct ath11k_pdev_wmi *wmi_handle,
if (mac_phy_caps->supported_bands & WMI_HOST_WLAN_2G_CAP) {
pdev_cap->tx_chain_mask = mac_phy_caps->tx_chain_mask_2g;
pdev_cap->rx_chain_mask = mac_phy_caps->rx_chain_mask_2g;
- } else if (mac_phy_caps->supported_bands & WMI_HOST_WLAN_5G_CAP) {
+ }
+
+ if (mac_phy_caps->supported_bands & WMI_HOST_WLAN_5G_CAP) {
pdev_cap->vht_cap = mac_phy_caps->vht_cap_info_5g;
pdev_cap->vht_mcs = mac_phy_caps->vht_supp_mcs_5g;
pdev_cap->he_mcs = mac_phy_caps->he_supp_mcs_5g;
@@ -408,8 +414,6 @@ ath11k_pull_mac_phy_cap_svc_ready_ext(struct ath11k_pdev_wmi *wmi_handle,
WMI_NSS_RATIO_ENABLE_DISABLE_GET(mac_phy_caps->nss_ratio);
pdev_cap->nss_ratio_info =
WMI_NSS_RATIO_INFO_GET(mac_phy_caps->nss_ratio);
- } else {
- return -EINVAL;
}

/* tx/rx chainmask reported from fw depends on the actual hw chains used,
--
2.35.1

2022-04-06 15:56:01

by Manikanta Pubbisetty

[permalink] [raw]
Subject: [PATCH v4 06/12] ath11k: Add QMI changes for WCN6750

In the case of WCN6750, FW doesn't request for DDR memory
via QMI, instead it uses a fixed 12MB reserved Memory region
in the DDR which is called as MSA region. As a result, QMI
message sequence is not same as other ath11k supported devices.

Also, M3 firmware will be bundled into the FW and will be
downloaded to the target as part of Q6 boot.

This is the QMI flow in the case of WCN6750,

1) QMI firmware indication REQ/RESP
2) QMI host capability REQ/RESP
3) QMI target capability REQ/RESP
4) QMI device info REQ/RESP
5) QMI BDF download
6) QMI FW ready

Tested-on: WCN6750 hw1.0 AHB WLAN.MSL.1.0.1-00573-QCAMSLSWPLZ-1
Tested-on: WCN6855 hw2.0 PCI WLAN.HSP.1.1-01720.1-QCAHSPSWPL_V1_V2_SILICONZ_LITE-1
Tested-on: QCN9074 hw1.0 PCI WLAN.HK.2.5.0.1-01100-QCAHKSWPL_SILICONZ-1
Tested-on: IPQ8074 hw2.0 AHB WLAN.HK.2.4.0.1-00192-QCAHKSWPL_SILICONZ-1

Signed-off-by: Manikanta Pubbisetty <[email protected]>
---
drivers/net/wireless/ath/ath11k/core.c | 7 +++
drivers/net/wireless/ath/ath11k/hw.h | 1 +
drivers/net/wireless/ath/ath11k/qmi.c | 76 ++++++++++++++++----------
3 files changed, 56 insertions(+), 28 deletions(-)

diff --git a/drivers/net/wireless/ath/ath11k/core.c b/drivers/net/wireless/ath/ath11k/core.c
index 8695f999acb2..8602be029606 100644
--- a/drivers/net/wireless/ath/ath11k/core.c
+++ b/drivers/net/wireless/ath/ath11k/core.c
@@ -101,6 +101,7 @@ static const struct ath11k_hw_params ath11k_hw_params[] = {
.current_cc_support = false,
.dbr_debug_support = true,
.global_reset = false,
+ .fixed_fw_mem = false,
},
{
.hw_rev = ATH11K_HW_IPQ6018_HW10,
@@ -167,6 +168,7 @@ static const struct ath11k_hw_params ath11k_hw_params[] = {
.current_cc_support = false,
.dbr_debug_support = true,
.global_reset = false,
+ .fixed_fw_mem = false,
},
{
.name = "qca6390 hw2.0",
@@ -232,6 +234,7 @@ static const struct ath11k_hw_params ath11k_hw_params[] = {
.current_cc_support = true,
.dbr_debug_support = false,
.global_reset = true,
+ .fixed_fw_mem = false,
},
{
.name = "qcn9074 hw1.0",
@@ -297,6 +300,7 @@ static const struct ath11k_hw_params ath11k_hw_params[] = {
.current_cc_support = false,
.dbr_debug_support = true,
.global_reset = false,
+ .fixed_fw_mem = false,
},
{
.name = "wcn6855 hw2.0",
@@ -362,6 +366,7 @@ static const struct ath11k_hw_params ath11k_hw_params[] = {
.current_cc_support = true,
.dbr_debug_support = false,
.global_reset = true,
+ .fixed_fw_mem = false,
},
{
.name = "wcn6855 hw2.1",
@@ -426,6 +431,7 @@ static const struct ath11k_hw_params ath11k_hw_params[] = {
.current_cc_support = true,
.dbr_debug_support = false,
.global_reset = true,
+ .fixed_fw_mem = false,
},
{
.name = "wcn6750 hw1.0",
@@ -487,6 +493,7 @@ static const struct ath11k_hw_params ath11k_hw_params[] = {
.current_cc_support = true,
.dbr_debug_support = false,
.global_reset = false,
+ .fixed_fw_mem = true,
},
};

diff --git a/drivers/net/wireless/ath/ath11k/hw.h b/drivers/net/wireless/ath/ath11k/hw.h
index 08f958c03ec4..5fdb6894209e 100644
--- a/drivers/net/wireless/ath/ath11k/hw.h
+++ b/drivers/net/wireless/ath/ath11k/hw.h
@@ -195,6 +195,7 @@ struct ath11k_hw_params {
bool current_cc_support;
bool dbr_debug_support;
bool global_reset;
+ bool fixed_fw_mem;
};

struct ath11k_hw_ops {
diff --git a/drivers/net/wireless/ath/ath11k/qmi.c b/drivers/net/wireless/ath/ath11k/qmi.c
index df49f8b68556..57804c152692 100644
--- a/drivers/net/wireless/ath/ath11k/qmi.c
+++ b/drivers/net/wireless/ath/ath11k/qmi.c
@@ -1799,10 +1799,6 @@ static int ath11k_qmi_fw_ind_register_send(struct ath11k_base *ab)
req->client_id = QMI_WLANFW_CLIENT_ID;
req->fw_ready_enable_valid = 1;
req->fw_ready_enable = 1;
- req->request_mem_enable_valid = 1;
- req->request_mem_enable = 1;
- req->fw_mem_ready_enable_valid = 1;
- req->fw_mem_ready_enable = 1;
req->cal_done_enable_valid = 1;
req->cal_done_enable = 1;
req->fw_init_done_enable_valid = 1;
@@ -1811,6 +1807,17 @@ static int ath11k_qmi_fw_ind_register_send(struct ath11k_base *ab)
req->pin_connect_result_enable_valid = 0;
req->pin_connect_result_enable = 0;

+ /* WCN6750 doesn't request for DDR memory via QMI,
+ * instead it uses a fixed 12MB reserved memory
+ * region in DDR.
+ */
+ if (!ab->hw_params.fixed_fw_mem) {
+ req->request_mem_enable_valid = 1;
+ req->request_mem_enable = 1;
+ req->fw_mem_ready_enable_valid = 1;
+ req->fw_mem_ready_enable = 1;
+ }
+
ret = qmi_txn_init(handle, &txn,
qmi_wlanfw_ind_register_resp_msg_v01_ei, resp);
if (ret < 0)
@@ -2839,27 +2846,6 @@ ath11k_qmi_driver_event_post(struct ath11k_qmi *qmi,
return 0;
}

-static int ath11k_qmi_event_server_arrive(struct ath11k_qmi *qmi)
-{
- struct ath11k_base *ab = qmi->ab;
- int ret;
-
- ret = ath11k_qmi_fw_ind_register_send(ab);
- if (ret < 0) {
- ath11k_warn(ab, "failed to send qmi firmware indication: %d\n",
- ret);
- return ret;
- }
-
- ret = ath11k_qmi_host_cap_send(ab);
- if (ret < 0) {
- ath11k_warn(ab, "failed to send qmi host cap: %d\n", ret);
- return ret;
- }
-
- return ret;
-}
-
static int ath11k_qmi_event_mem_request(struct ath11k_qmi *qmi)
{
struct ath11k_base *ab = qmi->ab;
@@ -2901,9 +2887,33 @@ static int ath11k_qmi_event_load_bdf(struct ath11k_qmi *qmi)
return ret;
}

- ret = ath11k_qmi_wlanfw_m3_info_send(ab);
+ return 0;
+}
+
+static int ath11k_qmi_event_server_arrive(struct ath11k_qmi *qmi)
+{
+ struct ath11k_base *ab = qmi->ab;
+ int ret;
+
+ ret = ath11k_qmi_fw_ind_register_send(ab);
+ if (ret < 0) {
+ ath11k_warn(ab, "failed to send qmi firmware indication: %d\n",
+ ret);
+ return ret;
+ }
+
+ ret = ath11k_qmi_host_cap_send(ab);
if (ret < 0) {
- ath11k_warn(ab, "failed to send qmi m3 info req: %d\n", ret);
+ ath11k_warn(ab, "failed to send qmi host cap: %d\n", ret);
+ return ret;
+ }
+
+ if (!ab->hw_params.fixed_fw_mem)
+ return ret;
+
+ ret = ath11k_qmi_event_load_bdf(qmi);
+ if (ret < 0) {
+ ath11k_warn(ab, "qmi failed to download BDF:%d\n", ret);
return ret;
}

@@ -3103,8 +3113,18 @@ static void ath11k_qmi_driver_event_work(struct work_struct *work)
break;
case ATH11K_QMI_EVENT_FW_MEM_READY:
ret = ath11k_qmi_event_load_bdf(qmi);
- if (ret < 0)
+ if (ret < 0) {
set_bit(ATH11K_FLAG_QMI_FAIL, &ab->dev_flags);
+ break;
+ }
+
+ ret = ath11k_qmi_wlanfw_m3_info_send(ab);
+ if (ret < 0) {
+ ath11k_warn(ab,
+ "failed to send qmi m3 info req: %d\n", ret);
+ set_bit(ATH11K_FLAG_QMI_FAIL, &ab->dev_flags);
+ }
+
break;
case ATH11K_QMI_EVENT_FW_READY:
clear_bit(ATH11K_FLAG_QMI_FAIL, &ab->dev_flags);
--
2.35.1

2022-04-06 16:59:03

by Rob Herring (Arm)

[permalink] [raw]
Subject: Re: [PATCH v4 01/12] dt: bindings: net: add bindings of WCN6750 for ath11k

On Wed, 06 Apr 2022 15:10:55 +0530, Manikanta Pubbisetty wrote:
> WCN6750 is the WLAN chip on Qualcomm Snapdragon SoC SC7280;
> Though being a PCIe based solution, it is not attached to
> the APSS processor (Application Processor SubSystem), it is
> instead attached to another tiny processor called WPSS Q6
> processor (Wireless Processor SubSystem) on the SC7280 MSM,
> where the WLAN firmware runs, and it is the WLAN firmware
> running on the Q6 processor which enumerates WCN6750, as a
> result APPS processor would never know such a device being
> present in the system and would not detect the WCN6750
> hardware unless and otherwise WCN6750 is registered as a
> platform device. This is the reason behind adding WCN6750
> WLAN node in the device tree.
>
> Add WCN6750 wireless driver support, its based on ath11k driver.
>
> Signed-off-by: Manikanta Pubbisetty <[email protected]>
> ---
> .../bindings/net/wireless/qcom,ath11k.yaml | 361 ++++++++++++------
> 1 file changed, 252 insertions(+), 109 deletions(-)
>


Please add Acked-by/Reviewed-by tags when posting new versions. However,
there's no need to repost patches *only* to add the tags. The upstream
maintainer will do that for acks received on the version they apply.

If a tag was not added on purpose, please state why and what changed.

2022-04-07 07:54:02

by Manikanta Pubbisetty

[permalink] [raw]
Subject: Re: [PATCH v4 01/12] dt: bindings: net: add bindings of WCN6750 for ath11k

On 4/6/2022 8:38 PM, Rob Herring wrote:
> On Wed, 06 Apr 2022 15:10:55 +0530, Manikanta Pubbisetty wrote:
>> WCN6750 is the WLAN chip on Qualcomm Snapdragon SoC SC7280;
>> Though being a PCIe based solution, it is not attached to
>> the APSS processor (Application Processor SubSystem), it is
>> instead attached to another tiny processor called WPSS Q6
>> processor (Wireless Processor SubSystem) on the SC7280 MSM,
>> where the WLAN firmware runs, and it is the WLAN firmware
>> running on the Q6 processor which enumerates WCN6750, as a
>> result APPS processor would never know such a device being
>> present in the system and would not detect the WCN6750
>> hardware unless and otherwise WCN6750 is registered as a
>> platform device. This is the reason behind adding WCN6750
>> WLAN node in the device tree.
>>
>> Add WCN6750 wireless driver support, its based on ath11k driver.
>>
>> Signed-off-by: Manikanta Pubbisetty <[email protected]>
>> ---
>> .../bindings/net/wireless/qcom,ath11k.yaml | 361 ++++++++++++------
>> 1 file changed, 252 insertions(+), 109 deletions(-)
>>
>
>
> Please add Acked-by/Reviewed-by tags when posting new versions. However,
> there's no need to repost patches *only* to add the tags. The upstream
> maintainer will do that for acks received on the version they apply.
>
> If a tag was not added on purpose, please state why and what changed.
>

There are changes in V4 but nothing significant, I have missed adding
the tag, will make sure to add relevant tags going forward.

Thanks,
Manikanta

2022-04-27 09:30:23

by Manikanta Pubbisetty

[permalink] [raw]
Subject: Re: [PATCH v4 00/12] add support for WCN6750

On 4/27/2022 11:23 AM, Kalle Valo wrote:
> Manikanta Pubbisetty <[email protected]> writes:
>
>> WCN6750 is non-DBS 2x2 11AX chipset. Unlike QCA6390/WCN6855 which
>> are DBS (dual band simultaneous) solutions (2 LMACs), WCN6750 has a
>> single LMAC supporting 2G, 5G and 6G bands. It can be operated only
>> on one band at any given point.
>>
>> WCN6750 is a PCIe device. Unlike other supported ATH11K PCIe devices
>> which are directly attached to APSS (Application Processor SubSystem),
>> WCN6750 is not attached to APSS, it is attached to the WPSS
>> (Wireless Processor SubSystem) Q6 processor, the FW which runs on the
>> Q6 processor will enumerate the PCIe device. Since APSS is unaware of
>> such a device, it has to be registered as a platform device(AHB) to the
>> kernel for device probing. Like other AHB devices, remoteproc APIs are
>> used to boot up or shutdown of WCN6750.
>>
>> WCN6750 uses both AHB and PCIe ATH11K APIs for it's operation.
>> It uses AHB APIs for device probe and booting of the remote processor.
>> Once device is booted up, it uses ATH11K PCIe APIs for initialization
>> and register access. Hence, it is referred as hybrid bus device in
>> the rest of this series.
>>
>> Since the chip is enumerated by WPSS Q6, device information like
>> BAR and BAR size is not known to the APSS processor. A new QMI message
>> called device info QMI request will be sent to the target for fetching
>> these details.
>>
>> STA and AP modes are supported; Basic connectivity and ping are
>> verified in both the modes.
>>
>> An important point to note is that though WCN6750 is a PCIe device,
>> it cannot be attached to any other platform except on Qualcomm
>> Snapdragon SoCs due to the aforementioned reasons.
>>
>> Tested-on: WCN6750 hw1.0 AHB WLAN.MSL.1.0.1-00573-QCAMSLSWPLZ-1
>> Tested-on: WCN6855 hw2.0 PCI WLAN.HSP.1.1-01720.1-QCAHSPSWPL_V1_V2_SILICONZ_LITE-1
>> Tested-on: QCN9074 hw1.0 PCI WLAN.HK.2.5.0.1-01100-QCAHKSWPL_SILICONZ-1
>> Tested-on: IPQ8074 hw2.0 AHB WLAN.HK.2.4.0.1-00192-QCAHKSWPL_SILICONZ-1
>>
>> Manikanta Pubbisetty (12):
>> dt: bindings: net: add bindings of WCN6750 for ath11k
>> ath11k: Add HW params for WCN6750
>> ath11k: Add bus params for WCN6750
>> ath11k: Add register access logic for WCN6750
>> ath11k: Fetch device information via QMI for WCN6750
>> ath11k: Add QMI changes for WCN6750
>> ath11k: HAL changes to support WCN6750
>> ath11k: Datapath changes to support WCN6750
>> ath11k: Do not put HW in DBS mode for WCN6750
>> ath11k: WMI changes to support WCN6750
>> ath11k: Update WBM idle ring HP after FW mode on
>> ath11k: Add support for WCN6750 device
>
> Due to the bus_params problem I had to drop most of the patches, but I
> did keep few of them in the pending branch to reduce the patchset size:
>
> 495a15b1969a ath11k: Update WBM idle ring HP after FW mode on
> 8d121dacbe35 ath11k: WMI changes to support WCN6750
> e31091e06011 ath11k: Do not put HW in DBS mode for WCN6750
>
> Please submit v6 only after I have applied these, I'm waiting for some
> build testing first.
>

Sure Kalle, thanks!!

Manikanta

2022-04-27 09:36:06

by Manikanta Pubbisetty

[permalink] [raw]
Subject: Re: [PATCH v4 02/12] ath11k: Add HW params for WCN6750

On 4/27/2022 10:51 AM, Kalle Valo wrote:
> Manikanta Pubbisetty <[email protected]> writes:
>
>> Add HW params for WCN6750. It is similar to the HW params
>> of QCA6390 with few differences wrt DP APIs and register
>> offsets.
>>
>> Tested-on: WCN6750 hw1.0 AHB WLAN.MSL.1.0.1-00573-QCAMSLSWPLZ-1
>> Tested-on: WCN6855 hw2.0 PCI WLAN.HSP.1.1-01720.1-QCAHSPSWPL_V1_V2_SILICONZ_LITE-1
>> Tested-on: QCN9074 hw1.0 PCI WLAN.HK.2.5.0.1-01100-QCAHKSWPL_SILICONZ-1
>> Tested-on: IPQ8074 hw2.0 AHB WLAN.HK.2.4.0.1-00192-QCAHKSWPL_SILICONZ-1
>>
>> Signed-off-by: Manikanta Pubbisetty <[email protected]>
>> ---
>> drivers/net/wireless/ath/ath11k/core.c | 61 ++++++++++++++++++++++++++
>> drivers/net/wireless/ath/ath11k/core.h | 1 +
>> drivers/net/wireless/ath/ath11k/qmi.h | 2 +
>> 3 files changed, 64 insertions(+)
>>
>> diff --git a/drivers/net/wireless/ath/ath11k/core.c b/drivers/net/wireless/ath/ath11k/core.c
>> index cbac1919867f..8695f999acb2 100644
>> --- a/drivers/net/wireless/ath/ath11k/core.c
>> +++ b/drivers/net/wireless/ath/ath11k/core.c
>> @@ -427,6 +427,67 @@ static const struct ath11k_hw_params ath11k_hw_params[] = {
>> .dbr_debug_support = false,
>> .global_reset = true,
>> },
>> + {
>> + .name = "wcn6750 hw1.0",
>> + .hw_rev = ATH11K_HW_WCN6750_HW10,
>> + .fw = {
>> + .dir = "WCN6750/hw1.0",
>> + .board_size = 256 * 1024,
>> + .cal_offset = 128 * 1024,
>> + },
>> + .max_radios = 1,
>> + .bdf_addr = 0x4B0C0000,
>> + .ring_mask = &ath11k_hw_ring_mask_qca6390,
>> + .internal_sleep_clock = false,
>> + .qmi_service_ins_id = ATH11K_QMI_WLFW_SERVICE_INS_ID_V01_WCN6750,
>> + .host_ce_config = ath11k_host_ce_config_qca6390,
>> + .ce_count = 9,
>> + .target_ce_config = ath11k_target_ce_config_wlan_qca6390,
>> + .target_ce_count = 9,
>> + .svc_to_ce_map = ath11k_target_service_to_ce_map_wlan_qca6390,
>> + .svc_to_ce_map_len = 14,
>> + .rfkill_pin = 0,
>> + .rfkill_cfg = 0,
>> + .rfkill_on_level = 0,
>> + .single_pdev_only = true,
>> + .rxdma1_enable = false,
>> + .num_rxmda_per_pdev = 1,
>> + .rx_mac_buf_ring = true,
>> + .vdev_start_delay = true,
>> + .htt_peer_map_v2 = false,
>> +
>> + .spectral = {
>> + .fft_sz = 0,
>> + .fft_pad_sz = 0,
>> + .summary_pad_sz = 0,
>> + .fft_hdr_len = 0,
>> + .max_fft_bins = 0,
>> + },
>> +
>> + .interface_modes = BIT(NL80211_IFTYPE_STATION) |
>> + BIT(NL80211_IFTYPE_AP),
>> + .supports_monitor = false,
>> + .supports_shadow_regs = true,
>> + .idle_ps = true,
>> + .supports_sta_ps = true,
>> + .cold_boot_calib = false,
>> + .fw_mem_mode = 0,
>> + .num_vdevs = 16 + 1,
>> + .num_peers = 512,
>> + .supports_suspend = false,
>> + .supports_regdb = true,
>> + .fix_l1ss = false,
>> + .credit_flow = true,
>> + .max_tx_ring = DP_TCL_NUM_RING_MAX_QCA6390,
>> + .hal_params = &ath11k_hw_hal_params_qca6390,
>> + .supports_dynamic_smps_6ghz = false,
>> + .alloc_cacheable_memory = false,
>> + .supports_rssi_stats = true,
>> + .fw_wmi_diag_event = false,
>> + .current_cc_support = true,
>> + .dbr_debug_support = false,
>> + .global_reset = false,
>> + },
>
> In the pending branch I added:
>
> + .bios_sar_capa = NULL,
>

This is the only other change I had in V5, thanks for adding this.

Manikanta

2022-04-27 10:09:11

by Manikanta Pubbisetty

[permalink] [raw]
Subject: Re: [PATCH v4 04/12] ath11k: Add register access logic for WCN6750

On 4/27/2022 11:15 AM, Kalle Valo wrote:
> Manikanta Pubbisetty <[email protected]> writes:
>
>> WCN6750 uses static window mapping to access the HW registers.
>> Unlike QCN9074 which uses 2nd window for CE and 3rd window
>> for UMAC register accesses, WCN6750 uses 1st window for UMAC
>> and 2nd window for CE registers.
>>
>> Code is refactored so that WCN6750 can use the existing
>> ath11k_pci_read/write() APIs for accessing the registers.
>>
>> Tested-on: WCN6750 hw1.0 AHB WLAN.MSL.1.0.1-00573-QCAMSLSWPLZ-1
>> Tested-on: WCN6855 hw2.0 PCI WLAN.HSP.1.1-01720.1-QCAHSPSWPL_V1_V2_SILICONZ_LITE-1
>> Tested-on: QCN9074 hw1.0 PCI WLAN.HK.2.5.0.1-01100-QCAHKSWPL_SILICONZ-1
>> Tested-on: IPQ8074 hw2.0 AHB WLAN.HK.2.4.0.1-00192-QCAHKSWPL_SILICONZ-1
>>
>> Signed-off-by: Manikanta Pubbisetty <[email protected]>
>> ---
>> drivers/net/wireless/ath/ath11k/ahb.c | 3 ++
>> drivers/net/wireless/ath/ath11k/core.h | 2 +
>> drivers/net/wireless/ath/ath11k/pci.c | 4 ++
>> drivers/net/wireless/ath/ath11k/pcic.c | 53 +++++++++-----------------
>> 4 files changed, 28 insertions(+), 34 deletions(-)
>>
>> diff --git a/drivers/net/wireless/ath/ath11k/ahb.c b/drivers/net/wireless/ath/ath11k/ahb.c
>> index d73643e3e8dd..d27fc7276977 100644
>> --- a/drivers/net/wireless/ath/ath11k/ahb.c
>> +++ b/drivers/net/wireless/ath/ath11k/ahb.c
>> @@ -42,6 +42,9 @@ const struct ath11k_bus_params ath11k_ahb_hybrid_bus_params = {
>> .fixed_bdf_addr = false,
>> .fixed_mem_region = false,
>> .hybrid_bus_type = true,
>> + .static_window_map = true,
>> + .dp_window_idx = 1,
>> + .ce_window_idx = 2,
>> };
>
> Even if the values are zero, please initialise the new fields in every
> bus_params structure:
>
> ahb.c:31:static const struct ath11k_bus_params ath11k_ahb_bus_params = {
> pci.c:118:static const struct ath11k_bus_params ath11k_pci_bus_params = {
>

Makes sense, should I send another series addressing these?

2022-04-27 10:43:33

by Kalle Valo

[permalink] [raw]
Subject: Re: [PATCH v4 02/12] ath11k: Add HW params for WCN6750

Manikanta Pubbisetty <[email protected]> writes:

> Add HW params for WCN6750. It is similar to the HW params
> of QCA6390 with few differences wrt DP APIs and register
> offsets.
>
> Tested-on: WCN6750 hw1.0 AHB WLAN.MSL.1.0.1-00573-QCAMSLSWPLZ-1
> Tested-on: WCN6855 hw2.0 PCI WLAN.HSP.1.1-01720.1-QCAHSPSWPL_V1_V2_SILICONZ_LITE-1
> Tested-on: QCN9074 hw1.0 PCI WLAN.HK.2.5.0.1-01100-QCAHKSWPL_SILICONZ-1
> Tested-on: IPQ8074 hw2.0 AHB WLAN.HK.2.4.0.1-00192-QCAHKSWPL_SILICONZ-1
>
> Signed-off-by: Manikanta Pubbisetty <[email protected]>
> ---
> drivers/net/wireless/ath/ath11k/core.c | 61 ++++++++++++++++++++++++++
> drivers/net/wireless/ath/ath11k/core.h | 1 +
> drivers/net/wireless/ath/ath11k/qmi.h | 2 +
> 3 files changed, 64 insertions(+)
>
> diff --git a/drivers/net/wireless/ath/ath11k/core.c b/drivers/net/wireless/ath/ath11k/core.c
> index cbac1919867f..8695f999acb2 100644
> --- a/drivers/net/wireless/ath/ath11k/core.c
> +++ b/drivers/net/wireless/ath/ath11k/core.c
> @@ -427,6 +427,67 @@ static const struct ath11k_hw_params ath11k_hw_params[] = {
> .dbr_debug_support = false,
> .global_reset = true,
> },
> + {
> + .name = "wcn6750 hw1.0",
> + .hw_rev = ATH11K_HW_WCN6750_HW10,
> + .fw = {
> + .dir = "WCN6750/hw1.0",
> + .board_size = 256 * 1024,
> + .cal_offset = 128 * 1024,
> + },
> + .max_radios = 1,
> + .bdf_addr = 0x4B0C0000,
> + .ring_mask = &ath11k_hw_ring_mask_qca6390,
> + .internal_sleep_clock = false,
> + .qmi_service_ins_id = ATH11K_QMI_WLFW_SERVICE_INS_ID_V01_WCN6750,
> + .host_ce_config = ath11k_host_ce_config_qca6390,
> + .ce_count = 9,
> + .target_ce_config = ath11k_target_ce_config_wlan_qca6390,
> + .target_ce_count = 9,
> + .svc_to_ce_map = ath11k_target_service_to_ce_map_wlan_qca6390,
> + .svc_to_ce_map_len = 14,
> + .rfkill_pin = 0,
> + .rfkill_cfg = 0,
> + .rfkill_on_level = 0,
> + .single_pdev_only = true,
> + .rxdma1_enable = false,
> + .num_rxmda_per_pdev = 1,
> + .rx_mac_buf_ring = true,
> + .vdev_start_delay = true,
> + .htt_peer_map_v2 = false,
> +
> + .spectral = {
> + .fft_sz = 0,
> + .fft_pad_sz = 0,
> + .summary_pad_sz = 0,
> + .fft_hdr_len = 0,
> + .max_fft_bins = 0,
> + },
> +
> + .interface_modes = BIT(NL80211_IFTYPE_STATION) |
> + BIT(NL80211_IFTYPE_AP),
> + .supports_monitor = false,
> + .supports_shadow_regs = true,
> + .idle_ps = true,
> + .supports_sta_ps = true,
> + .cold_boot_calib = false,
> + .fw_mem_mode = 0,
> + .num_vdevs = 16 + 1,
> + .num_peers = 512,
> + .supports_suspend = false,
> + .supports_regdb = true,
> + .fix_l1ss = false,
> + .credit_flow = true,
> + .max_tx_ring = DP_TCL_NUM_RING_MAX_QCA6390,
> + .hal_params = &ath11k_hw_hal_params_qca6390,
> + .supports_dynamic_smps_6ghz = false,
> + .alloc_cacheable_memory = false,
> + .supports_rssi_stats = true,
> + .fw_wmi_diag_event = false,
> + .current_cc_support = true,
> + .dbr_debug_support = false,
> + .global_reset = false,
> + },

In the pending branch I added:

+ .bios_sar_capa = NULL,

--
https://patchwork.kernel.org/project/linux-wireless/list/

https://wireless.wiki.kernel.org/en/developers/documentation/submittingpatches

2022-04-27 10:44:23

by Kalle Valo

[permalink] [raw]
Subject: Re: [PATCH v4 04/12] ath11k: Add register access logic for WCN6750

Manikanta Pubbisetty <[email protected]> writes:

> WCN6750 uses static window mapping to access the HW registers.
> Unlike QCN9074 which uses 2nd window for CE and 3rd window
> for UMAC register accesses, WCN6750 uses 1st window for UMAC
> and 2nd window for CE registers.
>
> Code is refactored so that WCN6750 can use the existing
> ath11k_pci_read/write() APIs for accessing the registers.
>
> Tested-on: WCN6750 hw1.0 AHB WLAN.MSL.1.0.1-00573-QCAMSLSWPLZ-1
> Tested-on: WCN6855 hw2.0 PCI WLAN.HSP.1.1-01720.1-QCAHSPSWPL_V1_V2_SILICONZ_LITE-1
> Tested-on: QCN9074 hw1.0 PCI WLAN.HK.2.5.0.1-01100-QCAHKSWPL_SILICONZ-1
> Tested-on: IPQ8074 hw2.0 AHB WLAN.HK.2.4.0.1-00192-QCAHKSWPL_SILICONZ-1
>
> Signed-off-by: Manikanta Pubbisetty <[email protected]>
> ---
> drivers/net/wireless/ath/ath11k/ahb.c | 3 ++
> drivers/net/wireless/ath/ath11k/core.h | 2 +
> drivers/net/wireless/ath/ath11k/pci.c | 4 ++
> drivers/net/wireless/ath/ath11k/pcic.c | 53 +++++++++-----------------
> 4 files changed, 28 insertions(+), 34 deletions(-)
>
> diff --git a/drivers/net/wireless/ath/ath11k/ahb.c b/drivers/net/wireless/ath/ath11k/ahb.c
> index d73643e3e8dd..d27fc7276977 100644
> --- a/drivers/net/wireless/ath/ath11k/ahb.c
> +++ b/drivers/net/wireless/ath/ath11k/ahb.c
> @@ -42,6 +42,9 @@ const struct ath11k_bus_params ath11k_ahb_hybrid_bus_params = {
> .fixed_bdf_addr = false,
> .fixed_mem_region = false,
> .hybrid_bus_type = true,
> + .static_window_map = true,
> + .dp_window_idx = 1,
> + .ce_window_idx = 2,
> };

Even if the values are zero, please initialise the new fields in every
bus_params structure:

ahb.c:31:static const struct ath11k_bus_params ath11k_ahb_bus_params = {
pci.c:118:static const struct ath11k_bus_params ath11k_pci_bus_params = {

> --- a/drivers/net/wireless/ath/ath11k/pci.c
> +++ b/drivers/net/wireless/ath/ath11k/pci.c
> @@ -771,6 +771,10 @@ static int ath11k_pci_probe(struct pci_dev *pdev,
> ab->bus_params.static_window_map = true;
> ab->pci.ops = &ath11k_pci_ops_qcn9074;
> ab->hw_rev = ATH11K_HW_QCN9074_HW10;
> +
> + /* For QCN9074, CE: 2nd window, UMAC: 3rd window */
> + ab->bus_params.ce_window_idx = 2;
> + ab->bus_params.dp_window_idx = 3;

Bus params are supposed to be const so that you cannot change them. If
there are device specific attributes they should be in hw_params.

I see now that both hw_params and bus_params are not const in struct
ath11k_base and that's why you were able to change them:

struct ath11k_hw_params hw_params;
struct ath11k_bus_params bus_params;

I'll send a separate patch to fix that.

--
https://patchwork.kernel.org/project/linux-wireless/list/

https://wireless.wiki.kernel.org/en/developers/documentation/submittingpatches

2022-04-27 11:13:33

by Kalle Valo

[permalink] [raw]
Subject: Re: [PATCH v4 01/12] dt: bindings: net: add bindings of WCN6750 for ath11k

Manikanta Pubbisetty <[email protected]> writes:

> On 4/6/2022 8:38 PM, Rob Herring wrote:
>> On Wed, 06 Apr 2022 15:10:55 +0530, Manikanta Pubbisetty wrote:
>>> WCN6750 is the WLAN chip on Qualcomm Snapdragon SoC SC7280;
>>> Though being a PCIe based solution, it is not attached to
>>> the APSS processor (Application Processor SubSystem), it is
>>> instead attached to another tiny processor called WPSS Q6
>>> processor (Wireless Processor SubSystem) on the SC7280 MSM,
>>> where the WLAN firmware runs, and it is the WLAN firmware
>>> running on the Q6 processor which enumerates WCN6750, as a
>>> result APPS processor would never know such a device being
>>> present in the system and would not detect the WCN6750
>>> hardware unless and otherwise WCN6750 is registered as a
>>> platform device. This is the reason behind adding WCN6750
>>> WLAN node in the device tree.
>>>
>>> Add WCN6750 wireless driver support, its based on ath11k driver.
>>>
>>> Signed-off-by: Manikanta Pubbisetty <[email protected]>
>>> ---
>>> .../bindings/net/wireless/qcom,ath11k.yaml | 361 ++++++++++++------
>>> 1 file changed, 252 insertions(+), 109 deletions(-)
>>>
>>
>>
>> Please add Acked-by/Reviewed-by tags when posting new versions. However,
>> there's no need to repost patches *only* to add the tags. The upstream
>> maintainer will do that for acks received on the version they apply.
>>
>> If a tag was not added on purpose, please state why and what changed.
>>
>
> There are changes in V4 but nothing significant, I have missed adding
> the tag, will make sure to add relevant tags going forward.

I added Rob's reviewed-by to patch 1.

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2022-04-27 11:27:30

by Kalle Valo

[permalink] [raw]
Subject: Re: [PATCH v4 00/12] add support for WCN6750

Manikanta Pubbisetty <[email protected]> writes:

> WCN6750 is non-DBS 2x2 11AX chipset. Unlike QCA6390/WCN6855 which
> are DBS (dual band simultaneous) solutions (2 LMACs), WCN6750 has a
> single LMAC supporting 2G, 5G and 6G bands. It can be operated only
> on one band at any given point.
>
> WCN6750 is a PCIe device. Unlike other supported ATH11K PCIe devices
> which are directly attached to APSS (Application Processor SubSystem),
> WCN6750 is not attached to APSS, it is attached to the WPSS
> (Wireless Processor SubSystem) Q6 processor, the FW which runs on the
> Q6 processor will enumerate the PCIe device. Since APSS is unaware of
> such a device, it has to be registered as a platform device(AHB) to the
> kernel for device probing. Like other AHB devices, remoteproc APIs are
> used to boot up or shutdown of WCN6750.
>
> WCN6750 uses both AHB and PCIe ATH11K APIs for it's operation.
> It uses AHB APIs for device probe and booting of the remote processor.
> Once device is booted up, it uses ATH11K PCIe APIs for initialization
> and register access. Hence, it is referred as hybrid bus device in
> the rest of this series.
>
> Since the chip is enumerated by WPSS Q6, device information like
> BAR and BAR size is not known to the APSS processor. A new QMI message
> called device info QMI request will be sent to the target for fetching
> these details.
>
> STA and AP modes are supported; Basic connectivity and ping are
> verified in both the modes.
>
> An important point to note is that though WCN6750 is a PCIe device,
> it cannot be attached to any other platform except on Qualcomm
> Snapdragon SoCs due to the aforementioned reasons.
>
> Tested-on: WCN6750 hw1.0 AHB WLAN.MSL.1.0.1-00573-QCAMSLSWPLZ-1
> Tested-on: WCN6855 hw2.0 PCI WLAN.HSP.1.1-01720.1-QCAHSPSWPL_V1_V2_SILICONZ_LITE-1
> Tested-on: QCN9074 hw1.0 PCI WLAN.HK.2.5.0.1-01100-QCAHKSWPL_SILICONZ-1
> Tested-on: IPQ8074 hw2.0 AHB WLAN.HK.2.4.0.1-00192-QCAHKSWPL_SILICONZ-1
>
> Manikanta Pubbisetty (12):
> dt: bindings: net: add bindings of WCN6750 for ath11k
> ath11k: Add HW params for WCN6750
> ath11k: Add bus params for WCN6750
> ath11k: Add register access logic for WCN6750
> ath11k: Fetch device information via QMI for WCN6750
> ath11k: Add QMI changes for WCN6750
> ath11k: HAL changes to support WCN6750
> ath11k: Datapath changes to support WCN6750
> ath11k: Do not put HW in DBS mode for WCN6750
> ath11k: WMI changes to support WCN6750
> ath11k: Update WBM idle ring HP after FW mode on
> ath11k: Add support for WCN6750 device

Due to the bus_params problem I had to drop most of the patches, but I
did keep few of them in the pending branch to reduce the patchset size:

495a15b1969a ath11k: Update WBM idle ring HP after FW mode on
8d121dacbe35 ath11k: WMI changes to support WCN6750
e31091e06011 ath11k: Do not put HW in DBS mode for WCN6750

Please submit v6 only after I have applied these, I'm waiting for some
build testing first.

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2022-04-29 12:57:42

by Kalle Valo

[permalink] [raw]
Subject: Re: [PATCH v4 04/12] ath11k: Add register access logic for WCN6750

Manikanta Pubbisetty <[email protected]> writes:

> On 4/27/2022 11:15 AM, Kalle Valo wrote:
>> Manikanta Pubbisetty <[email protected]> writes:
>>
>>> WCN6750 uses static window mapping to access the HW registers.
>>> Unlike QCN9074 which uses 2nd window for CE and 3rd window
>>> for UMAC register accesses, WCN6750 uses 1st window for UMAC
>>> and 2nd window for CE registers.
>>>
>>> Code is refactored so that WCN6750 can use the existing
>>> ath11k_pci_read/write() APIs for accessing the registers.
>>>
>>> Tested-on: WCN6750 hw1.0 AHB WLAN.MSL.1.0.1-00573-QCAMSLSWPLZ-1
>>> Tested-on: WCN6855 hw2.0 PCI WLAN.HSP.1.1-01720.1-QCAHSPSWPL_V1_V2_SILICONZ_LITE-1
>>> Tested-on: QCN9074 hw1.0 PCI WLAN.HK.2.5.0.1-01100-QCAHKSWPL_SILICONZ-1
>>> Tested-on: IPQ8074 hw2.0 AHB WLAN.HK.2.4.0.1-00192-QCAHKSWPL_SILICONZ-1
>>>
>>> Signed-off-by: Manikanta Pubbisetty <[email protected]>
>>> ---
>>> drivers/net/wireless/ath/ath11k/ahb.c | 3 ++
>>> drivers/net/wireless/ath/ath11k/core.h | 2 +
>>> drivers/net/wireless/ath/ath11k/pci.c | 4 ++
>>> drivers/net/wireless/ath/ath11k/pcic.c | 53 +++++++++-----------------
>>> 4 files changed, 28 insertions(+), 34 deletions(-)
>>>
>>> diff --git a/drivers/net/wireless/ath/ath11k/ahb.c b/drivers/net/wireless/ath/ath11k/ahb.c
>>> index d73643e3e8dd..d27fc7276977 100644
>>> --- a/drivers/net/wireless/ath/ath11k/ahb.c
>>> +++ b/drivers/net/wireless/ath/ath11k/ahb.c
>>> @@ -42,6 +42,9 @@ const struct ath11k_bus_params ath11k_ahb_hybrid_bus_params = {
>>> .fixed_bdf_addr = false,
>>> .fixed_mem_region = false,
>>> .hybrid_bus_type = true,
>>> + .static_window_map = true,
>>> + .dp_window_idx = 1,
>>> + .ce_window_idx = 2,
>>> };
>>
>> Even if the values are zero, please initialise the new fields in every
>> bus_params structure:
>>
>> ahb.c:31:static const struct ath11k_bus_params ath11k_ahb_bus_params = {
>> pci.c:118:static const struct ath11k_bus_params ath11k_pci_bus_params = {
>>
>
> Makes sense, should I send another series addressing these?

Please fix that already in this patchset.

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