From: Bartosz Golaszewski <[email protected]>
NOTE: resending due to missing irqchip maintainers in Cc
This series ports the davinci platform to using SPARSE_IRQ, cleans up
the irqchip drivers and moves them over to drivers/irqchip.
The series can be logically split into four parts. The first (1-8) aims
at introducing support for SPARSE_IRQ. It contains a couple changes
required for that functionality and the final patch actually selecting
it.
Second part (9-19) makes the aintc driver suitable for drivers/irqchip
and eventually moves it over there.
Part 3 (20-32) does the same for the cp-intc driver.
Last patch removes unnecessary code.
The series has been tested on da850-lcdk (for cp-intc) and
dm365-evm (for aintc).
v1 -> v2:
- made commit messages readable without reading the subject line first
- collected David's Reviewed-by tags for patches that haven been
significantly modified since v1
- added handling of spurious interrupts in cp-intc
- added comments explaining the irq handlers (C versions translated from
assembly)
- dropped the patches removing the hardware interrupt numbers from
the priority tables
- don't remove irqs.h, make it a local header instead
- rearranged the patches in order not to remove the code added
by earlier ones
- renamed d*_init_irqs to d*_init_irq to fit the name of the relevant
callback in machine info struct
- fixed license identifiers where needed
- added comments to config structures for irqchip drivers
- fixed all off-by-one errors in resource sizes
- clarified the comments on the weird handling of IRQ_TINT1_TINT34 as level
irq and added missing calls to irq_set_handler() to dm3* SoCs
- fixed one function that was missing a correct prefix in cp_intc
- return value variables should be called ret not rv
- added a patch converting calls to _raw_readl/writel() to their _relaxed
counterparts
- fixed the commit message prefix in patches that belong to the irqchip
subsystem
- other minor tweaks
Bartosz Golaszewski (33):
ARM: davinci: remove intc_host_map from davinci_soc_info struct
ARM: davinci: aintc: use irq domain
ARM: davinci: select GENERIC_IRQ_MULTI_HANDLER
ARM: davinci: remove davinci_intc_type
ARM: davinci: pull davinci_intc_base into the respective intc drivers
ARM: davinci: wrap HW interrupt numbers with a macro
ARM: davinci: select SPARSE_IRQ
ARM: davinci: make irqs.h a local header
ARM: davinci: aintc: drop GPL license boilerplate
ARM: davinci: aintc: wrap davinci_irq_init() with a helper
ARM: davinci: aintc: use a common prefix for symbols in the driver
ARM: davinci: aintc: drop the 00 prefix from register offsets
ARM: davinci: aintc: use readl/writel_relaxed()
irqchip: davinci-aintc: add a new config structure
ARM: davinci: aintc: use the new irqchip config structure in dm* SoCs
ARM: davinci: aintc: use the new config structure
ARM: davinci: aintc: move timer-specific irq_set_handler() out of
irq.c
ARM: davinci: aintc: remove unnecessary includes
irqchip: davinci-aintc: move the driver to drivers/irqchip
ARM: davinci: cp-intc: remove cp_intc.h
ARM: davinci: cp-intc: add a wrapper around cp_intc_init()
irqchip: davinci-cp-intc: add a new config structure
ARM: davinci: cp-intc: add the new config structures for da8xx SoCs
ARM: davinci: cp-intc: use a common prefix for all symbols
ARM: davinci: cp-intc: convert all hex numbers to lowercase
ARM: davinci: cp-intc: use the new-style config structure
ARM: davinci: cp-intc: improve coding style
ARM: davinci: cp-intc: unify error handling
ARM: davinci: cp-intc: use readl/writel_relaxed()
ARM: davinci: cp-intc: drop GPL license boilerplate
ARM: davinci: cp-intc: remove redundant comments
irqchip: davinci-cp-intc: move the driver to drivers/irqchip
ARM: davinci: remove intc related fields from davinci_soc_info
arch/arm/Kconfig | 2 +
arch/arm/mach-davinci/Kconfig | 19 +-
arch/arm/mach-davinci/Makefile | 3 -
arch/arm/mach-davinci/asp.h | 8 +-
arch/arm/mach-davinci/board-da830-evm.c | 5 +-
arch/arm/mach-davinci/board-da850-evm.c | 5 +-
arch/arm/mach-davinci/board-dm355-evm.c | 2 +-
arch/arm/mach-davinci/board-dm355-leopard.c | 2 +-
arch/arm/mach-davinci/board-dm365-evm.c | 2 +-
arch/arm/mach-davinci/board-dm644x-evm.c | 8 +-
arch/arm/mach-davinci/board-dm646x-evm.c | 7 +-
arch/arm/mach-davinci/board-mityomapl138.c | 3 +-
arch/arm/mach-davinci/board-neuros-osd2.c | 2 +-
arch/arm/mach-davinci/board-omapl138-hawk.c | 3 +-
arch/arm/mach-davinci/board-sffsdr.c | 2 +-
arch/arm/mach-davinci/common.c | 3 -
arch/arm/mach-davinci/cp_intc.c | 215 ----------------
arch/arm/mach-davinci/cp_intc.h | 57 -----
arch/arm/mach-davinci/da830.c | 128 ++--------
arch/arm/mach-davinci/da850.c | 154 +++---------
arch/arm/mach-davinci/davinci.h | 4 +
arch/arm/mach-davinci/devices-da8xx.c | 147 +++++------
arch/arm/mach-davinci/devices.c | 40 +--
arch/arm/mach-davinci/dm355.c | 86 ++++---
arch/arm/mach-davinci/dm365.c | 110 ++++----
arch/arm/mach-davinci/dm644x.c | 76 +++---
arch/arm/mach-davinci/dm646x.c | 90 ++++---
arch/arm/mach-davinci/include/mach/common.h | 14 +-
arch/arm/mach-davinci/include/mach/da8xx.h | 2 +
.../mach-davinci/include/mach/entry-macro.S | 39 ---
arch/arm/mach-davinci/irq.c | 117 ---------
.../mach-davinci/{include/mach => }/irqs.h | 4 -
arch/arm/mach-davinci/usb-da8xx.c | 9 +-
arch/arm/mach-davinci/usb.c | 14 +-
drivers/irqchip/Kconfig | 10 +
drivers/irqchip/Makefile | 2 +
drivers/irqchip/irq-davinci-aintc.c | 144 +++++++++++
drivers/irqchip/irq-davinci-cp-intc.c | 238 ++++++++++++++++++
include/linux/irqchip/irq-davinci-aintc.h | 27 ++
include/linux/irqchip/irq-davinci-cp-intc.h | 25 ++
40 files changed, 872 insertions(+), 956 deletions(-)
delete mode 100644 arch/arm/mach-davinci/cp_intc.c
delete mode 100644 arch/arm/mach-davinci/cp_intc.h
delete mode 100644 arch/arm/mach-davinci/include/mach/entry-macro.S
delete mode 100644 arch/arm/mach-davinci/irq.c
rename arch/arm/mach-davinci/{include/mach => }/irqs.h (98%)
create mode 100644 drivers/irqchip/irq-davinci-aintc.c
create mode 100644 drivers/irqchip/irq-davinci-cp-intc.c
create mode 100644 include/linux/irqchip/irq-davinci-aintc.h
create mode 100644 include/linux/irqchip/irq-davinci-cp-intc.h
--
2.20.1
From: Bartosz Golaszewski <[email protected]>
Replace the GPLv2 or later license boilerplate with an SPDX identifier.
Signed-off-by: Bartosz Golaszewski <[email protected]>
---
arch/arm/mach-davinci/irq.c | 26 ++++++--------------------
1 file changed, 6 insertions(+), 20 deletions(-)
diff --git a/arch/arm/mach-davinci/irq.c b/arch/arm/mach-davinci/irq.c
index 88c30759d1c5..1301adc569e2 100644
--- a/arch/arm/mach-davinci/irq.c
+++ b/arch/arm/mach-davinci/irq.c
@@ -1,23 +1,9 @@
-/*
- * Interrupt handler for DaVinci boards.
- *
- * Copyright (C) 2006 Texas Instruments.
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation; either version 2 of the License, or
- * (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
- *
- */
+// SPDX-License-Identifier: GPL-2.0-or-later
+//
+// Copyright (C) 2006, 2019 Texas Instruments.
+//
+// Interrupt handler for DaVinci boards.
+
#include <linux/kernel.h>
#include <linux/init.h>
#include <linux/interrupt.h>
--
2.20.1
From: Bartosz Golaszewski <[email protected]>
Use WARN_ON() on eny error in cp-intc initialization and drop all
custom error messages.
Signed-off-by: Bartosz Golaszewski <[email protected]>
Reviewed-by: David Lechner <[email protected]>
---
arch/arm/mach-davinci/cp_intc.c | 10 +++-------
1 file changed, 3 insertions(+), 7 deletions(-)
diff --git a/arch/arm/mach-davinci/cp_intc.c b/arch/arm/mach-davinci/cp_intc.c
index f3787ae4cdbd..c1efb9390655 100644
--- a/arch/arm/mach-davinci/cp_intc.c
+++ b/arch/arm/mach-davinci/cp_intc.c
@@ -200,20 +200,16 @@ davinci_cp_intc_do_init(const struct davinci_cp_intc_config *config,
DAVINCI_CP_INTC_CHAN_MAP(offset));
irq_base = irq_alloc_descs(-1, 0, config->num_irqs, 0);
- if (irq_base < 0) {
- pr_warn("Couldn't allocate IRQ numbers\n");
- irq_base = 0;
- }
+ if (WARN_ON(irq_base < 0))
+ return irq_base;
/* create a legacy host */
davinci_cp_intc_irq_domain = irq_domain_add_legacy(
node, config->num_irqs, irq_base, 0,
&davinci_cp_intc_irq_domain_ops, NULL);
- if (!davinci_cp_intc_irq_domain) {
- pr_err("cp_intc: failed to allocate irq host!\n");
+ if (WARN_ON(!davinci_cp_intc_irq_domain))
return -EINVAL;
- }
set_handle_irq(davinci_cp_intc_handle_irq);
--
2.20.1
From: Bartosz Golaszewski <[email protected]>
Replace the GPLv2 license boilerplate with an SPDX identifier and add
myself as a second author.
Signed-off-by: Bartosz Golaszewski <[email protected]>
---
arch/arm/mach-davinci/cp_intc.c | 18 ++++++++----------
1 file changed, 8 insertions(+), 10 deletions(-)
diff --git a/arch/arm/mach-davinci/cp_intc.c b/arch/arm/mach-davinci/cp_intc.c
index 4bbf0eba1920..2040c974689a 100644
--- a/arch/arm/mach-davinci/cp_intc.c
+++ b/arch/arm/mach-davinci/cp_intc.c
@@ -1,13 +1,11 @@
-/*
- * TI Common Platform Interrupt Controller (cp_intc) driver
- *
- * Author: Steve Chen <[email protected]>
- * Copyright (C) 2008-2009, MontaVista Software, Inc. <[email protected]>
- *
- * This file is licensed under the terms of the GNU General Public License
- * version 2. This program is licensed "as is" without any warranty of any
- * kind, whether express or implied.
- */
+// SPDX-License-Identifier: GPL-2.0-only
+//
+// Author: Steve Chen <[email protected]>
+// Copyright (C) 2008-2009, MontaVista Software, Inc. <[email protected]>
+// Author: Bartosz Golaszewski <[email protected]>
+// Copyright (C) 2019, Texas Instruments
+//
+// TI Common Platform Interrupt Controller (cp_intc) driver
#include <linux/export.h>
#include <linux/init.h>
--
2.20.1
From: Bartosz Golaszewski <[email protected]>
We don't need comments explaining what functions with obvious names do.
Signed-off-by: Bartosz Golaszewski <[email protected]>
Reviewed-by: David Lechner <[email protected]>
---
arch/arm/mach-davinci/cp_intc.c | 3 ---
1 file changed, 3 deletions(-)
diff --git a/arch/arm/mach-davinci/cp_intc.c b/arch/arm/mach-davinci/cp_intc.c
index 2040c974689a..e32fa3b1889d 100644
--- a/arch/arm/mach-davinci/cp_intc.c
+++ b/arch/arm/mach-davinci/cp_intc.c
@@ -57,7 +57,6 @@ static void davinci_cp_intc_ack_irq(struct irq_data *d)
davinci_cp_intc_write(d->hwirq, DAVINCI_CP_INTC_SYS_STAT_IDX_CLR);
}
-/* Disable interrupt */
static void davinci_cp_intc_mask_irq(struct irq_data *d)
{
/* XXX don't know why we need to disable nIRQ here... */
@@ -66,7 +65,6 @@ static void davinci_cp_intc_mask_irq(struct irq_data *d)
davinci_cp_intc_write(1, DAVINCI_CP_INTC_HOST_ENABLE_IDX_SET);
}
-/* Enable interrupt */
static void davinci_cp_intc_unmask_irq(struct irq_data *d)
{
davinci_cp_intc_write(d->hwirq, DAVINCI_CP_INTC_SYS_ENABLE_IDX_SET);
@@ -201,7 +199,6 @@ davinci_cp_intc_do_init(const struct davinci_cp_intc_config *config,
if (WARN_ON(irq_base < 0))
return irq_base;
- /* create a legacy host */
davinci_cp_intc_irq_domain = irq_domain_add_legacy(
node, config->num_irqs, irq_base, 0,
&davinci_cp_intc_irq_domain_ops, NULL);
--
2.20.1
From: Bartosz Golaszewski <[email protected]>
The fields related to the two davinci interrupt controllers are no
longer used. Remove them.
Signed-off-by: Bartosz Golaszewski <[email protected]>
---
arch/arm/mach-davinci/da830.c | 98 ------------------
arch/arm/mach-davinci/da850.c | 108 --------------------
arch/arm/mach-davinci/dm355.c | 3 -
arch/arm/mach-davinci/dm365.c | 3 -
arch/arm/mach-davinci/dm644x.c | 3 -
arch/arm/mach-davinci/dm646x.c | 3 -
arch/arm/mach-davinci/include/mach/common.h | 3 -
7 files changed, 221 deletions(-)
diff --git a/arch/arm/mach-davinci/da830.c b/arch/arm/mach-davinci/da830.c
index 7ce0b5f1200d..63511f638ce4 100644
--- a/arch/arm/mach-davinci/da830.c
+++ b/arch/arm/mach-davinci/da830.c
@@ -624,101 +624,6 @@ const short da830_eqep1_pins[] __initconst = {
-1
};
-/* FIQ are pri 0-1; otherwise 2-7, with 7 lowest priority */
-static u8 da830_default_priorities[DA830_N_CP_INTC_IRQ] = {
- [IRQ_DA8XX_COMMTX] = 7,
- [IRQ_DA8XX_COMMRX] = 7,
- [IRQ_DA8XX_NINT] = 7,
- [IRQ_DA8XX_EVTOUT0] = 7,
- [IRQ_DA8XX_EVTOUT1] = 7,
- [IRQ_DA8XX_EVTOUT2] = 7,
- [IRQ_DA8XX_EVTOUT3] = 7,
- [IRQ_DA8XX_EVTOUT4] = 7,
- [IRQ_DA8XX_EVTOUT5] = 7,
- [IRQ_DA8XX_EVTOUT6] = 7,
- [IRQ_DA8XX_EVTOUT7] = 7,
- [IRQ_DA8XX_CCINT0] = 7,
- [IRQ_DA8XX_CCERRINT] = 7,
- [IRQ_DA8XX_TCERRINT0] = 7,
- [IRQ_DA8XX_AEMIFINT] = 7,
- [IRQ_DA8XX_I2CINT0] = 7,
- [IRQ_DA8XX_MMCSDINT0] = 7,
- [IRQ_DA8XX_MMCSDINT1] = 7,
- [IRQ_DA8XX_ALLINT0] = 7,
- [IRQ_DA8XX_RTC] = 7,
- [IRQ_DA8XX_SPINT0] = 7,
- [IRQ_DA8XX_TINT12_0] = 7,
- [IRQ_DA8XX_TINT34_0] = 7,
- [IRQ_DA8XX_TINT12_1] = 7,
- [IRQ_DA8XX_TINT34_1] = 7,
- [IRQ_DA8XX_UARTINT0] = 7,
- [IRQ_DA8XX_KEYMGRINT] = 7,
- [IRQ_DA830_MPUERR] = 7,
- [IRQ_DA8XX_CHIPINT0] = 7,
- [IRQ_DA8XX_CHIPINT1] = 7,
- [IRQ_DA8XX_CHIPINT2] = 7,
- [IRQ_DA8XX_CHIPINT3] = 7,
- [IRQ_DA8XX_TCERRINT1] = 7,
- [IRQ_DA8XX_C0_RX_THRESH_PULSE] = 7,
- [IRQ_DA8XX_C0_RX_PULSE] = 7,
- [IRQ_DA8XX_C0_TX_PULSE] = 7,
- [IRQ_DA8XX_C0_MISC_PULSE] = 7,
- [IRQ_DA8XX_C1_RX_THRESH_PULSE] = 7,
- [IRQ_DA8XX_C1_RX_PULSE] = 7,
- [IRQ_DA8XX_C1_TX_PULSE] = 7,
- [IRQ_DA8XX_C1_MISC_PULSE] = 7,
- [IRQ_DA8XX_MEMERR] = 7,
- [IRQ_DA8XX_GPIO0] = 7,
- [IRQ_DA8XX_GPIO1] = 7,
- [IRQ_DA8XX_GPIO2] = 7,
- [IRQ_DA8XX_GPIO3] = 7,
- [IRQ_DA8XX_GPIO4] = 7,
- [IRQ_DA8XX_GPIO5] = 7,
- [IRQ_DA8XX_GPIO6] = 7,
- [IRQ_DA8XX_GPIO7] = 7,
- [IRQ_DA8XX_GPIO8] = 7,
- [IRQ_DA8XX_I2CINT1] = 7,
- [IRQ_DA8XX_LCDINT] = 7,
- [IRQ_DA8XX_UARTINT1] = 7,
- [IRQ_DA8XX_MCASPINT] = 7,
- [IRQ_DA8XX_ALLINT1] = 7,
- [IRQ_DA8XX_SPINT1] = 7,
- [IRQ_DA8XX_UHPI_INT1] = 7,
- [IRQ_DA8XX_USB_INT] = 7,
- [IRQ_DA8XX_IRQN] = 7,
- [IRQ_DA8XX_RWAKEUP] = 7,
- [IRQ_DA8XX_UARTINT2] = 7,
- [IRQ_DA8XX_DFTSSINT] = 7,
- [IRQ_DA8XX_EHRPWM0] = 7,
- [IRQ_DA8XX_EHRPWM0TZ] = 7,
- [IRQ_DA8XX_EHRPWM1] = 7,
- [IRQ_DA8XX_EHRPWM1TZ] = 7,
- [IRQ_DA830_EHRPWM2] = 7,
- [IRQ_DA830_EHRPWM2TZ] = 7,
- [IRQ_DA8XX_ECAP0] = 7,
- [IRQ_DA8XX_ECAP1] = 7,
- [IRQ_DA8XX_ECAP2] = 7,
- [IRQ_DA830_EQEP0] = 7,
- [IRQ_DA830_EQEP1] = 7,
- [IRQ_DA830_T12CMPINT0_0] = 7,
- [IRQ_DA830_T12CMPINT1_0] = 7,
- [IRQ_DA830_T12CMPINT2_0] = 7,
- [IRQ_DA830_T12CMPINT3_0] = 7,
- [IRQ_DA830_T12CMPINT4_0] = 7,
- [IRQ_DA830_T12CMPINT5_0] = 7,
- [IRQ_DA830_T12CMPINT6_0] = 7,
- [IRQ_DA830_T12CMPINT7_0] = 7,
- [IRQ_DA830_T12CMPINT0_1] = 7,
- [IRQ_DA830_T12CMPINT1_1] = 7,
- [IRQ_DA830_T12CMPINT2_1] = 7,
- [IRQ_DA830_T12CMPINT3_1] = 7,
- [IRQ_DA830_T12CMPINT4_1] = 7,
- [IRQ_DA830_T12CMPINT5_1] = 7,
- [IRQ_DA830_T12CMPINT6_1] = 7,
- [IRQ_DA830_T12CMPINT7_1] = 7,
- [IRQ_DA8XX_ARMCLKSTOPREQ] = 7,
-};
-
static struct map_desc da830_io_desc[] = {
{
.virtual = IO_VIRT,
@@ -807,9 +712,6 @@ static const struct davinci_soc_info davinci_soc_info_da830 = {
.pinmux_base = DA8XX_SYSCFG0_BASE + 0x120,
.pinmux_pins = da830_pins,
.pinmux_pins_num = ARRAY_SIZE(da830_pins),
- .intc_base = DA8XX_CP_INTC_BASE,
- .intc_irq_prios = da830_default_priorities,
- .intc_irq_num = DA830_N_CP_INTC_IRQ,
.timer_info = &da830_timer_info,
.emac_pdata = &da8xx_emac_pdata,
};
diff --git a/arch/arm/mach-davinci/da850.c b/arch/arm/mach-davinci/da850.c
index 62a00fa94696..8a50956a9181 100644
--- a/arch/arm/mach-davinci/da850.c
+++ b/arch/arm/mach-davinci/da850.c
@@ -299,111 +299,6 @@ const short da850_vpif_display_pins[] __initconst = {
-1
};
-/* FIQ are pri 0-1; otherwise 2-7, with 7 lowest priority */
-static u8 da850_default_priorities[DA850_N_CP_INTC_IRQ] = {
- [IRQ_DA8XX_COMMTX] = 7,
- [IRQ_DA8XX_COMMRX] = 7,
- [IRQ_DA8XX_NINT] = 7,
- [IRQ_DA8XX_EVTOUT0] = 7,
- [IRQ_DA8XX_EVTOUT1] = 7,
- [IRQ_DA8XX_EVTOUT2] = 7,
- [IRQ_DA8XX_EVTOUT3] = 7,
- [IRQ_DA8XX_EVTOUT4] = 7,
- [IRQ_DA8XX_EVTOUT5] = 7,
- [IRQ_DA8XX_EVTOUT6] = 7,
- [IRQ_DA8XX_EVTOUT7] = 7,
- [IRQ_DA8XX_CCINT0] = 7,
- [IRQ_DA8XX_CCERRINT] = 7,
- [IRQ_DA8XX_TCERRINT0] = 7,
- [IRQ_DA8XX_AEMIFINT] = 7,
- [IRQ_DA8XX_I2CINT0] = 7,
- [IRQ_DA8XX_MMCSDINT0] = 7,
- [IRQ_DA8XX_MMCSDINT1] = 7,
- [IRQ_DA8XX_ALLINT0] = 7,
- [IRQ_DA8XX_RTC] = 7,
- [IRQ_DA8XX_SPINT0] = 7,
- [IRQ_DA8XX_TINT12_0] = 7,
- [IRQ_DA8XX_TINT34_0] = 7,
- [IRQ_DA8XX_TINT12_1] = 7,
- [IRQ_DA8XX_TINT34_1] = 7,
- [IRQ_DA8XX_UARTINT0] = 7,
- [IRQ_DA8XX_KEYMGRINT] = 7,
- [IRQ_DA850_MPUADDRERR0] = 7,
- [IRQ_DA8XX_CHIPINT0] = 7,
- [IRQ_DA8XX_CHIPINT1] = 7,
- [IRQ_DA8XX_CHIPINT2] = 7,
- [IRQ_DA8XX_CHIPINT3] = 7,
- [IRQ_DA8XX_TCERRINT1] = 7,
- [IRQ_DA8XX_C0_RX_THRESH_PULSE] = 7,
- [IRQ_DA8XX_C0_RX_PULSE] = 7,
- [IRQ_DA8XX_C0_TX_PULSE] = 7,
- [IRQ_DA8XX_C0_MISC_PULSE] = 7,
- [IRQ_DA8XX_C1_RX_THRESH_PULSE] = 7,
- [IRQ_DA8XX_C1_RX_PULSE] = 7,
- [IRQ_DA8XX_C1_TX_PULSE] = 7,
- [IRQ_DA8XX_C1_MISC_PULSE] = 7,
- [IRQ_DA8XX_MEMERR] = 7,
- [IRQ_DA8XX_GPIO0] = 7,
- [IRQ_DA8XX_GPIO1] = 7,
- [IRQ_DA8XX_GPIO2] = 7,
- [IRQ_DA8XX_GPIO3] = 7,
- [IRQ_DA8XX_GPIO4] = 7,
- [IRQ_DA8XX_GPIO5] = 7,
- [IRQ_DA8XX_GPIO6] = 7,
- [IRQ_DA8XX_GPIO7] = 7,
- [IRQ_DA8XX_GPIO8] = 7,
- [IRQ_DA8XX_I2CINT1] = 7,
- [IRQ_DA8XX_LCDINT] = 7,
- [IRQ_DA8XX_UARTINT1] = 7,
- [IRQ_DA8XX_MCASPINT] = 7,
- [IRQ_DA8XX_ALLINT1] = 7,
- [IRQ_DA8XX_SPINT1] = 7,
- [IRQ_DA8XX_UHPI_INT1] = 7,
- [IRQ_DA8XX_USB_INT] = 7,
- [IRQ_DA8XX_IRQN] = 7,
- [IRQ_DA8XX_RWAKEUP] = 7,
- [IRQ_DA8XX_UARTINT2] = 7,
- [IRQ_DA8XX_DFTSSINT] = 7,
- [IRQ_DA8XX_EHRPWM0] = 7,
- [IRQ_DA8XX_EHRPWM0TZ] = 7,
- [IRQ_DA8XX_EHRPWM1] = 7,
- [IRQ_DA8XX_EHRPWM1TZ] = 7,
- [IRQ_DA850_SATAINT] = 7,
- [IRQ_DA850_TINTALL_2] = 7,
- [IRQ_DA8XX_ECAP0] = 7,
- [IRQ_DA8XX_ECAP1] = 7,
- [IRQ_DA8XX_ECAP2] = 7,
- [IRQ_DA850_MMCSDINT0_1] = 7,
- [IRQ_DA850_MMCSDINT1_1] = 7,
- [IRQ_DA850_T12CMPINT0_2] = 7,
- [IRQ_DA850_T12CMPINT1_2] = 7,
- [IRQ_DA850_T12CMPINT2_2] = 7,
- [IRQ_DA850_T12CMPINT3_2] = 7,
- [IRQ_DA850_T12CMPINT4_2] = 7,
- [IRQ_DA850_T12CMPINT5_2] = 7,
- [IRQ_DA850_T12CMPINT6_2] = 7,
- [IRQ_DA850_T12CMPINT7_2] = 7,
- [IRQ_DA850_T12CMPINT0_3] = 7,
- [IRQ_DA850_T12CMPINT1_3] = 7,
- [IRQ_DA850_T12CMPINT2_3] = 7,
- [IRQ_DA850_T12CMPINT3_3] = 7,
- [IRQ_DA850_T12CMPINT4_3] = 7,
- [IRQ_DA850_T12CMPINT5_3] = 7,
- [IRQ_DA850_T12CMPINT6_3] = 7,
- [IRQ_DA850_T12CMPINT7_3] = 7,
- [IRQ_DA850_RPIINT] = 7,
- [IRQ_DA850_VPIFINT] = 7,
- [IRQ_DA850_CCINT1] = 7,
- [IRQ_DA850_CCERRINT1] = 7,
- [IRQ_DA850_TCERRINT2] = 7,
- [IRQ_DA850_TINTALL_3] = 7,
- [IRQ_DA850_MCBSP0RINT] = 7,
- [IRQ_DA850_MCBSP0XINT] = 7,
- [IRQ_DA850_MCBSP1RINT] = 7,
- [IRQ_DA850_MCBSP1XINT] = 7,
- [IRQ_DA8XX_ARMCLKSTOPREQ] = 7,
-};
-
static struct map_desc da850_io_desc[] = {
{
.virtual = IO_VIRT,
@@ -739,9 +634,6 @@ static const struct davinci_soc_info davinci_soc_info_da850 = {
.pinmux_base = DA8XX_SYSCFG0_BASE + 0x120,
.pinmux_pins = da850_pins,
.pinmux_pins_num = ARRAY_SIZE(da850_pins),
- .intc_base = DA8XX_CP_INTC_BASE,
- .intc_irq_prios = da850_default_priorities,
- .intc_irq_num = DA850_N_CP_INTC_IRQ,
.timer_info = &da850_timer_info,
.emac_pdata = &da8xx_emac_pdata,
.sram_dma = DA8XX_SHARED_RAM_BASE,
diff --git a/arch/arm/mach-davinci/dm355.c b/arch/arm/mach-davinci/dm355.c
index a732f2ea1d9a..2352bcd359b4 100644
--- a/arch/arm/mach-davinci/dm355.c
+++ b/arch/arm/mach-davinci/dm355.c
@@ -706,9 +706,6 @@ static const struct davinci_soc_info davinci_soc_info_dm355 = {
.pinmux_base = DAVINCI_SYSTEM_MODULE_BASE,
.pinmux_pins = dm355_pins,
.pinmux_pins_num = ARRAY_SIZE(dm355_pins),
- .intc_base = DAVINCI_ARM_INTC_BASE,
- .intc_irq_prios = dm355_default_priorities,
- .intc_irq_num = DAVINCI_N_AINTC_IRQ,
.timer_info = &dm355_timer_info,
.sram_dma = 0x00010000,
.sram_len = SZ_32K,
diff --git a/arch/arm/mach-davinci/dm365.c b/arch/arm/mach-davinci/dm365.c
index 79afde34cfbb..b86cab92a8de 100644
--- a/arch/arm/mach-davinci/dm365.c
+++ b/arch/arm/mach-davinci/dm365.c
@@ -723,9 +723,6 @@ static const struct davinci_soc_info davinci_soc_info_dm365 = {
.pinmux_base = DAVINCI_SYSTEM_MODULE_BASE,
.pinmux_pins = dm365_pins,
.pinmux_pins_num = ARRAY_SIZE(dm365_pins),
- .intc_base = DAVINCI_ARM_INTC_BASE,
- .intc_irq_prios = dm365_default_priorities,
- .intc_irq_num = DAVINCI_N_AINTC_IRQ,
.timer_info = &dm365_timer_info,
.emac_pdata = &dm365_emac_pdata,
.sram_dma = 0x00010000,
diff --git a/arch/arm/mach-davinci/dm644x.c b/arch/arm/mach-davinci/dm644x.c
index 007d979d2d64..51b67bca634e 100644
--- a/arch/arm/mach-davinci/dm644x.c
+++ b/arch/arm/mach-davinci/dm644x.c
@@ -647,9 +647,6 @@ static const struct davinci_soc_info davinci_soc_info_dm644x = {
.pinmux_base = DAVINCI_SYSTEM_MODULE_BASE,
.pinmux_pins = dm644x_pins,
.pinmux_pins_num = ARRAY_SIZE(dm644x_pins),
- .intc_base = DAVINCI_ARM_INTC_BASE,
- .intc_irq_prios = dm644x_default_priorities,
- .intc_irq_num = DAVINCI_N_AINTC_IRQ,
.timer_info = &dm644x_timer_info,
.emac_pdata = &dm644x_emac_pdata,
.sram_dma = 0x00008000,
diff --git a/arch/arm/mach-davinci/dm646x.c b/arch/arm/mach-davinci/dm646x.c
index a643d78ad644..9638b327f638 100644
--- a/arch/arm/mach-davinci/dm646x.c
+++ b/arch/arm/mach-davinci/dm646x.c
@@ -587,9 +587,6 @@ static const struct davinci_soc_info davinci_soc_info_dm646x = {
.pinmux_base = DAVINCI_SYSTEM_MODULE_BASE,
.pinmux_pins = dm646x_pins,
.pinmux_pins_num = ARRAY_SIZE(dm646x_pins),
- .intc_base = DAVINCI_ARM_INTC_BASE,
- .intc_irq_prios = dm646x_default_priorities,
- .intc_irq_num = DAVINCI_N_AINTC_IRQ,
.timer_info = &dm646x_timer_info,
.emac_pdata = &dm646x_emac_pdata,
.sram_dma = 0x10010000,
diff --git a/arch/arm/mach-davinci/include/mach/common.h b/arch/arm/mach-davinci/include/mach/common.h
index 14e0e1c40611..9526e5da0d33 100644
--- a/arch/arm/mach-davinci/include/mach/common.h
+++ b/arch/arm/mach-davinci/include/mach/common.h
@@ -58,9 +58,6 @@ struct davinci_soc_info {
u32 pinmux_base;
const struct mux_config *pinmux_pins;
unsigned long pinmux_pins_num;
- u32 intc_base;
- u8 *intc_irq_prios;
- unsigned long intc_irq_num;
struct davinci_timer_info *timer_info;
int gpio_type;
u32 gpio_base;
--
2.20.1
From: Bartosz Golaszewski <[email protected]>
Raplace all calls to __raw_readl() & __raw_writel() with readl_relaxed()
and writel_relaxed() respectively. It's safe to do as there's no
endianness conversion being done in the code.
Signed-off-by: Bartosz Golaszewski <[email protected]>
---
arch/arm/mach-davinci/cp_intc.c | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/arch/arm/mach-davinci/cp_intc.c b/arch/arm/mach-davinci/cp_intc.c
index c1efb9390655..4bbf0eba1920 100644
--- a/arch/arm/mach-davinci/cp_intc.c
+++ b/arch/arm/mach-davinci/cp_intc.c
@@ -45,13 +45,13 @@ static struct irq_domain *davinci_cp_intc_irq_domain;
static inline unsigned int davinci_cp_intc_read(unsigned int offset)
{
- return __raw_readl(davinci_cp_intc_base + offset);
+ return readl_relaxed(davinci_cp_intc_base + offset);
}
static inline void davinci_cp_intc_write(unsigned long value,
unsigned int offset)
{
- __raw_writel(value, davinci_cp_intc_base + offset);
+ writel_relaxed(value, davinci_cp_intc_base + offset);
}
static void davinci_cp_intc_ack_irq(struct irq_data *d)
--
2.20.1
From: Bartosz Golaszewski <[email protected]>
Modify the cp-intc driver to take all its configuration from the new
config structure. Stop referencing davinci_soc_info in any way.
Move the declaration for davinci_cp_intc_init() to
irq-davinci-cp-intc.h and make it take the new config structure as
parameter. Convert all users to the new version.
Also: since the two da8xx SoCs default all irq priorities to 7, just
drop the priority configuration at all and hardcode the channels to 7.
It will simplify the driver code and make our lives easier when it
comes to device-tree support.
Signed-off-by: Bartosz Golaszewski <[email protected]>
---
arch/arm/mach-davinci/cp_intc.c | 93 +++++++++------------
arch/arm/mach-davinci/da830.c | 2 +-
arch/arm/mach-davinci/da850.c | 2 +-
arch/arm/mach-davinci/include/mach/common.h | 1 -
include/linux/irqchip/irq-davinci-cp-intc.h | 2 +
5 files changed, 44 insertions(+), 56 deletions(-)
diff --git a/arch/arm/mach-davinci/cp_intc.c b/arch/arm/mach-davinci/cp_intc.c
index dcd43b067a6a..faf3d74d3719 100644
--- a/arch/arm/mach-davinci/cp_intc.c
+++ b/arch/arm/mach-davinci/cp_intc.c
@@ -13,6 +13,7 @@
#include <linux/init.h>
#include <linux/irq.h>
#include <linux/irqchip.h>
+#include <linux/irqchip/irq-davinci-cp-intc.h>
#include <linux/irqdomain.h>
#include <linux/io.h>
#include <linux/of.h>
@@ -20,7 +21,6 @@
#include <linux/of_irq.h>
#include <asm/exception.h>
-#include <mach/common.h>
#define DAVINCI_CP_INTC_CTRL 0x04
#define DAVINCI_CP_INTC_HOST_CTRL 0x0c
@@ -158,22 +158,15 @@ static const struct irq_domain_ops davinci_cp_intc_irq_domain_ops = {
.xlate = irq_domain_xlate_onetwocell,
};
-static int __init davinci_cp_intc_of_init(struct device_node *node,
- struct device_node *parent)
+static int __init
+davinci_cp_intc_do_init(const struct davinci_cp_intc_config *config,
+ struct device_node *node)
{
- u32 num_irq = davinci_soc_info.intc_irq_num;
- u8 *irq_prio = davinci_soc_info.intc_irq_prios;
- unsigned num_reg = BITS_TO_LONGS(num_irq);
- int i, irq_base;
-
- if (node) {
- davinci_cp_intc_base = of_iomap(node, 0);
- if (of_property_read_u32(node, "ti,intc-size", &num_irq))
- pr_warn("unable to get intc-size, default to %d\n",
- num_irq);
- } else {
- davinci_cp_intc_base = ioremap(davinci_soc_info.intc_base, SZ_8K);
- }
+ unsigned int num_regs = BITS_TO_LONGS(config->num_irqs);
+ int offset, irq_base;
+
+ davinci_cp_intc_base = ioremap(config->reg.start,
+ resource_size(&config->reg));
if (WARN_ON(!davinci_cp_intc_base))
return -EINVAL;
@@ -183,51 +176,29 @@ static int __init davinci_cp_intc_of_init(struct device_node *node,
davinci_cp_intc_write(0, DAVINCI_CP_INTC_HOST_ENABLE(0));
/* Disable system interrupts */
- for (i = 0; i < num_reg; i++)
- davinci_cp_intc_write(~0, DAVINCI_CP_INTC_SYS_ENABLE_CLR(i));
+ for (offset = 0; offset < num_regs; offset++)
+ davinci_cp_intc_write(~0,
+ DAVINCI_CP_INTC_SYS_ENABLE_CLR(offset));
/* Set to normal mode, no nesting, no priority hold */
davinci_cp_intc_write(0, DAVINCI_CP_INTC_CTRL);
davinci_cp_intc_write(0, DAVINCI_CP_INTC_HOST_CTRL);
/* Clear system interrupt status */
- for (i = 0; i < num_reg; i++)
- davinci_cp_intc_write(~0, DAVINCI_CP_INTC_SYS_STAT_CLR(i));
+ for (offset = 0; offset < num_regs; offset++)
+ davinci_cp_intc_write(~0,
+ DAVINCI_CP_INTC_SYS_STAT_CLR(offset));
/* Enable nIRQ (what about nFIQ?) */
davinci_cp_intc_write(1, DAVINCI_CP_INTC_HOST_ENABLE_IDX_SET);
- /*
- * Priority is determined by host channel: lower channel number has
- * higher priority i.e. channel 0 has highest priority and channel 31
- * had the lowest priority.
- */
- num_reg = (num_irq + 3) >> 2; /* 4 channels per register */
- if (irq_prio) {
- unsigned j, k;
- u32 val;
-
- for (k = i = 0; i < num_reg; i++) {
- for (val = j = 0; j < 4; j++, k++) {
- val >>= 8;
- if (k < num_irq)
- val |= irq_prio[k] << 24;
- }
-
- davinci_cp_intc_write(val, DAVINCI_CP_INTC_CHAN_MAP(i));
- }
- } else {
- /*
- * Default everything to channel 15 if priority not specified.
- * Note that channel 0-1 are mapped to nFIQ and channels 2-31
- * are mapped to nIRQ.
- */
- for (i = 0; i < num_reg; i++)
- davinci_cp_intc_write(0x0f0f0f0f,
- DAVINCI_CP_INTC_CHAN_MAP(i));
- }
+ /* Default all priorities to channel 7. */
+ num_regs = (config->num_irqs + 3) >> 2; /* 4 channels per register */
+ for (offset = 0; offset < num_regs; offset++)
+ davinci_cp_intc_write(0x07070707,
+ DAVINCI_CP_INTC_CHAN_MAP(offset));
- irq_base = irq_alloc_descs(-1, 0, num_irq, 0);
+ irq_base = irq_alloc_descs(-1, 0, config->num_irqs, 0);
if (irq_base < 0) {
pr_warn("Couldn't allocate IRQ numbers\n");
irq_base = 0;
@@ -235,7 +206,7 @@ static int __init davinci_cp_intc_of_init(struct device_node *node,
/* create a legacy host */
davinci_cp_intc_irq_domain = irq_domain_add_legacy(
- node, num_irq, irq_base, 0,
+ node, config->num_irqs, irq_base, 0,
&davinci_cp_intc_irq_domain_ops, NULL);
if (!davinci_cp_intc_irq_domain) {
@@ -251,9 +222,25 @@ static int __init davinci_cp_intc_of_init(struct device_node *node,
return 0;
}
-void __init davinci_cp_intc_init(void)
+int __init davinci_cp_intc_init(const struct davinci_cp_intc_config *config)
{
- davinci_cp_intc_of_init(NULL, NULL);
+ return davinci_cp_intc_do_init(config, NULL);
}
+static int __init davinci_cp_intc_of_init(struct device_node *node,
+ struct device_node *parent)
+{
+ struct davinci_cp_intc_config config = { };
+ int ret;
+
+ ret = of_address_to_resource(node, 0, &config.reg);
+ if (WARN_ON(ret))
+ return ret;
+
+ ret = of_property_read_u32(node, "ti,intc-size", &config.num_irqs);
+ if (WARN_ON(ret))
+ return ret;
+
+ return davinci_cp_intc_do_init(&config, node);
+}
IRQCHIP_DECLARE(cp_intc, "ti,cp-intc", davinci_cp_intc_of_init);
diff --git a/arch/arm/mach-davinci/da830.c b/arch/arm/mach-davinci/da830.c
index 0eb48ed2d423..7ce0b5f1200d 100644
--- a/arch/arm/mach-davinci/da830.c
+++ b/arch/arm/mach-davinci/da830.c
@@ -833,7 +833,7 @@ static const struct davinci_cp_intc_config da830_cp_intc_config = {
void __init da830_init_irq(void)
{
- davinci_cp_intc_init();
+ davinci_cp_intc_init(&da830_cp_intc_config);
}
void __init da830_init_time(void)
diff --git a/arch/arm/mach-davinci/da850.c b/arch/arm/mach-davinci/da850.c
index fe274ab63fc8..62a00fa94696 100644
--- a/arch/arm/mach-davinci/da850.c
+++ b/arch/arm/mach-davinci/da850.c
@@ -771,7 +771,7 @@ static const struct davinci_cp_intc_config da850_cp_intc_config = {
void __init da850_init_irq(void)
{
- davinci_cp_intc_init();
+ davinci_cp_intc_init(&da850_cp_intc_config);
}
void __init da850_init_time(void)
diff --git a/arch/arm/mach-davinci/include/mach/common.h b/arch/arm/mach-davinci/include/mach/common.h
index 7ad79171b4b5..14e0e1c40611 100644
--- a/arch/arm/mach-davinci/include/mach/common.h
+++ b/arch/arm/mach-davinci/include/mach/common.h
@@ -22,7 +22,6 @@
#define DAVINCI_INTC_START NR_IRQS
#define DAVINCI_INTC_IRQ(_irqnum) (DAVINCI_INTC_START + (_irqnum))
-void davinci_cp_intc_init(void);
void davinci_timer_init(struct clk *clk);
struct davinci_timer_instance {
diff --git a/include/linux/irqchip/irq-davinci-cp-intc.h b/include/linux/irqchip/irq-davinci-cp-intc.h
index 2270a6167b98..8d71ed5b5a61 100644
--- a/include/linux/irqchip/irq-davinci-cp-intc.h
+++ b/include/linux/irqchip/irq-davinci-cp-intc.h
@@ -20,4 +20,6 @@ struct davinci_cp_intc_config {
unsigned int num_irqs;
};
+int davinci_cp_intc_init(const struct davinci_cp_intc_config *config);
+
#endif /* _LINUX_IRQ_DAVINCI_CP_INTC_ */
--
2.20.1
From: Bartosz Golaszewski <[email protected]>
In preparation for moving the driver to drivers/irqchip do some
cleanup: use a common prefix for all symbols.
Signed-off-by: Bartosz Golaszewski <[email protected]>
Reviewed-by: David Lechner <[email protected]>
---
arch/arm/mach-davinci/cp_intc.c | 144 ++++++++++----------
arch/arm/mach-davinci/da830.c | 2 +-
arch/arm/mach-davinci/da850.c | 2 +-
arch/arm/mach-davinci/include/mach/common.h | 2 +-
4 files changed, 77 insertions(+), 73 deletions(-)
diff --git a/arch/arm/mach-davinci/cp_intc.c b/arch/arm/mach-davinci/cp_intc.c
index 82110d332c82..bf77b6950273 100644
--- a/arch/arm/mach-davinci/cp_intc.c
+++ b/arch/arm/mach-davinci/cp_intc.c
@@ -22,63 +22,67 @@
#include <asm/exception.h>
#include <mach/common.h>
-#define CP_INTC_CTRL 0x04
-#define CP_INTC_HOST_CTRL 0x0C
-#define CP_INTC_GLOBAL_ENABLE 0x10
-#define CP_INTC_SYS_STAT_IDX_CLR 0x24
-#define CP_INTC_SYS_ENABLE_IDX_SET 0x28
-#define CP_INTC_SYS_ENABLE_IDX_CLR 0x2C
-#define CP_INTC_HOST_ENABLE_IDX_SET 0x34
-#define CP_INTC_HOST_ENABLE_IDX_CLR 0x38
-#define CP_INTC_PRIO_IDX 0x80
-#define CP_INTC_SYS_STAT_CLR(n) (0x0280 + (n << 2))
-#define CP_INTC_SYS_ENABLE_CLR(n) (0x0380 + (n << 2))
-#define CP_INTC_CHAN_MAP(n) (0x0400 + (n << 2))
-#define CP_INTC_SYS_POLARITY(n) (0x0D00 + (n << 2))
-#define CP_INTC_SYS_TYPE(n) (0x0D80 + (n << 2))
-#define CP_INTC_HOST_ENABLE(n) (0x1500 + (n << 2))
-
+#define DAVINCI_CP_INTC_CTRL 0x04
+#define DAVINCI_CP_INTC_HOST_CTRL 0x0C
+#define DAVINCI_CP_INTC_GLOBAL_ENABLE 0x10
+#define DAVINCI_CP_INTC_SYS_STAT_IDX_CLR 0x24
+#define DAVINCI_CP_INTC_SYS_ENABLE_IDX_SET 0x28
+#define DAVINCI_CP_INTC_SYS_ENABLE_IDX_CLR 0x2C
+#define DAVINCI_CP_INTC_HOST_ENABLE_IDX_SET 0x34
+#define DAVINCI_CP_INTC_HOST_ENABLE_IDX_CLR 0x38
+#define DAVINCI_CP_INTC_PRIO_IDX 0x80
+#define DAVINCI_CP_INTC_SYS_STAT_CLR(n) (0x0280 + (n << 2))
+#define DAVINCI_CP_INTC_SYS_ENABLE_CLR(n) (0x0380 + (n << 2))
+#define DAVINCI_CP_INTC_CHAN_MAP(n) (0x0400 + (n << 2))
+#define DAVINCI_CP_INTC_SYS_POLARITY(n) (0x0D00 + (n << 2))
+#define DAVINCI_CP_INTC_SYS_TYPE(n) (0x0D80 + (n << 2))
+#define DAVINCI_CP_INTC_HOST_ENABLE(n) (0x1500 + (n << 2))
#define DAVINCI_CP_INTC_PRI_INDX_MASK GENMASK(9, 0)
#define DAVINCI_CP_INTC_GPIR_NONE BIT(31)
-static void __iomem *davinci_intc_base;
+static void __iomem *davinci_cp_intc_base;
+static struct irq_domain *davinci_cp_intc_irq_domain;
-static inline unsigned int cp_intc_read(unsigned offset)
+static inline unsigned int davinci_cp_intc_read(unsigned int offset)
{
- return __raw_readl(davinci_intc_base + offset);
+ return __raw_readl(davinci_cp_intc_base + offset);
}
-static inline void cp_intc_write(unsigned long value, unsigned offset)
+static inline void davinci_cp_intc_write(unsigned long value,
+ unsigned int offset)
{
- __raw_writel(value, davinci_intc_base + offset);
+ __raw_writel(value, davinci_cp_intc_base + offset);
}
-static void cp_intc_ack_irq(struct irq_data *d)
+static void davinci_cp_intc_ack_irq(struct irq_data *d)
{
- cp_intc_write(d->hwirq, CP_INTC_SYS_STAT_IDX_CLR);
+ davinci_cp_intc_write(d->hwirq, DAVINCI_CP_INTC_SYS_STAT_IDX_CLR);
}
/* Disable interrupt */
-static void cp_intc_mask_irq(struct irq_data *d)
+static void davinci_cp_intc_mask_irq(struct irq_data *d)
{
/* XXX don't know why we need to disable nIRQ here... */
- cp_intc_write(1, CP_INTC_HOST_ENABLE_IDX_CLR);
- cp_intc_write(d->hwirq, CP_INTC_SYS_ENABLE_IDX_CLR);
- cp_intc_write(1, CP_INTC_HOST_ENABLE_IDX_SET);
+ davinci_cp_intc_write(1, DAVINCI_CP_INTC_HOST_ENABLE_IDX_CLR);
+ davinci_cp_intc_write(d->hwirq, DAVINCI_CP_INTC_SYS_ENABLE_IDX_CLR);
+ davinci_cp_intc_write(1, DAVINCI_CP_INTC_HOST_ENABLE_IDX_SET);
}
/* Enable interrupt */
-static void cp_intc_unmask_irq(struct irq_data *d)
+static void davinci_cp_intc_unmask_irq(struct irq_data *d)
{
- cp_intc_write(d->hwirq, CP_INTC_SYS_ENABLE_IDX_SET);
+ davinci_cp_intc_write(d->hwirq, DAVINCI_CP_INTC_SYS_ENABLE_IDX_SET);
}
-static int cp_intc_set_irq_type(struct irq_data *d, unsigned int flow_type)
+static int davinci_cp_intc_set_irq_type(struct irq_data *d,
+ unsigned int flow_type)
{
unsigned reg = BIT_WORD(d->hwirq);
unsigned mask = BIT_MASK(d->hwirq);
- unsigned polarity = cp_intc_read(CP_INTC_SYS_POLARITY(reg));
- unsigned type = cp_intc_read(CP_INTC_SYS_TYPE(reg));
+ unsigned polarity = davinci_cp_intc_read(
+ DAVINCI_CP_INTC_SYS_POLARITY(reg));
+ unsigned type = davinci_cp_intc_read(
+ DAVINCI_CP_INTC_SYS_TYPE(reg));
switch (flow_type) {
case IRQ_TYPE_EDGE_RISING:
@@ -101,25 +105,23 @@ static int cp_intc_set_irq_type(struct irq_data *d, unsigned int flow_type)
return -EINVAL;
}
- cp_intc_write(polarity, CP_INTC_SYS_POLARITY(reg));
- cp_intc_write(type, CP_INTC_SYS_TYPE(reg));
+ davinci_cp_intc_write(polarity, DAVINCI_CP_INTC_SYS_POLARITY(reg));
+ davinci_cp_intc_write(type, DAVINCI_CP_INTC_SYS_TYPE(reg));
return 0;
}
-static struct irq_chip cp_intc_irq_chip = {
+static struct irq_chip davinci_cp_intc_irq_chip = {
.name = "cp_intc",
- .irq_ack = cp_intc_ack_irq,
- .irq_mask = cp_intc_mask_irq,
- .irq_unmask = cp_intc_unmask_irq,
- .irq_set_type = cp_intc_set_irq_type,
+ .irq_ack = davinci_cp_intc_ack_irq,
+ .irq_mask = davinci_cp_intc_mask_irq,
+ .irq_unmask = davinci_cp_intc_unmask_irq,
+ .irq_set_type = davinci_cp_intc_set_irq_type,
.flags = IRQCHIP_SKIP_SET_WAKE,
};
-static struct irq_domain *cp_intc_domain;
-
static asmlinkage void __exception_irq_entry
-cp_intc_handle_irq(struct pt_regs *regs)
+davinci_cp_intc_handle_irq(struct pt_regs *regs)
{
int gpir, irqnr, none;
@@ -128,7 +130,7 @@ cp_intc_handle_irq(struct pt_regs *regs)
* indicates a spurious irq.
*/
- gpir = cp_intc_read(CP_INTC_PRIO_IDX);
+ gpir = davinci_cp_intc_read(DAVINCI_CP_INTC_PRIO_IDX);
irqnr = gpir & DAVINCI_CP_INTC_PRI_INDX_MASK;
none = gpir & DAVINCI_CP_INTC_GPIR_NONE;
@@ -137,27 +139,27 @@ cp_intc_handle_irq(struct pt_regs *regs)
return;
}
- handle_domain_irq(cp_intc_domain, irqnr, regs);
+ handle_domain_irq(davinci_cp_intc_irq_domain, irqnr, regs);
}
-static int cp_intc_host_map(struct irq_domain *h, unsigned int virq,
+static int davinci_cp_intc_host_map(struct irq_domain *h, unsigned int virq,
irq_hw_number_t hw)
{
pr_debug("cp_intc_host_map(%d, 0x%lx)\n", virq, hw);
- irq_set_chip(virq, &cp_intc_irq_chip);
+ irq_set_chip(virq, &davinci_cp_intc_irq_chip);
irq_set_probe(virq);
irq_set_handler(virq, handle_edge_irq);
return 0;
}
-static const struct irq_domain_ops cp_intc_host_ops = {
- .map = cp_intc_host_map,
+static const struct irq_domain_ops davinci_cp_intc_irq_domain_ops = {
+ .map = davinci_cp_intc_host_map,
.xlate = irq_domain_xlate_onetwocell,
};
-static int __init cp_intc_of_init(struct device_node *node,
- struct device_node *parent)
+static int __init davinci_cp_intc_of_init(struct device_node *node,
+ struct device_node *parent)
{
u32 num_irq = davinci_soc_info.intc_irq_num;
u8 *irq_prio = davinci_soc_info.intc_irq_prios;
@@ -165,35 +167,35 @@ static int __init cp_intc_of_init(struct device_node *node,
int i, irq_base;
if (node) {
- davinci_intc_base = of_iomap(node, 0);
+ davinci_cp_intc_base = of_iomap(node, 0);
if (of_property_read_u32(node, "ti,intc-size", &num_irq))
pr_warn("unable to get intc-size, default to %d\n",
num_irq);
} else {
- davinci_intc_base = ioremap(davinci_soc_info.intc_base, SZ_8K);
+ davinci_cp_intc_base = ioremap(davinci_soc_info.intc_base, SZ_8K);
}
- if (WARN_ON(!davinci_intc_base))
+ if (WARN_ON(!davinci_cp_intc_base))
return -EINVAL;
- cp_intc_write(0, CP_INTC_GLOBAL_ENABLE);
+ davinci_cp_intc_write(0, DAVINCI_CP_INTC_GLOBAL_ENABLE);
/* Disable all host interrupts */
- cp_intc_write(0, CP_INTC_HOST_ENABLE(0));
+ davinci_cp_intc_write(0, DAVINCI_CP_INTC_HOST_ENABLE(0));
/* Disable system interrupts */
for (i = 0; i < num_reg; i++)
- cp_intc_write(~0, CP_INTC_SYS_ENABLE_CLR(i));
+ davinci_cp_intc_write(~0, DAVINCI_CP_INTC_SYS_ENABLE_CLR(i));
/* Set to normal mode, no nesting, no priority hold */
- cp_intc_write(0, CP_INTC_CTRL);
- cp_intc_write(0, CP_INTC_HOST_CTRL);
+ davinci_cp_intc_write(0, DAVINCI_CP_INTC_CTRL);
+ davinci_cp_intc_write(0, DAVINCI_CP_INTC_HOST_CTRL);
/* Clear system interrupt status */
for (i = 0; i < num_reg; i++)
- cp_intc_write(~0, CP_INTC_SYS_STAT_CLR(i));
+ davinci_cp_intc_write(~0, DAVINCI_CP_INTC_SYS_STAT_CLR(i));
/* Enable nIRQ (what about nFIQ?) */
- cp_intc_write(1, CP_INTC_HOST_ENABLE_IDX_SET);
+ davinci_cp_intc_write(1, DAVINCI_CP_INTC_HOST_ENABLE_IDX_SET);
/*
* Priority is determined by host channel: lower channel number has
@@ -212,7 +214,7 @@ static int __init cp_intc_of_init(struct device_node *node,
val |= irq_prio[k] << 24;
}
- cp_intc_write(val, CP_INTC_CHAN_MAP(i));
+ davinci_cp_intc_write(val, DAVINCI_CP_INTC_CHAN_MAP(i));
}
} else {
/*
@@ -221,7 +223,8 @@ static int __init cp_intc_of_init(struct device_node *node,
* are mapped to nIRQ.
*/
for (i = 0; i < num_reg; i++)
- cp_intc_write(0x0f0f0f0f, CP_INTC_CHAN_MAP(i));
+ davinci_cp_intc_write(0x0f0f0f0f,
+ DAVINCI_CP_INTC_CHAN_MAP(i));
}
irq_base = irq_alloc_descs(-1, 0, num_irq, 0);
@@ -231,25 +234,26 @@ static int __init cp_intc_of_init(struct device_node *node,
}
/* create a legacy host */
- cp_intc_domain = irq_domain_add_legacy(node, num_irq,
- irq_base, 0, &cp_intc_host_ops, NULL);
+ davinci_cp_intc_irq_domain = irq_domain_add_legacy(
+ node, num_irq, irq_base, 0,
+ &davinci_cp_intc_irq_domain_ops, NULL);
- if (!cp_intc_domain) {
+ if (!davinci_cp_intc_irq_domain) {
pr_err("cp_intc: failed to allocate irq host!\n");
return -EINVAL;
}
- set_handle_irq(cp_intc_handle_irq);
+ set_handle_irq(davinci_cp_intc_handle_irq);
/* Enable global interrupt */
- cp_intc_write(1, CP_INTC_GLOBAL_ENABLE);
+ davinci_cp_intc_write(1, DAVINCI_CP_INTC_GLOBAL_ENABLE);
return 0;
}
-void __init cp_intc_init(void)
+void __init davinci_cp_intc_init(void)
{
- cp_intc_of_init(NULL, NULL);
+ davinci_cp_intc_of_init(NULL, NULL);
}
-IRQCHIP_DECLARE(cp_intc, "ti,cp-intc", cp_intc_of_init);
+IRQCHIP_DECLARE(cp_intc, "ti,cp-intc", davinci_cp_intc_of_init);
diff --git a/arch/arm/mach-davinci/da830.c b/arch/arm/mach-davinci/da830.c
index 38af72be1a85..0eb48ed2d423 100644
--- a/arch/arm/mach-davinci/da830.c
+++ b/arch/arm/mach-davinci/da830.c
@@ -833,7 +833,7 @@ static const struct davinci_cp_intc_config da830_cp_intc_config = {
void __init da830_init_irq(void)
{
- cp_intc_init();
+ davinci_cp_intc_init();
}
void __init da830_init_time(void)
diff --git a/arch/arm/mach-davinci/da850.c b/arch/arm/mach-davinci/da850.c
index 9a3ce68c0de4..fe274ab63fc8 100644
--- a/arch/arm/mach-davinci/da850.c
+++ b/arch/arm/mach-davinci/da850.c
@@ -771,7 +771,7 @@ static const struct davinci_cp_intc_config da850_cp_intc_config = {
void __init da850_init_irq(void)
{
- cp_intc_init();
+ davinci_cp_intc_init();
}
void __init da850_init_time(void)
diff --git a/arch/arm/mach-davinci/include/mach/common.h b/arch/arm/mach-davinci/include/mach/common.h
index 3f3f1169d47e..7ad79171b4b5 100644
--- a/arch/arm/mach-davinci/include/mach/common.h
+++ b/arch/arm/mach-davinci/include/mach/common.h
@@ -22,7 +22,7 @@
#define DAVINCI_INTC_START NR_IRQS
#define DAVINCI_INTC_IRQ(_irqnum) (DAVINCI_INTC_START + (_irqnum))
-void cp_intc_init(void);
+void davinci_cp_intc_init(void);
void davinci_timer_init(struct clk *clk);
struct davinci_timer_instance {
--
2.20.1
From: Bartosz Golaszewski <[email protected]>
Drop tabs from variable initialization. Arrange variables in reverse
christmas-tree order. Add a newline before a return.
Signed-off-by: Bartosz Golaszewski <[email protected]>
---
arch/arm/mach-davinci/cp_intc.c | 13 +++++++------
1 file changed, 7 insertions(+), 6 deletions(-)
diff --git a/arch/arm/mach-davinci/cp_intc.c b/arch/arm/mach-davinci/cp_intc.c
index faf3d74d3719..f3787ae4cdbd 100644
--- a/arch/arm/mach-davinci/cp_intc.c
+++ b/arch/arm/mach-davinci/cp_intc.c
@@ -77,12 +77,12 @@ static void davinci_cp_intc_unmask_irq(struct irq_data *d)
static int davinci_cp_intc_set_irq_type(struct irq_data *d,
unsigned int flow_type)
{
- unsigned reg = BIT_WORD(d->hwirq);
- unsigned mask = BIT_MASK(d->hwirq);
- unsigned polarity = davinci_cp_intc_read(
- DAVINCI_CP_INTC_SYS_POLARITY(reg));
- unsigned type = davinci_cp_intc_read(
- DAVINCI_CP_INTC_SYS_TYPE(reg));
+ unsigned int reg, mask, polarity, type;
+
+ reg = BIT_WORD(d->hwirq);
+ mask = BIT_MASK(d->hwirq);
+ polarity = davinci_cp_intc_read(DAVINCI_CP_INTC_SYS_POLARITY(reg));
+ type = davinci_cp_intc_read(DAVINCI_CP_INTC_SYS_TYPE(reg));
switch (flow_type) {
case IRQ_TYPE_EDGE_RISING:
@@ -150,6 +150,7 @@ static int davinci_cp_intc_host_map(struct irq_domain *h, unsigned int virq,
irq_set_chip(virq, &davinci_cp_intc_irq_chip);
irq_set_probe(virq);
irq_set_handler(virq, handle_edge_irq);
+
return 0;
}
--
2.20.1
From: Bartosz Golaszewski <[email protected]>
Add a config structure that will be used by cp-intc-based platforms.
It contains the register range resource and the number of interrupts.
Signed-off-by: Bartosz Golaszewski <[email protected]>
---
include/linux/irqchip/irq-davinci-cp-intc.h | 23 +++++++++++++++++++++
1 file changed, 23 insertions(+)
create mode 100644 include/linux/irqchip/irq-davinci-cp-intc.h
diff --git a/include/linux/irqchip/irq-davinci-cp-intc.h b/include/linux/irqchip/irq-davinci-cp-intc.h
new file mode 100644
index 000000000000..2270a6167b98
--- /dev/null
+++ b/include/linux/irqchip/irq-davinci-cp-intc.h
@@ -0,0 +1,23 @@
+/* SPDX-License-Identifier: GPL-2.0-or-later */
+/*
+ * Copyright (C) 2019 Texas Instruments
+ */
+
+#ifndef _LINUX_IRQ_DAVINCI_CP_INTC_
+#define _LINUX_IRQ_DAVINCI_CP_INTC_
+
+#include <linux/ioport.h>
+
+/**
+ * struct davinci_cp_intc_config - configuration data for davinci-cp-intc
+ * driver.
+ *
+ * @reg: register range to map
+ * @num_irqs: number of HW interrupts supported by the controller
+ */
+struct davinci_cp_intc_config {
+ struct resource reg;
+ unsigned int num_irqs;
+};
+
+#endif /* _LINUX_IRQ_DAVINCI_CP_INTC_ */
--
2.20.1
From: Bartosz Golaszewski <[email protected]>
Use lowercase letters in hexadecimal numbers in the cp-intc driver as
is done in most of the kernel code base.
Signed-off-by: Bartosz Golaszewski <[email protected]>
Reviewed-by: David Lechner <[email protected]>
---
arch/arm/mach-davinci/cp_intc.c | 8 ++++----
1 file changed, 4 insertions(+), 4 deletions(-)
diff --git a/arch/arm/mach-davinci/cp_intc.c b/arch/arm/mach-davinci/cp_intc.c
index bf77b6950273..dcd43b067a6a 100644
--- a/arch/arm/mach-davinci/cp_intc.c
+++ b/arch/arm/mach-davinci/cp_intc.c
@@ -23,19 +23,19 @@
#include <mach/common.h>
#define DAVINCI_CP_INTC_CTRL 0x04
-#define DAVINCI_CP_INTC_HOST_CTRL 0x0C
+#define DAVINCI_CP_INTC_HOST_CTRL 0x0c
#define DAVINCI_CP_INTC_GLOBAL_ENABLE 0x10
#define DAVINCI_CP_INTC_SYS_STAT_IDX_CLR 0x24
#define DAVINCI_CP_INTC_SYS_ENABLE_IDX_SET 0x28
-#define DAVINCI_CP_INTC_SYS_ENABLE_IDX_CLR 0x2C
+#define DAVINCI_CP_INTC_SYS_ENABLE_IDX_CLR 0x2c
#define DAVINCI_CP_INTC_HOST_ENABLE_IDX_SET 0x34
#define DAVINCI_CP_INTC_HOST_ENABLE_IDX_CLR 0x38
#define DAVINCI_CP_INTC_PRIO_IDX 0x80
#define DAVINCI_CP_INTC_SYS_STAT_CLR(n) (0x0280 + (n << 2))
#define DAVINCI_CP_INTC_SYS_ENABLE_CLR(n) (0x0380 + (n << 2))
#define DAVINCI_CP_INTC_CHAN_MAP(n) (0x0400 + (n << 2))
-#define DAVINCI_CP_INTC_SYS_POLARITY(n) (0x0D00 + (n << 2))
-#define DAVINCI_CP_INTC_SYS_TYPE(n) (0x0D80 + (n << 2))
+#define DAVINCI_CP_INTC_SYS_POLARITY(n) (0x0d00 + (n << 2))
+#define DAVINCI_CP_INTC_SYS_TYPE(n) (0x0d80 + (n << 2))
#define DAVINCI_CP_INTC_HOST_ENABLE(n) (0x1500 + (n << 2))
#define DAVINCI_CP_INTC_PRI_INDX_MASK GENMASK(9, 0)
#define DAVINCI_CP_INTC_GPIR_NONE BIT(31)
--
2.20.1
From: Bartosz Golaszewski <[email protected]>
In preparation for moving the driver to drivers/irqchip do some
cleanup: use a common prefix for all symbols.
Signed-off-by: Bartosz Golaszewski <[email protected]>
Reviewed-by: David Lechner <[email protected]>
---
arch/arm/mach-davinci/dm355.c | 2 +-
arch/arm/mach-davinci/dm365.c | 2 +-
arch/arm/mach-davinci/dm644x.c | 2 +-
arch/arm/mach-davinci/dm646x.c | 2 +-
arch/arm/mach-davinci/include/mach/common.h | 2 +-
arch/arm/mach-davinci/irq.c | 103 ++++++++++----------
6 files changed, 58 insertions(+), 55 deletions(-)
diff --git a/arch/arm/mach-davinci/dm355.c b/arch/arm/mach-davinci/dm355.c
index 6c65699cb074..e2b680e9944b 100644
--- a/arch/arm/mach-davinci/dm355.c
+++ b/arch/arm/mach-davinci/dm355.c
@@ -794,7 +794,7 @@ int __init dm355_init_video(struct vpfe_config *vpfe_cfg,
void __init dm355_init_irq(void)
{
- davinci_irq_init();
+ davinci_aintc_init();
}
static int __init dm355_init_devices(void)
diff --git a/arch/arm/mach-davinci/dm365.c b/arch/arm/mach-davinci/dm365.c
index e1c223c6031f..76507dcbcb3a 100644
--- a/arch/arm/mach-davinci/dm365.c
+++ b/arch/arm/mach-davinci/dm365.c
@@ -1053,7 +1053,7 @@ int __init dm365_init_video(struct vpfe_config *vpfe_cfg,
void __init dm365_init_irq(void)
{
- davinci_irq_init();
+ davinci_aintc_init();
}
static int __init dm365_init_devices(void)
diff --git a/arch/arm/mach-davinci/dm644x.c b/arch/arm/mach-davinci/dm644x.c
index 2b18c134ee15..27c73bc54069 100644
--- a/arch/arm/mach-davinci/dm644x.c
+++ b/arch/arm/mach-davinci/dm644x.c
@@ -730,7 +730,7 @@ int __init dm644x_init_video(struct vpfe_config *vpfe_cfg,
void __init dm644x_init_irq(void)
{
- davinci_irq_init();
+ davinci_aintc_init();
}
void __init dm644x_init_devices(void)
diff --git a/arch/arm/mach-davinci/dm646x.c b/arch/arm/mach-davinci/dm646x.c
index 75a9f80317ca..98fc5e3815b9 100644
--- a/arch/arm/mach-davinci/dm646x.c
+++ b/arch/arm/mach-davinci/dm646x.c
@@ -691,7 +691,7 @@ void __init dm646x_register_clocks(void)
void __init dm646x_init_irq(void)
{
- davinci_irq_init();
+ davinci_aintc_init();
}
static int __init dm646x_init_devices(void)
diff --git a/arch/arm/mach-davinci/include/mach/common.h b/arch/arm/mach-davinci/include/mach/common.h
index 1ceed0345988..8c9c011f96f6 100644
--- a/arch/arm/mach-davinci/include/mach/common.h
+++ b/arch/arm/mach-davinci/include/mach/common.h
@@ -24,7 +24,7 @@
void davinci_timer_init(struct clk *clk);
-extern void davinci_irq_init(void);
+extern void davinci_aintc_init(void);
struct davinci_timer_instance {
u32 base;
diff --git a/arch/arm/mach-davinci/irq.c b/arch/arm/mach-davinci/irq.c
index 1301adc569e2..145fda7e5a35 100644
--- a/arch/arm/mach-davinci/irq.c
+++ b/arch/arm/mach-davinci/irq.c
@@ -19,39 +19,39 @@
#include "irqs.h"
-#define FIQ_REG0_OFFSET 0x0000
-#define FIQ_REG1_OFFSET 0x0004
-#define IRQ_REG0_OFFSET 0x0008
-#define IRQ_REG1_OFFSET 0x000C
-#define IRQ_IRQENTRY_OFFSET 0x0014
-#define IRQ_ENT_REG0_OFFSET 0x0018
-#define IRQ_ENT_REG1_OFFSET 0x001C
-#define IRQ_INCTL_REG_OFFSET 0x0020
-#define IRQ_EABASE_REG_OFFSET 0x0024
-#define IRQ_INTPRI0_REG_OFFSET 0x0030
-#define IRQ_INTPRI7_REG_OFFSET 0x004C
-
-static void __iomem *davinci_intc_base;
-static struct irq_domain *davinci_irq_domain;
-
-static inline void davinci_irq_writel(unsigned long value, int offset)
+#define DAVINCI_AINTC_FIQ_REG0 0x0000
+#define DAVINCI_AINTC_FIQ_REG1 0x0004
+#define DAVINCI_AINTC_IRQ_REG0 0x0008
+#define DAVINCI_AINTC_IRQ_REG1 0x000C
+#define DAVINCI_AINTC_IRQ_IRQENTRY 0x0014
+#define DAVINCI_AINTC_IRQ_ENT_REG0 0x0018
+#define DAVINCI_AINTC_IRQ_ENT_REG1 0x001C
+#define DAVINCI_AINTC_IRQ_INCTL_REG 0x0020
+#define DAVINCI_AINTC_IRQ_EABASE_REG 0x0024
+#define DAVINCI_AINTC_IRQ_INTPRI0_REG 0x0030
+#define DAVINCI_AINTC_IRQ_INTPRI7_REG 0x004C
+
+static void __iomem *davinci_aintc_base;
+static struct irq_domain *davinci_aintc_irq_domain;
+
+static inline void davinci_aintc_writel(unsigned long value, int offset)
{
- __raw_writel(value, davinci_intc_base + offset);
+ __raw_writel(value, davinci_aintc_base + offset);
}
-static inline unsigned long davinci_irq_readl(int offset)
+static inline unsigned long davinci_aintc_readl(int offset)
{
- return __raw_readl(davinci_intc_base + offset);
+ return __raw_readl(davinci_aintc_base + offset);
}
static __init void
-davinci_irq_setup_gc(void __iomem *base,
- unsigned int irq_start, unsigned int num)
+davinci_aintc_setup_gc(void __iomem *base,
+ unsigned int irq_start, unsigned int num)
{
struct irq_chip_generic *gc;
struct irq_chip_type *ct;
- gc = irq_get_domain_generic_chip(davinci_irq_domain, irq_start);
+ gc = irq_get_domain_generic_chip(davinci_aintc_irq_domain, irq_start);
gc->reg_base = base;
gc->irq_base = irq_start;
@@ -60,16 +60,16 @@ davinci_irq_setup_gc(void __iomem *base,
ct->chip.irq_mask = irq_gc_mask_clr_bit;
ct->chip.irq_unmask = irq_gc_mask_set_bit;
- ct->regs.ack = IRQ_REG0_OFFSET;
- ct->regs.mask = IRQ_ENT_REG0_OFFSET;
+ ct->regs.ack = DAVINCI_AINTC_IRQ_REG0;
+ ct->regs.mask = DAVINCI_AINTC_IRQ_ENT_REG0;
irq_setup_generic_chip(gc, IRQ_MSK(num), IRQ_GC_INIT_MASK_CACHE,
IRQ_NOREQUEST | IRQ_NOPROBE, 0);
}
static asmlinkage void __exception_irq_entry
-davinci_handle_irq(struct pt_regs *regs)
+davinci_aintc_handle_irq(struct pt_regs *regs)
{
- int irqnr = davinci_irq_readl(IRQ_IRQENTRY_OFFSET);
+ int irqnr = davinci_aintc_readl(DAVINCI_AINTC_IRQ_IRQENTRY);
/*
* Use the formula for entry vector index generation from section
@@ -78,70 +78,73 @@ davinci_handle_irq(struct pt_regs *regs)
irqnr >>= 2;
irqnr -= 1;
- handle_domain_irq(davinci_irq_domain, irqnr, regs);
+ handle_domain_irq(davinci_aintc_irq_domain, irqnr, regs);
}
/* ARM Interrupt Controller Initialization */
-void __init davinci_irq_init(void)
+void __init davinci_aintc_init(void)
{
unsigned i, j;
const u8 *davinci_def_priorities = davinci_soc_info.intc_irq_prios;
int rv, irq_base;
- davinci_intc_base = ioremap(davinci_soc_info.intc_base, SZ_4K);
- if (WARN_ON(!davinci_intc_base))
+ davinci_aintc_base = ioremap(davinci_soc_info.intc_base, SZ_4K);
+ if (WARN_ON(!davinci_aintc_base))
return;
/* Clear all interrupt requests */
- davinci_irq_writel(~0x0, FIQ_REG0_OFFSET);
- davinci_irq_writel(~0x0, FIQ_REG1_OFFSET);
- davinci_irq_writel(~0x0, IRQ_REG0_OFFSET);
- davinci_irq_writel(~0x0, IRQ_REG1_OFFSET);
+ davinci_aintc_writel(~0x0, DAVINCI_AINTC_FIQ_REG0);
+ davinci_aintc_writel(~0x0, DAVINCI_AINTC_FIQ_REG1);
+ davinci_aintc_writel(~0x0, DAVINCI_AINTC_IRQ_REG0);
+ davinci_aintc_writel(~0x0, DAVINCI_AINTC_IRQ_REG1);
/* Disable all interrupts */
- davinci_irq_writel(0x0, IRQ_ENT_REG0_OFFSET);
- davinci_irq_writel(0x0, IRQ_ENT_REG1_OFFSET);
+ davinci_aintc_writel(0x0, DAVINCI_AINTC_IRQ_ENT_REG0);
+ davinci_aintc_writel(0x0, DAVINCI_AINTC_IRQ_ENT_REG1);
/* Interrupts disabled immediately, IRQ entry reflects all */
- davinci_irq_writel(0x0, IRQ_INCTL_REG_OFFSET);
+ davinci_aintc_writel(0x0, DAVINCI_AINTC_IRQ_INCTL_REG);
/* we don't use the hardware vector table, just its entry addresses */
- davinci_irq_writel(0, IRQ_EABASE_REG_OFFSET);
+ davinci_aintc_writel(0, DAVINCI_AINTC_IRQ_EABASE_REG);
/* Clear all interrupt requests */
- davinci_irq_writel(~0x0, FIQ_REG0_OFFSET);
- davinci_irq_writel(~0x0, FIQ_REG1_OFFSET);
- davinci_irq_writel(~0x0, IRQ_REG0_OFFSET);
- davinci_irq_writel(~0x0, IRQ_REG1_OFFSET);
+ davinci_aintc_writel(~0x0, DAVINCI_AINTC_FIQ_REG0);
+ davinci_aintc_writel(~0x0, DAVINCI_AINTC_FIQ_REG1);
+ davinci_aintc_writel(~0x0, DAVINCI_AINTC_IRQ_REG0);
+ davinci_aintc_writel(~0x0, DAVINCI_AINTC_IRQ_REG1);
- for (i = IRQ_INTPRI0_REG_OFFSET; i <= IRQ_INTPRI7_REG_OFFSET; i += 4) {
+ for (i = DAVINCI_AINTC_IRQ_INTPRI0_REG;
+ i <= DAVINCI_AINTC_IRQ_INTPRI7_REG; i += 4) {
u32 pri;
for (j = 0, pri = 0; j < 32; j += 4, davinci_def_priorities++)
pri |= (*davinci_def_priorities & 0x07) << j;
- davinci_irq_writel(pri, i);
+ davinci_aintc_writel(pri, i);
}
irq_base = irq_alloc_descs(-1, 0, davinci_soc_info.intc_irq_num, 0);
if (WARN_ON(irq_base < 0))
return;
- davinci_irq_domain = irq_domain_add_legacy(NULL,
+ davinci_aintc_irq_domain = irq_domain_add_legacy(NULL,
davinci_soc_info.intc_irq_num,
irq_base, 0, &irq_domain_simple_ops,
NULL);
- if (WARN_ON(!davinci_irq_domain))
+ if (WARN_ON(!davinci_aintc_irq_domain))
return;
- rv = irq_alloc_domain_generic_chips(davinci_irq_domain, 32, 1,
+ rv = irq_alloc_domain_generic_chips(davinci_aintc_irq_domain, 32, 1,
"AINTC", handle_edge_irq,
IRQ_NOREQUEST | IRQ_NOPROBE, 0, 0);
if (WARN_ON(rv))
return;
- for (i = 0, j = 0; i < davinci_soc_info.intc_irq_num; i += 32, j += 0x04)
- davinci_irq_setup_gc(davinci_intc_base + j, irq_base + i, 32);
+ for (i = 0, j = 0; i < davinci_soc_info.intc_irq_num;
+ i += 32, j += 0x04)
+ davinci_aintc_setup_gc(davinci_aintc_base + j,
+ irq_base + i, 32);
irq_set_handler(DAVINCI_INTC_IRQ(IRQ_TINT1_TINT34), handle_level_irq);
- set_handle_irq(davinci_handle_irq);
+ set_handle_irq(davinci_aintc_handle_irq);
}
--
2.20.1
From: Bartosz Golaszewski <[email protected]>
These includes are no longer required. Remove them.
Signed-off-by: Bartosz Golaszewski <[email protected]>
Reviewed-by: David Lechner <[email protected]>
---
arch/arm/mach-davinci/irq.c | 4 ----
1 file changed, 4 deletions(-)
diff --git a/arch/arm/mach-davinci/irq.c b/arch/arm/mach-davinci/irq.c
index 0f469c59acfb..0768edfc3b66 100644
--- a/arch/arm/mach-davinci/irq.c
+++ b/arch/arm/mach-davinci/irq.c
@@ -12,10 +12,6 @@
#include <linux/io.h>
#include <linux/irqdomain.h>
-#include <mach/hardware.h>
-#include <mach/cputype.h>
-#include <mach/common.h>
-#include <asm/mach/irq.h>
#include <asm/exception.h>
#define DAVINCI_AINTC_FIQ_REG0 0x00
--
2.20.1
From: Bartosz Golaszewski <[email protected]>
Add the new-style config structures for da8xx SoCs. They will be used
once we make the cp-intc driver stop using davinci_soc_info.
Signed-off-by: Bartosz Golaszewski <[email protected]>
---
arch/arm/mach-davinci/da830.c | 10 ++++++++++
arch/arm/mach-davinci/da850.c | 10 ++++++++++
2 files changed, 20 insertions(+)
diff --git a/arch/arm/mach-davinci/da830.c b/arch/arm/mach-davinci/da830.c
index 5cfd30c57429..38af72be1a85 100644
--- a/arch/arm/mach-davinci/da830.c
+++ b/arch/arm/mach-davinci/da830.c
@@ -12,6 +12,7 @@
#include <linux/clk/davinci.h>
#include <linux/gpio.h>
#include <linux/init.h>
+#include <linux/irqchip/irq-davinci-cp-intc.h>
#include <linux/platform_data/gpio-davinci.h>
#include <asm/mach/map.h>
@@ -821,6 +822,15 @@ void __init da830_init(void)
WARN(!da8xx_syscfg0_base, "Unable to map syscfg0 module");
}
+static const struct davinci_cp_intc_config da830_cp_intc_config = {
+ .reg = {
+ .start = DA8XX_CP_INTC_BASE,
+ .end = DA8XX_CP_INTC_BASE + SZ_8K - 1,
+ .flags = IORESOURCE_MEM,
+ },
+ .num_irqs = DA830_N_CP_INTC_IRQ,
+};
+
void __init da830_init_irq(void)
{
cp_intc_init();
diff --git a/arch/arm/mach-davinci/da850.c b/arch/arm/mach-davinci/da850.c
index 6df6994c0f26..9a3ce68c0de4 100644
--- a/arch/arm/mach-davinci/da850.c
+++ b/arch/arm/mach-davinci/da850.c
@@ -18,6 +18,7 @@
#include <linux/cpufreq.h>
#include <linux/gpio.h>
#include <linux/init.h>
+#include <linux/irqchip/irq-davinci-cp-intc.h>
#include <linux/mfd/da8xx-cfgchip.h>
#include <linux/platform_data/clk-da8xx-cfgchip.h>
#include <linux/platform_data/clk-davinci-pll.h>
@@ -759,6 +760,15 @@ void __init da850_init(void)
WARN(!da8xx_syscfg1_base, "Unable to map syscfg1 module");
}
+static const struct davinci_cp_intc_config da850_cp_intc_config = {
+ .reg = {
+ .start = DA8XX_CP_INTC_BASE,
+ .end = DA8XX_CP_INTC_BASE + SZ_8K - 1,
+ .flags = IORESOURCE_MEM,
+ },
+ .num_irqs = DA850_N_CP_INTC_IRQ,
+};
+
void __init da850_init_irq(void)
{
cp_intc_init();
--
2.20.1
From: Bartosz Golaszewski <[email protected]>
There's no need to have a local header for cp-intc. Move the only
declaration for a public function to common.h. Move all register
offsets into the driver source file and drop all unused defines.
Make cp_intc_of_init() static.
Signed-off-by: Bartosz Golaszewski <[email protected]>
Reviewed-by: David Lechner <[email protected]>
---
arch/arm/mach-davinci/board-da830-evm.c | 1 -
arch/arm/mach-davinci/board-da850-evm.c | 1 -
arch/arm/mach-davinci/board-mityomapl138.c | 1 -
arch/arm/mach-davinci/board-omapl138-hawk.c | 1 -
arch/arm/mach-davinci/cp_intc.c | 20 +++++++-
arch/arm/mach-davinci/cp_intc.h | 57 ---------------------
arch/arm/mach-davinci/include/mach/common.h | 1 +
7 files changed, 19 insertions(+), 63 deletions(-)
delete mode 100644 arch/arm/mach-davinci/cp_intc.h
diff --git a/arch/arm/mach-davinci/board-da830-evm.c b/arch/arm/mach-davinci/board-da830-evm.c
index 7b8c4aeca096..f81c92b9cf07 100644
--- a/arch/arm/mach-davinci/board-da830-evm.c
+++ b/arch/arm/mach-davinci/board-da830-evm.c
@@ -39,7 +39,6 @@
#include <mach/mux.h>
#include <mach/da8xx.h>
-#include "cp_intc.h"
#include "irqs.h"
#define DA830_EVM_PHY_ID ""
diff --git a/arch/arm/mach-davinci/board-da850-evm.c b/arch/arm/mach-davinci/board-da850-evm.c
index b0814bd30a1f..1cc49e7bf128 100644
--- a/arch/arm/mach-davinci/board-da850-evm.c
+++ b/arch/arm/mach-davinci/board-da850-evm.c
@@ -46,7 +46,6 @@
#include <mach/da8xx.h>
#include <mach/mux.h>
-#include "cp_intc.h"
#include "irqs.h"
#include "sram.h"
diff --git a/arch/arm/mach-davinci/board-mityomapl138.c b/arch/arm/mach-davinci/board-mityomapl138.c
index 8df16e81b69e..eb6a9465f229 100644
--- a/arch/arm/mach-davinci/board-mityomapl138.c
+++ b/arch/arm/mach-davinci/board-mityomapl138.c
@@ -27,7 +27,6 @@
#include <asm/mach-types.h>
#include <asm/mach/arch.h>
#include <mach/common.h>
-#include "cp_intc.h"
#include <mach/da8xx.h>
#include <linux/platform_data/mtd-davinci.h>
#include <linux/platform_data/mtd-davinci-aemif.h>
diff --git a/arch/arm/mach-davinci/board-omapl138-hawk.c b/arch/arm/mach-davinci/board-omapl138-hawk.c
index 94c4f126ef86..7f852722ff08 100644
--- a/arch/arm/mach-davinci/board-omapl138-hawk.c
+++ b/arch/arm/mach-davinci/board-omapl138-hawk.c
@@ -27,7 +27,6 @@
#include <asm/mach/arch.h>
#include <mach/common.h>
-#include "cp_intc.h"
#include <mach/da8xx.h>
#include <mach/mux.h>
diff --git a/arch/arm/mach-davinci/cp_intc.c b/arch/arm/mach-davinci/cp_intc.c
index 4e293cde20fb..82110d332c82 100644
--- a/arch/arm/mach-davinci/cp_intc.c
+++ b/arch/arm/mach-davinci/cp_intc.c
@@ -21,7 +21,22 @@
#include <asm/exception.h>
#include <mach/common.h>
-#include "cp_intc.h"
+
+#define CP_INTC_CTRL 0x04
+#define CP_INTC_HOST_CTRL 0x0C
+#define CP_INTC_GLOBAL_ENABLE 0x10
+#define CP_INTC_SYS_STAT_IDX_CLR 0x24
+#define CP_INTC_SYS_ENABLE_IDX_SET 0x28
+#define CP_INTC_SYS_ENABLE_IDX_CLR 0x2C
+#define CP_INTC_HOST_ENABLE_IDX_SET 0x34
+#define CP_INTC_HOST_ENABLE_IDX_CLR 0x38
+#define CP_INTC_PRIO_IDX 0x80
+#define CP_INTC_SYS_STAT_CLR(n) (0x0280 + (n << 2))
+#define CP_INTC_SYS_ENABLE_CLR(n) (0x0380 + (n << 2))
+#define CP_INTC_CHAN_MAP(n) (0x0400 + (n << 2))
+#define CP_INTC_SYS_POLARITY(n) (0x0D00 + (n << 2))
+#define CP_INTC_SYS_TYPE(n) (0x0D80 + (n << 2))
+#define CP_INTC_HOST_ENABLE(n) (0x1500 + (n << 2))
#define DAVINCI_CP_INTC_PRI_INDX_MASK GENMASK(9, 0)
#define DAVINCI_CP_INTC_GPIR_NONE BIT(31)
@@ -141,7 +156,8 @@ static const struct irq_domain_ops cp_intc_host_ops = {
.xlate = irq_domain_xlate_onetwocell,
};
-int __init cp_intc_of_init(struct device_node *node, struct device_node *parent)
+static int __init cp_intc_of_init(struct device_node *node,
+ struct device_node *parent)
{
u32 num_irq = davinci_soc_info.intc_irq_num;
u8 *irq_prio = davinci_soc_info.intc_irq_prios;
diff --git a/arch/arm/mach-davinci/cp_intc.h b/arch/arm/mach-davinci/cp_intc.h
deleted file mode 100644
index 827bbe9baed4..000000000000
--- a/arch/arm/mach-davinci/cp_intc.h
+++ /dev/null
@@ -1,57 +0,0 @@
-/*
- * TI Common Platform Interrupt Controller (cp_intc) definitions
- *
- * Author: Steve Chen <[email protected]>
- * Copyright (C) 2008-2009, MontaVista Software, Inc. <[email protected]>
- *
- * This file is licensed under the terms of the GNU General Public License
- * version 2. This program is licensed "as is" without any warranty of any
- * kind, whether express or implied.
- */
-#ifndef __ASM_HARDWARE_CP_INTC_H
-#define __ASM_HARDWARE_CP_INTC_H
-
-#define CP_INTC_REV 0x00
-#define CP_INTC_CTRL 0x04
-#define CP_INTC_HOST_CTRL 0x0C
-#define CP_INTC_GLOBAL_ENABLE 0x10
-#define CP_INTC_GLOBAL_NESTING_LEVEL 0x1C
-#define CP_INTC_SYS_STAT_IDX_SET 0x20
-#define CP_INTC_SYS_STAT_IDX_CLR 0x24
-#define CP_INTC_SYS_ENABLE_IDX_SET 0x28
-#define CP_INTC_SYS_ENABLE_IDX_CLR 0x2C
-#define CP_INTC_GLOBAL_WAKEUP_ENABLE 0x30
-#define CP_INTC_HOST_ENABLE_IDX_SET 0x34
-#define CP_INTC_HOST_ENABLE_IDX_CLR 0x38
-#define CP_INTC_PACING_PRESCALE 0x40
-#define CP_INTC_VECTOR_BASE 0x50
-#define CP_INTC_VECTOR_SIZE 0x54
-#define CP_INTC_VECTOR_NULL 0x58
-#define CP_INTC_PRIO_IDX 0x80
-#define CP_INTC_PRIO_VECTOR 0x84
-#define CP_INTC_SECURE_ENABLE 0x90
-#define CP_INTC_SECURE_PRIO_IDX 0x94
-#define CP_INTC_PACING_PARAM(n) (0x0100 + (n << 4))
-#define CP_INTC_PACING_DEC(n) (0x0104 + (n << 4))
-#define CP_INTC_PACING_MAP(n) (0x0108 + (n << 4))
-#define CP_INTC_SYS_RAW_STAT(n) (0x0200 + (n << 2))
-#define CP_INTC_SYS_STAT_CLR(n) (0x0280 + (n << 2))
-#define CP_INTC_SYS_ENABLE_SET(n) (0x0300 + (n << 2))
-#define CP_INTC_SYS_ENABLE_CLR(n) (0x0380 + (n << 2))
-#define CP_INTC_CHAN_MAP(n) (0x0400 + (n << 2))
-#define CP_INTC_HOST_MAP(n) (0x0800 + (n << 2))
-#define CP_INTC_HOST_PRIO_IDX(n) (0x0900 + (n << 2))
-#define CP_INTC_SYS_POLARITY(n) (0x0D00 + (n << 2))
-#define CP_INTC_SYS_TYPE(n) (0x0D80 + (n << 2))
-#define CP_INTC_WAKEUP_ENABLE(n) (0x0E00 + (n << 2))
-#define CP_INTC_DEBUG_SELECT(n) (0x0F00 + (n << 2))
-#define CP_INTC_SYS_SECURE_ENABLE(n) (0x1000 + (n << 2))
-#define CP_INTC_HOST_NESTING_LEVEL(n) (0x1100 + (n << 2))
-#define CP_INTC_HOST_ENABLE(n) (0x1500 + (n << 2))
-#define CP_INTC_HOST_PRIO_VECTOR(n) (0x1600 + (n << 2))
-#define CP_INTC_VECTOR_ADDR(n) (0x2000 + (n << 2))
-
-void cp_intc_init(void);
-int cp_intc_of_init(struct device_node *, struct device_node *);
-
-#endif /* __ASM_HARDWARE_CP_INTC_H */
diff --git a/arch/arm/mach-davinci/include/mach/common.h b/arch/arm/mach-davinci/include/mach/common.h
index 14e0e1c40611..3f3f1169d47e 100644
--- a/arch/arm/mach-davinci/include/mach/common.h
+++ b/arch/arm/mach-davinci/include/mach/common.h
@@ -22,6 +22,7 @@
#define DAVINCI_INTC_START NR_IRQS
#define DAVINCI_INTC_IRQ(_irqnum) (DAVINCI_INTC_START + (_irqnum))
+void cp_intc_init(void);
void davinci_timer_init(struct clk *clk);
struct davinci_timer_instance {
--
2.20.1
From: Bartosz Golaszewski <[email protected]>
The aintc driver has now been cleaned up. Move it to drivers/irqchip
where it belongs. There's no device-tree support for any dm* board so
there's no IRQCHIP_OF_DECLARE() - there's only the exported init
function called from machine code.
Signed-off-by: Bartosz Golaszewski <[email protected]>
---
arch/arm/mach-davinci/Kconfig | 11 ++++-------
arch/arm/mach-davinci/Makefile | 1 -
drivers/irqchip/Kconfig | 5 +++++
drivers/irqchip/Makefile | 1 +
.../irq.c => drivers/irqchip/irq-davinci-aintc.c | 0
5 files changed, 10 insertions(+), 8 deletions(-)
rename arch/arm/mach-davinci/irq.c => drivers/irqchip/irq-davinci-aintc.c (100%)
diff --git a/arch/arm/mach-davinci/Kconfig b/arch/arm/mach-davinci/Kconfig
index da8a039d65f9..71a4d875dd39 100644
--- a/arch/arm/mach-davinci/Kconfig
+++ b/arch/arm/mach-davinci/Kconfig
@@ -1,9 +1,6 @@
# SPDX-License-Identifier: GPL-2.0
if ARCH_DAVINCI
-config AINTC
- bool
-
config CP_INTC
bool
select IRQ_DOMAIN
@@ -17,17 +14,17 @@ comment "DaVinci Core Type"
config ARCH_DAVINCI_DM644x
bool "DaVinci 644x based system"
- select AINTC
+ select DAVINCI_AINTC
select ARCH_DAVINCI_DMx
config ARCH_DAVINCI_DM355
bool "DaVinci 355 based system"
- select AINTC
+ select DAVINCI_AINTC
select ARCH_DAVINCI_DMx
config ARCH_DAVINCI_DM646x
bool "DaVinci 646x based system"
- select AINTC
+ select DAVINCI_AINTC
select ARCH_DAVINCI_DMx
config ARCH_DAVINCI_DA830
@@ -49,7 +46,7 @@ config ARCH_DAVINCI_DA8XX
config ARCH_DAVINCI_DM365
bool "DaVinci 365 based system"
- select AINTC
+ select DAVINCI_AINTC
select ARCH_DAVINCI_DMx
comment "DaVinci Board Type"
diff --git a/arch/arm/mach-davinci/Makefile b/arch/arm/mach-davinci/Makefile
index 93d271b4d84b..983865a99616 100644
--- a/arch/arm/mach-davinci/Makefile
+++ b/arch/arm/mach-davinci/Makefile
@@ -18,7 +18,6 @@ obj-$(CONFIG_ARCH_DAVINCI_DM365) += dm365.o devices.o
obj-$(CONFIG_ARCH_DAVINCI_DA830) += da830.o devices-da8xx.o usb-da8xx.o
obj-$(CONFIG_ARCH_DAVINCI_DA850) += da850.o devices-da8xx.o usb-da8xx.o
-obj-$(CONFIG_AINTC) += irq.o
obj-$(CONFIG_CP_INTC) += cp_intc.o
# Board specific
diff --git a/drivers/irqchip/Kconfig b/drivers/irqchip/Kconfig
index 3d1e60779078..ea0eb82bf1d2 100644
--- a/drivers/irqchip/Kconfig
+++ b/drivers/irqchip/Kconfig
@@ -129,6 +129,11 @@ config BRCMSTB_L2_IRQ
select GENERIC_IRQ_CHIP
select IRQ_DOMAIN
+config DAVINCI_AINTC
+ bool
+ select GENERIC_IRQ_CHIP
+ select IRQ_DOMAIN
+
config DW_APB_ICTL
bool
select GENERIC_IRQ_CHIP
diff --git a/drivers/irqchip/Makefile b/drivers/irqchip/Makefile
index c93713d24b86..623e0ec5f9d0 100644
--- a/drivers/irqchip/Makefile
+++ b/drivers/irqchip/Makefile
@@ -6,6 +6,7 @@ obj-$(CONFIG_ATH79) += irq-ath79-cpu.o
obj-$(CONFIG_ATH79) += irq-ath79-misc.o
obj-$(CONFIG_ARCH_BCM2835) += irq-bcm2835.o
obj-$(CONFIG_ARCH_BCM2835) += irq-bcm2836.o
+obj-$(CONFIG_DAVINCI_AINTC) += irq-davinci-aintc.o
obj-$(CONFIG_ARCH_EXYNOS) += exynos-combiner.o
obj-$(CONFIG_FARADAY_FTINTC010) += irq-ftintc010.o
obj-$(CONFIG_ARCH_HIP04) += irq-hip04.o
diff --git a/arch/arm/mach-davinci/irq.c b/drivers/irqchip/irq-davinci-aintc.c
similarity index 100%
rename from arch/arm/mach-davinci/irq.c
rename to drivers/irqchip/irq-davinci-aintc.c
--
2.20.1
From: Bartosz Golaszewski <[email protected]>
The cp-intc driver has now been cleaned up. Move it to drivers/irqchip
where it belongs.
Signed-off-by: Bartosz Golaszewski <[email protected]>
Reviewed-by: David Lechner <[email protected]>
---
arch/arm/mach-davinci/Kconfig | 8 ++------
arch/arm/mach-davinci/Makefile | 2 --
drivers/irqchip/Kconfig | 5 +++++
drivers/irqchip/Makefile | 1 +
.../cp_intc.c => drivers/irqchip/irq-davinci-cp-intc.c | 0
5 files changed, 8 insertions(+), 8 deletions(-)
rename arch/arm/mach-davinci/cp_intc.c => drivers/irqchip/irq-davinci-cp-intc.c (100%)
diff --git a/arch/arm/mach-davinci/Kconfig b/arch/arm/mach-davinci/Kconfig
index 71a4d875dd39..5a59cebc7d0a 100644
--- a/arch/arm/mach-davinci/Kconfig
+++ b/arch/arm/mach-davinci/Kconfig
@@ -1,10 +1,6 @@
# SPDX-License-Identifier: GPL-2.0
if ARCH_DAVINCI
-config CP_INTC
- bool
- select IRQ_DOMAIN
-
config ARCH_DAVINCI_DMx
bool
@@ -33,13 +29,13 @@ config ARCH_DAVINCI_DA830
select ARCH_DAVINCI_DA8XX
# needed on silicon revs 1.0, 1.1:
select CPU_DCACHE_WRITETHROUGH if !CPU_DCACHE_DISABLE
- select CP_INTC
+ select DAVINCI_CP_INTC
config ARCH_DAVINCI_DA850
bool "DA850/OMAP-L138/AM18x based system"
depends on !ARCH_DAVINCI_DMx || (AUTO_ZRELADDR && ARM_PATCH_PHYS_VIRT)
select ARCH_DAVINCI_DA8XX
- select CP_INTC
+ select DAVINCI_CP_INTC
config ARCH_DAVINCI_DA8XX
bool
diff --git a/arch/arm/mach-davinci/Makefile b/arch/arm/mach-davinci/Makefile
index 983865a99616..f76a8482784f 100644
--- a/arch/arm/mach-davinci/Makefile
+++ b/arch/arm/mach-davinci/Makefile
@@ -18,8 +18,6 @@ obj-$(CONFIG_ARCH_DAVINCI_DM365) += dm365.o devices.o
obj-$(CONFIG_ARCH_DAVINCI_DA830) += da830.o devices-da8xx.o usb-da8xx.o
obj-$(CONFIG_ARCH_DAVINCI_DA850) += da850.o devices-da8xx.o usb-da8xx.o
-obj-$(CONFIG_CP_INTC) += cp_intc.o
-
# Board specific
obj-$(CONFIG_MACH_DA8XX_DT) += da8xx-dt.o pdata-quirks.o
obj-$(CONFIG_MACH_DAVINCI_EVM) += board-dm644x-evm.o
diff --git a/drivers/irqchip/Kconfig b/drivers/irqchip/Kconfig
index ea0eb82bf1d2..48fc5024c073 100644
--- a/drivers/irqchip/Kconfig
+++ b/drivers/irqchip/Kconfig
@@ -134,6 +134,11 @@ config DAVINCI_AINTC
select GENERIC_IRQ_CHIP
select IRQ_DOMAIN
+config DAVINCI_CP_INTC
+ bool
+ select GENERIC_IRQ_CHIP
+ select IRQ_DOMAIN
+
config DW_APB_ICTL
bool
select GENERIC_IRQ_CHIP
diff --git a/drivers/irqchip/Makefile b/drivers/irqchip/Makefile
index 623e0ec5f9d0..e6cd0c98eff2 100644
--- a/drivers/irqchip/Makefile
+++ b/drivers/irqchip/Makefile
@@ -7,6 +7,7 @@ obj-$(CONFIG_ATH79) += irq-ath79-misc.o
obj-$(CONFIG_ARCH_BCM2835) += irq-bcm2835.o
obj-$(CONFIG_ARCH_BCM2835) += irq-bcm2836.o
obj-$(CONFIG_DAVINCI_AINTC) += irq-davinci-aintc.o
+obj-$(CONFIG_DAVINCI_CP_INTC) += irq-davinci-cp-intc.o
obj-$(CONFIG_ARCH_EXYNOS) += exynos-combiner.o
obj-$(CONFIG_FARADAY_FTINTC010) += irq-ftintc010.o
obj-$(CONFIG_ARCH_HIP04) += irq-hip04.o
diff --git a/arch/arm/mach-davinci/cp_intc.c b/drivers/irqchip/irq-davinci-cp-intc.c
similarity index 100%
rename from arch/arm/mach-davinci/cp_intc.c
rename to drivers/irqchip/irq-davinci-cp-intc.c
--
2.20.1
From: Bartosz Golaszewski <[email protected]>
Modify the aintc driver to take all its configuration from the new
config structure. Stop referencing davinci_soc_info in any way.
Move the declaration for davinci_aintc_init() to irq-davinci-aintc.h
and make it take the new config structure as parameter. Convert all
users to the new version.
Signed-off-by: Bartosz Golaszewski <[email protected]>
Reviewed-by: David Lechner <[email protected]>
---
arch/arm/mach-davinci/dm355.c | 2 +-
arch/arm/mach-davinci/dm365.c | 2 +-
arch/arm/mach-davinci/dm644x.c | 2 +-
arch/arm/mach-davinci/dm646x.c | 2 +-
arch/arm/mach-davinci/include/mach/common.h | 2 --
arch/arm/mach-davinci/irq.c | 39 +++++++++++----------
include/linux/irqchip/irq-davinci-aintc.h | 2 ++
7 files changed, 26 insertions(+), 25 deletions(-)
diff --git a/arch/arm/mach-davinci/dm355.c b/arch/arm/mach-davinci/dm355.c
index ff79c1a17fae..c7cd765114af 100644
--- a/arch/arm/mach-davinci/dm355.c
+++ b/arch/arm/mach-davinci/dm355.c
@@ -805,7 +805,7 @@ static const struct davinci_aintc_config dm355_aintc_config = {
void __init dm355_init_irq(void)
{
- davinci_aintc_init();
+ davinci_aintc_init(&dm355_aintc_config);
}
static int __init dm355_init_devices(void)
diff --git a/arch/arm/mach-davinci/dm365.c b/arch/arm/mach-davinci/dm365.c
index 44dc3ca94dd3..bde3c3b94cc9 100644
--- a/arch/arm/mach-davinci/dm365.c
+++ b/arch/arm/mach-davinci/dm365.c
@@ -1064,7 +1064,7 @@ static const struct davinci_aintc_config dm365_aintc_config = {
void __init dm365_init_irq(void)
{
- davinci_aintc_init();
+ davinci_aintc_init(&dm365_aintc_config);
}
static int __init dm365_init_devices(void)
diff --git a/arch/arm/mach-davinci/dm644x.c b/arch/arm/mach-davinci/dm644x.c
index 0b0ecac36486..6d3498058283 100644
--- a/arch/arm/mach-davinci/dm644x.c
+++ b/arch/arm/mach-davinci/dm644x.c
@@ -741,7 +741,7 @@ static const struct davinci_aintc_config dm644x_aintc_config = {
void __init dm644x_init_irq(void)
{
- davinci_aintc_init();
+ davinci_aintc_init(&dm644x_aintc_config);
}
void __init dm644x_init_devices(void)
diff --git a/arch/arm/mach-davinci/dm646x.c b/arch/arm/mach-davinci/dm646x.c
index 4e871d00e4e9..a0a8b336c1a4 100644
--- a/arch/arm/mach-davinci/dm646x.c
+++ b/arch/arm/mach-davinci/dm646x.c
@@ -702,7 +702,7 @@ static const struct davinci_aintc_config dm646x_aintc_config = {
void __init dm646x_init_irq(void)
{
- davinci_aintc_init();
+ davinci_aintc_init(&dm646x_aintc_config);
}
static int __init dm646x_init_devices(void)
diff --git a/arch/arm/mach-davinci/include/mach/common.h b/arch/arm/mach-davinci/include/mach/common.h
index 8c9c011f96f6..14e0e1c40611 100644
--- a/arch/arm/mach-davinci/include/mach/common.h
+++ b/arch/arm/mach-davinci/include/mach/common.h
@@ -24,8 +24,6 @@
void davinci_timer_init(struct clk *clk);
-extern void davinci_aintc_init(void);
-
struct davinci_timer_instance {
u32 base;
u32 bottom_irq;
diff --git a/arch/arm/mach-davinci/irq.c b/arch/arm/mach-davinci/irq.c
index 6a7205a844e1..f5578abfc0aa 100644
--- a/arch/arm/mach-davinci/irq.c
+++ b/arch/arm/mach-davinci/irq.c
@@ -8,6 +8,7 @@
#include <linux/init.h>
#include <linux/interrupt.h>
#include <linux/irq.h>
+#include <linux/irqchip/irq-davinci-aintc.h>
#include <linux/io.h>
#include <linux/irqdomain.h>
@@ -82,13 +83,14 @@ davinci_aintc_handle_irq(struct pt_regs *regs)
}
/* ARM Interrupt Controller Initialization */
-void __init davinci_aintc_init(void)
+void __init davinci_aintc_init(const struct davinci_aintc_config *config)
{
- unsigned i, j;
- const u8 *davinci_def_priorities = davinci_soc_info.intc_irq_prios;
+ unsigned int irq_off, reg_off, prio, shift;
int rv, irq_base;
+ const u8 *prios;
- davinci_aintc_base = ioremap(davinci_soc_info.intc_base, SZ_4K);
+ davinci_aintc_base = ioremap(config->reg.start,
+ resource_size(&config->reg));
if (WARN_ON(!davinci_aintc_base))
return;
@@ -114,23 +116,21 @@ void __init davinci_aintc_init(void)
davinci_aintc_writel(~0x0, DAVINCI_AINTC_IRQ_REG0);
davinci_aintc_writel(~0x0, DAVINCI_AINTC_IRQ_REG1);
- for (i = DAVINCI_AINTC_IRQ_INTPRI0_REG;
- i <= DAVINCI_AINTC_IRQ_INTPRI7_REG; i += 4) {
- u32 pri;
-
- for (j = 0, pri = 0; j < 32; j += 4, davinci_def_priorities++)
- pri |= (*davinci_def_priorities & 0x07) << j;
- davinci_aintc_writel(pri, i);
+ prios = config->prios;
+ for (reg_off = DAVINCI_AINTC_IRQ_INTPRI0_REG;
+ reg_off <= DAVINCI_AINTC_IRQ_INTPRI7_REG; reg_off += 4) {
+ for (shift = 0, prio = 0; shift < 32; shift += 4, prios++)
+ prio |= (*prios & 0x07) << shift;
+ davinci_aintc_writel(prio, reg_off);
}
- irq_base = irq_alloc_descs(-1, 0, davinci_soc_info.intc_irq_num, 0);
+ irq_base = irq_alloc_descs(-1, 0, config->num_irqs, 0);
if (WARN_ON(irq_base < 0))
return;
davinci_aintc_irq_domain = irq_domain_add_legacy(NULL,
- davinci_soc_info.intc_irq_num,
- irq_base, 0, &irq_domain_simple_ops,
- NULL);
+ config->num_irqs, irq_base, 0,
+ &irq_domain_simple_ops, NULL);
if (WARN_ON(!davinci_aintc_irq_domain))
return;
@@ -140,10 +140,11 @@ void __init davinci_aintc_init(void)
if (WARN_ON(rv))
return;
- for (i = 0, j = 0; i < davinci_soc_info.intc_irq_num;
- i += 32, j += 0x04)
- davinci_aintc_setup_gc(davinci_aintc_base + j,
- irq_base + i, 32);
+ for (irq_off = 0, reg_off = 0;
+ irq_off < config->num_irqs;
+ irq_off += 32, reg_off += 0x04)
+ davinci_aintc_setup_gc(davinci_aintc_base + reg_off,
+ irq_base + irq_off, 32);
irq_set_handler(DAVINCI_INTC_IRQ(IRQ_TINT1_TINT34), handle_level_irq);
set_handle_irq(davinci_aintc_handle_irq);
diff --git a/include/linux/irqchip/irq-davinci-aintc.h b/include/linux/irqchip/irq-davinci-aintc.h
index 2b2ace3c1b22..ea4e087fac98 100644
--- a/include/linux/irqchip/irq-davinci-aintc.h
+++ b/include/linux/irqchip/irq-davinci-aintc.h
@@ -22,4 +22,6 @@ struct davinci_aintc_config {
u8 *prios;
};
+void davinci_aintc_init(const struct davinci_aintc_config *config);
+
#endif /* _LINUX_IRQ_DAVINCI_AINTC_ */
--
2.20.1
From: Bartosz Golaszewski <[email protected]>
Add a config structure that will be used by aintc-based platforms.
It contains the register range resource, number of interrupts and
a list of priorities.
Signed-off-by: Bartosz Golaszewski <[email protected]>
---
include/linux/irqchip/irq-davinci-aintc.h | 25 +++++++++++++++++++++++
1 file changed, 25 insertions(+)
create mode 100644 include/linux/irqchip/irq-davinci-aintc.h
diff --git a/include/linux/irqchip/irq-davinci-aintc.h b/include/linux/irqchip/irq-davinci-aintc.h
new file mode 100644
index 000000000000..2b2ace3c1b22
--- /dev/null
+++ b/include/linux/irqchip/irq-davinci-aintc.h
@@ -0,0 +1,25 @@
+/* SPDX-License-Identifier: GPL-2.0-or-later */
+/*
+ * Copyright (C) 2019 Texas Instruments
+ */
+
+#ifndef _LINUX_IRQ_DAVINCI_AINTC_
+#define _LINUX_IRQ_DAVINCI_AINTC_
+
+#include <linux/ioport.h>
+
+/**
+ * struct davinci_aintc_config - configuration data for davinci-aintc driver.
+ *
+ * @reg: register range to map
+ * @num_irqs: number of HW interrupts supported by the controller
+ * @prios: an array of size num_irqs containing priority settings for
+ * each interrupt
+ */
+struct davinci_aintc_config {
+ struct resource reg;
+ unsigned int num_irqs;
+ u8 *prios;
+};
+
+#endif /* _LINUX_IRQ_DAVINCI_AINTC_ */
--
2.20.1
From: Bartosz Golaszewski <[email protected]>
Once we select SPARSE_IRQ, the interrupt numbers defined in mach/irqs.h
will only signify the hardware interrupt offsets, not the interrupt
numbers seen by linux. Introduce a wrapper macro that translates the
hwirq number to virtual numbers. For now it's just a dummy. Use that
macro when specifying the interrupts in resources for platform devices.
Signed-off-by: Bartosz Golaszewski <[email protected]>
---
arch/arm/mach-davinci/asp.h | 8 +-
arch/arm/mach-davinci/da830.c | 12 +-
arch/arm/mach-davinci/da850.c | 28 ++--
arch/arm/mach-davinci/devices-da8xx.c | 146 ++++++++++----------
arch/arm/mach-davinci/devices.c | 31 +++--
arch/arm/mach-davinci/dm355.c | 56 ++++----
arch/arm/mach-davinci/dm365.c | 80 +++++------
arch/arm/mach-davinci/dm644x.c | 46 +++---
arch/arm/mach-davinci/dm646x.c | 60 ++++----
arch/arm/mach-davinci/include/mach/common.h | 3 +
arch/arm/mach-davinci/irq.c | 2 +-
arch/arm/mach-davinci/usb-da8xx.c | 6 +-
arch/arm/mach-davinci/usb.c | 7 +-
13 files changed, 246 insertions(+), 239 deletions(-)
diff --git a/arch/arm/mach-davinci/asp.h b/arch/arm/mach-davinci/asp.h
index 495aa6907cbc..d0ecd1d0f084 100644
--- a/arch/arm/mach-davinci/asp.h
+++ b/arch/arm/mach-davinci/asp.h
@@ -49,9 +49,9 @@
#define DAVINCI_DA830_DMA_MCASP2_AXEVT 5
/* Interrupts */
-#define DAVINCI_ASP0_RX_INT IRQ_MBRINT
-#define DAVINCI_ASP0_TX_INT IRQ_MBXINT
-#define DAVINCI_ASP1_RX_INT IRQ_MBRINT
-#define DAVINCI_ASP1_TX_INT IRQ_MBXINT
+#define DAVINCI_ASP0_RX_INT DAVINCI_INTC_IRQ(IRQ_MBRINT)
+#define DAVINCI_ASP0_TX_INT DAVINCI_INTC_IRQ(IRQ_MBXINT)
+#define DAVINCI_ASP1_RX_INT DAVINCI_INTC_IRQ(IRQ_MBRINT)
+#define DAVINCI_ASP1_TX_INT DAVINCI_INTC_IRQ(IRQ_MBXINT)
#endif /* __ASM_ARCH_DAVINCI_ASP_H */
diff --git a/arch/arm/mach-davinci/da830.c b/arch/arm/mach-davinci/da830.c
index 9e18b245266b..aa8da725a325 100644
--- a/arch/arm/mach-davinci/da830.c
+++ b/arch/arm/mach-davinci/da830.c
@@ -772,17 +772,17 @@ int __init da830_register_gpio(void)
static struct davinci_timer_instance da830_timer_instance[2] = {
{
.base = DA8XX_TIMER64P0_BASE,
- .bottom_irq = IRQ_DA8XX_TINT12_0,
- .top_irq = IRQ_DA8XX_TINT34_0,
+ .bottom_irq = DAVINCI_INTC_IRQ(IRQ_DA8XX_TINT12_0),
+ .top_irq = DAVINCI_INTC_IRQ(IRQ_DA8XX_TINT34_0),
.cmp_off = DA830_CMP12_0,
- .cmp_irq = IRQ_DA830_T12CMPINT0_0,
+ .cmp_irq = DAVINCI_INTC_IRQ(IRQ_DA830_T12CMPINT0_0),
},
{
.base = DA8XX_TIMER64P1_BASE,
- .bottom_irq = IRQ_DA8XX_TINT12_1,
- .top_irq = IRQ_DA8XX_TINT34_1,
+ .bottom_irq = DAVINCI_INTC_IRQ(IRQ_DA8XX_TINT12_1),
+ .top_irq = DAVINCI_INTC_IRQ(IRQ_DA8XX_TINT34_1),
.cmp_off = DA830_CMP12_0,
- .cmp_irq = IRQ_DA830_T12CMPINT0_1,
+ .cmp_irq = DAVINCI_INTC_IRQ(IRQ_DA830_T12CMPINT0_1),
},
};
diff --git a/arch/arm/mach-davinci/da850.c b/arch/arm/mach-davinci/da850.c
index e823b89e2b7a..d22b19833326 100644
--- a/arch/arm/mach-davinci/da850.c
+++ b/arch/arm/mach-davinci/da850.c
@@ -439,23 +439,23 @@ static struct davinci_id da850_ids[] = {
static struct davinci_timer_instance da850_timer_instance[4] = {
{
.base = DA8XX_TIMER64P0_BASE,
- .bottom_irq = IRQ_DA8XX_TINT12_0,
- .top_irq = IRQ_DA8XX_TINT34_0,
+ .bottom_irq = DAVINCI_INTC_IRQ(IRQ_DA8XX_TINT12_0),
+ .top_irq = DAVINCI_INTC_IRQ(IRQ_DA8XX_TINT34_0),
},
{
.base = DA8XX_TIMER64P1_BASE,
- .bottom_irq = IRQ_DA8XX_TINT12_1,
- .top_irq = IRQ_DA8XX_TINT34_1,
+ .bottom_irq = DAVINCI_INTC_IRQ(IRQ_DA8XX_TINT12_1),
+ .top_irq = DAVINCI_INTC_IRQ(IRQ_DA8XX_TINT34_1),
},
{
.base = DA850_TIMER64P2_BASE,
- .bottom_irq = IRQ_DA850_TINT12_2,
- .top_irq = IRQ_DA850_TINT34_2,
+ .bottom_irq = DAVINCI_INTC_IRQ(IRQ_DA850_TINT12_2),
+ .top_irq = DAVINCI_INTC_IRQ(IRQ_DA850_TINT34_2),
},
{
.base = DA850_TIMER64P3_BASE,
- .bottom_irq = IRQ_DA850_TINT12_3,
- .top_irq = IRQ_DA850_TINT34_3,
+ .bottom_irq = DAVINCI_INTC_IRQ(IRQ_DA850_TINT12_3),
+ .top_irq = DAVINCI_INTC_IRQ(IRQ_DA850_TINT34_3),
},
};
@@ -658,8 +658,8 @@ static struct platform_device da850_vpif_dev = {
static struct resource da850_vpif_display_resource[] = {
{
- .start = IRQ_DA850_VPIFINT,
- .end = IRQ_DA850_VPIFINT,
+ .start = DAVINCI_INTC_IRQ(IRQ_DA850_VPIFINT),
+ .end = DAVINCI_INTC_IRQ(IRQ_DA850_VPIFINT),
.flags = IORESOURCE_IRQ,
},
};
@@ -677,13 +677,13 @@ static struct platform_device da850_vpif_display_dev = {
static struct resource da850_vpif_capture_resource[] = {
{
- .start = IRQ_DA850_VPIFINT,
- .end = IRQ_DA850_VPIFINT,
+ .start = DAVINCI_INTC_IRQ(IRQ_DA850_VPIFINT),
+ .end = DAVINCI_INTC_IRQ(IRQ_DA850_VPIFINT),
.flags = IORESOURCE_IRQ,
},
{
- .start = IRQ_DA850_VPIFINT,
- .end = IRQ_DA850_VPIFINT,
+ .start = DAVINCI_INTC_IRQ(IRQ_DA850_VPIFINT),
+ .end = DAVINCI_INTC_IRQ(IRQ_DA850_VPIFINT),
.flags = IORESOURCE_IRQ,
},
};
diff --git a/arch/arm/mach-davinci/devices-da8xx.c b/arch/arm/mach-davinci/devices-da8xx.c
index cf78da5ab054..298165095d31 100644
--- a/arch/arm/mach-davinci/devices-da8xx.c
+++ b/arch/arm/mach-davinci/devices-da8xx.c
@@ -64,7 +64,7 @@ void __iomem *da8xx_syscfg1_base;
static struct plat_serial8250_port da8xx_serial0_pdata[] = {
{
.mapbase = DA8XX_UART0_BASE,
- .irq = IRQ_DA8XX_UARTINT0,
+ .irq = DAVINCI_INTC_IRQ(IRQ_DA8XX_UARTINT0),
.flags = UPF_BOOT_AUTOCONF | UPF_SKIP_TEST |
UPF_IOREMAP,
.iotype = UPIO_MEM,
@@ -77,7 +77,7 @@ static struct plat_serial8250_port da8xx_serial0_pdata[] = {
static struct plat_serial8250_port da8xx_serial1_pdata[] = {
{
.mapbase = DA8XX_UART1_BASE,
- .irq = IRQ_DA8XX_UARTINT1,
+ .irq = DAVINCI_INTC_IRQ(IRQ_DA8XX_UARTINT1),
.flags = UPF_BOOT_AUTOCONF | UPF_SKIP_TEST |
UPF_IOREMAP,
.iotype = UPIO_MEM,
@@ -90,7 +90,7 @@ static struct plat_serial8250_port da8xx_serial1_pdata[] = {
static struct plat_serial8250_port da8xx_serial2_pdata[] = {
{
.mapbase = DA8XX_UART2_BASE,
- .irq = IRQ_DA8XX_UARTINT2,
+ .irq = DAVINCI_INTC_IRQ(IRQ_DA8XX_UARTINT2),
.flags = UPF_BOOT_AUTOCONF | UPF_SKIP_TEST |
UPF_IOREMAP,
.iotype = UPIO_MEM,
@@ -171,12 +171,12 @@ static struct resource da8xx_edma0_resources[] = {
},
{
.name = "edma3_ccint",
- .start = IRQ_DA8XX_CCINT0,
+ .start = DAVINCI_INTC_IRQ(IRQ_DA8XX_CCINT0),
.flags = IORESOURCE_IRQ,
},
{
.name = "edma3_ccerrint",
- .start = IRQ_DA8XX_CCERRINT,
+ .start = DAVINCI_INTC_IRQ(IRQ_DA8XX_CCERRINT),
.flags = IORESOURCE_IRQ,
},
};
@@ -196,12 +196,12 @@ static struct resource da850_edma1_resources[] = {
},
{
.name = "edma3_ccint",
- .start = IRQ_DA850_CCINT1,
+ .start = DAVINCI_INTC_IRQ(IRQ_DA850_CCINT1),
.flags = IORESOURCE_IRQ,
},
{
.name = "edma3_ccerrint",
- .start = IRQ_DA850_CCERRINT1,
+ .start = DAVINCI_INTC_IRQ(IRQ_DA850_CCERRINT1),
.flags = IORESOURCE_IRQ,
},
};
@@ -306,8 +306,8 @@ static struct resource da8xx_i2c_resources0[] = {
.flags = IORESOURCE_MEM,
},
{
- .start = IRQ_DA8XX_I2CINT0,
- .end = IRQ_DA8XX_I2CINT0,
+ .start = DAVINCI_INTC_IRQ(IRQ_DA8XX_I2CINT0),
+ .end = DAVINCI_INTC_IRQ(IRQ_DA8XX_I2CINT0),
.flags = IORESOURCE_IRQ,
},
};
@@ -326,8 +326,8 @@ static struct resource da8xx_i2c_resources1[] = {
.flags = IORESOURCE_MEM,
},
{
- .start = IRQ_DA8XX_I2CINT1,
- .end = IRQ_DA8XX_I2CINT1,
+ .start = DAVINCI_INTC_IRQ(IRQ_DA8XX_I2CINT1),
+ .end = DAVINCI_INTC_IRQ(IRQ_DA8XX_I2CINT1),
.flags = IORESOURCE_IRQ,
},
};
@@ -382,23 +382,23 @@ static struct resource da8xx_emac_resources[] = {
.flags = IORESOURCE_MEM,
},
{
- .start = IRQ_DA8XX_C0_RX_THRESH_PULSE,
- .end = IRQ_DA8XX_C0_RX_THRESH_PULSE,
+ .start = DAVINCI_INTC_IRQ(IRQ_DA8XX_C0_RX_THRESH_PULSE),
+ .end = DAVINCI_INTC_IRQ(IRQ_DA8XX_C0_RX_THRESH_PULSE),
.flags = IORESOURCE_IRQ,
},
{
- .start = IRQ_DA8XX_C0_RX_PULSE,
- .end = IRQ_DA8XX_C0_RX_PULSE,
+ .start = DAVINCI_INTC_IRQ(IRQ_DA8XX_C0_RX_PULSE),
+ .end = DAVINCI_INTC_IRQ(IRQ_DA8XX_C0_RX_PULSE),
.flags = IORESOURCE_IRQ,
},
{
- .start = IRQ_DA8XX_C0_TX_PULSE,
- .end = IRQ_DA8XX_C0_TX_PULSE,
+ .start = DAVINCI_INTC_IRQ(IRQ_DA8XX_C0_TX_PULSE),
+ .end = DAVINCI_INTC_IRQ(IRQ_DA8XX_C0_TX_PULSE),
.flags = IORESOURCE_IRQ,
},
{
- .start = IRQ_DA8XX_C0_MISC_PULSE,
- .end = IRQ_DA8XX_C0_MISC_PULSE,
+ .start = DAVINCI_INTC_IRQ(IRQ_DA8XX_C0_MISC_PULSE),
+ .end = DAVINCI_INTC_IRQ(IRQ_DA8XX_C0_MISC_PULSE),
.flags = IORESOURCE_IRQ,
},
};
@@ -470,7 +470,7 @@ static struct resource da830_mcasp1_resources[] = {
},
{
.name = "common",
- .start = IRQ_DA8XX_MCASPINT,
+ .start = DAVINCI_INTC_IRQ(IRQ_DA8XX_MCASPINT),
.flags = IORESOURCE_IRQ,
},
};
@@ -505,7 +505,7 @@ static struct resource da830_mcasp2_resources[] = {
},
{
.name = "common",
- .start = IRQ_DA8XX_MCASPINT,
+ .start = DAVINCI_INTC_IRQ(IRQ_DA8XX_MCASPINT),
.flags = IORESOURCE_IRQ,
},
};
@@ -540,7 +540,7 @@ static struct resource da850_mcasp_resources[] = {
},
{
.name = "common",
- .start = IRQ_DA8XX_MCASPINT,
+ .start = DAVINCI_INTC_IRQ(IRQ_DA8XX_MCASPINT),
.flags = IORESOURCE_IRQ,
},
};
@@ -588,43 +588,43 @@ static struct resource da8xx_pruss_resources[] = {
.flags = IORESOURCE_MEM,
},
{
- .start = IRQ_DA8XX_EVTOUT0,
- .end = IRQ_DA8XX_EVTOUT0,
+ .start = DAVINCI_INTC_IRQ(IRQ_DA8XX_EVTOUT0),
+ .end = DAVINCI_INTC_IRQ(IRQ_DA8XX_EVTOUT0),
.flags = IORESOURCE_IRQ,
},
{
- .start = IRQ_DA8XX_EVTOUT1,
- .end = IRQ_DA8XX_EVTOUT1,
+ .start = DAVINCI_INTC_IRQ(IRQ_DA8XX_EVTOUT1),
+ .end = DAVINCI_INTC_IRQ(IRQ_DA8XX_EVTOUT1),
.flags = IORESOURCE_IRQ,
},
{
- .start = IRQ_DA8XX_EVTOUT2,
- .end = IRQ_DA8XX_EVTOUT2,
+ .start = DAVINCI_INTC_IRQ(IRQ_DA8XX_EVTOUT2),
+ .end = DAVINCI_INTC_IRQ(IRQ_DA8XX_EVTOUT2),
.flags = IORESOURCE_IRQ,
},
{
- .start = IRQ_DA8XX_EVTOUT3,
- .end = IRQ_DA8XX_EVTOUT3,
+ .start = DAVINCI_INTC_IRQ(IRQ_DA8XX_EVTOUT3),
+ .end = DAVINCI_INTC_IRQ(IRQ_DA8XX_EVTOUT3),
.flags = IORESOURCE_IRQ,
},
{
- .start = IRQ_DA8XX_EVTOUT4,
- .end = IRQ_DA8XX_EVTOUT4,
+ .start = DAVINCI_INTC_IRQ(IRQ_DA8XX_EVTOUT4),
+ .end = DAVINCI_INTC_IRQ(IRQ_DA8XX_EVTOUT4),
.flags = IORESOURCE_IRQ,
},
{
- .start = IRQ_DA8XX_EVTOUT5,
- .end = IRQ_DA8XX_EVTOUT5,
+ .start = DAVINCI_INTC_IRQ(IRQ_DA8XX_EVTOUT5),
+ .end = DAVINCI_INTC_IRQ(IRQ_DA8XX_EVTOUT5),
.flags = IORESOURCE_IRQ,
},
{
- .start = IRQ_DA8XX_EVTOUT6,
- .end = IRQ_DA8XX_EVTOUT6,
+ .start = DAVINCI_INTC_IRQ(IRQ_DA8XX_EVTOUT6),
+ .end = DAVINCI_INTC_IRQ(IRQ_DA8XX_EVTOUT6),
.flags = IORESOURCE_IRQ,
},
{
- .start = IRQ_DA8XX_EVTOUT7,
- .end = IRQ_DA8XX_EVTOUT7,
+ .start = DAVINCI_INTC_IRQ(IRQ_DA8XX_EVTOUT7),
+ .end = DAVINCI_INTC_IRQ(IRQ_DA8XX_EVTOUT7),
.flags = IORESOURCE_IRQ,
},
};
@@ -674,8 +674,8 @@ static struct resource da8xx_lcdc_resources[] = {
.flags = IORESOURCE_MEM,
},
[1] = { /* interrupt */
- .start = IRQ_DA8XX_LCDINT,
- .end = IRQ_DA8XX_LCDINT,
+ .start = DAVINCI_INTC_IRQ(IRQ_DA8XX_LCDINT),
+ .end = DAVINCI_INTC_IRQ(IRQ_DA8XX_LCDINT),
.flags = IORESOURCE_IRQ,
},
};
@@ -700,48 +700,48 @@ static struct resource da8xx_gpio_resources[] = {
.flags = IORESOURCE_MEM,
},
{ /* interrupt */
- .start = IRQ_DA8XX_GPIO0,
- .end = IRQ_DA8XX_GPIO0,
+ .start = DAVINCI_INTC_IRQ(IRQ_DA8XX_GPIO0),
+ .end = DAVINCI_INTC_IRQ(IRQ_DA8XX_GPIO0),
.flags = IORESOURCE_IRQ,
},
{
- .start = IRQ_DA8XX_GPIO1,
- .end = IRQ_DA8XX_GPIO1,
+ .start = DAVINCI_INTC_IRQ(IRQ_DA8XX_GPIO1),
+ .end = DAVINCI_INTC_IRQ(IRQ_DA8XX_GPIO1),
.flags = IORESOURCE_IRQ,
},
{
- .start = IRQ_DA8XX_GPIO2,
- .end = IRQ_DA8XX_GPIO2,
+ .start = DAVINCI_INTC_IRQ(IRQ_DA8XX_GPIO2),
+ .end = DAVINCI_INTC_IRQ(IRQ_DA8XX_GPIO2),
.flags = IORESOURCE_IRQ,
},
{
- .start = IRQ_DA8XX_GPIO3,
- .end = IRQ_DA8XX_GPIO3,
+ .start = DAVINCI_INTC_IRQ(IRQ_DA8XX_GPIO3),
+ .end = DAVINCI_INTC_IRQ(IRQ_DA8XX_GPIO3),
.flags = IORESOURCE_IRQ,
},
{
- .start = IRQ_DA8XX_GPIO4,
- .end = IRQ_DA8XX_GPIO4,
+ .start = DAVINCI_INTC_IRQ(IRQ_DA8XX_GPIO4),
+ .end = DAVINCI_INTC_IRQ(IRQ_DA8XX_GPIO4),
.flags = IORESOURCE_IRQ,
},
{
- .start = IRQ_DA8XX_GPIO5,
- .end = IRQ_DA8XX_GPIO5,
+ .start = DAVINCI_INTC_IRQ(IRQ_DA8XX_GPIO5),
+ .end = DAVINCI_INTC_IRQ(IRQ_DA8XX_GPIO5),
.flags = IORESOURCE_IRQ,
},
{
- .start = IRQ_DA8XX_GPIO6,
- .end = IRQ_DA8XX_GPIO6,
+ .start = DAVINCI_INTC_IRQ(IRQ_DA8XX_GPIO6),
+ .end = DAVINCI_INTC_IRQ(IRQ_DA8XX_GPIO6),
.flags = IORESOURCE_IRQ,
},
{
- .start = IRQ_DA8XX_GPIO7,
- .end = IRQ_DA8XX_GPIO7,
+ .start = DAVINCI_INTC_IRQ(IRQ_DA8XX_GPIO7),
+ .end = DAVINCI_INTC_IRQ(IRQ_DA8XX_GPIO7),
.flags = IORESOURCE_IRQ,
},
{
- .start = IRQ_DA8XX_GPIO8,
- .end = IRQ_DA8XX_GPIO8,
+ .start = DAVINCI_INTC_IRQ(IRQ_DA8XX_GPIO8),
+ .end = DAVINCI_INTC_IRQ(IRQ_DA8XX_GPIO8),
.flags = IORESOURCE_IRQ,
},
};
@@ -766,8 +766,8 @@ static struct resource da8xx_mmcsd0_resources[] = {
.flags = IORESOURCE_MEM,
},
{ /* interrupt */
- .start = IRQ_DA8XX_MMCSDINT0,
- .end = IRQ_DA8XX_MMCSDINT0,
+ .start = DAVINCI_INTC_IRQ(IRQ_DA8XX_MMCSDINT0),
+ .end = DAVINCI_INTC_IRQ(IRQ_DA8XX_MMCSDINT0),
.flags = IORESOURCE_IRQ,
},
};
@@ -793,8 +793,8 @@ static struct resource da850_mmcsd1_resources[] = {
.flags = IORESOURCE_MEM,
},
{ /* interrupt */
- .start = IRQ_DA850_MMCSDINT0_1,
- .end = IRQ_DA850_MMCSDINT0_1,
+ .start = DAVINCI_INTC_IRQ(IRQ_DA850_MMCSDINT0_1),
+ .end = DAVINCI_INTC_IRQ(IRQ_DA850_MMCSDINT0_1),
.flags = IORESOURCE_IRQ,
},
};
@@ -845,8 +845,8 @@ static struct resource da8xx_rproc_resources[] = {
.flags = IORESOURCE_MEM,
},
{ /* dsp irq */
- .start = IRQ_DA8XX_CHIPINT0,
- .end = IRQ_DA8XX_CHIPINT0,
+ .start = DAVINCI_INTC_IRQ(IRQ_DA8XX_CHIPINT0),
+ .end = DAVINCI_INTC_IRQ(IRQ_DA8XX_CHIPINT0),
.flags = IORESOURCE_IRQ,
},
};
@@ -936,13 +936,13 @@ static struct resource da8xx_rtc_resources[] = {
.flags = IORESOURCE_MEM,
},
{ /* timer irq */
- .start = IRQ_DA8XX_RTC,
- .end = IRQ_DA8XX_RTC,
+ .start = DAVINCI_INTC_IRQ(IRQ_DA8XX_RTC),
+ .end = DAVINCI_INTC_IRQ(IRQ_DA8XX_RTC),
.flags = IORESOURCE_IRQ,
},
{ /* alarm irq */
- .start = IRQ_DA8XX_RTC,
- .end = IRQ_DA8XX_RTC,
+ .start = DAVINCI_INTC_IRQ(IRQ_DA8XX_RTC),
+ .end = DAVINCI_INTC_IRQ(IRQ_DA8XX_RTC),
.flags = IORESOURCE_IRQ,
},
};
@@ -1009,8 +1009,8 @@ static struct resource da8xx_spi0_resources[] = {
.flags = IORESOURCE_MEM,
},
[1] = {
- .start = IRQ_DA8XX_SPINT0,
- .end = IRQ_DA8XX_SPINT0,
+ .start = DAVINCI_INTC_IRQ(IRQ_DA8XX_SPINT0),
+ .end = DAVINCI_INTC_IRQ(IRQ_DA8XX_SPINT0),
.flags = IORESOURCE_IRQ,
},
};
@@ -1022,8 +1022,8 @@ static struct resource da8xx_spi1_resources[] = {
.flags = IORESOURCE_MEM,
},
[1] = {
- .start = IRQ_DA8XX_SPINT1,
- .end = IRQ_DA8XX_SPINT1,
+ .start = DAVINCI_INTC_IRQ(IRQ_DA8XX_SPINT1),
+ .end = DAVINCI_INTC_IRQ(IRQ_DA8XX_SPINT1),
.flags = IORESOURCE_IRQ,
},
};
@@ -1103,7 +1103,7 @@ static struct resource da850_sata_resources[] = {
.flags = IORESOURCE_MEM,
},
{
- .start = IRQ_DA850_SATAINT,
+ .start = DAVINCI_INTC_IRQ(IRQ_DA850_SATAINT),
.flags = IORESOURCE_IRQ,
},
};
diff --git a/arch/arm/mach-davinci/devices.c b/arch/arm/mach-davinci/devices.c
index e8dbbb7479ab..722c463f9b18 100644
--- a/arch/arm/mach-davinci/devices.c
+++ b/arch/arm/mach-davinci/devices.c
@@ -56,7 +56,7 @@ static struct resource i2c_resources[] = {
.flags = IORESOURCE_MEM,
},
{
- .start = IRQ_I2C,
+ .start = DAVINCI_INTC_IRQ(IRQ_I2C),
.flags = IORESOURCE_IRQ,
},
};
@@ -84,8 +84,8 @@ static struct resource ide_resources[] = {
.flags = IORESOURCE_MEM,
},
{
- .start = IRQ_IDE,
- .end = IRQ_IDE,
+ .start = DAVINCI_INTC_IRQ(IRQ_IDE),
+ .end = DAVINCI_INTC_IRQ(IRQ_IDE),
.flags = IORESOURCE_IRQ,
},
};
@@ -133,11 +133,11 @@ static struct resource mmcsd0_resources[] = {
},
/* IRQs: MMC/SD, then SDIO */
{
- .start = IRQ_MMCINT,
+ .start = DAVINCI_INTC_IRQ(IRQ_MMCINT),
.flags = IORESOURCE_IRQ,
}, {
/* different on dm355 */
- .start = IRQ_SDIOINT,
+ .start = DAVINCI_INTC_IRQ(IRQ_SDIOINT),
.flags = IORESOURCE_IRQ,
},
};
@@ -163,10 +163,10 @@ static struct resource mmcsd1_resources[] = {
},
/* IRQs: MMC/SD, then SDIO */
{
- .start = IRQ_DM355_MMCINT1,
+ .start = DAVINCI_INTC_IRQ(IRQ_DM355_MMCINT1),
.flags = IORESOURCE_IRQ,
}, {
- .start = IRQ_DM355_SDIOINT1,
+ .start = DAVINCI_INTC_IRQ(IRQ_DM355_SDIOINT1),
.flags = IORESOURCE_IRQ,
},
};
@@ -219,7 +219,8 @@ void __init davinci_setup_mmc(int module, struct davinci_mmc_config *config)
mmcsd1_resources[0].start = DM365_MMCSD1_BASE;
mmcsd1_resources[0].end = DM365_MMCSD1_BASE +
SZ_4K - 1;
- mmcsd1_resources[2].start = IRQ_DM365_SDIOINT1;
+ mmcsd1_resources[2].start = DAVINCI_INTC_IRQ(
+ IRQ_DM365_SDIOINT1);
davinci_mmcsd1_device.name = "da830-mmc";
} else
break;
@@ -230,7 +231,8 @@ void __init davinci_setup_mmc(int module, struct davinci_mmc_config *config)
if (cpu_is_davinci_dm355()) {
mmcsd0_resources[0].start = DM355_MMCSD0_BASE;
mmcsd0_resources[0].end = DM355_MMCSD0_BASE + SZ_4K - 1;
- mmcsd0_resources[2].start = IRQ_DM355_SDIOINT0;
+ mmcsd0_resources[2].start = DAVINCI_INTC_IRQ(
+ IRQ_DM355_SDIOINT0);
/* expose all 6 MMC0 signals: CLK, CMD, DATA[0..3] */
davinci_cfg_reg(DM355_MMCSD0);
@@ -241,7 +243,8 @@ void __init davinci_setup_mmc(int module, struct davinci_mmc_config *config)
mmcsd0_resources[0].start = DM365_MMCSD0_BASE;
mmcsd0_resources[0].end = DM365_MMCSD0_BASE +
SZ_4K - 1;
- mmcsd0_resources[2].start = IRQ_DM365_SDIOINT0;
+ mmcsd0_resources[2].start = DAVINCI_INTC_IRQ(
+ IRQ_DM365_SDIOINT0);
davinci_mmcsd0_device.name = "da830-mmc";
} else if (cpu_is_davinci_dm644x()) {
/* REVISIT: should this be in board-init code? */
@@ -313,13 +316,13 @@ int davinci_gpio_register(struct resource *res, int size, void *pdata)
struct davinci_timer_instance davinci_timer_instance[2] = {
{
.base = DAVINCI_TIMER0_BASE,
- .bottom_irq = IRQ_TINT0_TINT12,
- .top_irq = IRQ_TINT0_TINT34,
+ .bottom_irq = DAVINCI_INTC_IRQ(IRQ_TINT0_TINT12),
+ .top_irq = DAVINCI_INTC_IRQ(IRQ_TINT0_TINT34),
},
{
.base = DAVINCI_TIMER1_BASE,
- .bottom_irq = IRQ_TINT1_TINT12,
- .top_irq = IRQ_TINT1_TINT34,
+ .bottom_irq = DAVINCI_INTC_IRQ(IRQ_TINT1_TINT12),
+ .top_irq = DAVINCI_INTC_IRQ(IRQ_TINT1_TINT34),
},
};
diff --git a/arch/arm/mach-davinci/dm355.c b/arch/arm/mach-davinci/dm355.c
index 03ce5df28d87..cb725244fa13 100644
--- a/arch/arm/mach-davinci/dm355.c
+++ b/arch/arm/mach-davinci/dm355.c
@@ -53,7 +53,7 @@ static struct resource dm355_spi0_resources[] = {
.flags = IORESOURCE_MEM,
},
{
- .start = IRQ_DM355_SPINT0_0,
+ .start = DAVINCI_INTC_IRQ(IRQ_DM355_SPINT0_0),
.flags = IORESOURCE_IRQ,
},
};
@@ -273,12 +273,12 @@ static struct resource edma_resources[] = {
},
{
.name = "edma3_ccint",
- .start = IRQ_CCINT0,
+ .start = DAVINCI_INTC_IRQ(IRQ_CCINT0),
.flags = IORESOURCE_IRQ,
},
{
.name = "edma3_ccerrint",
- .start = IRQ_CCERRINT,
+ .start = DAVINCI_INTC_IRQ(IRQ_CCERRINT),
.flags = IORESOURCE_IRQ,
},
/* not using (or muxing) TC*_ERR */
@@ -358,13 +358,13 @@ static struct platform_device dm355_vpss_device = {
static struct resource vpfe_resources[] = {
{
- .start = IRQ_VDINT0,
- .end = IRQ_VDINT0,
+ .start = DAVINCI_INTC_IRQ(IRQ_VDINT0),
+ .end = DAVINCI_INTC_IRQ(IRQ_VDINT0),
.flags = IORESOURCE_IRQ,
},
{
- .start = IRQ_VDINT1,
- .end = IRQ_VDINT1,
+ .start = DAVINCI_INTC_IRQ(IRQ_VDINT1),
+ .end = DAVINCI_INTC_IRQ(IRQ_VDINT1),
.flags = IORESOURCE_IRQ,
},
};
@@ -422,8 +422,8 @@ static struct platform_device dm355_osd_dev = {
static struct resource dm355_venc_resources[] = {
{
- .start = IRQ_VENCINT,
- .end = IRQ_VENCINT,
+ .start = DAVINCI_INTC_IRQ(IRQ_VENCINT),
+ .end = DAVINCI_INTC_IRQ(IRQ_VENCINT),
.flags = IORESOURCE_IRQ,
},
/* venc registers io space */
@@ -442,8 +442,8 @@ static struct resource dm355_venc_resources[] = {
static struct resource dm355_v4l2_disp_resources[] = {
{
- .start = IRQ_VENCINT,
- .end = IRQ_VENCINT,
+ .start = DAVINCI_INTC_IRQ(IRQ_VENCINT),
+ .end = DAVINCI_INTC_IRQ(IRQ_VENCINT),
.flags = IORESOURCE_IRQ,
},
/* venc registers io space */
@@ -547,38 +547,38 @@ static struct resource dm355_gpio_resources[] = {
.flags = IORESOURCE_MEM,
},
{ /* interrupt */
- .start = IRQ_DM355_GPIOBNK0,
- .end = IRQ_DM355_GPIOBNK0,
+ .start = DAVINCI_INTC_IRQ(IRQ_DM355_GPIOBNK0),
+ .end = DAVINCI_INTC_IRQ(IRQ_DM355_GPIOBNK0),
.flags = IORESOURCE_IRQ,
},
{
- .start = IRQ_DM355_GPIOBNK1,
- .end = IRQ_DM355_GPIOBNK1,
+ .start = DAVINCI_INTC_IRQ(IRQ_DM355_GPIOBNK1),
+ .end = DAVINCI_INTC_IRQ(IRQ_DM355_GPIOBNK1),
.flags = IORESOURCE_IRQ,
},
{
- .start = IRQ_DM355_GPIOBNK2,
- .end = IRQ_DM355_GPIOBNK2,
+ .start = DAVINCI_INTC_IRQ(IRQ_DM355_GPIOBNK2),
+ .end = DAVINCI_INTC_IRQ(IRQ_DM355_GPIOBNK2),
.flags = IORESOURCE_IRQ,
},
{
- .start = IRQ_DM355_GPIOBNK3,
- .end = IRQ_DM355_GPIOBNK3,
+ .start = DAVINCI_INTC_IRQ(IRQ_DM355_GPIOBNK3),
+ .end = DAVINCI_INTC_IRQ(IRQ_DM355_GPIOBNK3),
.flags = IORESOURCE_IRQ,
},
{
- .start = IRQ_DM355_GPIOBNK4,
- .end = IRQ_DM355_GPIOBNK4,
+ .start = DAVINCI_INTC_IRQ(IRQ_DM355_GPIOBNK4),
+ .end = DAVINCI_INTC_IRQ(IRQ_DM355_GPIOBNK4),
.flags = IORESOURCE_IRQ,
},
{
- .start = IRQ_DM355_GPIOBNK5,
- .end = IRQ_DM355_GPIOBNK5,
+ .start = DAVINCI_INTC_IRQ(IRQ_DM355_GPIOBNK5),
+ .end = DAVINCI_INTC_IRQ(IRQ_DM355_GPIOBNK5),
.flags = IORESOURCE_IRQ,
},
{
- .start = IRQ_DM355_GPIOBNK6,
- .end = IRQ_DM355_GPIOBNK6,
+ .start = DAVINCI_INTC_IRQ(IRQ_DM355_GPIOBNK6),
+ .end = DAVINCI_INTC_IRQ(IRQ_DM355_GPIOBNK6),
.flags = IORESOURCE_IRQ,
},
};
@@ -632,7 +632,7 @@ static struct davinci_timer_info dm355_timer_info = {
static struct plat_serial8250_port dm355_serial0_platform_data[] = {
{
.mapbase = DAVINCI_UART0_BASE,
- .irq = IRQ_UARTINT0,
+ .irq = DAVINCI_INTC_IRQ(IRQ_UARTINT0),
.flags = UPF_BOOT_AUTOCONF | UPF_SKIP_TEST |
UPF_IOREMAP,
.iotype = UPIO_MEM,
@@ -645,7 +645,7 @@ static struct plat_serial8250_port dm355_serial0_platform_data[] = {
static struct plat_serial8250_port dm355_serial1_platform_data[] = {
{
.mapbase = DAVINCI_UART1_BASE,
- .irq = IRQ_UARTINT1,
+ .irq = DAVINCI_INTC_IRQ(IRQ_UARTINT1),
.flags = UPF_BOOT_AUTOCONF | UPF_SKIP_TEST |
UPF_IOREMAP,
.iotype = UPIO_MEM,
@@ -658,7 +658,7 @@ static struct plat_serial8250_port dm355_serial1_platform_data[] = {
static struct plat_serial8250_port dm355_serial2_platform_data[] = {
{
.mapbase = DM355_UART2_BASE,
- .irq = IRQ_DM355_UARTINT2,
+ .irq = DAVINCI_INTC_IRQ(IRQ_DM355_UARTINT2),
.flags = UPF_BOOT_AUTOCONF | UPF_SKIP_TEST |
UPF_IOREMAP,
.iotype = UPIO_MEM,
diff --git a/arch/arm/mach-davinci/dm365.c b/arch/arm/mach-davinci/dm365.c
index 3e034f0478d2..ae1b53ea956a 100644
--- a/arch/arm/mach-davinci/dm365.c
+++ b/arch/arm/mach-davinci/dm365.c
@@ -224,7 +224,7 @@ static struct resource dm365_spi0_resources[] = {
.flags = IORESOURCE_MEM,
},
{
- .start = IRQ_DM365_SPIINT0_0,
+ .start = DAVINCI_INTC_IRQ(IRQ_DM365_SPIINT0_0),
.flags = IORESOURCE_IRQ,
},
};
@@ -266,43 +266,43 @@ static struct resource dm365_gpio_resources[] = {
.flags = IORESOURCE_MEM,
},
{ /* interrupt */
- .start = IRQ_DM365_GPIO0,
- .end = IRQ_DM365_GPIO0,
+ .start = DAVINCI_INTC_IRQ(IRQ_DM365_GPIO0),
+ .end = DAVINCI_INTC_IRQ(IRQ_DM365_GPIO0),
.flags = IORESOURCE_IRQ,
},
{
- .start = IRQ_DM365_GPIO1,
- .end = IRQ_DM365_GPIO1,
+ .start = DAVINCI_INTC_IRQ(IRQ_DM365_GPIO1),
+ .end = DAVINCI_INTC_IRQ(IRQ_DM365_GPIO1),
.flags = IORESOURCE_IRQ,
},
{
- .start = IRQ_DM365_GPIO2,
- .end = IRQ_DM365_GPIO2,
+ .start = DAVINCI_INTC_IRQ(IRQ_DM365_GPIO2),
+ .end = DAVINCI_INTC_IRQ(IRQ_DM365_GPIO2),
.flags = IORESOURCE_IRQ,
},
{
- .start = IRQ_DM365_GPIO3,
- .end = IRQ_DM365_GPIO3,
+ .start = DAVINCI_INTC_IRQ(IRQ_DM365_GPIO3),
+ .end = DAVINCI_INTC_IRQ(IRQ_DM365_GPIO3),
.flags = IORESOURCE_IRQ,
},
{
- .start = IRQ_DM365_GPIO4,
- .end = IRQ_DM365_GPIO4,
+ .start = DAVINCI_INTC_IRQ(IRQ_DM365_GPIO4),
+ .end = DAVINCI_INTC_IRQ(IRQ_DM365_GPIO4),
.flags = IORESOURCE_IRQ,
},
{
- .start = IRQ_DM365_GPIO5,
- .end = IRQ_DM365_GPIO5,
+ .start = DAVINCI_INTC_IRQ(IRQ_DM365_GPIO5),
+ .end = DAVINCI_INTC_IRQ(IRQ_DM365_GPIO5),
.flags = IORESOURCE_IRQ,
},
{
- .start = IRQ_DM365_GPIO6,
- .end = IRQ_DM365_GPIO6,
+ .start = DAVINCI_INTC_IRQ(IRQ_DM365_GPIO6),
+ .end = DAVINCI_INTC_IRQ(IRQ_DM365_GPIO6),
.flags = IORESOURCE_IRQ,
},
{
- .start = IRQ_DM365_GPIO7,
- .end = IRQ_DM365_GPIO7,
+ .start = DAVINCI_INTC_IRQ(IRQ_DM365_GPIO7),
+ .end = DAVINCI_INTC_IRQ(IRQ_DM365_GPIO7),
.flags = IORESOURCE_IRQ,
},
};
@@ -336,23 +336,23 @@ static struct resource dm365_emac_resources[] = {
.flags = IORESOURCE_MEM,
},
{
- .start = IRQ_DM365_EMAC_RXTHRESH,
- .end = IRQ_DM365_EMAC_RXTHRESH,
+ .start = DAVINCI_INTC_IRQ(IRQ_DM365_EMAC_RXTHRESH),
+ .end = DAVINCI_INTC_IRQ(IRQ_DM365_EMAC_RXTHRESH),
.flags = IORESOURCE_IRQ,
},
{
- .start = IRQ_DM365_EMAC_RXPULSE,
- .end = IRQ_DM365_EMAC_RXPULSE,
+ .start = DAVINCI_INTC_IRQ(IRQ_DM365_EMAC_RXPULSE),
+ .end = DAVINCI_INTC_IRQ(IRQ_DM365_EMAC_RXPULSE),
.flags = IORESOURCE_IRQ,
},
{
- .start = IRQ_DM365_EMAC_TXPULSE,
- .end = IRQ_DM365_EMAC_TXPULSE,
+ .start = DAVINCI_INTC_IRQ(IRQ_DM365_EMAC_TXPULSE),
+ .end = DAVINCI_INTC_IRQ(IRQ_DM365_EMAC_TXPULSE),
.flags = IORESOURCE_IRQ,
},
{
- .start = IRQ_DM365_EMAC_MISCPULSE,
- .end = IRQ_DM365_EMAC_MISCPULSE,
+ .start = DAVINCI_INTC_IRQ(IRQ_DM365_EMAC_MISCPULSE),
+ .end = DAVINCI_INTC_IRQ(IRQ_DM365_EMAC_MISCPULSE),
.flags = IORESOURCE_IRQ,
},
};
@@ -518,12 +518,12 @@ static struct resource edma_resources[] = {
},
{
.name = "edma3_ccint",
- .start = IRQ_CCINT0,
+ .start = DAVINCI_INTC_IRQ(IRQ_CCINT0),
.flags = IORESOURCE_IRQ,
},
{
.name = "edma3_ccerrint",
- .start = IRQ_CCERRINT,
+ .start = DAVINCI_INTC_IRQ(IRQ_CCERRINT),
.flags = IORESOURCE_IRQ,
},
/* not using TC*_ERR */
@@ -597,7 +597,7 @@ static struct resource dm365_rtc_resources[] = {
.flags = IORESOURCE_MEM,
},
{
- .start = IRQ_DM365_RTCINT,
+ .start = DAVINCI_INTC_IRQ(IRQ_DM365_RTCINT),
.flags = IORESOURCE_IRQ,
},
};
@@ -627,8 +627,8 @@ static struct resource dm365_ks_resources[] = {
},
{
/* interrupt */
- .start = IRQ_DM365_KEYINT,
- .end = IRQ_DM365_KEYINT,
+ .start = DAVINCI_INTC_IRQ(IRQ_DM365_KEYINT),
+ .end = DAVINCI_INTC_IRQ(IRQ_DM365_KEYINT),
.flags = IORESOURCE_IRQ,
},
};
@@ -669,7 +669,7 @@ static struct davinci_timer_info dm365_timer_info = {
static struct plat_serial8250_port dm365_serial0_platform_data[] = {
{
.mapbase = DAVINCI_UART0_BASE,
- .irq = IRQ_UARTINT0,
+ .irq = DAVINCI_INTC_IRQ(IRQ_UARTINT0),
.flags = UPF_BOOT_AUTOCONF | UPF_SKIP_TEST |
UPF_IOREMAP,
.iotype = UPIO_MEM,
@@ -682,7 +682,7 @@ static struct plat_serial8250_port dm365_serial0_platform_data[] = {
static struct plat_serial8250_port dm365_serial1_platform_data[] = {
{
.mapbase = DM365_UART1_BASE,
- .irq = IRQ_UARTINT1,
+ .irq = DAVINCI_INTC_IRQ(IRQ_UARTINT1),
.flags = UPF_BOOT_AUTOCONF | UPF_SKIP_TEST |
UPF_IOREMAP,
.iotype = UPIO_MEM,
@@ -821,13 +821,13 @@ static struct platform_device dm365_vpss_device = {
static struct resource vpfe_resources[] = {
{
- .start = IRQ_VDINT0,
- .end = IRQ_VDINT0,
+ .start = DAVINCI_INTC_IRQ(IRQ_VDINT0),
+ .end = DAVINCI_INTC_IRQ(IRQ_VDINT0),
.flags = IORESOURCE_IRQ,
},
{
- .start = IRQ_VDINT1,
- .end = IRQ_VDINT1,
+ .start = DAVINCI_INTC_IRQ(IRQ_VDINT1),
+ .end = DAVINCI_INTC_IRQ(IRQ_VDINT1),
.flags = IORESOURCE_IRQ,
},
};
@@ -908,8 +908,8 @@ static struct platform_device dm365_osd_dev = {
static struct resource dm365_venc_resources[] = {
{
- .start = IRQ_VENCINT,
- .end = IRQ_VENCINT,
+ .start = DAVINCI_INTC_IRQ(IRQ_VENCINT),
+ .end = DAVINCI_INTC_IRQ(IRQ_VENCINT),
.flags = IORESOURCE_IRQ,
},
/* venc registers io space */
@@ -928,8 +928,8 @@ static struct resource dm365_venc_resources[] = {
static struct resource dm365_v4l2_disp_resources[] = {
{
- .start = IRQ_VENCINT,
- .end = IRQ_VENCINT,
+ .start = DAVINCI_INTC_IRQ(IRQ_VENCINT),
+ .end = DAVINCI_INTC_IRQ(IRQ_VENCINT),
.flags = IORESOURCE_IRQ,
},
/* venc registers io space */
diff --git a/arch/arm/mach-davinci/dm644x.c b/arch/arm/mach-davinci/dm644x.c
index 66bab4782c62..5ccb49196a71 100644
--- a/arch/arm/mach-davinci/dm644x.c
+++ b/arch/arm/mach-davinci/dm644x.c
@@ -59,8 +59,8 @@ static struct resource dm644x_emac_resources[] = {
.flags = IORESOURCE_MEM,
},
{
- .start = IRQ_EMACINT,
- .end = IRQ_EMACINT,
+ .start = DAVINCI_INTC_IRQ(IRQ_EMACINT),
+ .end = DAVINCI_INTC_IRQ(IRQ_EMACINT),
.flags = IORESOURCE_IRQ,
},
};
@@ -260,12 +260,12 @@ static struct resource edma_resources[] = {
},
{
.name = "edma3_ccint",
- .start = IRQ_CCINT0,
+ .start = DAVINCI_INTC_IRQ(IRQ_CCINT0),
.flags = IORESOURCE_IRQ,
},
{
.name = "edma3_ccerrint",
- .start = IRQ_CCERRINT,
+ .start = DAVINCI_INTC_IRQ(IRQ_CCERRINT),
.flags = IORESOURCE_IRQ,
},
/* not using TC*_ERR */
@@ -330,13 +330,13 @@ static struct platform_device dm644x_vpss_device = {
static struct resource dm644x_vpfe_resources[] = {
{
- .start = IRQ_VDINT0,
- .end = IRQ_VDINT0,
+ .start = DAVINCI_INTC_IRQ(IRQ_VDINT0),
+ .end = DAVINCI_INTC_IRQ(IRQ_VDINT0),
.flags = IORESOURCE_IRQ,
},
{
- .start = IRQ_VDINT1,
- .end = IRQ_VDINT1,
+ .start = DAVINCI_INTC_IRQ(IRQ_VDINT1),
+ .end = DAVINCI_INTC_IRQ(IRQ_VDINT1),
.flags = IORESOURCE_IRQ,
},
};
@@ -442,8 +442,8 @@ static int dm644x_venc_setup_clock(enum vpbe_enc_timings_type type,
static struct resource dm644x_v4l2_disp_resources[] = {
{
- .start = IRQ_VENCINT,
- .end = IRQ_VENCINT,
+ .start = DAVINCI_INTC_IRQ(IRQ_VENCINT),
+ .end = DAVINCI_INTC_IRQ(IRQ_VENCINT),
.flags = IORESOURCE_IRQ,
},
};
@@ -491,28 +491,28 @@ static struct resource dm644_gpio_resources[] = {
.flags = IORESOURCE_MEM,
},
{ /* interrupt */
- .start = IRQ_GPIOBNK0,
- .end = IRQ_GPIOBNK0,
+ .start = DAVINCI_INTC_IRQ(IRQ_GPIOBNK0),
+ .end = DAVINCI_INTC_IRQ(IRQ_GPIOBNK0),
.flags = IORESOURCE_IRQ,
},
{
- .start = IRQ_GPIOBNK1,
- .end = IRQ_GPIOBNK1,
+ .start = DAVINCI_INTC_IRQ(IRQ_GPIOBNK1),
+ .end = DAVINCI_INTC_IRQ(IRQ_GPIOBNK1),
.flags = IORESOURCE_IRQ,
},
{
- .start = IRQ_GPIOBNK2,
- .end = IRQ_GPIOBNK2,
+ .start = DAVINCI_INTC_IRQ(IRQ_GPIOBNK2),
+ .end = DAVINCI_INTC_IRQ(IRQ_GPIOBNK2),
.flags = IORESOURCE_IRQ,
},
{
- .start = IRQ_GPIOBNK3,
- .end = IRQ_GPIOBNK3,
+ .start = DAVINCI_INTC_IRQ(IRQ_GPIOBNK3),
+ .end = DAVINCI_INTC_IRQ(IRQ_GPIOBNK3),
.flags = IORESOURCE_IRQ,
},
{
- .start = IRQ_GPIOBNK4,
- .end = IRQ_GPIOBNK4,
+ .start = DAVINCI_INTC_IRQ(IRQ_GPIOBNK4),
+ .end = DAVINCI_INTC_IRQ(IRQ_GPIOBNK4),
.flags = IORESOURCE_IRQ,
},
};
@@ -573,7 +573,7 @@ static struct davinci_timer_info dm644x_timer_info = {
static struct plat_serial8250_port dm644x_serial0_platform_data[] = {
{
.mapbase = DAVINCI_UART0_BASE,
- .irq = IRQ_UARTINT0,
+ .irq = DAVINCI_INTC_IRQ(IRQ_UARTINT0),
.flags = UPF_BOOT_AUTOCONF | UPF_SKIP_TEST |
UPF_IOREMAP,
.iotype = UPIO_MEM,
@@ -586,7 +586,7 @@ static struct plat_serial8250_port dm644x_serial0_platform_data[] = {
static struct plat_serial8250_port dm644x_serial1_platform_data[] = {
{
.mapbase = DAVINCI_UART1_BASE,
- .irq = IRQ_UARTINT1,
+ .irq = DAVINCI_INTC_IRQ(IRQ_UARTINT1),
.flags = UPF_BOOT_AUTOCONF | UPF_SKIP_TEST |
UPF_IOREMAP,
.iotype = UPIO_MEM,
@@ -599,7 +599,7 @@ static struct plat_serial8250_port dm644x_serial1_platform_data[] = {
static struct plat_serial8250_port dm644x_serial2_platform_data[] = {
{
.mapbase = DAVINCI_UART2_BASE,
- .irq = IRQ_UARTINT2,
+ .irq = DAVINCI_INTC_IRQ(IRQ_UARTINT2),
.flags = UPF_BOOT_AUTOCONF | UPF_SKIP_TEST |
UPF_IOREMAP,
.iotype = UPIO_MEM,
diff --git a/arch/arm/mach-davinci/dm646x.c b/arch/arm/mach-davinci/dm646x.c
index 45efa715a2c1..2b55625e8fb5 100644
--- a/arch/arm/mach-davinci/dm646x.c
+++ b/arch/arm/mach-davinci/dm646x.c
@@ -62,23 +62,23 @@ static struct resource dm646x_emac_resources[] = {
.flags = IORESOURCE_MEM,
},
{
- .start = IRQ_DM646X_EMACRXTHINT,
- .end = IRQ_DM646X_EMACRXTHINT,
+ .start = DAVINCI_INTC_IRQ(IRQ_DM646X_EMACRXTHINT),
+ .end = DAVINCI_INTC_IRQ(IRQ_DM646X_EMACRXTHINT),
.flags = IORESOURCE_IRQ,
},
{
- .start = IRQ_DM646X_EMACRXINT,
- .end = IRQ_DM646X_EMACRXINT,
+ .start = DAVINCI_INTC_IRQ(IRQ_DM646X_EMACRXINT),
+ .end = DAVINCI_INTC_IRQ(IRQ_DM646X_EMACRXINT),
.flags = IORESOURCE_IRQ,
},
{
- .start = IRQ_DM646X_EMACTXINT,
- .end = IRQ_DM646X_EMACTXINT,
+ .start = DAVINCI_INTC_IRQ(IRQ_DM646X_EMACTXINT),
+ .end = DAVINCI_INTC_IRQ(IRQ_DM646X_EMACTXINT),
.flags = IORESOURCE_IRQ,
},
{
- .start = IRQ_DM646X_EMACMISCINT,
- .end = IRQ_DM646X_EMACMISCINT,
+ .start = DAVINCI_INTC_IRQ(IRQ_DM646X_EMACMISCINT),
+ .end = DAVINCI_INTC_IRQ(IRQ_DM646X_EMACMISCINT),
.flags = IORESOURCE_IRQ,
},
};
@@ -273,12 +273,12 @@ static struct resource edma_resources[] = {
},
{
.name = "edma3_ccint",
- .start = IRQ_CCINT0,
+ .start = DAVINCI_INTC_IRQ(IRQ_CCINT0),
.flags = IORESOURCE_IRQ,
},
{
.name = "edma3_ccerrint",
- .start = IRQ_CCERRINT,
+ .start = DAVINCI_INTC_IRQ(IRQ_CCERRINT),
.flags = IORESOURCE_IRQ,
},
/* not using TC*_ERR */
@@ -315,12 +315,12 @@ static struct resource dm646x_mcasp0_resources[] = {
},
{
.name = "tx",
- .start = IRQ_DM646X_MCASP0TXINT,
+ .start = DAVINCI_INTC_IRQ(IRQ_DM646X_MCASP0TXINT),
.flags = IORESOURCE_IRQ,
},
{
.name = "rx",
- .start = IRQ_DM646X_MCASP0RXINT,
+ .start = DAVINCI_INTC_IRQ(IRQ_DM646X_MCASP0RXINT),
.flags = IORESOURCE_IRQ,
},
};
@@ -341,7 +341,7 @@ static struct resource dm646x_mcasp1_resources[] = {
},
{
.name = "tx",
- .start = IRQ_DM646X_MCASP1TXINT,
+ .start = DAVINCI_INTC_IRQ(IRQ_DM646X_MCASP1TXINT),
.flags = IORESOURCE_IRQ,
},
};
@@ -388,13 +388,13 @@ static struct platform_device vpif_dev = {
static struct resource vpif_display_resource[] = {
{
- .start = IRQ_DM646X_VP_VERTINT2,
- .end = IRQ_DM646X_VP_VERTINT2,
+ .start = DAVINCI_INTC_IRQ(IRQ_DM646X_VP_VERTINT2),
+ .end = DAVINCI_INTC_IRQ(IRQ_DM646X_VP_VERTINT2),
.flags = IORESOURCE_IRQ,
},
{
- .start = IRQ_DM646X_VP_VERTINT3,
- .end = IRQ_DM646X_VP_VERTINT3,
+ .start = DAVINCI_INTC_IRQ(IRQ_DM646X_VP_VERTINT3),
+ .end = DAVINCI_INTC_IRQ(IRQ_DM646X_VP_VERTINT3),
.flags = IORESOURCE_IRQ,
},
};
@@ -412,13 +412,13 @@ static struct platform_device vpif_display_dev = {
static struct resource vpif_capture_resource[] = {
{
- .start = IRQ_DM646X_VP_VERTINT0,
- .end = IRQ_DM646X_VP_VERTINT0,
+ .start = DAVINCI_INTC_IRQ(IRQ_DM646X_VP_VERTINT0),
+ .end = DAVINCI_INTC_IRQ(IRQ_DM646X_VP_VERTINT0),
.flags = IORESOURCE_IRQ,
},
{
- .start = IRQ_DM646X_VP_VERTINT1,
- .end = IRQ_DM646X_VP_VERTINT1,
+ .start = DAVINCI_INTC_IRQ(IRQ_DM646X_VP_VERTINT1),
+ .end = DAVINCI_INTC_IRQ(IRQ_DM646X_VP_VERTINT1),
.flags = IORESOURCE_IRQ,
},
};
@@ -441,18 +441,18 @@ static struct resource dm646x_gpio_resources[] = {
.flags = IORESOURCE_MEM,
},
{ /* interrupt */
- .start = IRQ_DM646X_GPIOBNK0,
- .end = IRQ_DM646X_GPIOBNK0,
+ .start = DAVINCI_INTC_IRQ(IRQ_DM646X_GPIOBNK0),
+ .end = DAVINCI_INTC_IRQ(IRQ_DM646X_GPIOBNK0),
.flags = IORESOURCE_IRQ,
},
{
- .start = IRQ_DM646X_GPIOBNK1,
- .end = IRQ_DM646X_GPIOBNK1,
+ .start = DAVINCI_INTC_IRQ(IRQ_DM646X_GPIOBNK1),
+ .end = DAVINCI_INTC_IRQ(IRQ_DM646X_GPIOBNK1),
.flags = IORESOURCE_IRQ,
},
{
- .start = IRQ_DM646X_GPIOBNK2,
- .end = IRQ_DM646X_GPIOBNK2,
+ .start = DAVINCI_INTC_IRQ(IRQ_DM646X_GPIOBNK2),
+ .end = DAVINCI_INTC_IRQ(IRQ_DM646X_GPIOBNK2),
.flags = IORESOURCE_IRQ,
},
};
@@ -513,7 +513,7 @@ static struct davinci_timer_info dm646x_timer_info = {
static struct plat_serial8250_port dm646x_serial0_platform_data[] = {
{
.mapbase = DAVINCI_UART0_BASE,
- .irq = IRQ_UARTINT0,
+ .irq = DAVINCI_INTC_IRQ(IRQ_UARTINT0),
.flags = UPF_BOOT_AUTOCONF | UPF_SKIP_TEST |
UPF_IOREMAP,
.iotype = UPIO_MEM32,
@@ -526,7 +526,7 @@ static struct plat_serial8250_port dm646x_serial0_platform_data[] = {
static struct plat_serial8250_port dm646x_serial1_platform_data[] = {
{
.mapbase = DAVINCI_UART1_BASE,
- .irq = IRQ_UARTINT1,
+ .irq = DAVINCI_INTC_IRQ(IRQ_UARTINT1),
.flags = UPF_BOOT_AUTOCONF | UPF_SKIP_TEST |
UPF_IOREMAP,
.iotype = UPIO_MEM32,
@@ -539,7 +539,7 @@ static struct plat_serial8250_port dm646x_serial1_platform_data[] = {
static struct plat_serial8250_port dm646x_serial2_platform_data[] = {
{
.mapbase = DAVINCI_UART2_BASE,
- .irq = IRQ_DM646X_UARTINT2,
+ .irq = DAVINCI_INTC_IRQ(IRQ_DM646X_UARTINT2),
.flags = UPF_BOOT_AUTOCONF | UPF_SKIP_TEST |
UPF_IOREMAP,
.iotype = UPIO_MEM32,
diff --git a/arch/arm/mach-davinci/include/mach/common.h b/arch/arm/mach-davinci/include/mach/common.h
index 3d45b73b9a64..d840023eaaac 100644
--- a/arch/arm/mach-davinci/include/mach/common.h
+++ b/arch/arm/mach-davinci/include/mach/common.h
@@ -17,6 +17,9 @@
#include <linux/types.h>
#include <linux/reboot.h>
+#define DAVINCI_INTC_START 0
+#define DAVINCI_INTC_IRQ(_irqnum) (DAVINCI_INTC_START + (_irqnum))
+
void davinci_timer_init(struct clk *clk);
extern void davinci_irq_init(void);
diff --git a/arch/arm/mach-davinci/irq.c b/arch/arm/mach-davinci/irq.c
index 19f17ef04381..de31be42a394 100644
--- a/arch/arm/mach-davinci/irq.c
+++ b/arch/arm/mach-davinci/irq.c
@@ -154,6 +154,6 @@ void __init davinci_irq_init(void)
for (i = 0, j = 0; i < davinci_soc_info.intc_irq_num; i += 32, j += 0x04)
davinci_irq_setup_gc(davinci_intc_base + j, irq_base + i, 32);
- irq_set_handler(IRQ_TINT1_TINT34, handle_level_irq);
+ irq_set_handler(DAVINCI_INTC_IRQ(IRQ_TINT1_TINT34), handle_level_irq);
set_handle_irq(davinci_handle_irq);
}
diff --git a/arch/arm/mach-davinci/usb-da8xx.c b/arch/arm/mach-davinci/usb-da8xx.c
index c17ce66a3d95..2de5a04ffc24 100644
--- a/arch/arm/mach-davinci/usb-da8xx.c
+++ b/arch/arm/mach-davinci/usb-da8xx.c
@@ -70,7 +70,7 @@ static struct resource da8xx_usb20_resources[] = {
.flags = IORESOURCE_MEM,
},
{
- .start = IRQ_DA8XX_USB_INT,
+ .start = DAVINCI_INTC_IRQ(IRQ_DA8XX_USB_INT),
.flags = IORESOURCE_IRQ,
.name = "mc",
},
@@ -105,8 +105,8 @@ static struct resource da8xx_usb11_resources[] = {
.flags = IORESOURCE_MEM,
},
[1] = {
- .start = IRQ_DA8XX_IRQN,
- .end = IRQ_DA8XX_IRQN,
+ .start = DAVINCI_INTC_IRQ(IRQ_DA8XX_IRQN),
+ .end = DAVINCI_INTC_IRQ(IRQ_DA8XX_IRQN),
.flags = IORESOURCE_IRQ,
},
};
diff --git a/arch/arm/mach-davinci/usb.c b/arch/arm/mach-davinci/usb.c
index 31ed7aa47227..9d4a58a3113a 100644
--- a/arch/arm/mach-davinci/usb.c
+++ b/arch/arm/mach-davinci/usb.c
@@ -38,7 +38,7 @@ static struct resource usb_resources[] = {
.flags = IORESOURCE_MEM,
},
{
- .start = IRQ_USBINT,
+ .start = DAVINCI_INTC_IRQ(IRQ_USBINT),
.flags = IORESOURCE_IRQ,
.name = "mc"
},
@@ -70,8 +70,9 @@ void __init davinci_setup_usb(unsigned mA, unsigned potpgt_ms)
if (cpu_is_davinci_dm646x()) {
/* Override the defaults as DM6467 uses different IRQs. */
- usb_dev.resource[1].start = IRQ_DM646X_USBINT;
- usb_dev.resource[2].start = IRQ_DM646X_USBDMAINT;
+ usb_dev.resource[1].start = DAVINCI_INTC_IRQ(IRQ_DM646X_USBINT);
+ usb_dev.resource[2].start = DAVINCI_INTC_IRQ(
+ IRQ_DM646X_USBDMAINT);
} else /* other devices don't have dedicated CPPI IRQ */
usb_dev.num_resources = 2;
--
2.20.1
From: Bartosz Golaszewski <[email protected]>
We're going to extend the davinci_irq_init() function with a config
structure so we can drop the intc-related fields from davinci_soc_info.
Once we do it, we won't be able to use this routine directly as the
init_irq callback. Wrap the calls in additional helpers that don't
take parameters and can be assigned to init_irq.
Signed-off-by: Bartosz Golaszewski <[email protected]>
Reviewed-by: David Lechner <[email protected]>
---
arch/arm/mach-davinci/board-dm355-evm.c | 2 +-
arch/arm/mach-davinci/board-dm355-leopard.c | 2 +-
arch/arm/mach-davinci/board-dm365-evm.c | 2 +-
arch/arm/mach-davinci/board-dm644x-evm.c | 2 +-
arch/arm/mach-davinci/board-dm646x-evm.c | 4 ++--
arch/arm/mach-davinci/board-neuros-osd2.c | 2 +-
arch/arm/mach-davinci/board-sffsdr.c | 2 +-
arch/arm/mach-davinci/davinci.h | 4 ++++
arch/arm/mach-davinci/dm355.c | 5 +++++
arch/arm/mach-davinci/dm365.c | 5 +++++
arch/arm/mach-davinci/dm644x.c | 5 +++++
arch/arm/mach-davinci/dm646x.c | 5 +++++
12 files changed, 32 insertions(+), 8 deletions(-)
diff --git a/arch/arm/mach-davinci/board-dm355-evm.c b/arch/arm/mach-davinci/board-dm355-evm.c
index f7fa960c23e3..64d81fc86f14 100644
--- a/arch/arm/mach-davinci/board-dm355-evm.c
+++ b/arch/arm/mach-davinci/board-dm355-evm.c
@@ -438,7 +438,7 @@ static __init void dm355_evm_init(void)
MACHINE_START(DAVINCI_DM355_EVM, "DaVinci DM355 EVM")
.atag_offset = 0x100,
.map_io = dm355_evm_map_io,
- .init_irq = davinci_irq_init,
+ .init_irq = dm355_init_irq,
.init_time = dm355_init_time,
.init_machine = dm355_evm_init,
.init_late = davinci_init_late,
diff --git a/arch/arm/mach-davinci/board-dm355-leopard.c b/arch/arm/mach-davinci/board-dm355-leopard.c
index 0fdf1d03eb11..b9e9950dd300 100644
--- a/arch/arm/mach-davinci/board-dm355-leopard.c
+++ b/arch/arm/mach-davinci/board-dm355-leopard.c
@@ -273,7 +273,7 @@ static __init void dm355_leopard_init(void)
MACHINE_START(DM355_LEOPARD, "DaVinci DM355 leopard")
.atag_offset = 0x100,
.map_io = dm355_leopard_map_io,
- .init_irq = davinci_irq_init,
+ .init_irq = dm355_init_irq,
.init_time = dm355_init_time,
.init_machine = dm355_leopard_init,
.init_late = davinci_init_late,
diff --git a/arch/arm/mach-davinci/board-dm365-evm.c b/arch/arm/mach-davinci/board-dm365-evm.c
index e3b0b701e395..8a53e4c7944d 100644
--- a/arch/arm/mach-davinci/board-dm365-evm.c
+++ b/arch/arm/mach-davinci/board-dm365-evm.c
@@ -834,7 +834,7 @@ static __init void dm365_evm_init(void)
MACHINE_START(DAVINCI_DM365_EVM, "DaVinci DM365 EVM")
.atag_offset = 0x100,
.map_io = dm365_evm_map_io,
- .init_irq = davinci_irq_init,
+ .init_irq = dm365_init_irq,
.init_time = dm365_init_time,
.init_machine = dm365_evm_init,
.init_late = davinci_init_late,
diff --git a/arch/arm/mach-davinci/board-dm644x-evm.c b/arch/arm/mach-davinci/board-dm644x-evm.c
index a6bc48c9ecd9..e7a6e2d1fcd9 100644
--- a/arch/arm/mach-davinci/board-dm644x-evm.c
+++ b/arch/arm/mach-davinci/board-dm644x-evm.c
@@ -891,7 +891,7 @@ MACHINE_START(DAVINCI_EVM, "DaVinci DM644x EVM")
/* Maintainer: MontaVista Software <[email protected]> */
.atag_offset = 0x100,
.map_io = davinci_evm_map_io,
- .init_irq = davinci_irq_init,
+ .init_irq = dm644x_init_irq,
.init_time = dm644x_init_time,
.init_machine = davinci_evm_init,
.init_late = davinci_init_late,
diff --git a/arch/arm/mach-davinci/board-dm646x-evm.c b/arch/arm/mach-davinci/board-dm646x-evm.c
index 26c123f35350..21d92d3c10ec 100644
--- a/arch/arm/mach-davinci/board-dm646x-evm.c
+++ b/arch/arm/mach-davinci/board-dm646x-evm.c
@@ -864,7 +864,7 @@ static __init void evm_init(void)
MACHINE_START(DAVINCI_DM6467_EVM, "DaVinci DM646x EVM")
.atag_offset = 0x100,
.map_io = davinci_map_io,
- .init_irq = davinci_irq_init,
+ .init_irq = dm646x_init_irq,
.init_time = dm646x_evm_init_time,
.init_machine = evm_init,
.init_late = davinci_init_late,
@@ -874,7 +874,7 @@ MACHINE_END
MACHINE_START(DAVINCI_DM6467TEVM, "DaVinci DM6467T EVM")
.atag_offset = 0x100,
.map_io = davinci_map_io,
- .init_irq = davinci_irq_init,
+ .init_irq = dm646x_init_irq,
.init_time = dm6467t_evm_init_time,
.init_machine = evm_init,
.init_late = davinci_init_late,
diff --git a/arch/arm/mach-davinci/board-neuros-osd2.c b/arch/arm/mach-davinci/board-neuros-osd2.c
index efdaa27241c5..ce99f782811a 100644
--- a/arch/arm/mach-davinci/board-neuros-osd2.c
+++ b/arch/arm/mach-davinci/board-neuros-osd2.c
@@ -231,7 +231,7 @@ MACHINE_START(NEUROS_OSD2, "Neuros OSD2")
/* Maintainer: Neuros Technologies <[email protected]> */
.atag_offset = 0x100,
.map_io = davinci_ntosd2_map_io,
- .init_irq = davinci_irq_init,
+ .init_irq = dm644x_init_irq,
.init_time = dm644x_init_time,
.init_machine = davinci_ntosd2_init,
.init_late = davinci_init_late,
diff --git a/arch/arm/mach-davinci/board-sffsdr.c b/arch/arm/mach-davinci/board-sffsdr.c
index 792bb84d5011..91f594f96189 100644
--- a/arch/arm/mach-davinci/board-sffsdr.c
+++ b/arch/arm/mach-davinci/board-sffsdr.c
@@ -153,7 +153,7 @@ static __init void davinci_sffsdr_init(void)
MACHINE_START(SFFSDR, "Lyrtech SFFSDR")
.atag_offset = 0x100,
.map_io = davinci_sffsdr_map_io,
- .init_irq = davinci_irq_init,
+ .init_irq = dm644x_init_irq,
.init_time = dm644x_init_time,
.init_machine = davinci_sffsdr_init,
.init_late = davinci_init_late,
diff --git a/arch/arm/mach-davinci/davinci.h b/arch/arm/mach-davinci/davinci.h
index db4c95ef4d5c..56c1835c42e5 100644
--- a/arch/arm/mach-davinci/davinci.h
+++ b/arch/arm/mach-davinci/davinci.h
@@ -88,6 +88,7 @@ int davinci_init_wdt(void);
/* DM355 function declarations */
void dm355_init(void);
void dm355_init_time(void);
+void dm355_init_irq(void);
void dm355_register_clocks(void);
void dm355_init_spi0(unsigned chipselect_mask,
const struct spi_board_info *info, unsigned len);
@@ -97,6 +98,7 @@ int dm355_gpio_register(void);
/* DM365 function declarations */
void dm365_init(void);
+void dm365_init_irq(void);
void dm365_init_time(void);
void dm365_register_clocks(void);
void dm365_init_asp(void);
@@ -110,6 +112,7 @@ int dm365_gpio_register(void);
/* DM644x function declarations */
void dm644x_init(void);
+void dm644x_init_irq(void);
void dm644x_init_devices(void);
void dm644x_init_time(void);
void dm644x_register_clocks(void);
@@ -119,6 +122,7 @@ int dm644x_gpio_register(void);
/* DM646x function declarations */
void dm646x_init(void);
+void dm646x_init_irq(void);
void dm646x_init_time(unsigned long ref_clk_rate, unsigned long aux_clkin_rate);
void dm646x_register_clocks(void);
void dm646x_init_mcasp0(struct snd_platform_data *pdata);
diff --git a/arch/arm/mach-davinci/dm355.c b/arch/arm/mach-davinci/dm355.c
index b27ea4fc1d51..6c65699cb074 100644
--- a/arch/arm/mach-davinci/dm355.c
+++ b/arch/arm/mach-davinci/dm355.c
@@ -792,6 +792,11 @@ int __init dm355_init_video(struct vpfe_config *vpfe_cfg,
return 0;
}
+void __init dm355_init_irq(void)
+{
+ davinci_irq_init();
+}
+
static int __init dm355_init_devices(void)
{
struct platform_device *edma_pdev;
diff --git a/arch/arm/mach-davinci/dm365.c b/arch/arm/mach-davinci/dm365.c
index d9c6ab9215a6..e1c223c6031f 100644
--- a/arch/arm/mach-davinci/dm365.c
+++ b/arch/arm/mach-davinci/dm365.c
@@ -1051,6 +1051,11 @@ int __init dm365_init_video(struct vpfe_config *vpfe_cfg,
return 0;
}
+void __init dm365_init_irq(void)
+{
+ davinci_irq_init();
+}
+
static int __init dm365_init_devices(void)
{
struct platform_device *edma_pdev;
diff --git a/arch/arm/mach-davinci/dm644x.c b/arch/arm/mach-davinci/dm644x.c
index b2748c82b747..2b18c134ee15 100644
--- a/arch/arm/mach-davinci/dm644x.c
+++ b/arch/arm/mach-davinci/dm644x.c
@@ -728,6 +728,11 @@ int __init dm644x_init_video(struct vpfe_config *vpfe_cfg,
return 0;
}
+void __init dm644x_init_irq(void)
+{
+ davinci_irq_init();
+}
+
void __init dm644x_init_devices(void)
{
struct platform_device *edma_pdev;
diff --git a/arch/arm/mach-davinci/dm646x.c b/arch/arm/mach-davinci/dm646x.c
index cf210741dfe5..75a9f80317ca 100644
--- a/arch/arm/mach-davinci/dm646x.c
+++ b/arch/arm/mach-davinci/dm646x.c
@@ -689,6 +689,11 @@ void __init dm646x_register_clocks(void)
platform_device_register(&dm646x_pll2_device);
}
+void __init dm646x_init_irq(void)
+{
+ davinci_irq_init();
+}
+
static int __init dm646x_init_devices(void)
{
int ret = 0;
--
2.20.1
From: Bartosz Golaszewski <[email protected]>
The existence of irqs.h in mach-davinci/include/mach only makes sense
without SPARSE_IRQ as it's then expected to define NR_IRQS and is
included from asm/irq.h. As we now support SPARSE_IRQ, this header can
be moved to mach-davinci and used as the source of HW interrupt numbers.
While updating the includes in various files - also rearrange the
headers by directory (linux/asm/mach).
Signed-off-by: Bartosz Golaszewski <[email protected]>
---
arch/arm/mach-davinci/board-da830-evm.c | 5 +++--
arch/arm/mach-davinci/board-da850-evm.c | 5 +++--
arch/arm/mach-davinci/board-dm644x-evm.c | 7 ++++---
arch/arm/mach-davinci/board-dm646x-evm.c | 3 ++-
arch/arm/mach-davinci/da830.c | 2 +-
arch/arm/mach-davinci/da850.c | 2 +-
arch/arm/mach-davinci/devices-da8xx.c | 2 +-
arch/arm/mach-davinci/devices.c | 9 ++++-----
arch/arm/mach-davinci/dm355.c | 2 +-
arch/arm/mach-davinci/dm365.c | 2 +-
arch/arm/mach-davinci/dm644x.c | 2 +-
arch/arm/mach-davinci/dm646x.c | 2 +-
arch/arm/mach-davinci/irq.c | 3 ++-
arch/arm/mach-davinci/{include/mach => }/irqs.h | 0
arch/arm/mach-davinci/usb-da8xx.c | 3 ++-
arch/arm/mach-davinci/usb.c | 7 ++++---
16 files changed, 31 insertions(+), 25 deletions(-)
rename arch/arm/mach-davinci/{include/mach => }/irqs.h (100%)
diff --git a/arch/arm/mach-davinci/board-da830-evm.c b/arch/arm/mach-davinci/board-da830-evm.c
index 41f5a51fee9a..7b8c4aeca096 100644
--- a/arch/arm/mach-davinci/board-da830-evm.c
+++ b/arch/arm/mach-davinci/board-da830-evm.c
@@ -36,11 +36,12 @@
#include <asm/mach/arch.h>
#include <mach/common.h>
-#include <mach/irqs.h>
-#include "cp_intc.h"
#include <mach/mux.h>
#include <mach/da8xx.h>
+#include "cp_intc.h"
+#include "irqs.h"
+
#define DA830_EVM_PHY_ID ""
/*
* USB1 VBUS is controlled by GPIO1[15], over-current is reported on GPIO2[4].
diff --git a/arch/arm/mach-davinci/board-da850-evm.c b/arch/arm/mach-davinci/board-da850-evm.c
index 317f48560534..b0814bd30a1f 100644
--- a/arch/arm/mach-davinci/board-da850-evm.c
+++ b/arch/arm/mach-davinci/board-da850-evm.c
@@ -43,10 +43,11 @@
#include <linux/spi/flash.h>
#include <mach/common.h>
-#include "cp_intc.h"
#include <mach/da8xx.h>
#include <mach/mux.h>
-#include <mach/irqs.h>
+
+#include "cp_intc.h"
+#include "irqs.h"
#include "sram.h"
#include <asm/mach-types.h>
diff --git a/arch/arm/mach-davinci/board-dm644x-evm.c b/arch/arm/mach-davinci/board-dm644x-evm.c
index 16ffed2525e6..a6bc48c9ecd9 100644
--- a/arch/arm/mach-davinci/board-dm644x-evm.c
+++ b/arch/arm/mach-davinci/board-dm644x-evm.c
@@ -36,10 +36,10 @@
#include <asm/mach/arch.h>
#include <mach/common.h>
-#include <mach/irqs.h>
-#include <linux/platform_data/i2c-davinci.h>
-#include <mach/serial.h>
#include <mach/mux.h>
+#include <mach/serial.h>
+
+#include <linux/platform_data/i2c-davinci.h>
#include <linux/platform_data/mtd-davinci.h>
#include <linux/platform_data/mmc-davinci.h>
#include <linux/platform_data/usb-davinci.h>
@@ -47,6 +47,7 @@
#include <linux/platform_data/ti-aemif.h>
#include "davinci.h"
+#include "irqs.h"
#define DM644X_EVM_PHY_ID "davinci_mdio-0:01"
#define LXT971_PHY_ID (0x001378e2)
diff --git a/arch/arm/mach-davinci/board-dm646x-evm.c b/arch/arm/mach-davinci/board-dm646x-evm.c
index 8d5be6dd2019..26c123f35350 100644
--- a/arch/arm/mach-davinci/board-dm646x-evm.c
+++ b/arch/arm/mach-davinci/board-dm646x-evm.c
@@ -44,10 +44,11 @@
#include <asm/mach/arch.h>
#include <mach/common.h>
-#include <mach/irqs.h>
+
#include <mach/serial.h>
#include "davinci.h"
+#include "irqs.h"
#define NAND_BLOCK_SIZE SZ_128K
diff --git a/arch/arm/mach-davinci/da830.c b/arch/arm/mach-davinci/da830.c
index aa8da725a325..ca903c9105e4 100644
--- a/arch/arm/mach-davinci/da830.c
+++ b/arch/arm/mach-davinci/da830.c
@@ -19,9 +19,9 @@
#include <mach/common.h>
#include <mach/cputype.h>
#include <mach/da8xx.h>
-#include <mach/irqs.h>
#include <mach/time.h>
+#include "irqs.h"
#include "mux.h"
/* Offsets of the 8 compare registers on the da830 */
diff --git a/arch/arm/mach-davinci/da850.c b/arch/arm/mach-davinci/da850.c
index d22b19833326..486d53481636 100644
--- a/arch/arm/mach-davinci/da850.c
+++ b/arch/arm/mach-davinci/da850.c
@@ -32,10 +32,10 @@
#include <mach/cpufreq.h>
#include <mach/cputype.h>
#include <mach/da8xx.h>
-#include <mach/irqs.h>
#include <mach/pm.h>
#include <mach/time.h>
+#include "irqs.h"
#include "mux.h"
#define DA850_PLL1_BASE 0x01e1a000
diff --git a/arch/arm/mach-davinci/devices-da8xx.c b/arch/arm/mach-davinci/devices-da8xx.c
index 3104a3eb2ddf..b8dc674e06bc 100644
--- a/arch/arm/mach-davinci/devices-da8xx.c
+++ b/arch/arm/mach-davinci/devices-da8xx.c
@@ -25,10 +25,10 @@
#include <mach/cputype.h>
#include <mach/da8xx.h>
#include <mach/time.h>
-#include <mach/irqs.h>
#include "asp.h"
#include "cpuidle.h"
+#include "irqs.h"
#include "sram.h"
#define DA8XX_TPCC_BASE 0x01c00000
diff --git a/arch/arm/mach-davinci/devices.c b/arch/arm/mach-davinci/devices.c
index 722c463f9b18..40bd8029e457 100644
--- a/arch/arm/mach-davinci/devices.c
+++ b/arch/arm/mach-davinci/devices.c
@@ -11,21 +11,20 @@
#include <linux/init.h>
#include <linux/platform_device.h>
+#include <linux/platform_data/i2c-davinci.h>
+#include <linux/platform_data/mmc-davinci.h>
+#include <linux/platform_data/edma.h>
#include <linux/dma-mapping.h>
#include <linux/io.h>
#include <linux/reboot.h>
#include <mach/hardware.h>
-#include <linux/platform_data/i2c-davinci.h>
-#include <mach/irqs.h>
#include <mach/cputype.h>
#include <mach/mux.h>
-#include <linux/platform_data/mmc-davinci.h>
#include <mach/time.h>
-#include <linux/platform_data/edma.h>
-
#include "davinci.h"
+#include "irqs.h"
#define DAVINCI_I2C_BASE 0x01C21000
#define DAVINCI_ATA_BASE 0x01C66000
diff --git a/arch/arm/mach-davinci/dm355.c b/arch/arm/mach-davinci/dm355.c
index cb725244fa13..b27ea4fc1d51 100644
--- a/arch/arm/mach-davinci/dm355.c
+++ b/arch/arm/mach-davinci/dm355.c
@@ -26,13 +26,13 @@
#include <mach/common.h>
#include <mach/cputype.h>
-#include <mach/irqs.h>
#include <mach/mux.h>
#include <mach/serial.h>
#include <mach/time.h>
#include "asp.h"
#include "davinci.h"
+#include "irqs.h"
#include "mux.h"
#define DM355_UART2_BASE (IO_PHYS + 0x206000)
diff --git a/arch/arm/mach-davinci/dm365.c b/arch/arm/mach-davinci/dm365.c
index ae1b53ea956a..d9c6ab9215a6 100644
--- a/arch/arm/mach-davinci/dm365.c
+++ b/arch/arm/mach-davinci/dm365.c
@@ -31,13 +31,13 @@
#include <mach/common.h>
#include <mach/cputype.h>
-#include <mach/irqs.h>
#include <mach/mux.h>
#include <mach/serial.h>
#include <mach/time.h>
#include "asp.h"
#include "davinci.h"
+#include "irqs.h"
#include "mux.h"
#define DM365_REF_FREQ 24000000 /* 24 MHz on the DM365 EVM */
diff --git a/arch/arm/mach-davinci/dm644x.c b/arch/arm/mach-davinci/dm644x.c
index 5ccb49196a71..b2748c82b747 100644
--- a/arch/arm/mach-davinci/dm644x.c
+++ b/arch/arm/mach-davinci/dm644x.c
@@ -23,13 +23,13 @@
#include <mach/common.h>
#include <mach/cputype.h>
-#include <mach/irqs.h>
#include <mach/mux.h>
#include <mach/serial.h>
#include <mach/time.h>
#include "asp.h"
#include "davinci.h"
+#include "irqs.h"
#include "mux.h"
/*
diff --git a/arch/arm/mach-davinci/dm646x.c b/arch/arm/mach-davinci/dm646x.c
index 2b55625e8fb5..cf210741dfe5 100644
--- a/arch/arm/mach-davinci/dm646x.c
+++ b/arch/arm/mach-davinci/dm646x.c
@@ -24,13 +24,13 @@
#include <mach/common.h>
#include <mach/cputype.h>
-#include <mach/irqs.h>
#include <mach/mux.h>
#include <mach/serial.h>
#include <mach/time.h>
#include "asp.h"
#include "davinci.h"
+#include "irqs.h"
#include "mux.h"
#define DAVINCI_VPIF_BASE (0x01C12000)
diff --git a/arch/arm/mach-davinci/irq.c b/arch/arm/mach-davinci/irq.c
index 16ac28833eb4..88c30759d1c5 100644
--- a/arch/arm/mach-davinci/irq.c
+++ b/arch/arm/mach-davinci/irq.c
@@ -28,10 +28,11 @@
#include <mach/hardware.h>
#include <mach/cputype.h>
#include <mach/common.h>
-#include <mach/irqs.h>
#include <asm/mach/irq.h>
#include <asm/exception.h>
+#include "irqs.h"
+
#define FIQ_REG0_OFFSET 0x0000
#define FIQ_REG1_OFFSET 0x0004
#define IRQ_REG0_OFFSET 0x0008
diff --git a/arch/arm/mach-davinci/include/mach/irqs.h b/arch/arm/mach-davinci/irqs.h
similarity index 100%
rename from arch/arm/mach-davinci/include/mach/irqs.h
rename to arch/arm/mach-davinci/irqs.h
diff --git a/arch/arm/mach-davinci/usb-da8xx.c b/arch/arm/mach-davinci/usb-da8xx.c
index 2de5a04ffc24..25f21ee86f1a 100644
--- a/arch/arm/mach-davinci/usb-da8xx.c
+++ b/arch/arm/mach-davinci/usb-da8xx.c
@@ -18,7 +18,8 @@
#include <mach/common.h>
#include <mach/cputype.h>
#include <mach/da8xx.h>
-#include <mach/irqs.h>
+
+#include "irqs.h"
#define DA8XX_USB0_BASE 0x01e00000
#define DA8XX_USB1_BASE 0x01e25000
diff --git a/arch/arm/mach-davinci/usb.c b/arch/arm/mach-davinci/usb.c
index 9d4a58a3113a..cde72ba35dc3 100644
--- a/arch/arm/mach-davinci/usb.c
+++ b/arch/arm/mach-davinci/usb.c
@@ -5,13 +5,14 @@
#include <linux/init.h>
#include <linux/platform_device.h>
#include <linux/dma-mapping.h>
-
+#include <linux/platform_data/usb-davinci.h>
#include <linux/usb/musb.h>
#include <mach/common.h>
-#include <mach/irqs.h>
#include <mach/cputype.h>
-#include <linux/platform_data/usb-davinci.h>
+
+
+#include "irqs.h"
#define DAVINCI_USB_OTG_BASE 0x01c64000
--
2.20.1
From: Bartosz Golaszewski <[email protected]>
Everything is in place now for SPARSE_IRQ. Select it and set
DAVINCI_INTC_START to NR_IRQS.
We now need to include mach/irqs.h in a couple places as it is no
longer indirectly included after selecting SPARSE_IRQ.
Signed-off-by: Bartosz Golaszewski <[email protected]>
Reviewed-by: David Lechner <[email protected]>
---
arch/arm/Kconfig | 1 +
arch/arm/mach-davinci/board-da830-evm.c | 1 +
arch/arm/mach-davinci/board-da850-evm.c | 1 +
arch/arm/mach-davinci/board-dm644x-evm.c | 1 +
arch/arm/mach-davinci/devices-da8xx.c | 1 +
arch/arm/mach-davinci/include/mach/common.h | 4 +++-
arch/arm/mach-davinci/include/mach/irqs.h | 1 -
arch/arm/mach-davinci/irq.c | 1 +
8 files changed, 9 insertions(+), 2 deletions(-)
diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig
index f7770fdcad68..1037f49e050f 100644
--- a/arch/arm/Kconfig
+++ b/arch/arm/Kconfig
@@ -595,6 +595,7 @@ config ARCH_DAVINCI
select PM_GENERIC_DOMAINS if PM
select PM_GENERIC_DOMAINS_OF if PM && OF
select RESET_CONTROLLER
+ select SPARSE_IRQ
select USE_OF
select ZONE_DMA
help
diff --git a/arch/arm/mach-davinci/board-da830-evm.c b/arch/arm/mach-davinci/board-da830-evm.c
index c4da635ee4ce..41f5a51fee9a 100644
--- a/arch/arm/mach-davinci/board-da830-evm.c
+++ b/arch/arm/mach-davinci/board-da830-evm.c
@@ -36,6 +36,7 @@
#include <asm/mach/arch.h>
#include <mach/common.h>
+#include <mach/irqs.h>
#include "cp_intc.h"
#include <mach/mux.h>
#include <mach/da8xx.h>
diff --git a/arch/arm/mach-davinci/board-da850-evm.c b/arch/arm/mach-davinci/board-da850-evm.c
index 44bca048dfd0..317f48560534 100644
--- a/arch/arm/mach-davinci/board-da850-evm.c
+++ b/arch/arm/mach-davinci/board-da850-evm.c
@@ -46,6 +46,7 @@
#include "cp_intc.h"
#include <mach/da8xx.h>
#include <mach/mux.h>
+#include <mach/irqs.h>
#include "sram.h"
#include <asm/mach-types.h>
diff --git a/arch/arm/mach-davinci/board-dm644x-evm.c b/arch/arm/mach-davinci/board-dm644x-evm.c
index b80c4ee76217..16ffed2525e6 100644
--- a/arch/arm/mach-davinci/board-dm644x-evm.c
+++ b/arch/arm/mach-davinci/board-dm644x-evm.c
@@ -36,6 +36,7 @@
#include <asm/mach/arch.h>
#include <mach/common.h>
+#include <mach/irqs.h>
#include <linux/platform_data/i2c-davinci.h>
#include <mach/serial.h>
#include <mach/mux.h>
diff --git a/arch/arm/mach-davinci/devices-da8xx.c b/arch/arm/mach-davinci/devices-da8xx.c
index 298165095d31..3104a3eb2ddf 100644
--- a/arch/arm/mach-davinci/devices-da8xx.c
+++ b/arch/arm/mach-davinci/devices-da8xx.c
@@ -25,6 +25,7 @@
#include <mach/cputype.h>
#include <mach/da8xx.h>
#include <mach/time.h>
+#include <mach/irqs.h>
#include "asp.h"
#include "cpuidle.h"
diff --git a/arch/arm/mach-davinci/include/mach/common.h b/arch/arm/mach-davinci/include/mach/common.h
index d840023eaaac..1ceed0345988 100644
--- a/arch/arm/mach-davinci/include/mach/common.h
+++ b/arch/arm/mach-davinci/include/mach/common.h
@@ -17,7 +17,9 @@
#include <linux/types.h>
#include <linux/reboot.h>
-#define DAVINCI_INTC_START 0
+#include <asm/irq.h>
+
+#define DAVINCI_INTC_START NR_IRQS
#define DAVINCI_INTC_IRQ(_irqnum) (DAVINCI_INTC_START + (_irqnum))
void davinci_timer_init(struct clk *clk);
diff --git a/arch/arm/mach-davinci/include/mach/irqs.h b/arch/arm/mach-davinci/include/mach/irqs.h
index 03c446635301..8f9fc7a56ce8 100644
--- a/arch/arm/mach-davinci/include/mach/irqs.h
+++ b/arch/arm/mach-davinci/include/mach/irqs.h
@@ -401,6 +401,5 @@
/* da850 currently has the most gpio pins (144) */
#define DAVINCI_N_GPIO 144
/* da850 currently has the most irqs so use DA850_N_CP_INTC_IRQ */
-#define NR_IRQS (DA850_N_CP_INTC_IRQ + DAVINCI_N_GPIO)
#endif /* __ASM_ARCH_IRQS_H */
diff --git a/arch/arm/mach-davinci/irq.c b/arch/arm/mach-davinci/irq.c
index de31be42a394..16ac28833eb4 100644
--- a/arch/arm/mach-davinci/irq.c
+++ b/arch/arm/mach-davinci/irq.c
@@ -28,6 +28,7 @@
#include <mach/hardware.h>
#include <mach/cputype.h>
#include <mach/common.h>
+#include <mach/irqs.h>
#include <asm/mach/irq.h>
#include <asm/exception.h>
--
2.20.1
From: Bartosz Golaszewski <[email protected]>
davinci_intc_base is defined globally in common.c. Define separate
local variables for the aintc and cp-intc drivers and remove the
global one.
Signed-off-by: Bartosz Golaszewski <[email protected]>
Reviewed-by: David Lechner <[email protected]>
---
arch/arm/mach-davinci/common.c | 2 --
arch/arm/mach-davinci/cp_intc.c | 2 ++
arch/arm/mach-davinci/include/mach/common.h | 1 -
arch/arm/mach-davinci/irq.c | 1 +
4 files changed, 3 insertions(+), 3 deletions(-)
diff --git a/arch/arm/mach-davinci/common.c b/arch/arm/mach-davinci/common.c
index a87e158a709b..2850ae02aaa4 100644
--- a/arch/arm/mach-davinci/common.c
+++ b/arch/arm/mach-davinci/common.c
@@ -23,8 +23,6 @@
struct davinci_soc_info davinci_soc_info;
EXPORT_SYMBOL(davinci_soc_info);
-void __iomem *davinci_intc_base;
-
void davinci_get_mac_addr(struct nvmem_device *nvmem, void *context)
{
char *mac_addr = davinci_soc_info.emac_pdata->mac_addr;
diff --git a/arch/arm/mach-davinci/cp_intc.c b/arch/arm/mach-davinci/cp_intc.c
index 19874f5ef542..4e293cde20fb 100644
--- a/arch/arm/mach-davinci/cp_intc.c
+++ b/arch/arm/mach-davinci/cp_intc.c
@@ -26,6 +26,8 @@
#define DAVINCI_CP_INTC_PRI_INDX_MASK GENMASK(9, 0)
#define DAVINCI_CP_INTC_GPIR_NONE BIT(31)
+static void __iomem *davinci_intc_base;
+
static inline unsigned int cp_intc_read(unsigned offset)
{
return __raw_readl(davinci_intc_base + offset);
diff --git a/arch/arm/mach-davinci/include/mach/common.h b/arch/arm/mach-davinci/include/mach/common.h
index 34e48de92dcc..3d45b73b9a64 100644
--- a/arch/arm/mach-davinci/include/mach/common.h
+++ b/arch/arm/mach-davinci/include/mach/common.h
@@ -20,7 +20,6 @@
void davinci_timer_init(struct clk *clk);
extern void davinci_irq_init(void);
-extern void __iomem *davinci_intc_base;
struct davinci_timer_instance {
u32 base;
diff --git a/arch/arm/mach-davinci/irq.c b/arch/arm/mach-davinci/irq.c
index 2494d9b36966..19f17ef04381 100644
--- a/arch/arm/mach-davinci/irq.c
+++ b/arch/arm/mach-davinci/irq.c
@@ -43,6 +43,7 @@
#define IRQ_INTPRI0_REG_OFFSET 0x0030
#define IRQ_INTPRI7_REG_OFFSET 0x004C
+static void __iomem *davinci_intc_base;
static struct irq_domain *davinci_irq_domain;
static inline void davinci_irq_writel(unsigned long value, int offset)
--
2.20.1
From: Bartosz Golaszewski <[email protected]>
We're going to extend the cp_intc_init() function with a config
structure so we can drop the intc-related fields from davinci_soc_info.
Once we do it, we won't be able to use this routine directly as the
init_irq callback. Wrap the calls in additional helpers that don't
take parameters and can be assigned to init_irq.
Signed-off-by: Bartosz Golaszewski <[email protected]>
Reviewed-by: David Lechner <[email protected]>
---
arch/arm/mach-davinci/board-da830-evm.c | 2 +-
arch/arm/mach-davinci/board-da850-evm.c | 2 +-
arch/arm/mach-davinci/board-mityomapl138.c | 2 +-
arch/arm/mach-davinci/board-omapl138-hawk.c | 2 +-
arch/arm/mach-davinci/da830.c | 5 +++++
arch/arm/mach-davinci/da850.c | 5 +++++
arch/arm/mach-davinci/include/mach/da8xx.h | 2 ++
7 files changed, 16 insertions(+), 4 deletions(-)
diff --git a/arch/arm/mach-davinci/board-da830-evm.c b/arch/arm/mach-davinci/board-da830-evm.c
index f81c92b9cf07..1ae7dcb8f59d 100644
--- a/arch/arm/mach-davinci/board-da830-evm.c
+++ b/arch/arm/mach-davinci/board-da830-evm.c
@@ -694,7 +694,7 @@ static void __init da830_evm_map_io(void)
MACHINE_START(DAVINCI_DA830_EVM, "DaVinci DA830/OMAP-L137/AM17x EVM")
.atag_offset = 0x100,
.map_io = da830_evm_map_io,
- .init_irq = cp_intc_init,
+ .init_irq = da830_init_irq,
.init_time = da830_init_time,
.init_machine = da830_evm_init,
.init_late = davinci_init_late,
diff --git a/arch/arm/mach-davinci/board-da850-evm.c b/arch/arm/mach-davinci/board-da850-evm.c
index 1cc49e7bf128..8022ca8ac4ef 100644
--- a/arch/arm/mach-davinci/board-da850-evm.c
+++ b/arch/arm/mach-davinci/board-da850-evm.c
@@ -1522,7 +1522,7 @@ static void __init da850_evm_map_io(void)
MACHINE_START(DAVINCI_DA850_EVM, "DaVinci DA850/OMAP-L138/AM18x EVM")
.atag_offset = 0x100,
.map_io = da850_evm_map_io,
- .init_irq = cp_intc_init,
+ .init_irq = da850_init_irq,
.init_time = da850_init_time,
.init_machine = da850_evm_init,
.init_late = davinci_init_late,
diff --git a/arch/arm/mach-davinci/board-mityomapl138.c b/arch/arm/mach-davinci/board-mityomapl138.c
index eb6a9465f229..815f155eb349 100644
--- a/arch/arm/mach-davinci/board-mityomapl138.c
+++ b/arch/arm/mach-davinci/board-mityomapl138.c
@@ -623,7 +623,7 @@ static void __init mityomapl138_map_io(void)
MACHINE_START(MITYOMAPL138, "MityDSP-L138/MityARM-1808")
.atag_offset = 0x100,
.map_io = mityomapl138_map_io,
- .init_irq = cp_intc_init,
+ .init_irq = da850_init_irq,
.init_time = da850_init_time,
.init_machine = mityomapl138_init,
.init_late = davinci_init_late,
diff --git a/arch/arm/mach-davinci/board-omapl138-hawk.c b/arch/arm/mach-davinci/board-omapl138-hawk.c
index 7f852722ff08..673d890c2e3e 100644
--- a/arch/arm/mach-davinci/board-omapl138-hawk.c
+++ b/arch/arm/mach-davinci/board-omapl138-hawk.c
@@ -461,7 +461,7 @@ static void __init omapl138_hawk_map_io(void)
MACHINE_START(OMAPL138_HAWKBOARD, "AM18x/OMAP-L138 Hawkboard")
.atag_offset = 0x100,
.map_io = omapl138_hawk_map_io,
- .init_irq = cp_intc_init,
+ .init_irq = da850_init_irq,
.init_time = da850_init_time,
.init_machine = omapl138_hawk_init,
.init_late = davinci_init_late,
diff --git a/arch/arm/mach-davinci/da830.c b/arch/arm/mach-davinci/da830.c
index ca903c9105e4..5cfd30c57429 100644
--- a/arch/arm/mach-davinci/da830.c
+++ b/arch/arm/mach-davinci/da830.c
@@ -821,6 +821,11 @@ void __init da830_init(void)
WARN(!da8xx_syscfg0_base, "Unable to map syscfg0 module");
}
+void __init da830_init_irq(void)
+{
+ cp_intc_init();
+}
+
void __init da830_init_time(void)
{
void __iomem *pll;
diff --git a/arch/arm/mach-davinci/da850.c b/arch/arm/mach-davinci/da850.c
index 486d53481636..6df6994c0f26 100644
--- a/arch/arm/mach-davinci/da850.c
+++ b/arch/arm/mach-davinci/da850.c
@@ -759,6 +759,11 @@ void __init da850_init(void)
WARN(!da8xx_syscfg1_base, "Unable to map syscfg1 module");
}
+void __init da850_init_irq(void)
+{
+ cp_intc_init();
+}
+
void __init da850_init_time(void)
{
void __iomem *pll0;
diff --git a/arch/arm/mach-davinci/include/mach/da8xx.h b/arch/arm/mach-davinci/include/mach/da8xx.h
index ab4a57f433f4..1618b30661a9 100644
--- a/arch/arm/mach-davinci/include/mach/da8xx.h
+++ b/arch/arm/mach-davinci/include/mach/da8xx.h
@@ -88,10 +88,12 @@ extern unsigned int da850_max_speed;
#define DA8XX_ARM_RAM_BASE 0xffff0000
void da830_init(void);
+void da830_init_irq(void);
void da830_init_time(void);
void da830_register_clocks(void);
void da850_init(void);
+void da850_init_irq(void);
void da850_init_time(void);
void da850_register_clocks(void);
--
2.20.1
From: Bartosz Golaszewski <[email protected]>
Raplace all calls to __raw_readl() & __raw_writel() with readl_relaxed()
and writel_relaxed() respectively. It's safe to do as there's no
endianness conversion being done in the code.
Signed-off-by: Bartosz Golaszewski <[email protected]>
---
arch/arm/mach-davinci/irq.c | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/arch/arm/mach-davinci/irq.c b/arch/arm/mach-davinci/irq.c
index 148c23728bdb..6a7205a844e1 100644
--- a/arch/arm/mach-davinci/irq.c
+++ b/arch/arm/mach-davinci/irq.c
@@ -36,12 +36,12 @@ static struct irq_domain *davinci_aintc_irq_domain;
static inline void davinci_aintc_writel(unsigned long value, int offset)
{
- __raw_writel(value, davinci_aintc_base + offset);
+ writel_relaxed(value, davinci_aintc_base + offset);
}
static inline unsigned long davinci_aintc_readl(int offset)
{
- return __raw_readl(davinci_aintc_base + offset);
+ return readl_relaxed(davinci_aintc_base + offset);
}
static __init void
--
2.20.1
From: Bartosz Golaszewski <[email protected]>
I've been unable to figure out exactly why, but it seems that the
IRQ_TINT1_TINT34 interrupt for timer 1 needs to be handled as a
level irq, not edge like all others.
Let's move the handler setup out of the aintc driver where it's lived
since the beginning and into the dm* SoC-specific files where it
belongs.
Signed-off-by: Bartosz Golaszewski <[email protected]>
---
arch/arm/mach-davinci/dm355.c | 8 ++++++++
arch/arm/mach-davinci/dm365.c | 8 ++++++++
arch/arm/mach-davinci/dm644x.c | 8 ++++++++
arch/arm/mach-davinci/dm646x.c | 8 ++++++++
arch/arm/mach-davinci/irq.c | 3 ---
5 files changed, 32 insertions(+), 3 deletions(-)
diff --git a/arch/arm/mach-davinci/dm355.c b/arch/arm/mach-davinci/dm355.c
index c7cd765114af..a732f2ea1d9a 100644
--- a/arch/arm/mach-davinci/dm355.c
+++ b/arch/arm/mach-davinci/dm355.c
@@ -15,6 +15,7 @@
#include <linux/dma-mapping.h>
#include <linux/dmaengine.h>
#include <linux/init.h>
+#include <linux/irq.h>
#include <linux/irqchip/irq-davinci-aintc.h>
#include <linux/platform_data/edma.h>
#include <linux/platform_data/gpio-davinci.h>
@@ -744,6 +745,13 @@ void __init dm355_init_time(void)
psc = ioremap(DAVINCI_PWR_SLEEP_CNTRL_BASE, SZ_4K);
dm355_psc_init(NULL, psc);
+ /*
+ * Nobody knows why anymore, but this interrupt has been handled as
+ * a level irq from the very beginning of davinci support in mainline
+ * linux.
+ */
+ irq_set_handler(DAVINCI_INTC_IRQ(IRQ_TINT1_TINT34), handle_level_irq);
+
clk = clk_get(NULL, "timer0");
davinci_timer_init(clk);
diff --git a/arch/arm/mach-davinci/dm365.c b/arch/arm/mach-davinci/dm365.c
index bde3c3b94cc9..79afde34cfbb 100644
--- a/arch/arm/mach-davinci/dm365.c
+++ b/arch/arm/mach-davinci/dm365.c
@@ -19,6 +19,7 @@
#include <linux/dma-mapping.h>
#include <linux/dmaengine.h>
#include <linux/init.h>
+#include <linux/irq.h>
#include <linux/irqchip/irq-davinci-aintc.h>
#include <linux/platform_data/edma.h>
#include <linux/platform_data/gpio-davinci.h>
@@ -785,6 +786,13 @@ void __init dm365_init_time(void)
psc = ioremap(DAVINCI_PWR_SLEEP_CNTRL_BASE, SZ_4K);
dm365_psc_init(NULL, psc);
+ /*
+ * Nobody knows why anymore, but this interrupt has been handled as
+ * a level irq from the very beginning of davinci support in mainline
+ * linux.
+ */
+ irq_set_handler(DAVINCI_INTC_IRQ(IRQ_TINT1_TINT34), handle_level_irq);
+
clk = clk_get(NULL, "timer0");
davinci_timer_init(clk);
diff --git a/arch/arm/mach-davinci/dm644x.c b/arch/arm/mach-davinci/dm644x.c
index 6d3498058283..007d979d2d64 100644
--- a/arch/arm/mach-davinci/dm644x.c
+++ b/arch/arm/mach-davinci/dm644x.c
@@ -14,6 +14,7 @@
#include <linux/clkdev.h>
#include <linux/dmaengine.h>
#include <linux/init.h>
+#include <linux/irq.h>
#include <linux/irqchip/irq-davinci-aintc.h>
#include <linux/platform_data/edma.h>
#include <linux/platform_data/gpio-davinci.h>
@@ -680,6 +681,13 @@ void __init dm644x_init_time(void)
psc = ioremap(DAVINCI_PWR_SLEEP_CNTRL_BASE, SZ_4K);
dm644x_psc_init(NULL, psc);
+ /*
+ * Nobody knows why anymore, but this interrupt has been handled as
+ * a level irq from the very beginning of davinci support in mainline
+ * linux.
+ */
+ irq_set_handler(DAVINCI_INTC_IRQ(IRQ_TINT1_TINT34), handle_level_irq);
+
clk = clk_get(NULL, "timer0");
davinci_timer_init(clk);
diff --git a/arch/arm/mach-davinci/dm646x.c b/arch/arm/mach-davinci/dm646x.c
index a0a8b336c1a4..a643d78ad644 100644
--- a/arch/arm/mach-davinci/dm646x.c
+++ b/arch/arm/mach-davinci/dm646x.c
@@ -15,6 +15,7 @@
#include <linux/dma-mapping.h>
#include <linux/dmaengine.h>
#include <linux/init.h>
+#include <linux/irq.h>
#include <linux/irqchip/irq-davinci-aintc.h>
#include <linux/platform_data/edma.h>
#include <linux/platform_data/gpio-davinci.h>
@@ -664,6 +665,13 @@ void __init dm646x_init_time(unsigned long ref_clk_rate,
psc = ioremap(DAVINCI_PWR_SLEEP_CNTRL_BASE, SZ_4K);
dm646x_psc_init(NULL, psc);
+ /*
+ * Nobody knows why anymore, but this interrupt has been handled as
+ * a level irq from the very beginning of davinci support in mainline
+ * linux.
+ */
+ irq_set_handler(DAVINCI_INTC_IRQ(IRQ_TINT1_TINT34), handle_level_irq);
+
clk = clk_get(NULL, "timer0");
davinci_timer_init(clk);
diff --git a/arch/arm/mach-davinci/irq.c b/arch/arm/mach-davinci/irq.c
index f5578abfc0aa..0f469c59acfb 100644
--- a/arch/arm/mach-davinci/irq.c
+++ b/arch/arm/mach-davinci/irq.c
@@ -18,8 +18,6 @@
#include <asm/mach/irq.h>
#include <asm/exception.h>
-#include "irqs.h"
-
#define DAVINCI_AINTC_FIQ_REG0 0x00
#define DAVINCI_AINTC_FIQ_REG1 0x04
#define DAVINCI_AINTC_IRQ_REG0 0x08
@@ -146,6 +144,5 @@ void __init davinci_aintc_init(const struct davinci_aintc_config *config)
davinci_aintc_setup_gc(davinci_aintc_base + reg_off,
irq_base + irq_off, 32);
- irq_set_handler(DAVINCI_INTC_IRQ(IRQ_TINT1_TINT34), handle_level_irq);
set_handle_irq(davinci_aintc_handle_irq);
}
--
2.20.1
From: Bartosz Golaszewski <[email protected]>
In order to support SPARSE_IRQ we first need to make davinci use the
generic irq handler for ARM. Translate the legacy assembly to C and
put the irq handlers into their respective drivers (aintc and cp-intc).
Signed-off-by: Bartosz Golaszewski <[email protected]>
---
arch/arm/Kconfig | 1 +
arch/arm/mach-davinci/cp_intc.c | 28 +++++++++++++
.../mach-davinci/include/mach/entry-macro.S | 39 -------------------
arch/arm/mach-davinci/irq.c | 23 +++++++++++
4 files changed, 52 insertions(+), 39 deletions(-)
delete mode 100644 arch/arm/mach-davinci/include/mach/entry-macro.S
diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig
index 664e918e2624..f7770fdcad68 100644
--- a/arch/arm/Kconfig
+++ b/arch/arm/Kconfig
@@ -589,6 +589,7 @@ config ARCH_DAVINCI
select GENERIC_ALLOCATOR
select GENERIC_CLOCKEVENTS
select GENERIC_IRQ_CHIP
+ select GENERIC_IRQ_MULTI_HANDLER
select GPIOLIB
select HAVE_IDE
select PM_GENERIC_DOMAINS if PM
diff --git a/arch/arm/mach-davinci/cp_intc.c b/arch/arm/mach-davinci/cp_intc.c
index 67805ca74ff8..4a372add8cf9 100644
--- a/arch/arm/mach-davinci/cp_intc.c
+++ b/arch/arm/mach-davinci/cp_intc.c
@@ -19,9 +19,13 @@
#include <linux/of_address.h>
#include <linux/of_irq.h>
+#include <asm/exception.h>
#include <mach/common.h>
#include "cp_intc.h"
+#define DAVINCI_CP_INTC_PRI_INDX_MASK GENMASK(9, 0)
+#define DAVINCI_CP_INTC_GPIR_NONE BIT(31)
+
static inline unsigned int cp_intc_read(unsigned offset)
{
return __raw_readl(davinci_intc_base + offset);
@@ -97,6 +101,28 @@ static struct irq_chip cp_intc_irq_chip = {
static struct irq_domain *cp_intc_domain;
+static asmlinkage void __exception_irq_entry
+cp_intc_handle_irq(struct pt_regs *regs)
+{
+ int gpir, irqnr, none;
+
+ /*
+ * The interrupt number is in first ten bits. The NONE field set to 1
+ * indicates a spurious irq.
+ */
+
+ gpir = cp_intc_read(CP_INTC_PRIO_IDX);
+ irqnr = gpir & DAVINCI_CP_INTC_PRI_INDX_MASK;
+ none = gpir & DAVINCI_CP_INTC_GPIR_NONE;
+
+ if (unlikely(none)) {
+ pr_err_once("%s: spurious irq!\n", __func__);
+ return;
+ }
+
+ handle_domain_irq(cp_intc_domain, irqnr, regs);
+}
+
static int cp_intc_host_map(struct irq_domain *h, unsigned int virq,
irq_hw_number_t hw)
{
@@ -196,6 +222,8 @@ int __init cp_intc_of_init(struct device_node *node, struct device_node *parent)
return -EINVAL;
}
+ set_handle_irq(cp_intc_handle_irq);
+
/* Enable global interrupt */
cp_intc_write(1, CP_INTC_GLOBAL_ENABLE);
diff --git a/arch/arm/mach-davinci/include/mach/entry-macro.S b/arch/arm/mach-davinci/include/mach/entry-macro.S
deleted file mode 100644
index cf5f573eb5fd..000000000000
--- a/arch/arm/mach-davinci/include/mach/entry-macro.S
+++ /dev/null
@@ -1,39 +0,0 @@
-/*
- * Low-level IRQ helper macros for TI DaVinci-based platforms
- *
- * Author: Kevin Hilman, MontaVista Software, Inc. <[email protected]>
- *
- * 2007 (c) MontaVista Software, Inc. This file is licensed under
- * the terms of the GNU General Public License version 2. This program
- * is licensed "as is" without any warranty of any kind, whether express
- * or implied.
- */
-#include <mach/irqs.h>
-
- .macro get_irqnr_preamble, base, tmp
- ldr \base, =davinci_intc_base
- ldr \base, [\base]
- .endm
-
- .macro get_irqnr_and_base, irqnr, irqstat, base, tmp
-#if defined(CONFIG_AINTC) && defined(CONFIG_CP_INTC)
- ldr \tmp, =davinci_intc_type
- ldr \tmp, [\tmp]
- cmp \tmp, #DAVINCI_INTC_TYPE_CP_INTC
- beq 1001f
-#endif
-#if defined(CONFIG_AINTC)
- ldr \tmp, [\base, #0x14]
- movs \tmp, \tmp, lsr #2
- sub \irqnr, \tmp, #1
- b 1002f
-#endif
-#if defined(CONFIG_CP_INTC)
-1001: ldr \irqnr, [\base, #0x80] /* get irq number */
- mov \tmp, \irqnr, lsr #31
- and \irqnr, \irqnr, #0xff /* irq is in bits 0-9 */
- and \tmp, \tmp, #0x1
- cmp \tmp, #0x1
-#endif
-1002:
- .endm
diff --git a/arch/arm/mach-davinci/irq.c b/arch/arm/mach-davinci/irq.c
index 07d8ef8037e4..3ce821a06e52 100644
--- a/arch/arm/mach-davinci/irq.c
+++ b/arch/arm/mach-davinci/irq.c
@@ -29,11 +29,13 @@
#include <mach/cputype.h>
#include <mach/common.h>
#include <asm/mach/irq.h>
+#include <asm/exception.h>
#define FIQ_REG0_OFFSET 0x0000
#define FIQ_REG1_OFFSET 0x0004
#define IRQ_REG0_OFFSET 0x0008
#define IRQ_REG1_OFFSET 0x000C
+#define IRQ_IRQENTRY_OFFSET 0x0014
#define IRQ_ENT_REG0_OFFSET 0x0018
#define IRQ_ENT_REG1_OFFSET 0x001C
#define IRQ_INCTL_REG_OFFSET 0x0020
@@ -48,6 +50,11 @@ static inline void davinci_irq_writel(unsigned long value, int offset)
__raw_writel(value, davinci_intc_base + offset);
}
+static inline unsigned long davinci_irq_readl(int offset)
+{
+ return __raw_readl(davinci_intc_base + offset);
+}
+
static __init void
davinci_irq_setup_gc(void __iomem *base,
unsigned int irq_start, unsigned int num)
@@ -70,6 +77,21 @@ davinci_irq_setup_gc(void __iomem *base,
IRQ_NOREQUEST | IRQ_NOPROBE, 0);
}
+static asmlinkage void __exception_irq_entry
+davinci_handle_irq(struct pt_regs *regs)
+{
+ int irqnr = davinci_irq_readl(IRQ_IRQENTRY_OFFSET);
+
+ /*
+ * Use the formula for entry vector index generation from section
+ * 8.3.3 of the manual.
+ */
+ irqnr >>= 2;
+ irqnr -= 1;
+
+ handle_domain_irq(davinci_irq_domain, irqnr, regs);
+}
+
/* ARM Interrupt Controller Initialization */
void __init davinci_irq_init(void)
{
@@ -133,4 +155,5 @@ void __init davinci_irq_init(void)
davinci_irq_setup_gc(davinci_intc_base + j, irq_base + i, 32);
irq_set_handler(IRQ_TINT1_TINT34, handle_level_irq);
+ set_handle_irq(davinci_handle_irq);
}
--
2.20.1
From: Bartosz Golaszewski <[email protected]>
Add the new-style config structures for dm* SoCs. They will be used
once we make the aintc driver stop using davinci_soc_info.
Signed-off-by: Bartosz Golaszewski <[email protected]>
---
arch/arm/mach-davinci/dm355.c | 11 +++++++++++
arch/arm/mach-davinci/dm365.c | 11 +++++++++++
arch/arm/mach-davinci/dm644x.c | 11 +++++++++++
arch/arm/mach-davinci/dm646x.c | 11 +++++++++++
4 files changed, 44 insertions(+)
diff --git a/arch/arm/mach-davinci/dm355.c b/arch/arm/mach-davinci/dm355.c
index e2b680e9944b..ff79c1a17fae 100644
--- a/arch/arm/mach-davinci/dm355.c
+++ b/arch/arm/mach-davinci/dm355.c
@@ -15,6 +15,7 @@
#include <linux/dma-mapping.h>
#include <linux/dmaengine.h>
#include <linux/init.h>
+#include <linux/irqchip/irq-davinci-aintc.h>
#include <linux/platform_data/edma.h>
#include <linux/platform_data/gpio-davinci.h>
#include <linux/platform_data/spi-davinci.h>
@@ -792,6 +793,16 @@ int __init dm355_init_video(struct vpfe_config *vpfe_cfg,
return 0;
}
+static const struct davinci_aintc_config dm355_aintc_config = {
+ .reg = {
+ .start = DAVINCI_ARM_INTC_BASE,
+ .end = DAVINCI_ARM_INTC_BASE + SZ_4K - 1,
+ .flags = IORESOURCE_MEM,
+ },
+ .num_irqs = 64,
+ .prios = dm355_default_priorities,
+};
+
void __init dm355_init_irq(void)
{
davinci_aintc_init();
diff --git a/arch/arm/mach-davinci/dm365.c b/arch/arm/mach-davinci/dm365.c
index 76507dcbcb3a..44dc3ca94dd3 100644
--- a/arch/arm/mach-davinci/dm365.c
+++ b/arch/arm/mach-davinci/dm365.c
@@ -19,6 +19,7 @@
#include <linux/dma-mapping.h>
#include <linux/dmaengine.h>
#include <linux/init.h>
+#include <linux/irqchip/irq-davinci-aintc.h>
#include <linux/platform_data/edma.h>
#include <linux/platform_data/gpio-davinci.h>
#include <linux/platform_data/keyscan-davinci.h>
@@ -1051,6 +1052,16 @@ int __init dm365_init_video(struct vpfe_config *vpfe_cfg,
return 0;
}
+static const struct davinci_aintc_config dm365_aintc_config = {
+ .reg = {
+ .start = DAVINCI_ARM_INTC_BASE,
+ .end = DAVINCI_ARM_INTC_BASE + SZ_4K - 1,
+ .flags = IORESOURCE_MEM,
+ },
+ .num_irqs = 64,
+ .prios = dm365_default_priorities,
+};
+
void __init dm365_init_irq(void)
{
davinci_aintc_init();
diff --git a/arch/arm/mach-davinci/dm644x.c b/arch/arm/mach-davinci/dm644x.c
index 27c73bc54069..0b0ecac36486 100644
--- a/arch/arm/mach-davinci/dm644x.c
+++ b/arch/arm/mach-davinci/dm644x.c
@@ -14,6 +14,7 @@
#include <linux/clkdev.h>
#include <linux/dmaengine.h>
#include <linux/init.h>
+#include <linux/irqchip/irq-davinci-aintc.h>
#include <linux/platform_data/edma.h>
#include <linux/platform_data/gpio-davinci.h>
#include <linux/platform_device.h>
@@ -728,6 +729,16 @@ int __init dm644x_init_video(struct vpfe_config *vpfe_cfg,
return 0;
}
+static const struct davinci_aintc_config dm644x_aintc_config = {
+ .reg = {
+ .start = DAVINCI_ARM_INTC_BASE,
+ .end = DAVINCI_ARM_INTC_BASE + SZ_4K - 1,
+ .flags = IORESOURCE_MEM,
+ },
+ .num_irqs = 64,
+ .prios = dm644x_default_priorities,
+};
+
void __init dm644x_init_irq(void)
{
davinci_aintc_init();
diff --git a/arch/arm/mach-davinci/dm646x.c b/arch/arm/mach-davinci/dm646x.c
index 98fc5e3815b9..4e871d00e4e9 100644
--- a/arch/arm/mach-davinci/dm646x.c
+++ b/arch/arm/mach-davinci/dm646x.c
@@ -15,6 +15,7 @@
#include <linux/dma-mapping.h>
#include <linux/dmaengine.h>
#include <linux/init.h>
+#include <linux/irqchip/irq-davinci-aintc.h>
#include <linux/platform_data/edma.h>
#include <linux/platform_data/gpio-davinci.h>
#include <linux/platform_device.h>
@@ -689,6 +690,16 @@ void __init dm646x_register_clocks(void)
platform_device_register(&dm646x_pll2_device);
}
+static const struct davinci_aintc_config dm646x_aintc_config = {
+ .reg = {
+ .start = DAVINCI_ARM_INTC_BASE,
+ .end = DAVINCI_ARM_INTC_BASE + SZ_4K - 1,
+ .flags = IORESOURCE_MEM,
+ },
+ .num_irqs = 64,
+ .prios = dm646x_default_priorities,
+};
+
void __init dm646x_init_irq(void)
{
davinci_aintc_init();
--
2.20.1
From: Bartosz Golaszewski <[email protected]>
The intc_host_map field in struct davinci_soc_info is not used by any
board. Remove it as part of the interrupt support cleanup.
Signed-off-by: Bartosz Golaszewski <[email protected]>
Reviewed-by: David Lechner <[email protected]>
---
arch/arm/mach-davinci/cp_intc.c | 5 -----
arch/arm/mach-davinci/include/mach/common.h | 1 -
2 files changed, 6 deletions(-)
diff --git a/arch/arm/mach-davinci/cp_intc.c b/arch/arm/mach-davinci/cp_intc.c
index 94085d21018e..67805ca74ff8 100644
--- a/arch/arm/mach-davinci/cp_intc.c
+++ b/arch/arm/mach-davinci/cp_intc.c
@@ -117,7 +117,6 @@ int __init cp_intc_of_init(struct device_node *node, struct device_node *parent)
{
u32 num_irq = davinci_soc_info.intc_irq_num;
u8 *irq_prio = davinci_soc_info.intc_irq_prios;
- u32 *host_map = davinci_soc_info.intc_host_map;
unsigned num_reg = BITS_TO_LONGS(num_irq);
int i, irq_base;
@@ -182,10 +181,6 @@ int __init cp_intc_of_init(struct device_node *node, struct device_node *parent)
cp_intc_write(0x0f0f0f0f, CP_INTC_CHAN_MAP(i));
}
- if (host_map)
- for (i = 0; host_map[i] != -1; i++)
- cp_intc_write(host_map[i], CP_INTC_HOST_MAP(i));
-
irq_base = irq_alloc_descs(-1, 0, num_irq, 0);
if (irq_base < 0) {
pr_warn("Couldn't allocate IRQ numbers\n");
diff --git a/arch/arm/mach-davinci/include/mach/common.h b/arch/arm/mach-davinci/include/mach/common.h
index b577e13a9c23..944afd57ee38 100644
--- a/arch/arm/mach-davinci/include/mach/common.h
+++ b/arch/arm/mach-davinci/include/mach/common.h
@@ -61,7 +61,6 @@ struct davinci_soc_info {
int intc_type;
u8 *intc_irq_prios;
unsigned long intc_irq_num;
- u32 *intc_host_map;
struct davinci_timer_info *timer_info;
int gpio_type;
u32 gpio_base;
--
2.20.1
From: Bartosz Golaszewski <[email protected]>
Since no offset goes past 0xff - let's drop the 00 prefix for better
readability. While we're at it: convert all hex numbers to lower-case.
Signed-off-by: Bartosz Golaszewski <[email protected]>
Reviewed-by: David Lechner <[email protected]>
---
arch/arm/mach-davinci/irq.c | 22 +++++++++++-----------
1 file changed, 11 insertions(+), 11 deletions(-)
diff --git a/arch/arm/mach-davinci/irq.c b/arch/arm/mach-davinci/irq.c
index 145fda7e5a35..148c23728bdb 100644
--- a/arch/arm/mach-davinci/irq.c
+++ b/arch/arm/mach-davinci/irq.c
@@ -19,17 +19,17 @@
#include "irqs.h"
-#define DAVINCI_AINTC_FIQ_REG0 0x0000
-#define DAVINCI_AINTC_FIQ_REG1 0x0004
-#define DAVINCI_AINTC_IRQ_REG0 0x0008
-#define DAVINCI_AINTC_IRQ_REG1 0x000C
-#define DAVINCI_AINTC_IRQ_IRQENTRY 0x0014
-#define DAVINCI_AINTC_IRQ_ENT_REG0 0x0018
-#define DAVINCI_AINTC_IRQ_ENT_REG1 0x001C
-#define DAVINCI_AINTC_IRQ_INCTL_REG 0x0020
-#define DAVINCI_AINTC_IRQ_EABASE_REG 0x0024
-#define DAVINCI_AINTC_IRQ_INTPRI0_REG 0x0030
-#define DAVINCI_AINTC_IRQ_INTPRI7_REG 0x004C
+#define DAVINCI_AINTC_FIQ_REG0 0x00
+#define DAVINCI_AINTC_FIQ_REG1 0x04
+#define DAVINCI_AINTC_IRQ_REG0 0x08
+#define DAVINCI_AINTC_IRQ_REG1 0x0c
+#define DAVINCI_AINTC_IRQ_IRQENTRY 0x14
+#define DAVINCI_AINTC_IRQ_ENT_REG0 0x18
+#define DAVINCI_AINTC_IRQ_ENT_REG1 0x1c
+#define DAVINCI_AINTC_IRQ_INCTL_REG 0x20
+#define DAVINCI_AINTC_IRQ_EABASE_REG 0x24
+#define DAVINCI_AINTC_IRQ_INTPRI0_REG 0x30
+#define DAVINCI_AINTC_IRQ_INTPRI7_REG 0x4c
static void __iomem *davinci_aintc_base;
static struct irq_domain *davinci_aintc_irq_domain;
--
2.20.1
From: Bartosz Golaszewski <[email protected]>
We now use the generic ARM irq handler on davinci. There are no more
users that check davinci_intc_type. Remove the variable and all its
references.
Signed-off-by: Bartosz Golaszewski <[email protected]>
Reviewed-by: David Lechner <[email protected]>
---
arch/arm/mach-davinci/common.c | 1 -
arch/arm/mach-davinci/cp_intc.c | 1 -
arch/arm/mach-davinci/da830.c | 1 -
arch/arm/mach-davinci/da850.c | 1 -
arch/arm/mach-davinci/dm355.c | 1 -
arch/arm/mach-davinci/dm365.c | 1 -
arch/arm/mach-davinci/dm644x.c | 1 -
arch/arm/mach-davinci/dm646x.c | 1 -
arch/arm/mach-davinci/include/mach/common.h | 2 --
arch/arm/mach-davinci/include/mach/irqs.h | 3 ---
arch/arm/mach-davinci/irq.c | 1 -
11 files changed, 14 deletions(-)
diff --git a/arch/arm/mach-davinci/common.c b/arch/arm/mach-davinci/common.c
index e1d0f0d841ff..a87e158a709b 100644
--- a/arch/arm/mach-davinci/common.c
+++ b/arch/arm/mach-davinci/common.c
@@ -24,7 +24,6 @@ struct davinci_soc_info davinci_soc_info;
EXPORT_SYMBOL(davinci_soc_info);
void __iomem *davinci_intc_base;
-int davinci_intc_type;
void davinci_get_mac_addr(struct nvmem_device *nvmem, void *context)
{
diff --git a/arch/arm/mach-davinci/cp_intc.c b/arch/arm/mach-davinci/cp_intc.c
index 4a372add8cf9..19874f5ef542 100644
--- a/arch/arm/mach-davinci/cp_intc.c
+++ b/arch/arm/mach-davinci/cp_intc.c
@@ -146,7 +146,6 @@ int __init cp_intc_of_init(struct device_node *node, struct device_node *parent)
unsigned num_reg = BITS_TO_LONGS(num_irq);
int i, irq_base;
- davinci_intc_type = DAVINCI_INTC_TYPE_CP_INTC;
if (node) {
davinci_intc_base = of_iomap(node, 0);
if (of_property_read_u32(node, "ti,intc-size", &num_irq))
diff --git a/arch/arm/mach-davinci/da830.c b/arch/arm/mach-davinci/da830.c
index 2cc9fe4c3a91..9e18b245266b 100644
--- a/arch/arm/mach-davinci/da830.c
+++ b/arch/arm/mach-davinci/da830.c
@@ -807,7 +807,6 @@ static const struct davinci_soc_info davinci_soc_info_da830 = {
.pinmux_pins = da830_pins,
.pinmux_pins_num = ARRAY_SIZE(da830_pins),
.intc_base = DA8XX_CP_INTC_BASE,
- .intc_type = DAVINCI_INTC_TYPE_CP_INTC,
.intc_irq_prios = da830_default_priorities,
.intc_irq_num = DA830_N_CP_INTC_IRQ,
.timer_info = &da830_timer_info,
diff --git a/arch/arm/mach-davinci/da850.c b/arch/arm/mach-davinci/da850.c
index e7b78df2bfef..e823b89e2b7a 100644
--- a/arch/arm/mach-davinci/da850.c
+++ b/arch/arm/mach-davinci/da850.c
@@ -739,7 +739,6 @@ static const struct davinci_soc_info davinci_soc_info_da850 = {
.pinmux_pins = da850_pins,
.pinmux_pins_num = ARRAY_SIZE(da850_pins),
.intc_base = DA8XX_CP_INTC_BASE,
- .intc_type = DAVINCI_INTC_TYPE_CP_INTC,
.intc_irq_prios = da850_default_priorities,
.intc_irq_num = DA850_N_CP_INTC_IRQ,
.timer_info = &da850_timer_info,
diff --git a/arch/arm/mach-davinci/dm355.c b/arch/arm/mach-davinci/dm355.c
index 4c6e0bef4509..03ce5df28d87 100644
--- a/arch/arm/mach-davinci/dm355.c
+++ b/arch/arm/mach-davinci/dm355.c
@@ -705,7 +705,6 @@ static const struct davinci_soc_info davinci_soc_info_dm355 = {
.pinmux_pins = dm355_pins,
.pinmux_pins_num = ARRAY_SIZE(dm355_pins),
.intc_base = DAVINCI_ARM_INTC_BASE,
- .intc_type = DAVINCI_INTC_TYPE_AINTC,
.intc_irq_prios = dm355_default_priorities,
.intc_irq_num = DAVINCI_N_AINTC_IRQ,
.timer_info = &dm355_timer_info,
diff --git a/arch/arm/mach-davinci/dm365.c b/arch/arm/mach-davinci/dm365.c
index 01fb2b0c82de..3e034f0478d2 100644
--- a/arch/arm/mach-davinci/dm365.c
+++ b/arch/arm/mach-davinci/dm365.c
@@ -722,7 +722,6 @@ static const struct davinci_soc_info davinci_soc_info_dm365 = {
.pinmux_pins = dm365_pins,
.pinmux_pins_num = ARRAY_SIZE(dm365_pins),
.intc_base = DAVINCI_ARM_INTC_BASE,
- .intc_type = DAVINCI_INTC_TYPE_AINTC,
.intc_irq_prios = dm365_default_priorities,
.intc_irq_num = DAVINCI_N_AINTC_IRQ,
.timer_info = &dm365_timer_info,
diff --git a/arch/arm/mach-davinci/dm644x.c b/arch/arm/mach-davinci/dm644x.c
index 38f92b7d413e..66bab4782c62 100644
--- a/arch/arm/mach-davinci/dm644x.c
+++ b/arch/arm/mach-davinci/dm644x.c
@@ -646,7 +646,6 @@ static const struct davinci_soc_info davinci_soc_info_dm644x = {
.pinmux_pins = dm644x_pins,
.pinmux_pins_num = ARRAY_SIZE(dm644x_pins),
.intc_base = DAVINCI_ARM_INTC_BASE,
- .intc_type = DAVINCI_INTC_TYPE_AINTC,
.intc_irq_prios = dm644x_default_priorities,
.intc_irq_num = DAVINCI_N_AINTC_IRQ,
.timer_info = &dm644x_timer_info,
diff --git a/arch/arm/mach-davinci/dm646x.c b/arch/arm/mach-davinci/dm646x.c
index 7dc54b2a610f..45efa715a2c1 100644
--- a/arch/arm/mach-davinci/dm646x.c
+++ b/arch/arm/mach-davinci/dm646x.c
@@ -586,7 +586,6 @@ static const struct davinci_soc_info davinci_soc_info_dm646x = {
.pinmux_pins = dm646x_pins,
.pinmux_pins_num = ARRAY_SIZE(dm646x_pins),
.intc_base = DAVINCI_ARM_INTC_BASE,
- .intc_type = DAVINCI_INTC_TYPE_AINTC,
.intc_irq_prios = dm646x_default_priorities,
.intc_irq_num = DAVINCI_N_AINTC_IRQ,
.timer_info = &dm646x_timer_info,
diff --git a/arch/arm/mach-davinci/include/mach/common.h b/arch/arm/mach-davinci/include/mach/common.h
index 944afd57ee38..34e48de92dcc 100644
--- a/arch/arm/mach-davinci/include/mach/common.h
+++ b/arch/arm/mach-davinci/include/mach/common.h
@@ -21,7 +21,6 @@ void davinci_timer_init(struct clk *clk);
extern void davinci_irq_init(void);
extern void __iomem *davinci_intc_base;
-extern int davinci_intc_type;
struct davinci_timer_instance {
u32 base;
@@ -58,7 +57,6 @@ struct davinci_soc_info {
const struct mux_config *pinmux_pins;
unsigned long pinmux_pins_num;
u32 intc_base;
- int intc_type;
u8 *intc_irq_prios;
unsigned long intc_irq_num;
struct davinci_timer_info *timer_info;
diff --git a/arch/arm/mach-davinci/include/mach/irqs.h b/arch/arm/mach-davinci/include/mach/irqs.h
index edb2ca62321a..03c446635301 100644
--- a/arch/arm/mach-davinci/include/mach/irqs.h
+++ b/arch/arm/mach-davinci/include/mach/irqs.h
@@ -30,9 +30,6 @@
/* Base address */
#define DAVINCI_ARM_INTC_BASE 0x01C48000
-#define DAVINCI_INTC_TYPE_AINTC 0
-#define DAVINCI_INTC_TYPE_CP_INTC 1
-
/* Interrupt lines */
#define IRQ_VDINT0 0
#define IRQ_VDINT1 1
diff --git a/arch/arm/mach-davinci/irq.c b/arch/arm/mach-davinci/irq.c
index 3ce821a06e52..2494d9b36966 100644
--- a/arch/arm/mach-davinci/irq.c
+++ b/arch/arm/mach-davinci/irq.c
@@ -99,7 +99,6 @@ void __init davinci_irq_init(void)
const u8 *davinci_def_priorities = davinci_soc_info.intc_irq_prios;
int rv, irq_base;
- davinci_intc_type = DAVINCI_INTC_TYPE_AINTC;
davinci_intc_base = ioremap(davinci_soc_info.intc_base, SZ_4K);
if (WARN_ON(!davinci_intc_base))
return;
--
2.20.1
From: Bartosz Golaszewski <[email protected]>
We need to create an irq domain if we want to select SPARSE_IRQ. The
cp-intc driver already supports it, but aintc doesn't. Use the helpers
provided by the generic irq chip abstraction.
Signed-off-by: Bartosz Golaszewski <[email protected]>
---
arch/arm/mach-davinci/irq.c | 35 +++++++++++++++++++++++++++--------
1 file changed, 27 insertions(+), 8 deletions(-)
diff --git a/arch/arm/mach-davinci/irq.c b/arch/arm/mach-davinci/irq.c
index 952dc126c390..07d8ef8037e4 100644
--- a/arch/arm/mach-davinci/irq.c
+++ b/arch/arm/mach-davinci/irq.c
@@ -23,6 +23,7 @@
#include <linux/interrupt.h>
#include <linux/irq.h>
#include <linux/io.h>
+#include <linux/irqdomain.h>
#include <mach/hardware.h>
#include <mach/cputype.h>
@@ -40,23 +41,23 @@
#define IRQ_INTPRI0_REG_OFFSET 0x0030
#define IRQ_INTPRI7_REG_OFFSET 0x004C
+static struct irq_domain *davinci_irq_domain;
+
static inline void davinci_irq_writel(unsigned long value, int offset)
{
__raw_writel(value, davinci_intc_base + offset);
}
static __init void
-davinci_alloc_gc(void __iomem *base, unsigned int irq_start, unsigned int num)
+davinci_irq_setup_gc(void __iomem *base,
+ unsigned int irq_start, unsigned int num)
{
struct irq_chip_generic *gc;
struct irq_chip_type *ct;
- gc = irq_alloc_generic_chip("AINTC", 1, irq_start, base, handle_edge_irq);
- if (!gc) {
- pr_err("%s: irq_alloc_generic_chip for IRQ %u failed\n",
- __func__, irq_start);
- return;
- }
+ gc = irq_get_domain_generic_chip(davinci_irq_domain, irq_start);
+ gc->reg_base = base;
+ gc->irq_base = irq_start;
ct = gc->chip_types;
ct->chip.irq_ack = irq_gc_ack_set_bit;
@@ -74,6 +75,7 @@ void __init davinci_irq_init(void)
{
unsigned i, j;
const u8 *davinci_def_priorities = davinci_soc_info.intc_irq_prios;
+ int rv, irq_base;
davinci_intc_type = DAVINCI_INTC_TYPE_AINTC;
davinci_intc_base = ioremap(davinci_soc_info.intc_base, SZ_4K);
@@ -110,8 +112,25 @@ void __init davinci_irq_init(void)
davinci_irq_writel(pri, i);
}
+ irq_base = irq_alloc_descs(-1, 0, davinci_soc_info.intc_irq_num, 0);
+ if (WARN_ON(irq_base < 0))
+ return;
+
+ davinci_irq_domain = irq_domain_add_legacy(NULL,
+ davinci_soc_info.intc_irq_num,
+ irq_base, 0, &irq_domain_simple_ops,
+ NULL);
+ if (WARN_ON(!davinci_irq_domain))
+ return;
+
+ rv = irq_alloc_domain_generic_chips(davinci_irq_domain, 32, 1,
+ "AINTC", handle_edge_irq,
+ IRQ_NOREQUEST | IRQ_NOPROBE, 0, 0);
+ if (WARN_ON(rv))
+ return;
+
for (i = 0, j = 0; i < davinci_soc_info.intc_irq_num; i += 32, j += 0x04)
- davinci_alloc_gc(davinci_intc_base + j, i, 32);
+ davinci_irq_setup_gc(davinci_intc_base + j, irq_base + i, 32);
irq_set_handler(IRQ_TINT1_TINT34, handle_level_irq);
}
--
2.20.1
On 11/02/2019 12:25, Bartosz Golaszewski wrote:
> From: Bartosz Golaszewski <[email protected]>
>
> In order to support SPARSE_IRQ we first need to make davinci use the
> generic irq handler for ARM. Translate the legacy assembly to C and
> put the irq handlers into their respective drivers (aintc and cp-intc).
>
> Signed-off-by: Bartosz Golaszewski <[email protected]>
> ---
> arch/arm/Kconfig | 1 +
> arch/arm/mach-davinci/cp_intc.c | 28 +++++++++++++
> .../mach-davinci/include/mach/entry-macro.S | 39 -------------------
> arch/arm/mach-davinci/irq.c | 23 +++++++++++
> 4 files changed, 52 insertions(+), 39 deletions(-)
> delete mode 100644 arch/arm/mach-davinci/include/mach/entry-macro.S
>
> diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig
> index 664e918e2624..f7770fdcad68 100644
> --- a/arch/arm/Kconfig
> +++ b/arch/arm/Kconfig
> @@ -589,6 +589,7 @@ config ARCH_DAVINCI
> select GENERIC_ALLOCATOR
> select GENERIC_CLOCKEVENTS
> select GENERIC_IRQ_CHIP
> + select GENERIC_IRQ_MULTI_HANDLER
> select GPIOLIB
> select HAVE_IDE
> select PM_GENERIC_DOMAINS if PM
> diff --git a/arch/arm/mach-davinci/cp_intc.c b/arch/arm/mach-davinci/cp_intc.c
> index 67805ca74ff8..4a372add8cf9 100644
> --- a/arch/arm/mach-davinci/cp_intc.c
> +++ b/arch/arm/mach-davinci/cp_intc.c
> @@ -19,9 +19,13 @@
> #include <linux/of_address.h>
> #include <linux/of_irq.h>
>
> +#include <asm/exception.h>
> #include <mach/common.h>
> #include "cp_intc.h"
>
> +#define DAVINCI_CP_INTC_PRI_INDX_MASK GENMASK(9, 0)
> +#define DAVINCI_CP_INTC_GPIR_NONE BIT(31)
> +
> static inline unsigned int cp_intc_read(unsigned offset)
> {
> return __raw_readl(davinci_intc_base + offset);
> @@ -97,6 +101,28 @@ static struct irq_chip cp_intc_irq_chip = {
>
> static struct irq_domain *cp_intc_domain;
>
> +static asmlinkage void __exception_irq_entry
> +cp_intc_handle_irq(struct pt_regs *regs)
> +{
> + int gpir, irqnr, none;
> +
> + /*
> + * The interrupt number is in first ten bits. The NONE field set to 1
> + * indicates a spurious irq.
> + */
> +
> + gpir = cp_intc_read(CP_INTC_PRIO_IDX);
> + irqnr = gpir & DAVINCI_CP_INTC_PRI_INDX_MASK;
> + none = gpir & DAVINCI_CP_INTC_GPIR_NONE;
> +
> + if (unlikely(none)) {
> + pr_err_once("%s: spurious irq!\n", __func__);
> + return;
> + }
> +
> + handle_domain_irq(cp_intc_domain, irqnr, regs);
> +}
> +
> static int cp_intc_host_map(struct irq_domain *h, unsigned int virq,
> irq_hw_number_t hw)
> {
> @@ -196,6 +222,8 @@ int __init cp_intc_of_init(struct device_node *node, struct device_node *parent)
> return -EINVAL;
> }
>
> + set_handle_irq(cp_intc_handle_irq);
> +
> /* Enable global interrupt */
> cp_intc_write(1, CP_INTC_GLOBAL_ENABLE);
>
> diff --git a/arch/arm/mach-davinci/include/mach/entry-macro.S b/arch/arm/mach-davinci/include/mach/entry-macro.S
> deleted file mode 100644
> index cf5f573eb5fd..000000000000
> --- a/arch/arm/mach-davinci/include/mach/entry-macro.S
> +++ /dev/null
> @@ -1,39 +0,0 @@
> -/*
> - * Low-level IRQ helper macros for TI DaVinci-based platforms
> - *
> - * Author: Kevin Hilman, MontaVista Software, Inc. <[email protected]>
> - *
> - * 2007 (c) MontaVista Software, Inc. This file is licensed under
> - * the terms of the GNU General Public License version 2. This program
> - * is licensed "as is" without any warranty of any kind, whether express
> - * or implied.
> - */
> -#include <mach/irqs.h>
> -
> - .macro get_irqnr_preamble, base, tmp
> - ldr \base, =davinci_intc_base
> - ldr \base, [\base]
> - .endm
> -
> - .macro get_irqnr_and_base, irqnr, irqstat, base, tmp
> -#if defined(CONFIG_AINTC) && defined(CONFIG_CP_INTC)
> - ldr \tmp, =davinci_intc_type
> - ldr \tmp, [\tmp]
> - cmp \tmp, #DAVINCI_INTC_TYPE_CP_INTC
> - beq 1001f
> -#endif
> -#if defined(CONFIG_AINTC)
> - ldr \tmp, [\base, #0x14]
> - movs \tmp, \tmp, lsr #2
> - sub \irqnr, \tmp, #1
> - b 1002f
> -#endif
> -#if defined(CONFIG_CP_INTC)
> -1001: ldr \irqnr, [\base, #0x80] /* get irq number */
> - mov \tmp, \irqnr, lsr #31
> - and \irqnr, \irqnr, #0xff /* irq is in bits 0-9 */
> - and \tmp, \tmp, #0x1
> - cmp \tmp, #0x1
> -#endif
> -1002:
> - .endm
> diff --git a/arch/arm/mach-davinci/irq.c b/arch/arm/mach-davinci/irq.c
> index 07d8ef8037e4..3ce821a06e52 100644
> --- a/arch/arm/mach-davinci/irq.c
> +++ b/arch/arm/mach-davinci/irq.c
> @@ -29,11 +29,13 @@
> #include <mach/cputype.h>
> #include <mach/common.h>
> #include <asm/mach/irq.h>
> +#include <asm/exception.h>
>
> #define FIQ_REG0_OFFSET 0x0000
> #define FIQ_REG1_OFFSET 0x0004
> #define IRQ_REG0_OFFSET 0x0008
> #define IRQ_REG1_OFFSET 0x000C
> +#define IRQ_IRQENTRY_OFFSET 0x0014
> #define IRQ_ENT_REG0_OFFSET 0x0018
> #define IRQ_ENT_REG1_OFFSET 0x001C
> #define IRQ_INCTL_REG_OFFSET 0x0020
> @@ -48,6 +50,11 @@ static inline void davinci_irq_writel(unsigned long value, int offset)
> __raw_writel(value, davinci_intc_base + offset);
> }
>
> +static inline unsigned long davinci_irq_readl(int offset)
> +{
> + return __raw_readl(davinci_intc_base + offset);
I appreciate that you're converting assembly code dating from a while
back, but if we're going to do this correctly, I don't think we should
entertain the use of __raw_readl().
Surely the bus has a fixed endianness (and I'd assume it to be LE). Why
aren't you using readl_relaxed() instead, which will have the exact same
generated code with an LE kernel, and will do the right thing should you
run a BE kernel.
Thanks,
M.
--
Jazz is not dead. It just smells funny...
On 11/02/2019 12:25, Bartosz Golaszewski wrote:
> From: Bartosz Golaszewski <[email protected]>
>
> Raplace all calls to __raw_readl() & __raw_writel() with readl_relaxed()
> and writel_relaxed() respectively. It's safe to do as there's no
> endianness conversion being done in the code.
>
> Signed-off-by: Bartosz Golaszewski <[email protected]>
> ---
> arch/arm/mach-davinci/irq.c | 4 ++--
> 1 file changed, 2 insertions(+), 2 deletions(-)
>
> diff --git a/arch/arm/mach-davinci/irq.c b/arch/arm/mach-davinci/irq.c
> index 148c23728bdb..6a7205a844e1 100644
> --- a/arch/arm/mach-davinci/irq.c
> +++ b/arch/arm/mach-davinci/irq.c
> @@ -36,12 +36,12 @@ static struct irq_domain *davinci_aintc_irq_domain;
>
> static inline void davinci_aintc_writel(unsigned long value, int offset)
> {
> - __raw_writel(value, davinci_aintc_base + offset);
> + writel_relaxed(value, davinci_aintc_base + offset);
> }
>
> static inline unsigned long davinci_aintc_readl(int offset)
> {
> - return __raw_readl(davinci_aintc_base + offset);
> + return readl_relaxed(davinci_aintc_base + offset);
> }
>
> static __init void
>
Right. And that's exactly what I'd like to see in patch #3. There is no
point having a separate patch for this when you can do the right thing
from the beginning.
Thanks,
M.
--
Jazz is not dead. It just smells funny...
On 11/02/2019 12:25, Bartosz Golaszewski wrote:
> From: Bartosz Golaszewski <[email protected]>
>
> I've been unable to figure out exactly why, but it seems that the
> IRQ_TINT1_TINT34 interrupt for timer 1 needs to be handled as a
> level irq, not edge like all others.
That's probably because its comparator maintains the interrupt asserted
as long as its value is less than the counter.
Level-trigger timers are the most common thing on this side of the known
universe.
>
> Let's move the handler setup out of the aintc driver where it's lived
> since the beginning and into the dm* SoC-specific files where it
> belongs.
>
> Signed-off-by: Bartosz Golaszewski <[email protected]>
> ---
> arch/arm/mach-davinci/dm355.c | 8 ++++++++
> arch/arm/mach-davinci/dm365.c | 8 ++++++++
> arch/arm/mach-davinci/dm644x.c | 8 ++++++++
> arch/arm/mach-davinci/dm646x.c | 8 ++++++++
> arch/arm/mach-davinci/irq.c | 3 ---
> 5 files changed, 32 insertions(+), 3 deletions(-)
>
> diff --git a/arch/arm/mach-davinci/dm355.c b/arch/arm/mach-davinci/dm355.c
> index c7cd765114af..a732f2ea1d9a 100644
> --- a/arch/arm/mach-davinci/dm355.c
> +++ b/arch/arm/mach-davinci/dm355.c
> @@ -15,6 +15,7 @@
> #include <linux/dma-mapping.h>
> #include <linux/dmaengine.h>
> #include <linux/init.h>
> +#include <linux/irq.h>
> #include <linux/irqchip/irq-davinci-aintc.h>
> #include <linux/platform_data/edma.h>
> #include <linux/platform_data/gpio-davinci.h>
> @@ -744,6 +745,13 @@ void __init dm355_init_time(void)
> psc = ioremap(DAVINCI_PWR_SLEEP_CNTRL_BASE, SZ_4K);
> dm355_psc_init(NULL, psc);
>
> + /*
> + * Nobody knows why anymore, but this interrupt has been handled as
> + * a level irq from the very beginning of davinci support in mainline
> + * linux.
> + */
> + irq_set_handler(DAVINCI_INTC_IRQ(IRQ_TINT1_TINT34), handle_level_irq);
> +
Now, the real question is: why isn't that set as part of the
set_irq_type() callback, instead of hardcoding it in the platform?
This is exactly the kind of information that should come as part of the
DT or from the driver as one of the request_irq() flags.
It would save quite a bit of boilerplate code.
Thanks,
M.
--
Jazz is not dead. It just smells funny...
On 11/02/2019 12:26, Bartosz Golaszewski wrote:
> From: Bartosz Golaszewski <[email protected]>
>
> Use WARN_ON() on eny error in cp-intc initialization and drop all
> custom error messages.
>
> Signed-off-by: Bartosz Golaszewski <[email protected]>
> Reviewed-by: David Lechner <[email protected]>
> ---
> arch/arm/mach-davinci/cp_intc.c | 10 +++-------
> 1 file changed, 3 insertions(+), 7 deletions(-)
>
> diff --git a/arch/arm/mach-davinci/cp_intc.c b/arch/arm/mach-davinci/cp_intc.c
> index f3787ae4cdbd..c1efb9390655 100644
> --- a/arch/arm/mach-davinci/cp_intc.c
> +++ b/arch/arm/mach-davinci/cp_intc.c
> @@ -200,20 +200,16 @@ davinci_cp_intc_do_init(const struct davinci_cp_intc_config *config,
> DAVINCI_CP_INTC_CHAN_MAP(offset));
>
> irq_base = irq_alloc_descs(-1, 0, config->num_irqs, 0);
> - if (irq_base < 0) {
> - pr_warn("Couldn't allocate IRQ numbers\n");
> - irq_base = 0;
> - }
> + if (WARN_ON(irq_base < 0))
> + return irq_base;
>
> /* create a legacy host */
> davinci_cp_intc_irq_domain = irq_domain_add_legacy(
> node, config->num_irqs, irq_base, 0,
> &davinci_cp_intc_irq_domain_ops, NULL);
>
> - if (!davinci_cp_intc_irq_domain) {
> - pr_err("cp_intc: failed to allocate irq host!\n");
> + if (WARN_ON(!davinci_cp_intc_irq_domain))
> return -EINVAL;
> - }
>
> set_handle_irq(davinci_cp_intc_handle_irq);
>
>
I'm sorry, but how is turning an explicit message into a long stack
trace really useful?
M.
--
Jazz is not dead. It just smells funny...
On 11/02/2019 12:26, Bartosz Golaszewski wrote:
> From: Bartosz Golaszewski <[email protected]>
>
> Raplace all calls to __raw_readl() & __raw_writel() with readl_relaxed()
> and writel_relaxed() respectively. It's safe to do as there's no
> endianness conversion being done in the code.
>
> Signed-off-by: Bartosz Golaszewski <[email protected]>
> ---
> arch/arm/mach-davinci/cp_intc.c | 4 ++--
> 1 file changed, 2 insertions(+), 2 deletions(-)
>
> diff --git a/arch/arm/mach-davinci/cp_intc.c b/arch/arm/mach-davinci/cp_intc.c
> index c1efb9390655..4bbf0eba1920 100644
> --- a/arch/arm/mach-davinci/cp_intc.c
> +++ b/arch/arm/mach-davinci/cp_intc.c
> @@ -45,13 +45,13 @@ static struct irq_domain *davinci_cp_intc_irq_domain;
>
> static inline unsigned int davinci_cp_intc_read(unsigned int offset)
> {
> - return __raw_readl(davinci_cp_intc_base + offset);
> + return readl_relaxed(davinci_cp_intc_base + offset);
> }
>
> static inline void davinci_cp_intc_write(unsigned long value,
> unsigned int offset)
> {
> - __raw_writel(value, davinci_cp_intc_base + offset);
> + writel_relaxed(value, davinci_cp_intc_base + offset);
> }
>
> static void davinci_cp_intc_ack_irq(struct irq_data *d)
>
Same thing. Please merge this patch with the one that introduced the
__raw_writel() stuff.
M.
--
Jazz is not dead. It just smells funny...
pon., 11 lut 2019 o 13:50 Marc Zyngier <[email protected]> napisał(a):
>
> On 11/02/2019 12:25, Bartosz Golaszewski wrote:
> > From: Bartosz Golaszewski <[email protected]>
> >
> > In order to support SPARSE_IRQ we first need to make davinci use the
> > generic irq handler for ARM. Translate the legacy assembly to C and
> > put the irq handlers into their respective drivers (aintc and cp-intc).
> >
> > Signed-off-by: Bartosz Golaszewski <[email protected]>
> > ---
> > arch/arm/Kconfig | 1 +
> > arch/arm/mach-davinci/cp_intc.c | 28 +++++++++++++
> > .../mach-davinci/include/mach/entry-macro.S | 39 -------------------
> > arch/arm/mach-davinci/irq.c | 23 +++++++++++
> > 4 files changed, 52 insertions(+), 39 deletions(-)
> > delete mode 100644 arch/arm/mach-davinci/include/mach/entry-macro.S
> >
> > diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig
> > index 664e918e2624..f7770fdcad68 100644
> > --- a/arch/arm/Kconfig
> > +++ b/arch/arm/Kconfig
> > @@ -589,6 +589,7 @@ config ARCH_DAVINCI
> > select GENERIC_ALLOCATOR
> > select GENERIC_CLOCKEVENTS
> > select GENERIC_IRQ_CHIP
> > + select GENERIC_IRQ_MULTI_HANDLER
> > select GPIOLIB
> > select HAVE_IDE
> > select PM_GENERIC_DOMAINS if PM
> > diff --git a/arch/arm/mach-davinci/cp_intc.c b/arch/arm/mach-davinci/cp_intc.c
> > index 67805ca74ff8..4a372add8cf9 100644
> > --- a/arch/arm/mach-davinci/cp_intc.c
> > +++ b/arch/arm/mach-davinci/cp_intc.c
> > @@ -19,9 +19,13 @@
> > #include <linux/of_address.h>
> > #include <linux/of_irq.h>
> >
> > +#include <asm/exception.h>
> > #include <mach/common.h>
> > #include "cp_intc.h"
> >
> > +#define DAVINCI_CP_INTC_PRI_INDX_MASK GENMASK(9, 0)
> > +#define DAVINCI_CP_INTC_GPIR_NONE BIT(31)
> > +
> > static inline unsigned int cp_intc_read(unsigned offset)
> > {
> > return __raw_readl(davinci_intc_base + offset);
> > @@ -97,6 +101,28 @@ static struct irq_chip cp_intc_irq_chip = {
> >
> > static struct irq_domain *cp_intc_domain;
> >
> > +static asmlinkage void __exception_irq_entry
> > +cp_intc_handle_irq(struct pt_regs *regs)
> > +{
> > + int gpir, irqnr, none;
> > +
> > + /*
> > + * The interrupt number is in first ten bits. The NONE field set to 1
> > + * indicates a spurious irq.
> > + */
> > +
> > + gpir = cp_intc_read(CP_INTC_PRIO_IDX);
> > + irqnr = gpir & DAVINCI_CP_INTC_PRI_INDX_MASK;
> > + none = gpir & DAVINCI_CP_INTC_GPIR_NONE;
> > +
> > + if (unlikely(none)) {
> > + pr_err_once("%s: spurious irq!\n", __func__);
> > + return;
> > + }
> > +
> > + handle_domain_irq(cp_intc_domain, irqnr, regs);
> > +}
> > +
> > static int cp_intc_host_map(struct irq_domain *h, unsigned int virq,
> > irq_hw_number_t hw)
> > {
> > @@ -196,6 +222,8 @@ int __init cp_intc_of_init(struct device_node *node, struct device_node *parent)
> > return -EINVAL;
> > }
> >
> > + set_handle_irq(cp_intc_handle_irq);
> > +
> > /* Enable global interrupt */
> > cp_intc_write(1, CP_INTC_GLOBAL_ENABLE);
> >
> > diff --git a/arch/arm/mach-davinci/include/mach/entry-macro.S b/arch/arm/mach-davinci/include/mach/entry-macro.S
> > deleted file mode 100644
> > index cf5f573eb5fd..000000000000
> > --- a/arch/arm/mach-davinci/include/mach/entry-macro.S
> > +++ /dev/null
> > @@ -1,39 +0,0 @@
> > -/*
> > - * Low-level IRQ helper macros for TI DaVinci-based platforms
> > - *
> > - * Author: Kevin Hilman, MontaVista Software, Inc. <[email protected]>
> > - *
> > - * 2007 (c) MontaVista Software, Inc. This file is licensed under
> > - * the terms of the GNU General Public License version 2. This program
> > - * is licensed "as is" without any warranty of any kind, whether express
> > - * or implied.
> > - */
> > -#include <mach/irqs.h>
> > -
> > - .macro get_irqnr_preamble, base, tmp
> > - ldr \base, =davinci_intc_base
> > - ldr \base, [\base]
> > - .endm
> > -
> > - .macro get_irqnr_and_base, irqnr, irqstat, base, tmp
> > -#if defined(CONFIG_AINTC) && defined(CONFIG_CP_INTC)
> > - ldr \tmp, =davinci_intc_type
> > - ldr \tmp, [\tmp]
> > - cmp \tmp, #DAVINCI_INTC_TYPE_CP_INTC
> > - beq 1001f
> > -#endif
> > -#if defined(CONFIG_AINTC)
> > - ldr \tmp, [\base, #0x14]
> > - movs \tmp, \tmp, lsr #2
> > - sub \irqnr, \tmp, #1
> > - b 1002f
> > -#endif
> > -#if defined(CONFIG_CP_INTC)
> > -1001: ldr \irqnr, [\base, #0x80] /* get irq number */
> > - mov \tmp, \irqnr, lsr #31
> > - and \irqnr, \irqnr, #0xff /* irq is in bits 0-9 */
> > - and \tmp, \tmp, #0x1
> > - cmp \tmp, #0x1
> > -#endif
> > -1002:
> > - .endm
> > diff --git a/arch/arm/mach-davinci/irq.c b/arch/arm/mach-davinci/irq.c
> > index 07d8ef8037e4..3ce821a06e52 100644
> > --- a/arch/arm/mach-davinci/irq.c
> > +++ b/arch/arm/mach-davinci/irq.c
> > @@ -29,11 +29,13 @@
> > #include <mach/cputype.h>
> > #include <mach/common.h>
> > #include <asm/mach/irq.h>
> > +#include <asm/exception.h>
> >
> > #define FIQ_REG0_OFFSET 0x0000
> > #define FIQ_REG1_OFFSET 0x0004
> > #define IRQ_REG0_OFFSET 0x0008
> > #define IRQ_REG1_OFFSET 0x000C
> > +#define IRQ_IRQENTRY_OFFSET 0x0014
> > #define IRQ_ENT_REG0_OFFSET 0x0018
> > #define IRQ_ENT_REG1_OFFSET 0x001C
> > #define IRQ_INCTL_REG_OFFSET 0x0020
> > @@ -48,6 +50,11 @@ static inline void davinci_irq_writel(unsigned long value, int offset)
> > __raw_writel(value, davinci_intc_base + offset);
> > }
> >
> > +static inline unsigned long davinci_irq_readl(int offset)
> > +{
> > + return __raw_readl(davinci_intc_base + offset);
>
> I appreciate that you're converting assembly code dating from a while
> back, but if we're going to do this correctly, I don't think we should
> entertain the use of __raw_readl().
>
> Surely the bus has a fixed endianness (and I'd assume it to be LE). Why
> aren't you using readl_relaxed() instead, which will have the exact same
> generated code with an LE kernel, and will do the right thing should you
> run a BE kernel.
>
Oh snap! I actually converted other calls to the relaxed variants, but
missed this patch.
Thanks for spotting that.
Bart
pon., 11 lut 2019 o 14:08 Marc Zyngier <[email protected]> napisał(a):
>
> On 11/02/2019 12:26, Bartosz Golaszewski wrote:
> > From: Bartosz Golaszewski <[email protected]>
> >
> > Use WARN_ON() on eny error in cp-intc initialization and drop all
> > custom error messages.
> >
> > Signed-off-by: Bartosz Golaszewski <[email protected]>
> > Reviewed-by: David Lechner <[email protected]>
> > ---
> > arch/arm/mach-davinci/cp_intc.c | 10 +++-------
> > 1 file changed, 3 insertions(+), 7 deletions(-)
> >
> > diff --git a/arch/arm/mach-davinci/cp_intc.c b/arch/arm/mach-davinci/cp_intc.c
> > index f3787ae4cdbd..c1efb9390655 100644
> > --- a/arch/arm/mach-davinci/cp_intc.c
> > +++ b/arch/arm/mach-davinci/cp_intc.c
> > @@ -200,20 +200,16 @@ davinci_cp_intc_do_init(const struct davinci_cp_intc_config *config,
> > DAVINCI_CP_INTC_CHAN_MAP(offset));
> >
> > irq_base = irq_alloc_descs(-1, 0, config->num_irqs, 0);
> > - if (irq_base < 0) {
> > - pr_warn("Couldn't allocate IRQ numbers\n");
> > - irq_base = 0;
> > - }
> > + if (WARN_ON(irq_base < 0))
> > + return irq_base;
> >
> > /* create a legacy host */
> > davinci_cp_intc_irq_domain = irq_domain_add_legacy(
> > node, config->num_irqs, irq_base, 0,
> > &davinci_cp_intc_irq_domain_ops, NULL);
> >
> > - if (!davinci_cp_intc_irq_domain) {
> > - pr_err("cp_intc: failed to allocate irq host!\n");
> > + if (WARN_ON(!davinci_cp_intc_irq_domain))
> > return -EINVAL;
> > - }
> >
> > set_handle_irq(davinci_cp_intc_handle_irq);
> >
> >
>
> I'm sorry, but how is turning an explicit message into a long stack
> trace really useful?
>
If any of these calls fails, the system is fried. I assumed that a
stack trace will point users straight to the offending line.
Bart
On 11/02/2019 13:10, Bartosz Golaszewski wrote:
> pon., 11 lut 2019 o 14:08 Marc Zyngier <[email protected]> napisał(a):
>>
>> On 11/02/2019 12:26, Bartosz Golaszewski wrote:
>>> From: Bartosz Golaszewski <[email protected]>
>>>
>>> Use WARN_ON() on eny error in cp-intc initialization and drop all
>>> custom error messages.
>>>
>>> Signed-off-by: Bartosz Golaszewski <[email protected]>
>>> Reviewed-by: David Lechner <[email protected]>
>>> ---
>>> arch/arm/mach-davinci/cp_intc.c | 10 +++-------
>>> 1 file changed, 3 insertions(+), 7 deletions(-)
>>>
>>> diff --git a/arch/arm/mach-davinci/cp_intc.c b/arch/arm/mach-davinci/cp_intc.c
>>> index f3787ae4cdbd..c1efb9390655 100644
>>> --- a/arch/arm/mach-davinci/cp_intc.c
>>> +++ b/arch/arm/mach-davinci/cp_intc.c
>>> @@ -200,20 +200,16 @@ davinci_cp_intc_do_init(const struct davinci_cp_intc_config *config,
>>> DAVINCI_CP_INTC_CHAN_MAP(offset));
>>>
>>> irq_base = irq_alloc_descs(-1, 0, config->num_irqs, 0);
>>> - if (irq_base < 0) {
>>> - pr_warn("Couldn't allocate IRQ numbers\n");
>>> - irq_base = 0;
>>> - }
>>> + if (WARN_ON(irq_base < 0))
>>> + return irq_base;
>>>
>>> /* create a legacy host */
>>> davinci_cp_intc_irq_domain = irq_domain_add_legacy(
>>> node, config->num_irqs, irq_base, 0,
>>> &davinci_cp_intc_irq_domain_ops, NULL);
>>>
>>> - if (!davinci_cp_intc_irq_domain) {
>>> - pr_err("cp_intc: failed to allocate irq host!\n");
>>> + if (WARN_ON(!davinci_cp_intc_irq_domain))
>>> return -EINVAL;
>>> - }
>>>
>>> set_handle_irq(davinci_cp_intc_handle_irq);
>>>
>>>
>>
>> I'm sorry, but how is turning an explicit message into a long stack
>> trace really useful?
>>
>
> If any of these calls fails, the system is fried. I assumed that a
> stack trace will point users straight to the offending line.
The message is a really good clue, because you can actually grep for it,
and it gives you the exact symptom. You are actively removing
information here.
M.
--
Jazz is not dead. It just smells funny...
On 11/02/19 6:30 PM, Marc Zyngier wrote:
> On 11/02/2019 12:25, Bartosz Golaszewski wrote:
>> + /*
>> + * Nobody knows why anymore, but this interrupt has been handled as
>> + * a level irq from the very beginning of davinci support in mainline
>> + * linux.
>> + */
>> + irq_set_handler(DAVINCI_INTC_IRQ(IRQ_TINT1_TINT34), handle_level_irq);
>> +
>
> Now, the real question is: why isn't that set as part of the
> set_irq_type() callback, instead of hardcoding it in the platform?
>
> This is exactly the kind of information that should come as part of the
> DT or from the driver as one of the request_irq() flags.
>
> It would save quite a bit of boilerplate code.
True, but I would keep this series feature/bug compatible with existing
code. Without that, tracking regression reports will be a nightmare. Its
a pretty major change already.
We can (and should) fix this, but I prefer thats done as follow-up patch
after this series is merged. That way a revert is easy.
BTW, I don't quite see which in-kernel module uses this interrupt. It
might be some out-of-tree code, or some code that since got removed from
kernel.
Thanks,
Sekhar
On 11/02/19 5:55 PM, Bartosz Golaszewski wrote:
> From: Bartosz Golaszewski <[email protected]>
>
> NOTE: resending due to missing irqchip maintainers in Cc
>
> This series ports the davinci platform to using SPARSE_IRQ, cleans up
> the irqchip drivers and moves them over to drivers/irqchip.
>
> The series can be logically split into four parts. The first (1-8) aims
> at introducing support for SPARSE_IRQ. It contains a couple changes
> required for that functionality and the final patch actually selecting
> it.
>
> Second part (9-19) makes the aintc driver suitable for drivers/irqchip
> and eventually moves it over there.
>
> Part 3 (20-32) does the same for the cp-intc driver.
>
> Last patch removes unnecessary code.
>
> The series has been tested on da850-lcdk (for cp-intc) and
> dm365-evm (for aintc).
There is build breakage in drivers/input/keyboard/davinci_keyscan.c
after this series due to <mach/irqs.h> removal.
Thanks,
Sekhar
On 11/02/19 5:55 PM, Bartosz Golaszewski wrote:
> @@ -74,6 +75,7 @@ void __init davinci_irq_init(void)
> {
> unsigned i, j;
> const u8 *davinci_def_priorities = davinci_soc_info.intc_irq_prios;
> + int rv, irq_base;
>
> davinci_intc_type = DAVINCI_INTC_TYPE_AINTC;
> davinci_intc_base = ioremap(davinci_soc_info.intc_base, SZ_4K);
> @@ -110,8 +112,25 @@ void __init davinci_irq_init(void)
> davinci_irq_writel(pri, i);
> }
>
> + irq_base = irq_alloc_descs(-1, 0, davinci_soc_info.intc_irq_num, 0);
> + if (WARN_ON(irq_base < 0))
> + return;
> +
> + davinci_irq_domain = irq_domain_add_legacy(NULL,
> + davinci_soc_info.intc_irq_num,
> + irq_base, 0, &irq_domain_simple_ops,
> + NULL);
> + if (WARN_ON(!davinci_irq_domain))
> + return;
> +
> + rv = irq_alloc_domain_generic_chips(davinci_irq_domain, 32, 1,
> + "AINTC", handle_edge_irq,
> + IRQ_NOREQUEST | IRQ_NOPROBE, 0, 0);
> + if (WARN_ON(rv))
> + return;
Like you have done in other places, use "ret" instead of "rv" for
consistency.
Thanks,
Sekhar
wt., 12 lut 2019 o 09:24 Sekhar Nori <[email protected]> napisał(a):
>
> On 11/02/19 5:55 PM, Bartosz Golaszewski wrote:
> > From: Bartosz Golaszewski <[email protected]>
> >
> > NOTE: resending due to missing irqchip maintainers in Cc
> >
> > This series ports the davinci platform to using SPARSE_IRQ, cleans up
> > the irqchip drivers and moves them over to drivers/irqchip.
> >
> > The series can be logically split into four parts. The first (1-8) aims
> > at introducing support for SPARSE_IRQ. It contains a couple changes
> > required for that functionality and the final patch actually selecting
> > it.
> >
> > Second part (9-19) makes the aintc driver suitable for drivers/irqchip
> > and eventually moves it over there.
> >
> > Part 3 (20-32) does the same for the cp-intc driver.
> >
> > Last patch removes unnecessary code.
> >
> > The series has been tested on da850-lcdk (for cp-intc) and
> > dm365-evm (for aintc).
>
> There is build breakage in drivers/input/keyboard/davinci_keyscan.c
> after this series due to <mach/irqs.h> removal.
>
> Thanks,
> Sekhar
Thanks, I'll fix that.
Bart
On 11/02/19 5:55 PM, Bartosz Golaszewski wrote:
> diff --git a/arch/arm/mach-davinci/usb.c b/arch/arm/mach-davinci/usb.c
> index 9d4a58a3113a..cde72ba35dc3 100644
> --- a/arch/arm/mach-davinci/usb.c
> +++ b/arch/arm/mach-davinci/usb.c
> @@ -5,13 +5,14 @@
> #include <linux/init.h>
> #include <linux/platform_device.h>
> #include <linux/dma-mapping.h>
> -
> +#include <linux/platform_data/usb-davinci.h>
> #include <linux/usb/musb.h>
>
> #include <mach/common.h>
> -#include <mach/irqs.h>
> #include <mach/cputype.h>
> -#include <linux/platform_data/usb-davinci.h>
> +
> +
Drop one extra empty line here.
> +#include "irqs.h"
Thanks,
Sekhar
pon., 11 lut 2019 o 14:08 Marc Zyngier <[email protected]> napisał(a):
>
> On 11/02/2019 12:26, Bartosz Golaszewski wrote:
> > From: Bartosz Golaszewski <[email protected]>
> >
> > Raplace all calls to __raw_readl() & __raw_writel() with readl_relaxed()
> > and writel_relaxed() respectively. It's safe to do as there's no
> > endianness conversion being done in the code.
> >
> > Signed-off-by: Bartosz Golaszewski <[email protected]>
> > ---
> > arch/arm/mach-davinci/cp_intc.c | 4 ++--
> > 1 file changed, 2 insertions(+), 2 deletions(-)
> >
> > diff --git a/arch/arm/mach-davinci/cp_intc.c b/arch/arm/mach-davinci/cp_intc.c
> > index c1efb9390655..4bbf0eba1920 100644
> > --- a/arch/arm/mach-davinci/cp_intc.c
> > +++ b/arch/arm/mach-davinci/cp_intc.c
> > @@ -45,13 +45,13 @@ static struct irq_domain *davinci_cp_intc_irq_domain;
> >
> > static inline unsigned int davinci_cp_intc_read(unsigned int offset)
> > {
> > - return __raw_readl(davinci_cp_intc_base + offset);
> > + return readl_relaxed(davinci_cp_intc_base + offset);
> > }
> >
> > static inline void davinci_cp_intc_write(unsigned long value,
> > unsigned int offset)
> > {
> > - __raw_writel(value, davinci_cp_intc_base + offset);
> > + writel_relaxed(value, davinci_cp_intc_base + offset);
> > }
> >
> > static void davinci_cp_intc_ack_irq(struct irq_data *d)
> >
>
> Same thing. Please merge this patch with the one that introduced the
> __raw_writel() stuff.
>
In this case, none of my patches introduced it - it used to be like
that from the beginning, so a separate patch is justified.
Bart
On Tue, 12 Feb 2019 05:51:11 +0000,
Sekhar Nori <[email protected]> wrote:
>
> On 11/02/19 6:30 PM, Marc Zyngier wrote:
> > On 11/02/2019 12:25, Bartosz Golaszewski wrote:
>
> >> + /*
> >> + * Nobody knows why anymore, but this interrupt has been handled as
> >> + * a level irq from the very beginning of davinci support in mainline
> >> + * linux.
> >> + */
> >> + irq_set_handler(DAVINCI_INTC_IRQ(IRQ_TINT1_TINT34), handle_level_irq);
> >> +
> >
> > Now, the real question is: why isn't that set as part of the
> > set_irq_type() callback, instead of hardcoding it in the platform?
> >
> > This is exactly the kind of information that should come as part of the
> > DT or from the driver as one of the request_irq() flags.
> >
> > It would save quite a bit of boilerplate code.
>
> True, but I would keep this series feature/bug compatible with existing
> code. Without that, tracking regression reports will be a nightmare. Its
> a pretty major change already.
>
> We can (and should) fix this, but I prefer thats done as follow-up patch
> after this series is merged. That way a revert is easy.
And I'd rather see it done already, as a preliminary to this
series. If I'm going to take 35 patches that are mostly churn, surely
we can another couple to fix something that is a real bug.
> BTW, I don't quite see which in-kernel module uses this interrupt. It
> might be some out-of-tree code, or some code that since got removed from
> kernel.
Yet another reason to fix it now.
Thanks,
M.
--
Jazz is not dead, it just smell funny.