Some SoCs adds a bus clock gate to the Mali Midgard GPU.
Add the binding for the bus clock.
Signed-off-by: Icenowy Zheng <[email protected]>
---
Documentation/devicetree/bindings/gpu/arm,mali-midgard.txt | 6 ++++++
1 file changed, 6 insertions(+)
diff --git a/Documentation/devicetree/bindings/gpu/arm,mali-midgard.txt b/Documentation/devicetree/bindings/gpu/arm,mali-midgard.txt
index 18a2cde2e5f3..02f870cd60e6 100644
--- a/Documentation/devicetree/bindings/gpu/arm,mali-midgard.txt
+++ b/Documentation/devicetree/bindings/gpu/arm,mali-midgard.txt
@@ -31,6 +31,12 @@ Optional properties:
- clocks : Phandle to clock for the Mali Midgard device.
+- clock-names : Specify the names of the clocks specified in clocks
+ when multiple clocks are present.
+ * bus: bus clock for the GPU
+ * core: clock driving the GPU itself (When only one clock is present,
+ assume it's this clock.)
+
- mali-supply : Phandle to regulator for the Mali device. Refer to
Documentation/devicetree/bindings/regulator/regulator.txt for details.
--
2.18.1
Allwinner H6 SoC uses a Mali T720 GPU, which is one of the GPUs in the
Midgard GPU product line.
Add binding for the H6 Mali Midgard GPU.
Signed-off-by: Icenowy Zheng <[email protected]>
---
.../devicetree/bindings/gpu/arm,mali-midgard.txt | 13 +++++++++++++
1 file changed, 13 insertions(+)
diff --git a/Documentation/devicetree/bindings/gpu/arm,mali-midgard.txt b/Documentation/devicetree/bindings/gpu/arm,mali-midgard.txt
index 02f870cd60e6..c897dd7be48f 100644
--- a/Documentation/devicetree/bindings/gpu/arm,mali-midgard.txt
+++ b/Documentation/devicetree/bindings/gpu/arm,mali-midgard.txt
@@ -18,6 +18,7 @@ Required properties:
+ "amlogic,meson-gxm-mali"
+ "rockchip,rk3288-mali"
+ "rockchip,rk3399-mali"
+ + "allwinner,sun50i-h6-mali"
- reg : Physical base address of the device and length of the register area.
@@ -44,6 +45,18 @@ Optional properties:
for details.
+Vendor-specific bindings
+------------------------
+
+The Mali GPU is integrated very differently from one SoC to
+another. In order to accomodate those differences, you have the option
+to specify one more vendor-specific compatible, among:
+
+ - allwinner,sun50i-h6-mali
+ Required properties:
+ * resets: phandle to the reset line for the GPU
+
+
Example for a Mali-T760:
gpu@ffa30000 {
--
2.18.1
在 2018-11-27二的 15:42 +0800，Icenowy Zheng写道：
> Some SoCs adds a bus clock gate to the Mali Midgard GPU.
>
> Add the binding for the bus clock.
>
> Signed-off-by: Icenowy Zheng <[email protected]>
Could anyone have a check on this patchset?
> ---
> Documentation/devicetree/bindings/gpu/arm,mali-midgard.txt | 6
> ++++++
> 1 file changed, 6 insertions(+)
>
> diff --git a/Documentation/devicetree/bindings/gpu/arm,mali-
> midgard.txt b/Documentation/devicetree/bindings/gpu/arm,mali-
> midgard.txt
> index 18a2cde2e5f3..02f870cd60e6 100644
> --- a/Documentation/devicetree/bindings/gpu/arm,mali-midgard.txt
> +++ b/Documentation/devicetree/bindings/gpu/arm,mali-midgard.txt
> @@ -31,6 +31,12 @@ Optional properties:
>
> - clocks : Phandle to clock for the Mali Midgard device.
>
> +- clock-names : Specify the names of the clocks specified in clocks
> + when multiple clocks are present.
> + * bus: bus clock for the GPU
> + * core: clock driving the GPU itself (When only one clock is
> present,
> + assume it's this clock.)
> +
> - mali-supply : Phandle to regulator for the Mali device. Refer to
> Documentation/devicetree/bindings/regulator/regulator.txt for
> details.
>
Am Dienstag, 27. November 2018, 08:42:49 CET schrieb Icenowy Zheng:
> Allwinner H6 SoC uses a Mali T720 GPU, which is one of the GPUs in the
> Midgard GPU product line.
>
> Add binding for the H6 Mali Midgard GPU.
>
> Signed-off-by: Icenowy Zheng <[email protected]>
> ---
> .../devicetree/bindings/gpu/arm,mali-midgard.txt | 13 +++++++++++++
> 1 file changed, 13 insertions(+)
>
> diff --git a/Documentation/devicetree/bindings/gpu/arm,mali-midgard.txt b/Documentation/devicetree/bindings/gpu/arm,mali-midgard.txt
> index 02f870cd60e6..c897dd7be48f 100644
> --- a/Documentation/devicetree/bindings/gpu/arm,mali-midgard.txt
> +++ b/Documentation/devicetree/bindings/gpu/arm,mali-midgard.txt
> @@ -18,6 +18,7 @@ Required properties:
> + "amlogic,meson-gxm-mali"
> + "rockchip,rk3288-mali"
> + "rockchip,rk3399-mali"
> + + "allwinner,sun50i-h6-mali"
I'd think you might want to keep an alphabetical sorting here, aka
above amlogic, otherwise the list will probably become hard to read
at some later point.
> - reg : Physical base address of the device and length of the register area.
>
> @@ -44,6 +45,18 @@ Optional properties:
> for details.
>
>
> +Vendor-specific bindings
> +------------------------
> +
> +The Mali GPU is integrated very differently from one SoC to
> +another. In order to accomodate those differences, you have the option
> +to specify one more vendor-specific compatible, among:
> +
> + - allwinner,sun50i-h6-mali
> + Required properties:
> + * resets: phandle to the reset line for the GPU
While this paragraph is similar to how it is done in Utgard, I'm
wondering why we cannot just describe the "resets" as regular
optional property above that.
Heiko
On Mon, Dec 03, 2018 at 01:25:21PM +0100, Heiko Stuebner wrote:
> > - reg : Physical base address of the device and length of the register area.
> >
> > @@ -44,6 +45,18 @@ Optional properties:
> > for details.
> >
> >
> > +Vendor-specific bindings
> > +------------------------
> > +
> > +The Mali GPU is integrated very differently from one SoC to
> > +another. In order to accomodate those differences, you have the option
> > +to specify one more vendor-specific compatible, among:
> > +
> > + - allwinner,sun50i-h6-mali
> > + Required properties:
> > + * resets: phandle to the reset line for the GPU
>
> While this paragraph is similar to how it is done in Utgard, I'm
> wondering why we cannot just describe the "resets" as regular
> optional property above that.
Because it's not really optional, it's mandatory on some platforms
(like this one) and has no significance on others.
Maxime
--
Maxime Ripard, Bootlin
Embedded Linux and Kernel engineering
https://bootlin.com
On Mon, Dec 3, 2018 at 6:25 AM Heiko Stuebner <[email protected]> wrote:
>
> Am Dienstag, 27. November 2018, 08:42:49 CET schrieb Icenowy Zheng:
> > Allwinner H6 SoC uses a Mali T720 GPU, which is one of the GPUs in the
> > Midgard GPU product line.
> >
> > Add binding for the H6 Mali Midgard GPU.
> >
> > Signed-off-by: Icenowy Zheng <[email protected]>
> > ---
> > .../devicetree/bindings/gpu/arm,mali-midgard.txt | 13 +++++++++++++
> > 1 file changed, 13 insertions(+)
> >
> > diff --git a/Documentation/devicetree/bindings/gpu/arm,mali-midgard.txt b/Documentation/devicetree/bindings/gpu/arm,mali-midgard.txt
> > index 02f870cd60e6..c897dd7be48f 100644
> > --- a/Documentation/devicetree/bindings/gpu/arm,mali-midgard.txt
> > +++ b/Documentation/devicetree/bindings/gpu/arm,mali-midgard.txt
> > @@ -18,6 +18,7 @@ Required properties:
> > + "amlogic,meson-gxm-mali"
> > + "rockchip,rk3288-mali"
> > + "rockchip,rk3399-mali"
> > + + "allwinner,sun50i-h6-mali"
>
> I'd think you might want to keep an alphabetical sorting here, aka
> above amlogic, otherwise the list will probably become hard to read
> at some later point.
>
>
> > - reg : Physical base address of the device and length of the register area.
> >
> > @@ -44,6 +45,18 @@ Optional properties:
> > for details.
> >
> >
> > +Vendor-specific bindings
> > +------------------------
> > +
> > +The Mali GPU is integrated very differently from one SoC to
> > +another. In order to accomodate those differences, you have the option
> > +to specify one more vendor-specific compatible, among:
> > +
> > + - allwinner,sun50i-h6-mali
> > + Required properties:
> > + * resets: phandle to the reset line for the GPU
>
> While this paragraph is similar to how it is done in Utgard, I'm
> wondering why we cannot just describe the "resets" as regular
> optional property above that.
Optional is fine, but I don't want to see every vendor doing their own
definition (there's a similar patch for meson[1]). Please first figure
out how many resets the IP block has. ARM should help as they were
eager for me to accept this binding in the first place. Then we can
see if vendors have extra resets.
Rob
[1] https://patchwork.ozlabs.org/patch/1010406/
On Tue, Nov 27, 2018 at 03:42:48PM +0800, Icenowy Zheng wrote:
> Some SoCs adds a bus clock gate to the Mali Midgard GPU.
>
> Add the binding for the bus clock.
>
> Signed-off-by: Icenowy Zheng <[email protected]>
> ---
> Documentation/devicetree/bindings/gpu/arm,mali-midgard.txt | 6 ++++++
> 1 file changed, 6 insertions(+)
>
> diff --git a/Documentation/devicetree/bindings/gpu/arm,mali-midgard.txt b/Documentation/devicetree/bindings/gpu/arm,mali-midgard.txt
> index 18a2cde2e5f3..02f870cd60e6 100644
> --- a/Documentation/devicetree/bindings/gpu/arm,mali-midgard.txt
> +++ b/Documentation/devicetree/bindings/gpu/arm,mali-midgard.txt
> @@ -31,6 +31,12 @@ Optional properties:
>
> - clocks : Phandle to clock for the Mali Midgard device.
>
> +- clock-names : Specify the names of the clocks specified in clocks
> + when multiple clocks are present.
> + * bus: bus clock for the GPU
> + * core: clock driving the GPU itself (When only one clock is present,
> + assume it's this clock.)
'core' should be first since it already exists.
> +
> - mali-supply : Phandle to regulator for the Mali device. Refer to
> Documentation/devicetree/bindings/regulator/regulator.txt for details.
>
> --
> 2.18.1
>
On Tue, Nov 27, 2018 at 03:42:49PM +0800, Icenowy Zheng wrote:
> Allwinner H6 SoC uses a Mali T720 GPU, which is one of the GPUs in the
> Midgard GPU product line.
>
> Add binding for the H6 Mali Midgard GPU.
>
> Signed-off-by: Icenowy Zheng <[email protected]>
> ---
> .../devicetree/bindings/gpu/arm,mali-midgard.txt | 13 +++++++++++++
> 1 file changed, 13 insertions(+)
>
> diff --git a/Documentation/devicetree/bindings/gpu/arm,mali-midgard.txt b/Documentation/devicetree/bindings/gpu/arm,mali-midgard.txt
> index 02f870cd60e6..c897dd7be48f 100644
> --- a/Documentation/devicetree/bindings/gpu/arm,mali-midgard.txt
> +++ b/Documentation/devicetree/bindings/gpu/arm,mali-midgard.txt
> @@ -18,6 +18,7 @@ Required properties:
> + "amlogic,meson-gxm-mali"
> + "rockchip,rk3288-mali"
> + "rockchip,rk3399-mali"
> + + "allwinner,sun50i-h6-mali"
>
> - reg : Physical base address of the device and length of the register area.
>
> @@ -44,6 +45,18 @@ Optional properties:
> for details.
>
>
> +Vendor-specific bindings
> +------------------------
> +
> +The Mali GPU is integrated very differently from one SoC to
> +another. In order to accomodate those differences, you have the option
WARNING: 'accomodate' may be misspelled - perhaps 'accommodate'?
#50: FILE: Documentation/devicetree/bindings/gpu/arm,mali-midgard.txt:52:
> +to specify one more vendor-specific compatible, among:
> +
> + - allwinner,sun50i-h6-mali
> + Required properties:
> + * resets: phandle to the reset line for the GPU
> +
> +
> Example for a Mali-T760:
>
> gpu@ffa30000 {
> --
> 2.18.1
>