On 15.02.2023 08:03, Manivannan Sadhasivam wrote:
> Qualcomm platforms making use of CPUFreq HW Engine (EPSS/OSM) supply clocks
> to the CPU cores. But this relationship is not represented in DTS so far.
>
> So let's make cpufreq node as the clock provider and CPU nodes as the
> consumers. The clock index for each CPU node is based on the frequency
> domain index.
>
> Signed-off-by: Manivannan Sadhasivam <[email protected]>
> ---
Reviewed-by: Konrad Dybcio <[email protected]>

Konrad
> arch/arm64/boot/dts/qcom/sm8250.dtsi | 9 +++++++++
> 1 file changed, 9 insertions(+)
>
> diff --git a/arch/arm64/boot/dts/qcom/sm8250.dtsi b/arch/arm64/boot/dts/qcom/sm8250.dtsi
> index 2f0e460acccd..44c8851178eb 100644
> --- a/arch/arm64/boot/dts/qcom/sm8250.dtsi
> +++ b/arch/arm64/boot/dts/qcom/sm8250.dtsi
> @@ -97,6 +97,7 @@ CPU0: cpu@0 {
> device_type = "cpu";
> compatible = "qcom,kryo485";
> reg = <0x0 0x0>;
> + clocks = <&cpufreq_hw 0>;
> enable-method = "psci";
> capacity-dmips-mhz = <448>;
> dynamic-power-coefficient = <205>;
> @@ -127,6 +128,7 @@ CPU1: cpu@100 {
> device_type = "cpu";
> compatible = "qcom,kryo485";
> reg = <0x0 0x100>;
> + clocks = <&cpufreq_hw 0>;
> enable-method = "psci";
> capacity-dmips-mhz = <448>;
> dynamic-power-coefficient = <205>;
> @@ -151,6 +153,7 @@ CPU2: cpu@200 {
> device_type = "cpu";
> compatible = "qcom,kryo485";
> reg = <0x0 0x200>;
> + clocks = <&cpufreq_hw 0>;
> enable-method = "psci";
> capacity-dmips-mhz = <448>;
> dynamic-power-coefficient = <205>;
> @@ -175,6 +178,7 @@ CPU3: cpu@300 {
> device_type = "cpu";
> compatible = "qcom,kryo485";
> reg = <0x0 0x300>;
> + clocks = <&cpufreq_hw 0>;
> enable-method = "psci";
> capacity-dmips-mhz = <448>;
> dynamic-power-coefficient = <205>;
> @@ -199,6 +203,7 @@ CPU4: cpu@400 {
> device_type = "cpu";
> compatible = "qcom,kryo485";
> reg = <0x0 0x400>;
> + clocks = <&cpufreq_hw 1>;
> enable-method = "psci";
> capacity-dmips-mhz = <1024>;
> dynamic-power-coefficient = <379>;
> @@ -223,6 +228,7 @@ CPU5: cpu@500 {
> device_type = "cpu";
> compatible = "qcom,kryo485";
> reg = <0x0 0x500>;
> + clocks = <&cpufreq_hw 1>;
> enable-method = "psci";
> capacity-dmips-mhz = <1024>;
> dynamic-power-coefficient = <379>;
> @@ -248,6 +254,7 @@ CPU6: cpu@600 {
> device_type = "cpu";
> compatible = "qcom,kryo485";
> reg = <0x0 0x600>;
> + clocks = <&cpufreq_hw 1>;
> enable-method = "psci";
> capacity-dmips-mhz = <1024>;
> dynamic-power-coefficient = <379>;
> @@ -272,6 +279,7 @@ CPU7: cpu@700 {
> device_type = "cpu";
> compatible = "qcom,kryo485";
> reg = <0x0 0x700>;
> + clocks = <&cpufreq_hw 2>;
> enable-method = "psci";
> capacity-dmips-mhz = <1024>;
> dynamic-power-coefficient = <444>;
> @@ -5481,6 +5489,7 @@ cpufreq_hw: cpufreq@18591000 {
> <GIC_SPI 19 IRQ_TYPE_LEVEL_HIGH>;
> interrupt-names = "dcvsh-irq-0", "dcvsh-irq-1", "dcvsh-irq-2";
> #freq-domain-cells = <1>;
> + #clock-cells = <1>;
> };
> };
>

2023-02-16 10:39:17

by Konrad Dybcio

[permalink] [raw]

On Wed, 15 Feb 2023 12:33:48 +0530, Manivannan Sadhasivam wrote:
> As a follow-up of [1], this series adds support for supplying clock from
> cpufreq node to CPUs for rest of the SoCs.
>
> This series has been tested on SDM845, SM8450 and SC8280XP based boards.
>
> Thanks,
> Mani
>
> [...]

Applied, thanks!

[01/12] arm64: dts: qcom: sdm845: Supply clock from cpufreq node to CPUs
commit: 2af2ef08c0ba052aefca20609572d67e0633b1ef
[02/12] arm64: dts: qcom: sc7280: Supply clock from cpufreq node to CPUs
commit: 667d8a2039608c4c848179cb45282204eadeb157
[03/12] arm64: dts: qcom: sm6350: Supply clock from cpufreq node to CPUs
commit: afa34380d973491e87ab01d13c387528e2e1c476
[04/12] arm64: dts: qcom: sm8550: Supply clock from cpufreq node to CPUs
commit: 1b0911fe3edb0895c43db4c19729b3c300028189
[05/12] arm64: dts: qcom: sm8250: Supply clock from cpufreq node to CPUs
commit: d78cb07dbc1d384a8665b08918d188ee670ec45b
[06/12] arm64: dts: qcom: qdu1000: Supply clock from cpufreq node to CPUs
commit: fcca74d893f3511a1e95869b1b3db3abb69bfb3b
[07/12] arm64: dts: qcom: sc7180: Supply clock from cpufreq node to CPUs
commit: 7b39c98ff7e80f7e2bdf3c73829480e6ac123fb5
[08/12] arm64: dts: qcom: sm8150: Supply clock from cpufreq node to CPUs
commit: fc7258948c4a9e5dd2670adfcc80b13c621fbcd1
[09/12] arm64: dts: qcom: sm8350: Supply clock from cpufreq node to CPUs
commit: c2a18730f0aaa2088a259f123e5fedf05f8a7041
[10/12] arm64: dts: qcom: sc8280xp: Supply clock from cpufreq node to CPUs
commit: 2051f735b37d8e49f84914df11eb7b4a3a16349f
[11/12] arm64: dts: qcom: sm6375: Supply clock from cpufreq node to CPUs
commit: d9ab57eec39db8bf72951e00cde5ab117bcad6d8
[12/12] arm64: dts: qcom: sm6115: Supply clock from cpufreq node to CPUs
commit: 0e6538e2d973bdfdf4d65a7d4b8baf1b7cdf75f0

Best regards,
--
Bjorn Andersson <[email protected]>