LinuxLists.cc - [PATCH] arm64: dts: ti: k3-j784s4: Fix wakeup pinmux range and pinctrl node offsets

2023-05-03 08:35:29

Subject: [PATCH] arm64: dts: ti: k3-j784s4: Fix wakeup pinmux range and pinctrl node offsets

The wkup_pmx register region in j784s4 has multiple non-addressable
regions, hence the existing wkup_pmx region is split as follows to
avoid the non-addressable regions. The pinctrl node offsets are
also corrected as per the newly split wkup_pmx* nodes.

wkup_pmx0 -> 13 pins (WKUP_PADCONFIG 0 - 12)
wkup_pmx1 -> 11 pins (WKUP_PADCONFIG 14 - 24)
wkup_pmx2 -> 72 pins (WKUP_PADCONFIG 26 - 97)
wkup_pmx3 -> 1 pin (WKUP_PADCONFIG 100)

Fixes: 4664ebd8346a ("arm64: dts: ti: Add initial support for J784S4 SoC")
Signed-off-by: Thejasvi Konduru <[email protected]>
---
arch/arm64/boot/dts/ti/k3-j784s4-evm.dts | 30 +++++++++----------
.../boot/dts/ti/k3-j784s4-mcu-wakeup.dtsi | 29 +++++++++++++++++-
2 files changed, 43 insertions(+), 16 deletions(-)

diff --git a/arch/arm64/boot/dts/ti/k3-j784s4-evm.dts b/arch/arm64/boot/dts/ti/k3-j784s4-evm.dts
index f33815953e77..490d0b8624f3 100644
--- a/arch/arm64/boot/dts/ti/k3-j784s4-evm.dts
+++ b/arch/arm64/boot/dts/ti/k3-j784s4-evm.dts
@@ -141,28 +141,28 @@
};
};

-&wkup_pmx0 {
+&wkup_pmx2 {
mcu_cpsw_pins_default: mcu-cpsw-pins-default {
pinctrl-single,pins = <
- J784S4_WKUP_IOPAD(0x094, PIN_INPUT, 0) /* (A35) MCU_RGMII1_RD0 */
- J784S4_WKUP_IOPAD(0x090, PIN_INPUT, 0) /* (B36) MCU_RGMII1_RD1 */
- J784S4_WKUP_IOPAD(0x08c, PIN_INPUT, 0) /* (C36) MCU_RGMII1_RD2 */
- J784S4_WKUP_IOPAD(0x088, PIN_INPUT, 0) /* (D36) MCU_RGMII1_RD3 */
- J784S4_WKUP_IOPAD(0x084, PIN_INPUT, 0) /* (B37) MCU_RGMII1_RXC */
- J784S4_WKUP_IOPAD(0x06c, PIN_INPUT, 0) /* (C37) MCU_RGMII1_RX_CTL */
- J784S4_WKUP_IOPAD(0x07c, PIN_OUTPUT, 0) /* (D37) MCU_RGMII1_TD0 */
- J784S4_WKUP_IOPAD(0x078, PIN_OUTPUT, 0) /* (D38) MCU_RGMII1_TD1 */
- J784S4_WKUP_IOPAD(0x074, PIN_OUTPUT, 0) /* (E37) MCU_RGMII1_TD2 */
- J784S4_WKUP_IOPAD(0x070, PIN_OUTPUT, 0) /* (E38) MCU_RGMII1_TD3 */
- J784S4_WKUP_IOPAD(0x080, PIN_OUTPUT, 0) /* (E36) MCU_RGMII1_TXC */
- J784S4_WKUP_IOPAD(0x068, PIN_OUTPUT, 0) /* (C38) MCU_RGMII1_TX_CTL */
+ J784S4_WKUP_IOPAD(0x02c, PIN_INPUT, 0) /* (A35) MCU_RGMII1_RD0 */
+ J784S4_WKUP_IOPAD(0x028, PIN_INPUT, 0) /* (B36) MCU_RGMII1_RD1 */
+ J784S4_WKUP_IOPAD(0x024, PIN_INPUT, 0) /* (C36) MCU_RGMII1_RD2 */
+ J784S4_WKUP_IOPAD(0x020, PIN_INPUT, 0) /* (D36) MCU_RGMII1_RD3 */
+ J784S4_WKUP_IOPAD(0x01c, PIN_INPUT, 0) /* (B37) MCU_RGMII1_RXC */
+ J784S4_WKUP_IOPAD(0x004, PIN_INPUT, 0) /* (C37) MCU_RGMII1_RX_CTL */
+ J784S4_WKUP_IOPAD(0x014, PIN_OUTPUT, 0) /* (D37) MCU_RGMII1_TD0 */
+ J784S4_WKUP_IOPAD(0x010, PIN_OUTPUT, 0) /* (D38) MCU_RGMII1_TD1 */
+ J784S4_WKUP_IOPAD(0x00c, PIN_OUTPUT, 0) /* (E37) MCU_RGMII1_TD2 */
+ J784S4_WKUP_IOPAD(0x008, PIN_OUTPUT, 0) /* (E38) MCU_RGMII1_TD3 */
+ J784S4_WKUP_IOPAD(0x018, PIN_OUTPUT, 0) /* (E36) MCU_RGMII1_TXC */
+ J784S4_WKUP_IOPAD(0x000, PIN_OUTPUT, 0) /* (C38) MCU_RGMII1_TX_CTL */
>;
};

mcu_mdio_pins_default: mcu-mdio-pins-default {
pinctrl-single,pins = <
- J784S4_WKUP_IOPAD(0x09c, PIN_OUTPUT, 0) /* (A36) MCU_MDIO0_MDC */
- J784S4_WKUP_IOPAD(0x098, PIN_INPUT, 0) /* (B35) MCU_MDIO0_MDIO */
+ J784S4_WKUP_IOPAD(0x034, PIN_OUTPUT, 0) /* (A36) MCU_MDIO0_MDC */
+ J784S4_WKUP_IOPAD(0x030, PIN_INPUT, 0) /* (B35) MCU_MDIO0_MDIO */
>;
};
};
diff --git a/arch/arm64/boot/dts/ti/k3-j784s4-mcu-wakeup.dtsi b/arch/arm64/boot/dts/ti/k3-j784s4-mcu-wakeup.dtsi
index f04fcb614cbe..ed2b40369c59 100644
--- a/arch/arm64/boot/dts/ti/k3-j784s4-mcu-wakeup.dtsi
+++ b/arch/arm64/boot/dts/ti/k3-j784s4-mcu-wakeup.dtsi
@@ -50,7 +50,34 @@
wkup_pmx0: pinctrl@4301c000 {
compatible = "pinctrl-single";
/* Proxy 0 addressing */
- reg = <0x00 0x4301c000 0x00 0x178>;
+ reg = <0x00 0x4301c000 0x00 0x034>;
+ #pinctrl-cells = <1>;
+ pinctrl-single,register-width = <32>;
+ pinctrl-single,function-mask = <0xffffffff>;
+ };
+
+ wkup_pmx1: pinctrl@4301c038 {
+ compatible = "pinctrl-single";
+ /* Proxy 0 addressing */
+ reg = <0x00 0x4301c038 0x00 0x02c>;
+ #pinctrl-cells = <1>;
+ pinctrl-single,register-width = <32>;
+ pinctrl-single,function-mask = <0xffffffff>;
+ };
+
+ wkup_pmx2: pinctrl@4301c068 {
+ compatible = "pinctrl-single";
+ /* Proxy 0 addressing */
+ reg = <0x00 0x4301c068 0x00 0x120>;
+ #pinctrl-cells = <1>;
+ pinctrl-single,register-width = <32>;
+ pinctrl-single,function-mask = <0xffffffff>;
+ };
+
+ wkup_pmx3: pinctrl@4301c190 {
+ compatible = "pinctrl-single";
+ /* Proxy 0 addressing */
+ reg = <0x00 0x4301c190 0x00 0x004>;
#pinctrl-cells = <1>;
pinctrl-single,register-width = <32>;
pinctrl-single,function-mask = <0xffffffff>;
--
2.17.1

2023-05-03 11:50:09

by Nishanth Menon

[permalink] [raw]

Subject: Re: [PATCH] arm64: dts: ti: k3-j784s4: Fix wakeup pinmux range and pinctrl node offsets

On 14:01-20230503, Thejasvi Konduru wrote:
> The wkup_pmx register region in j784s4 has multiple non-addressable
> regions, hence the existing wkup_pmx region is split as follows to
> avoid the non-addressable regions. The pinctrl node offsets are
> also corrected as per the newly split wkup_pmx* nodes.
>
> wkup_pmx0 -> 13 pins (WKUP_PADCONFIG 0 - 12)
> wkup_pmx1 -> 11 pins (WKUP_PADCONFIG 14 - 24)
> wkup_pmx2 -> 72 pins (WKUP_PADCONFIG 26 - 97)
> wkup_pmx3 -> 1 pin (WKUP_PADCONFIG 100)
>
> Fixes: 4664ebd8346a ("arm64: dts: ti: Add initial support for J784S4 SoC")
> Signed-off-by: Thejasvi Konduru <[email protected]>
> ---

Could you provide a link to the output of:
$ cat /sys/kernel/debug/pinctrl/*/pins

> arch/arm64/boot/dts/ti/k3-j784s4-evm.dts | 30 +++++++++----------
> .../boot/dts/ti/k3-j784s4-mcu-wakeup.dtsi | 29 +++++++++++++++++-
> 2 files changed, 43 insertions(+), 16 deletions(-)
>
> diff --git a/arch/arm64/boot/dts/ti/k3-j784s4-evm.dts b/arch/arm64/boot/dts/ti/k3-j784s4-evm.dts
> index f33815953e77..490d0b8624f3 100644
> --- a/arch/arm64/boot/dts/ti/k3-j784s4-evm.dts
> +++ b/arch/arm64/boot/dts/ti/k3-j784s4-evm.dts
> @@ -141,28 +141,28 @@
> };
> };
>
> -&wkup_pmx0 {
> +&wkup_pmx2 {
> mcu_cpsw_pins_default: mcu-cpsw-pins-default {
> pinctrl-single,pins = <
> - J784S4_WKUP_IOPAD(0x094, PIN_INPUT, 0) /* (A35) MCU_RGMII1_RD0 */
> - J784S4_WKUP_IOPAD(0x090, PIN_INPUT, 0) /* (B36) MCU_RGMII1_RD1 */
> - J784S4_WKUP_IOPAD(0x08c, PIN_INPUT, 0) /* (C36) MCU_RGMII1_RD2 */
> - J784S4_WKUP_IOPAD(0x088, PIN_INPUT, 0) /* (D36) MCU_RGMII1_RD3 */
> - J784S4_WKUP_IOPAD(0x084, PIN_INPUT, 0) /* (B37) MCU_RGMII1_RXC */
> - J784S4_WKUP_IOPAD(0x06c, PIN_INPUT, 0) /* (C37) MCU_RGMII1_RX_CTL */
> - J784S4_WKUP_IOPAD(0x07c, PIN_OUTPUT, 0) /* (D37) MCU_RGMII1_TD0 */
> - J784S4_WKUP_IOPAD(0x078, PIN_OUTPUT, 0) /* (D38) MCU_RGMII1_TD1 */
> - J784S4_WKUP_IOPAD(0x074, PIN_OUTPUT, 0) /* (E37) MCU_RGMII1_TD2 */
> - J784S4_WKUP_IOPAD(0x070, PIN_OUTPUT, 0) /* (E38) MCU_RGMII1_TD3 */
> - J784S4_WKUP_IOPAD(0x080, PIN_OUTPUT, 0) /* (E36) MCU_RGMII1_TXC */
> - J784S4_WKUP_IOPAD(0x068, PIN_OUTPUT, 0) /* (C38) MCU_RGMII1_TX_CTL */
> + J784S4_WKUP_IOPAD(0x02c, PIN_INPUT, 0) /* (A35) MCU_RGMII1_RD0 */
> + J784S4_WKUP_IOPAD(0x028, PIN_INPUT, 0) /* (B36) MCU_RGMII1_RD1 */
> + J784S4_WKUP_IOPAD(0x024, PIN_INPUT, 0) /* (C36) MCU_RGMII1_RD2 */
> + J784S4_WKUP_IOPAD(0x020, PIN_INPUT, 0) /* (D36) MCU_RGMII1_RD3 */
> + J784S4_WKUP_IOPAD(0x01c, PIN_INPUT, 0) /* (B37) MCU_RGMII1_RXC */
> + J784S4_WKUP_IOPAD(0x004, PIN_INPUT, 0) /* (C37) MCU_RGMII1_RX_CTL */
> + J784S4_WKUP_IOPAD(0x014, PIN_OUTPUT, 0) /* (D37) MCU_RGMII1_TD0 */
> + J784S4_WKUP_IOPAD(0x010, PIN_OUTPUT, 0) /* (D38) MCU_RGMII1_TD1 */
> + J784S4_WKUP_IOPAD(0x00c, PIN_OUTPUT, 0) /* (E37) MCU_RGMII1_TD2 */
> + J784S4_WKUP_IOPAD(0x008, PIN_OUTPUT, 0) /* (E38) MCU_RGMII1_TD3 */
> + J784S4_WKUP_IOPAD(0x018, PIN_OUTPUT, 0) /* (E36) MCU_RGMII1_TXC */
> + J784S4_WKUP_IOPAD(0x000, PIN_OUTPUT, 0) /* (C38) MCU_RGMII1_TX_CTL */
> >;
> };
>
> mcu_mdio_pins_default: mcu-mdio-pins-default {
> pinctrl-single,pins = <
> - J784S4_WKUP_IOPAD(0x09c, PIN_OUTPUT, 0) /* (A36) MCU_MDIO0_MDC */
> - J784S4_WKUP_IOPAD(0x098, PIN_INPUT, 0) /* (B35) MCU_MDIO0_MDIO */
> + J784S4_WKUP_IOPAD(0x034, PIN_OUTPUT, 0) /* (A36) MCU_MDIO0_MDC */
> + J784S4_WKUP_IOPAD(0x030, PIN_INPUT, 0) /* (B35) MCU_MDIO0_MDIO */
> >;
> };
> };
> diff --git a/arch/arm64/boot/dts/ti/k3-j784s4-mcu-wakeup.dtsi b/arch/arm64/boot/dts/ti/k3-j784s4-mcu-wakeup.dtsi
> index f04fcb614cbe..ed2b40369c59 100644
> --- a/arch/arm64/boot/dts/ti/k3-j784s4-mcu-wakeup.dtsi
> +++ b/arch/arm64/boot/dts/ti/k3-j784s4-mcu-wakeup.dtsi
> @@ -50,7 +50,34 @@
> wkup_pmx0: pinctrl@4301c000 {
> compatible = "pinctrl-single";
> /* Proxy 0 addressing */
> - reg = <0x00 0x4301c000 0x00 0x178>;
> + reg = <0x00 0x4301c000 0x00 0x034>;
> + #pinctrl-cells = <1>;
> + pinctrl-single,register-width = <32>;
> + pinctrl-single,function-mask = <0xffffffff>;
> + };
> +
> + wkup_pmx1: pinctrl@4301c038 {
> + compatible = "pinctrl-single";
> + /* Proxy 0 addressing */
> + reg = <0x00 0x4301c038 0x00 0x02c>;
> + #pinctrl-cells = <1>;
> + pinctrl-single,register-width = <32>;
> + pinctrl-single,function-mask = <0xffffffff>;
> + };
> +
> + wkup_pmx2: pinctrl@4301c068 {
> + compatible = "pinctrl-single";
> + /* Proxy 0 addressing */
> + reg = <0x00 0x4301c068 0x00 0x120>;
> + #pinctrl-cells = <1>;
> + pinctrl-single,register-width = <32>;
> + pinctrl-single,function-mask = <0xffffffff>;
> + };
> +
> + wkup_pmx3: pinctrl@4301c190 {
> + compatible = "pinctrl-single";
> + /* Proxy 0 addressing */
> + reg = <0x00 0x4301c190 0x00 0x004>;
> #pinctrl-cells = <1>;
> pinctrl-single,register-width = <32>;
> pinctrl-single,function-mask = <0xffffffff>;
> --
> 2.17.1
>

--
Regards,
Nishanth Menon
Key (0xDDB5849D1736249D) / Fingerprint: F8A2 8693 54EB 8232 17A3 1A34 DDB5 849D 1736 249D

2023-05-04 09:14:00

by Thejasvi Konduru

[permalink] [raw]

Subject: Re: [PATCH] arm64: dts: ti: k3-j784s4: Fix wakeup pinmux range and pinctrl node offsets

On 03/05/23 17:16, Nishanth Menon wrote:
> On 14:01-20230503, Thejasvi Konduru wrote:
>> The wkup_pmx register region in j784s4 has multiple non-addressable
>> regions, hence the existing wkup_pmx region is split as follows to
>> avoid the non-addressable regions. The pinctrl node offsets are
>> also corrected as per the newly split wkup_pmx* nodes.
>>
>> wkup_pmx0 -> 13 pins (WKUP_PADCONFIG 0 - 12)
>> wkup_pmx1 -> 11 pins (WKUP_PADCONFIG 14 - 24)
>> wkup_pmx2 -> 72 pins (WKUP_PADCONFIG 26 - 97)
>> wkup_pmx3 -> 1 pin (WKUP_PADCONFIG 100)
>>
>> Fixes: 4664ebd8346a ("arm64: dts: ti: Add initial support for J784S4 SoC")
>> Signed-off-by: Thejasvi Konduru <[email protected]>
>> ---
> Could you provide a link to the output of:
> $ cat /sys/kernel/debug/pinctrl/*/pins

https://gist.github.com/thejasvikonduru/05b1a8e0fd8176116b7a3cc4e43b244a

>
>> arch/arm64/boot/dts/ti/k3-j784s4-evm.dts | 30 +++++++++----------
>> .../boot/dts/ti/k3-j784s4-mcu-wakeup.dtsi | 29 +++++++++++++++++-
>> 2 files changed, 43 insertions(+), 16 deletions(-)
>>
>> diff --git a/arch/arm64/boot/dts/ti/k3-j784s4-evm.dts b/arch/arm64/boot/dts/ti/k3-j784s4-evm.dts
>> index f33815953e77..490d0b8624f3 100644
>> --- a/arch/arm64/boot/dts/ti/k3-j784s4-evm.dts
>> +++ b/arch/arm64/boot/dts/ti/k3-j784s4-evm.dts
>> @@ -141,28 +141,28 @@
>> };
>> };
>>
>> -&wkup_pmx0 {
>> +&wkup_pmx2 {
>> mcu_cpsw_pins_default: mcu-cpsw-pins-default {
>> pinctrl-single,pins = <
>> - J784S4_WKUP_IOPAD(0x094, PIN_INPUT, 0) /* (A35) MCU_RGMII1_RD0 */
>> - J784S4_WKUP_IOPAD(0x090, PIN_INPUT, 0) /* (B36) MCU_RGMII1_RD1 */
>> - J784S4_WKUP_IOPAD(0x08c, PIN_INPUT, 0) /* (C36) MCU_RGMII1_RD2 */
>> - J784S4_WKUP_IOPAD(0x088, PIN_INPUT, 0) /* (D36) MCU_RGMII1_RD3 */
>> - J784S4_WKUP_IOPAD(0x084, PIN_INPUT, 0) /* (B37) MCU_RGMII1_RXC */
>> - J784S4_WKUP_IOPAD(0x06c, PIN_INPUT, 0) /* (C37) MCU_RGMII1_RX_CTL */
>> - J784S4_WKUP_IOPAD(0x07c, PIN_OUTPUT, 0) /* (D37) MCU_RGMII1_TD0 */
>> - J784S4_WKUP_IOPAD(0x078, PIN_OUTPUT, 0) /* (D38) MCU_RGMII1_TD1 */
>> - J784S4_WKUP_IOPAD(0x074, PIN_OUTPUT, 0) /* (E37) MCU_RGMII1_TD2 */
>> - J784S4_WKUP_IOPAD(0x070, PIN_OUTPUT, 0) /* (E38) MCU_RGMII1_TD3 */
>> - J784S4_WKUP_IOPAD(0x080, PIN_OUTPUT, 0) /* (E36) MCU_RGMII1_TXC */
>> - J784S4_WKUP_IOPAD(0x068, PIN_OUTPUT, 0) /* (C38) MCU_RGMII1_TX_CTL */
>> + J784S4_WKUP_IOPAD(0x02c, PIN_INPUT, 0) /* (A35) MCU_RGMII1_RD0 */
>> + J784S4_WKUP_IOPAD(0x028, PIN_INPUT, 0) /* (B36) MCU_RGMII1_RD1 */
>> + J784S4_WKUP_IOPAD(0x024, PIN_INPUT, 0) /* (C36) MCU_RGMII1_RD2 */
>> + J784S4_WKUP_IOPAD(0x020, PIN_INPUT, 0) /* (D36) MCU_RGMII1_RD3 */
>> + J784S4_WKUP_IOPAD(0x01c, PIN_INPUT, 0) /* (B37) MCU_RGMII1_RXC */
>> + J784S4_WKUP_IOPAD(0x004, PIN_INPUT, 0) /* (C37) MCU_RGMII1_RX_CTL */
>> + J784S4_WKUP_IOPAD(0x014, PIN_OUTPUT, 0) /* (D37) MCU_RGMII1_TD0 */
>> + J784S4_WKUP_IOPAD(0x010, PIN_OUTPUT, 0) /* (D38) MCU_RGMII1_TD1 */
>> + J784S4_WKUP_IOPAD(0x00c, PIN_OUTPUT, 0) /* (E37) MCU_RGMII1_TD2 */
>> + J784S4_WKUP_IOPAD(0x008, PIN_OUTPUT, 0) /* (E38) MCU_RGMII1_TD3 */
>> + J784S4_WKUP_IOPAD(0x018, PIN_OUTPUT, 0) /* (E36) MCU_RGMII1_TXC */
>> + J784S4_WKUP_IOPAD(0x000, PIN_OUTPUT, 0) /* (C38) MCU_RGMII1_TX_CTL */
>> >;
>> };
>>
>> mcu_mdio_pins_default: mcu-mdio-pins-default {
>> pinctrl-single,pins = <
>> - J784S4_WKUP_IOPAD(0x09c, PIN_OUTPUT, 0) /* (A36) MCU_MDIO0_MDC */
>> - J784S4_WKUP_IOPAD(0x098, PIN_INPUT, 0) /* (B35) MCU_MDIO0_MDIO */
>> + J784S4_WKUP_IOPAD(0x034, PIN_OUTPUT, 0) /* (A36) MCU_MDIO0_MDC */
>> + J784S4_WKUP_IOPAD(0x030, PIN_INPUT, 0) /* (B35) MCU_MDIO0_MDIO */
>> >;
>> };
>> };
>> diff --git a/arch/arm64/boot/dts/ti/k3-j784s4-mcu-wakeup.dtsi b/arch/arm64/boot/dts/ti/k3-j784s4-mcu-wakeup.dtsi
>> index f04fcb614cbe..ed2b40369c59 100644
>> --- a/arch/arm64/boot/dts/ti/k3-j784s4-mcu-wakeup.dtsi
>> +++ b/arch/arm64/boot/dts/ti/k3-j784s4-mcu-wakeup.dtsi
>> @@ -50,7 +50,34 @@
>> wkup_pmx0: pinctrl@4301c000 {
>> compatible = "pinctrl-single";
>> /* Proxy 0 addressing */
>> - reg = <0x00 0x4301c000 0x00 0x178>;
>> + reg = <0x00 0x4301c000 0x00 0x034>;
>> + #pinctrl-cells = <1>;
>> + pinctrl-single,register-width = <32>;
>> + pinctrl-single,function-mask = <0xffffffff>;
>> + };
>> +
>> + wkup_pmx1: pinctrl@4301c038 {
>> + compatible = "pinctrl-single";
>> + /* Proxy 0 addressing */
>> + reg = <0x00 0x4301c038 0x00 0x02c>;
>> + #pinctrl-cells = <1>;
>> + pinctrl-single,register-width = <32>;
>> + pinctrl-single,function-mask = <0xffffffff>;
>> + };
>> +
>> + wkup_pmx2: pinctrl@4301c068 {
>> + compatible = "pinctrl-single";
>> + /* Proxy 0 addressing */
>> + reg = <0x00 0x4301c068 0x00 0x120>;
>> + #pinctrl-cells = <1>;
>> + pinctrl-single,register-width = <32>;
>> + pinctrl-single,function-mask = <0xffffffff>;
>> + };
>> +
>> + wkup_pmx3: pinctrl@4301c190 {
>> + compatible = "pinctrl-single";
>> + /* Proxy 0 addressing */
>> + reg = <0x00 0x4301c190 0x00 0x004>;
>> #pinctrl-cells = <1>;
>> pinctrl-single,register-width = <32>;
>> pinctrl-single,function-mask = <0xffffffff>;
>> --
>> 2.17.1
>>

2023-05-04 11:57:55

by Nishanth Menon

[permalink] [raw]

Subject: Re: [PATCH] arm64: dts: ti: k3-j784s4: Fix wakeup pinmux range and pinctrl node offsets

On 14:36-20230504, Thejasvi Konduru wrote:
>
> On 03/05/23 17:16, Nishanth Menon wrote:
> > On 14:01-20230503, Thejasvi Konduru wrote:
> > > The wkup_pmx register region in j784s4 has multiple non-addressable
> > > regions, hence the existing wkup_pmx region is split as follows to
> > > avoid the non-addressable regions. The pinctrl node offsets are
> > > also corrected as per the newly split wkup_pmx* nodes.
> > >
> > > wkup_pmx0 -> 13 pins (WKUP_PADCONFIG 0 - 12)
> > > wkup_pmx1 -> 11 pins (WKUP_PADCONFIG 14 - 24)
> > > wkup_pmx2 -> 72 pins (WKUP_PADCONFIG 26 - 97)
> > > wkup_pmx3 -> 1 pin (WKUP_PADCONFIG 100)
> > >
> > > Fixes: 4664ebd8346a ("arm64: dts: ti: Add initial support for J784S4 SoC")
> > > Signed-off-by: Thejasvi Konduru <[email protected]>
> > > ---
> > Could you provide a link to the output of:
> > $ cat /sys/kernel/debug/pinctrl/*/pins
>
> https://gist.github.com/thejasvikonduru/05b1a8e0fd8176116b7a3cc4e43b244a

Was this failing prior to this patch? Trying to understand the "Fix"
aspect of this patch.

--
Regards,
Nishanth Menon
Key (0xDDB5849D1736249D) / Fingerprint: F8A2 8693 54EB 8232 17A3 1A34 DDB5 849D 1736 249D

2023-05-04 12:14:49

by Thejasvi Konduru

[permalink] [raw]

Subject: Re: [PATCH] arm64: dts: ti: k3-j784s4: Fix wakeup pinmux range and pinctrl node offsets

On 04/05/23 17:22, Nishanth Menon wrote:
> On 14:36-20230504, Thejasvi Konduru wrote:
>> On 03/05/23 17:16, Nishanth Menon wrote:
>>> On 14:01-20230503, Thejasvi Konduru wrote:
>>>> The wkup_pmx register region in j784s4 has multiple non-addressable
>>>> regions, hence the existing wkup_pmx region is split as follows to
>>>> avoid the non-addressable regions. The pinctrl node offsets are
>>>> also corrected as per the newly split wkup_pmx* nodes.
>>>>
>>>> wkup_pmx0 -> 13 pins (WKUP_PADCONFIG 0 - 12)
>>>> wkup_pmx1 -> 11 pins (WKUP_PADCONFIG 14 - 24)
>>>> wkup_pmx2 -> 72 pins (WKUP_PADCONFIG 26 - 97)
>>>> wkup_pmx3 -> 1 pin (WKUP_PADCONFIG 100)
>>>>
>>>> Fixes: 4664ebd8346a ("arm64: dts: ti: Add initial support for J784S4 SoC")
>>>> Signed-off-by: Thejasvi Konduru <[email protected]>
>>>> ---
>>> Could you provide a link to the output of:
>>> $ cat /sys/kernel/debug/pinctrl/*/pins
>> https://gist.github.com/thejasvikonduru/05b1a8e0fd8176116b7a3cc4e43b244a
> Was this failing prior to this patch? Trying to understand the "Fix"
> aspect of this patch.
>
Yes,it was failing prior to this patch.

2023-05-04 14:28:48

by Nishanth Menon

[permalink] [raw]

Subject: Re: [PATCH] arm64: dts: ti: k3-j784s4: Fix wakeup pinmux range and pinctrl node offsets

On 17:40-20230504, Thejasvi Konduru wrote:
>
> On 04/05/23 17:22, Nishanth Menon wrote:
> > On 14:36-20230504, Thejasvi Konduru wrote:
> > > On 03/05/23 17:16, Nishanth Menon wrote:
> > > > On 14:01-20230503, Thejasvi Konduru wrote:
> > > > > The wkup_pmx register region in j784s4 has multiple non-addressable
> > > > > regions, hence the existing wkup_pmx region is split as follows to
> > > > > avoid the non-addressable regions. The pinctrl node offsets are
> > > > > also corrected as per the newly split wkup_pmx* nodes.
> > > > >
> > > > > wkup_pmx0 -> 13 pins (WKUP_PADCONFIG 0 - 12)
> > > > > wkup_pmx1 -> 11 pins (WKUP_PADCONFIG 14 - 24)
> > > > > wkup_pmx2 -> 72 pins (WKUP_PADCONFIG 26 - 97)
> > > > > wkup_pmx3 -> 1 pin (WKUP_PADCONFIG 100)
> > > > >
> > > > > Fixes: 4664ebd8346a ("arm64: dts: ti: Add initial support for J784S4 SoC")
> > > > > Signed-off-by: Thejasvi Konduru <[email protected]>
> > > > > ---
> > > > Could you provide a link to the output of:
> > > > $ cat /sys/kernel/debug/pinctrl/*/pins
> > > https://gist.github.com/thejasvikonduru/05b1a8e0fd8176116b7a3cc4e43b244a
> > Was this failing prior to this patch? Trying to understand the "Fix"
> > aspect of this patch.
> >
> Yes,it was failing prior to this patch.
>

next time some asks this question - give summary AND give a log. Even
better, please don't make folks even ask the question in the first
place by including the logs in the diffstat of the patch.

Please share the log to understand what kind of "failure" was occurring.

--
Regards,
Nishanth Menon
Key (0xDDB5849D1736249D) / Fingerprint: F8A2 8693 54EB 8232 17A3 1A34 DDB5 849D 1736 249D

2023-05-09 10:05:40

by Thejasvi Konduru

[permalink] [raw]

Subject: Re: [PATCH] arm64: dts: ti: k3-j784s4: Fix wakeup pinmux range and pinctrl node offsets

On 04/05/23 19:52, Nishanth Menon wrote:
> On 17:40-20230504, Thejasvi Konduru wrote:
>> On 04/05/23 17:22, Nishanth Menon wrote:
>>> On 14:36-20230504, Thejasvi Konduru wrote:
>>>> On 03/05/23 17:16, Nishanth Menon wrote:
>>>>> On 14:01-20230503, Thejasvi Konduru wrote:
>>>>>> The wkup_pmx register region in j784s4 has multiple non-addressable
>>>>>> regions, hence the existing wkup_pmx region is split as follows to
>>>>>> avoid the non-addressable regions. The pinctrl node offsets are
>>>>>> also corrected as per the newly split wkup_pmx* nodes.
>>>>>>
>>>>>> wkup_pmx0 -> 13 pins (WKUP_PADCONFIG 0 - 12)
>>>>>> wkup_pmx1 -> 11 pins (WKUP_PADCONFIG 14 - 24)
>>>>>> wkup_pmx2 -> 72 pins (WKUP_PADCONFIG 26 - 97)
>>>>>> wkup_pmx3 -> 1 pin (WKUP_PADCONFIG 100)
>>>>>>
>>>>>> Fixes: 4664ebd8346a ("arm64: dts: ti: Add initial support for J784S4 SoC")
>>>>>> Signed-off-by: Thejasvi Konduru <[email protected]>
>>>>>> ---
>>>>> Could you provide a link to the output of:
>>>>> $ cat /sys/kernel/debug/pinctrl/*/pins
>>>> https://gist.github.com/thejasvikonduru/05b1a8e0fd8176116b7a3cc4e43b244a
>>> Was this failing prior to this patch? Trying to understand the "Fix"
>>> aspect of this patch.
>>>
>> Yes,it was failing prior to this patch.
>>
> next time some asks this question - give summary AND give a log. Even
> better, please don't make folks even ask the question in the first
> place by including the logs in the diffstat of the patch.
>
> Please share the log to understand what kind of "failure" was occurring.

Link to logs:
Before Fix: https://gist.github.com/thejasvikonduru/e217edf4839c348793a5671aa9331595
After Fix : https://gist.github.com/thejasvikonduru/05b1a8e0fd8176116b7a3cc4e43b244a

>

2023-06-01 12:12:22

by Thejasvi Konduru

[permalink] [raw]

Subject: Re: [PATCH] arm64: dts: ti: k3-j784s4: Fix wakeup pinmux range and pinctrl node offsets

On 09/05/23 15:19, Thejasvi Konduru wrote:
>
> On 04/05/23 19:52, Nishanth Menon wrote:
>> On 17:40-20230504, Thejasvi Konduru wrote:
>>> On 04/05/23 17:22, Nishanth Menon wrote:
>>>> On 14:36-20230504, Thejasvi Konduru wrote:
>>>>> On 03/05/23 17:16, Nishanth Menon wrote:
>>>>>> On 14:01-20230503, Thejasvi Konduru wrote:
>>>>>>> The wkup_pmx register region in j784s4 has multiple non-addressable
>>>>>>> regions, hence the existing wkup_pmx region is split as follows to
>>>>>>> avoid the non-addressable regions. The pinctrl node offsets are
>>>>>>> also corrected as per the newly split wkup_pmx* nodes.
>>>>>>>
>>>>>>> wkup_pmx0 -> 13 pins (WKUP_PADCONFIG 0 - 12)
>>>>>>> wkup_pmx1 -> 11 pins (WKUP_PADCONFIG 14 - 24)
>>>>>>> wkup_pmx2 -> 72 pins (WKUP_PADCONFIG 26 - 97)
>>>>>>> wkup_pmx3 -> 1 pin (WKUP_PADCONFIG 100)
>>>>>>>
>>>>>>> Fixes: 4664ebd8346a ("arm64: dts: ti: Add initial support for
>>>>>>> J784S4 SoC")
>>>>>>> Signed-off-by: Thejasvi Konduru <[email protected]>
>>>>>>> ---
>>>>>> Could you provide a link to the output of:
>>>>>> $ cat /sys/kernel/debug/pinctrl/*/pins
>>>>> https://gist.github.com/thejasvikonduru/05b1a8e0fd8176116b7a3cc4e43b244a
>>>>>
>>>> Was this failing prior to this patch? Trying to understand the "Fix"
>>>> aspect of this patch.
>>>>
>>> Yes,it was failing prior to this patch.
>>>
>> next time some asks this question - give summary AND give a log. Even
>> better, please don't make folks even ask the question in the first
>> place by including the logs in the diffstat of the patch.
>>
>> Please share the log to understand what kind of "failure" was occurring.
>
> Link to logs:
> Before Fix:
> https://gist.github.com/thejasvikonduru/e217edf4839c348793a5671aa9331595
> After Fix :
> https://gist.github.com/thejasvikonduru/05b1a8e0fd8176116b7a3cc4e43b244a
>
Are these logs fine and can we go forward with this patch?

2023-06-02 21:37:47

by Nishanth Menon

[permalink] [raw]

Subject: Re: [PATCH] arm64: dts: ti: k3-j784s4: Fix wakeup pinmux range and pinctrl node offsets

2023-06-15 13:51:47

by Vignesh Raghavendra

[permalink] [raw]

Subject: Re: [PATCH] arm64: dts: ti: k3-j784s4: Fix wakeup pinmux range and pinctrl node offsets

Hi Thejasvi Konduru,

On Wed, 03 May 2023 14:01:43 +0530, Thejasvi Konduru wrote:
> The wkup_pmx register region in j784s4 has multiple non-addressable
> regions, hence the existing wkup_pmx region is split as follows to
> avoid the non-addressable regions. The pinctrl node offsets are
> also corrected as per the newly split wkup_pmx* nodes.
>
> wkup_pmx0 -> 13 pins (WKUP_PADCONFIG 0 - 12)
> wkup_pmx1 -> 11 pins (WKUP_PADCONFIG 14 - 24)
> wkup_pmx2 -> 72 pins (WKUP_PADCONFIG 26 - 97)
> wkup_pmx3 -> 1 pin (WKUP_PADCONFIG 100)
>
> [...]

I have applied the following to branch ti-k3-dts-next on [1].
Thank you!

[1/1] arm64: dts: ti: k3-j784s4: Fix wakeup pinmux range and pinctrl node offsets
commit: 14462bd0b247d05070d48d0f02eb7ca2680ab7bd

All being well this means that it will be integrated into the linux-next
tree (usually sometime in the next 24 hours) and sent up the chain during
the next merge window (or sooner if it is a relevant bug fix), however if
problems are discovered then the patch may be dropped or reverted.

You may get further e-mails resulting from automated or manual testing
and review of the tree, please engage with people reporting problems and
send followup patches addressing any issues that are reported if needed.

If any updates are required or you are submitting further changes they
should be sent as incremental updates against current git, existing
patches will not be replaced.

Please add any relevant lists and maintainers to the CCs when replying
to this mail.

[1] https://git.kernel.org/pub/scm/linux/kernel/git/ti/linux.git
--
Vignesh