Hello all,
when I try to read the register values of a i2c ASoC codec through
debugfs, (eg: cat /sys/kernel/debug/regmap/1-001a/registers)
I am getting an WARN_ON at drivers/base/regmap/regmap-debugfs.c:151.
Please see attached dmesg.txt for details.
I did some debugging and found that regmap_readable(), at regmap-
debugfs.c:109, returns "false" for all registers, hence the
debugfs_off_cache list remains empty and we get an warning in line 151.
Reverting commit 4191f1979 "regmap: if format_write is used, declare
all registers as "unreadable"" fixed the issue.
Regards,
Sergej
On Sat, Jun 13, 2015 at 03:21:02PM +0200, Sergej Sawazki wrote:
> when I try to read the register values of a i2c ASoC codec through
> debugfs, (eg: cat /sys/kernel/debug/regmap/1-001a/registers)
> I am getting an WARN_ON at drivers/base/regmap/regmap-debugfs.c:151.
Please provide some plain text description of which line of code you're
referring to when reporting things - line numbers do change as things
move on (though I see this one).
> I did some debugging and found that regmap_readable(), at regmap-
> debugfs.c:109, returns "false" for all registers, hence the
> debugfs_off_cache list remains empty and we get an warning in line 151.
We need to change that code to special case write only register maps
like this and just skip having a cache for those devices. They normally
have very small register maps anyway so it shouldn't have too big an
impact on performance.
Am 15. Juni 2015 11:49:22 MESZ, schrieb Mark Brown <[email protected]>:
>On Sat, Jun 13, 2015 at 03:21:02PM +0200, Sergej Sawazki wrote:
>
>> I did some debugging and found that regmap_readable(), at regmap-
>> debugfs.c:109, returns "false" for all registers, hence the
>> debugfs_off_cache list remains empty and we get an warning in line
>151.
>
>We need to change that code to special case write only register maps
>like this and just skip having a cache for those devices. They
>normally
>have very small register maps anyway so it shouldn't have too big an
>impact on performance.
I'm having this issue with a wm8741 DAC, its register map is not "write only", it has readable and writeable registers.
--
Sergej
On Mon, Jun 15, 2015 at 02:42:30PM +0200, Sergej Sawazki wrote:
> Am 15. Juni 2015 11:49:22 MESZ, schrieb Mark Brown <[email protected]>:
> >We need to change that code to special case write only register maps
> >like this and just skip having a cache for those devices. They
> >normally
> >have very small register maps anyway so it shouldn't have too big an
> >impact on performance.
> I'm having this issue with a wm8741 DAC, its register map is not
> "write only", it has readable and writeable registers.
Are you *sure* there are physically readable registers on the device?
It's difficult to implement for 7x9 devices given that the top register
bit is in the byte used to send the register address, I expect you'll
find that the registers marked as readable are actually those that
should be cached.
On Mon, 15 Jun 2015 15:49:33 +0100, Mark Brown wrote:
> On Mon, Jun 15, 2015 at 02:42:30PM +0200, Sergej Sawazki wrote:
>> Am 15. Juni 2015 11:49:22 MESZ, schrieb Mark Brown <[email protected]>:
>
>>> We need to change that code to special case write only register maps
>>> like this and just skip having a cache for those devices. They
>>> normally
>>> have very small register maps anyway so it shouldn't have too big an
>>> impact on performance.
>
>> I'm having this issue with a wm8741 DAC, its register map is not
>> "write only", it has readable and writeable registers.
>
> Are you *sure* there are physically readable registers on the device?
> It's difficult to implement for 7x9 devices given that the top register
> bit is in the byte used to send the register address, I expect you'll
> find that the registers marked as readable are actually those that
> should be cached.
>
You are right, the registers are not physically readable. Sorry for the
confusion.
What I actually was trying to do is to read the cached register values.
On Wed, Jun 24, 2015 at 10:49:59PM +0200, Sergej Sawazki wrote:
> On Mon, 15 Jun 2015 15:49:33 +0100, Mark Brown wrote:
> >Are you *sure* there are physically readable registers on the device?
> >It's difficult to implement for 7x9 devices given that the top register
> >bit is in the byte used to send the register address, I expect you'll
> >find that the registers marked as readable are actually those that
> >should be cached.
> You are right, the registers are not physically readable. Sorry for the
> confusion.
> What I actually was trying to do is to read the cached register values.
OK, so what we need to do here is rearrange things so we check the cache
before we check for readability. That way if there is a cached value
then we'll return it and the readability check will still reflect the
hardware state.