This series implements Runtime PM support for the Tegra ChipIdea USB driver.
It also squashes the older ehci-tegra driver into the ChipIdea driver, hence
the RPM is supported by both UDC and host controllers, secondly this opens
opportunity for implementing OTG support in the future.
Patchset was tested on various Tegra20, Tegra30 and Tegra124 devices.
Thanks to Peter Geis, Matt Merhar, Nicolas Chauvet and Ion Agorria for
helping with the extensive and productive testing!
Changelog:
v2: - Improved comments in the code as it was suggested by Peter Chen and
Sergei Shtylyov for v1.
- Replaced mdelay() with fsleep() and made ci->hdc to reset to NULL in
a error code path, like it was suggested by Peter Chen.
- Redirected deprecated USB_EHCI_TEGRA Kconfig entry to USB_CHIPIDEA_TEGRA
as was suggested by Alan Stern.
- Improved commit message and added ACK from Thierry Reding to the patch
that removes MODULE_ALIAS.
- Fixed UDC PHY waking up on ASUS TF201 tablet device by utilizing
additional VBUS sensor. This was reported and tested by Ion Agorria.
- Added t-b from Ion Agorria.
Dmitry Osipenko (7):
usb: phy: tegra: Add delay after power up
usb: phy: tegra: Support waking up from a low power mode
usb: chipidea: tegra: Remove MODULE_ALIAS
usb: chipidea: tegra: Rename UDC to USB
usb: chipidea: tegra: Support runtime PM
usb: host: ehci-tegra: Remove the driver
ARM: tegra_defconfig: Enable USB_CHIPIDEA and remove USB_EHCI_TEGRA
Peter Geis (1):
usb: chipidea: tegra: Support host mode
arch/arm/configs/tegra_defconfig | 3 +-
drivers/usb/chipidea/Kconfig | 3 +-
drivers/usb/chipidea/ci_hdrc_tegra.c | 327 +++++++++++++--
drivers/usb/chipidea/core.c | 10 +-
drivers/usb/chipidea/host.c | 104 ++++-
drivers/usb/host/Kconfig | 8 +-
drivers/usb/host/Makefile | 1 -
drivers/usb/host/ehci-tegra.c | 604 ---------------------------
drivers/usb/phy/phy-tegra-usb.c | 97 ++++-
include/linux/usb/chipidea.h | 6 +
include/linux/usb/tegra_usb_phy.h | 2 +
11 files changed, 503 insertions(+), 662 deletions(-)
delete mode 100644 drivers/usb/host/ehci-tegra.c
--
2.29.2
Support programming of waking up from a low power mode by implementing the
generic set_wakeup() callback of the USB PHY API.
Tested-by: Matt Merhar <[email protected]>
Tested-by: Nicolas Chauvet <[email protected]>
Tested-by: Peter Geis <[email protected]>
Tested-by: Ion Agorria <[email protected]>
Signed-off-by: Dmitry Osipenko <[email protected]>
---
drivers/usb/phy/phy-tegra-usb.c | 94 +++++++++++++++++++++++++++++--
include/linux/usb/tegra_usb_phy.h | 2 +
2 files changed, 90 insertions(+), 6 deletions(-)
diff --git a/drivers/usb/phy/phy-tegra-usb.c b/drivers/usb/phy/phy-tegra-usb.c
index 1296524e1bee..46a1f61877ad 100644
--- a/drivers/usb/phy/phy-tegra-usb.c
+++ b/drivers/usb/phy/phy-tegra-usb.c
@@ -45,6 +45,7 @@
#define TEGRA_PORTSC1_RWC_BITS (PORT_CSC | PORT_PEC | PORT_OCC)
#define USB_SUSP_CTRL 0x400
+#define USB_WAKE_ON_RESUME_EN BIT(2)
#define USB_WAKE_ON_CNNT_EN_DEV BIT(3)
#define USB_WAKE_ON_DISCON_EN_DEV BIT(4)
#define USB_SUSP_CLR BIT(5)
@@ -56,6 +57,15 @@
#define USB_SUSP_SET BIT(14)
#define USB_WAKEUP_DEBOUNCE_COUNT(x) (((x) & 0x7) << 16)
+#define USB_PHY_VBUS_SENSORS 0x404
+#define B_SESS_VLD_WAKEUP_EN BIT(6)
+#define B_VBUS_VLD_WAKEUP_EN BIT(14)
+#define A_SESS_VLD_WAKEUP_EN BIT(22)
+#define A_VBUS_VLD_WAKEUP_EN BIT(30)
+
+#define USB_PHY_VBUS_WAKEUP_ID 0x408
+#define VBUS_WAKEUP_WAKEUP_EN BIT(30)
+
#define USB1_LEGACY_CTRL 0x410
#define USB1_NO_LEGACY_MODE BIT(0)
#define USB1_VBUS_SENSE_CTL_MASK (3 << 1)
@@ -334,6 +344,11 @@ static int utmip_pad_power_on(struct tegra_usb_phy *phy)
writel_relaxed(val, base + UTMIP_BIAS_CFG0);
}
+ if (phy->pad_wakeup) {
+ phy->pad_wakeup = false;
+ utmip_pad_count--;
+ }
+
spin_unlock(&utmip_pad_lock);
clk_disable_unprepare(phy->pad_clk);
@@ -359,6 +374,17 @@ static int utmip_pad_power_off(struct tegra_usb_phy *phy)
goto ulock;
}
+ /*
+ * In accordance to TRM, OTG and Bias pad circuits could be turned off
+ * to save power if wake is enabled, but the VBUS-change detection
+ * method is board-specific and these circuits may need to be enabled
+ * to generate wakeup event, hence we will just keep them both enabled.
+ */
+ if (phy->wakeup_enabled) {
+ phy->pad_wakeup = true;
+ utmip_pad_count++;
+ }
+
if (--utmip_pad_count == 0) {
val = readl_relaxed(base + UTMIP_BIAS_CFG0);
val |= UTMIP_OTGPD | UTMIP_BIASPD;
@@ -503,11 +529,24 @@ static int utmi_phy_power_on(struct tegra_usb_phy *phy)
writel_relaxed(val, base + UTMIP_PLL_CFG1);
}
+ val = readl_relaxed(base + USB_SUSP_CTRL);
+ val &= ~USB_WAKE_ON_RESUME_EN;
+ writel_relaxed(val, base + USB_SUSP_CTRL);
+
if (phy->mode == USB_DR_MODE_PERIPHERAL) {
val = readl_relaxed(base + USB_SUSP_CTRL);
val &= ~(USB_WAKE_ON_CNNT_EN_DEV | USB_WAKE_ON_DISCON_EN_DEV);
writel_relaxed(val, base + USB_SUSP_CTRL);
+ val = readl_relaxed(base + USB_PHY_VBUS_WAKEUP_ID);
+ val &= ~VBUS_WAKEUP_WAKEUP_EN;
+ writel_relaxed(val, base + USB_PHY_VBUS_WAKEUP_ID);
+
+ val = readl_relaxed(base + USB_PHY_VBUS_SENSORS);
+ val &= ~(A_VBUS_VLD_WAKEUP_EN | A_SESS_VLD_WAKEUP_EN);
+ val &= ~(B_VBUS_VLD_WAKEUP_EN | B_SESS_VLD_WAKEUP_EN);
+ writel_relaxed(val, base + USB_PHY_VBUS_SENSORS);
+
val = readl_relaxed(base + UTMIP_BAT_CHRG_CFG0);
val &= ~UTMIP_PD_CHRG;
writel_relaxed(val, base + UTMIP_BAT_CHRG_CFG0);
@@ -605,31 +644,55 @@ static int utmi_phy_power_off(struct tegra_usb_phy *phy)
utmi_phy_clk_disable(phy);
- if (phy->mode == USB_DR_MODE_PERIPHERAL) {
- val = readl_relaxed(base + USB_SUSP_CTRL);
- val &= ~USB_WAKEUP_DEBOUNCE_COUNT(~0);
- val |= USB_WAKE_ON_CNNT_EN_DEV | USB_WAKEUP_DEBOUNCE_COUNT(5);
- writel_relaxed(val, base + USB_SUSP_CTRL);
- }
+ /* PHY won't resume if reset is asserted */
+ if (phy->wakeup_enabled)
+ goto chrg_cfg0;
val = readl_relaxed(base + USB_SUSP_CTRL);
val |= UTMIP_RESET;
writel_relaxed(val, base + USB_SUSP_CTRL);
+chrg_cfg0:
val = readl_relaxed(base + UTMIP_BAT_CHRG_CFG0);
val |= UTMIP_PD_CHRG;
writel_relaxed(val, base + UTMIP_BAT_CHRG_CFG0);
+ if (phy->wakeup_enabled)
+ goto xcvr_cfg1;
+
val = readl_relaxed(base + UTMIP_XCVR_CFG0);
val |= UTMIP_FORCE_PD_POWERDOWN | UTMIP_FORCE_PD2_POWERDOWN |
UTMIP_FORCE_PDZI_POWERDOWN;
writel_relaxed(val, base + UTMIP_XCVR_CFG0);
+xcvr_cfg1:
val = readl_relaxed(base + UTMIP_XCVR_CFG1);
val |= UTMIP_FORCE_PDDISC_POWERDOWN | UTMIP_FORCE_PDCHRP_POWERDOWN |
UTMIP_FORCE_PDDR_POWERDOWN;
writel_relaxed(val, base + UTMIP_XCVR_CFG1);
+ if (phy->wakeup_enabled) {
+ val = readl_relaxed(base + USB_SUSP_CTRL);
+ val &= ~USB_WAKEUP_DEBOUNCE_COUNT(~0);
+ val |= USB_WAKEUP_DEBOUNCE_COUNT(5);
+ val |= USB_WAKE_ON_RESUME_EN;
+ writel_relaxed(val, base + USB_SUSP_CTRL);
+
+ /*
+ * Ask VBUS sensor to generate wake event once cable is
+ * connected.
+ */
+ if (phy->mode == USB_DR_MODE_PERIPHERAL) {
+ val = readl_relaxed(base + USB_PHY_VBUS_WAKEUP_ID);
+ val |= VBUS_WAKEUP_WAKEUP_EN;
+ writel_relaxed(val, base + USB_PHY_VBUS_WAKEUP_ID);
+
+ val = readl_relaxed(base + USB_PHY_VBUS_SENSORS);
+ val |= A_VBUS_VLD_WAKEUP_EN;
+ writel_relaxed(val, base + USB_PHY_VBUS_SENSORS);
+ }
+ }
+
return utmip_pad_power_off(phy);
}
@@ -765,6 +828,15 @@ static int ulpi_phy_power_off(struct tegra_usb_phy *phy)
usleep_range(5000, 6000);
clk_disable_unprepare(phy->clk);
+ /*
+ * Wakeup currently unimplemented for ULPI, thus PHY needs to be
+ * force-resumed.
+ */
+ if (WARN_ON_ONCE(phy->wakeup_enabled)) {
+ ulpi_phy_power_on(phy);
+ return -EOPNOTSUPP;
+ }
+
return 0;
}
@@ -827,6 +899,15 @@ static void tegra_usb_phy_shutdown(struct usb_phy *u_phy)
phy->freq = NULL;
}
+static int tegra_usb_phy_set_wakeup(struct usb_phy *u_phy, bool enable)
+{
+ struct tegra_usb_phy *phy = to_tegra_usb_phy(u_phy);
+
+ phy->wakeup_enabled = enable;
+
+ return 0;
+}
+
static int tegra_usb_phy_set_suspend(struct usb_phy *u_phy, int suspend)
{
struct tegra_usb_phy *phy = to_tegra_usb_phy(u_phy);
@@ -1198,6 +1279,7 @@ static int tegra_usb_phy_probe(struct platform_device *pdev)
tegra_phy->u_phy.dev = &pdev->dev;
tegra_phy->u_phy.init = tegra_usb_phy_init;
tegra_phy->u_phy.shutdown = tegra_usb_phy_shutdown;
+ tegra_phy->u_phy.set_wakeup = tegra_usb_phy_set_wakeup;
tegra_phy->u_phy.set_suspend = tegra_usb_phy_set_suspend;
platform_set_drvdata(pdev, tegra_phy);
diff --git a/include/linux/usb/tegra_usb_phy.h b/include/linux/usb/tegra_usb_phy.h
index c29d1b4c9381..fd1c9f6a4e37 100644
--- a/include/linux/usb/tegra_usb_phy.h
+++ b/include/linux/usb/tegra_usb_phy.h
@@ -79,6 +79,8 @@ struct tegra_usb_phy {
bool is_ulpi_phy;
struct gpio_desc *reset_gpio;
struct reset_control *pad_rst;
+ bool wakeup_enabled;
+ bool pad_wakeup;
bool powered_on;
};
--
2.29.2
The OF core adds an alias based on the OF device ID table, which is enough
to have the driver autoloaded. The legacy MODULE_ALIAS macro was relevant
to a pre-OF board files which manually created platform devices, this is
irrelevant to the modern ARM kernels since devices are created by the OF
core. Remove the unnecessary macro in order to keep the driver's code
cleaner.
Tested-by: Matt Merhar <[email protected]>
Tested-by: Nicolas Chauvet <[email protected]>
Tested-by: Peter Geis <[email protected]>
Tested-by: Ion Agorria <[email protected]>
Acked-by: Thierry Reding <[email protected]>
Signed-off-by: Dmitry Osipenko <[email protected]>
---
drivers/usb/chipidea/ci_hdrc_tegra.c | 1 -
1 file changed, 1 deletion(-)
diff --git a/drivers/usb/chipidea/ci_hdrc_tegra.c b/drivers/usb/chipidea/ci_hdrc_tegra.c
index 7455df0ede49..10eaaba2a3f0 100644
--- a/drivers/usb/chipidea/ci_hdrc_tegra.c
+++ b/drivers/usb/chipidea/ci_hdrc_tegra.c
@@ -128,5 +128,4 @@ module_platform_driver(tegra_udc_driver);
MODULE_DESCRIPTION("NVIDIA Tegra USB device mode driver");
MODULE_AUTHOR("Thierry Reding <[email protected]>");
-MODULE_ALIAS("platform:tegra-udc");
MODULE_LICENSE("GPL v2");
--
2.29.2
The ChipIdea driver now provides USB2 host mode support for NVIDIA Tegra
SoCs. The ehci-tegra driver is obsolete now, remove it and redirect the
older Kconfig entry to the CI driver.
Tested-by: Matt Merhar <[email protected]>
Tested-by: Nicolas Chauvet <[email protected]>
Tested-by: Peter Geis <[email protected]>
Tested-by: Ion Agorria <[email protected]>
Signed-off-by: Dmitry Osipenko <[email protected]>
---
drivers/usb/host/Kconfig | 8 +-
drivers/usb/host/Makefile | 1 -
drivers/usb/host/ehci-tegra.c | 604 ----------------------------------
3 files changed, 6 insertions(+), 607 deletions(-)
delete mode 100644 drivers/usb/host/ehci-tegra.c
diff --git a/drivers/usb/host/Kconfig b/drivers/usb/host/Kconfig
index 31e59309da1f..318315602337 100644
--- a/drivers/usb/host/Kconfig
+++ b/drivers/usb/host/Kconfig
@@ -269,9 +269,13 @@ config USB_EHCI_HCD_AT91
config USB_EHCI_TEGRA
tristate "NVIDIA Tegra HCD support"
depends on ARCH_TEGRA
- select USB_EHCI_ROOT_HUB_TT
- select USB_TEGRA_PHY
+ select USB_CHIPIDEA
+ select USB_CHIPIDEA_HOST
+ select USB_CHIPIDEA_TEGRA
help
+ This option is deprecated now and the driver was removed, use
+ USB_CHIPIDEA_TEGRA instead.
+
This driver enables support for the internal USB Host Controllers
found in NVIDIA Tegra SoCs. The controllers are EHCI compliant.
diff --git a/drivers/usb/host/Makefile b/drivers/usb/host/Makefile
index c1b08703af10..3e4d298d851f 100644
--- a/drivers/usb/host/Makefile
+++ b/drivers/usb/host/Makefile
@@ -47,7 +47,6 @@ obj-$(CONFIG_USB_EHCI_HCD_SPEAR) += ehci-spear.o
obj-$(CONFIG_USB_EHCI_HCD_STI) += ehci-st.o
obj-$(CONFIG_USB_EHCI_EXYNOS) += ehci-exynos.o
obj-$(CONFIG_USB_EHCI_HCD_AT91) += ehci-atmel.o
-obj-$(CONFIG_USB_EHCI_TEGRA) += ehci-tegra.o
obj-$(CONFIG_USB_EHCI_BRCMSTB) += ehci-brcm.o
obj-$(CONFIG_USB_OXU210HP_HCD) += oxu210hp-hcd.o
diff --git a/drivers/usb/host/ehci-tegra.c b/drivers/usb/host/ehci-tegra.c
deleted file mode 100644
index 869d9c4de5fc..000000000000
--- a/drivers/usb/host/ehci-tegra.c
+++ /dev/null
@@ -1,604 +0,0 @@
-// SPDX-License-Identifier: GPL-2.0+
-/*
- * EHCI-compliant USB host controller driver for NVIDIA Tegra SoCs
- *
- * Copyright (C) 2010 Google, Inc.
- * Copyright (C) 2009 - 2013 NVIDIA Corporation
- */
-
-#include <linux/clk.h>
-#include <linux/dma-mapping.h>
-#include <linux/err.h>
-#include <linux/gpio.h>
-#include <linux/io.h>
-#include <linux/irq.h>
-#include <linux/module.h>
-#include <linux/of.h>
-#include <linux/of_device.h>
-#include <linux/of_gpio.h>
-#include <linux/platform_device.h>
-#include <linux/pm_runtime.h>
-#include <linux/reset.h>
-#include <linux/slab.h>
-#include <linux/usb/ehci_def.h>
-#include <linux/usb/tegra_usb_phy.h>
-#include <linux/usb.h>
-#include <linux/usb/hcd.h>
-#include <linux/usb/otg.h>
-
-#include "ehci.h"
-
-#define PORT_WAKE_BITS (PORT_WKOC_E|PORT_WKDISC_E|PORT_WKCONN_E)
-
-#define TEGRA_USB_DMA_ALIGN 32
-
-#define DRIVER_DESC "Tegra EHCI driver"
-#define DRV_NAME "tegra-ehci"
-
-static struct hc_driver __read_mostly tegra_ehci_hc_driver;
-
-struct tegra_ehci_soc_config {
- bool has_hostpc;
-};
-
-struct tegra_ehci_hcd {
- struct clk *clk;
- struct reset_control *rst;
- int port_resuming;
- bool needs_double_reset;
-};
-
-static int tegra_reset_usb_controller(struct platform_device *pdev)
-{
- struct device_node *phy_np;
- struct usb_hcd *hcd = platform_get_drvdata(pdev);
- struct tegra_ehci_hcd *tegra =
- (struct tegra_ehci_hcd *)hcd_to_ehci(hcd)->priv;
- struct reset_control *rst;
- int err;
-
- phy_np = of_parse_phandle(pdev->dev.of_node, "nvidia,phy", 0);
- if (!phy_np)
- return -ENOENT;
-
- /*
- * The 1st USB controller contains some UTMI pad registers that are
- * global for all the controllers on the chip. Those registers are
- * also cleared when reset is asserted to the 1st controller.
- */
- rst = of_reset_control_get_shared(phy_np, "utmi-pads");
- if (IS_ERR(rst)) {
- dev_warn(&pdev->dev,
- "can't get utmi-pads reset from the PHY\n");
- dev_warn(&pdev->dev,
- "continuing, but please update your DT\n");
- } else {
- /*
- * PHY driver performs UTMI-pads reset in a case of
- * non-legacy DT.
- */
- reset_control_put(rst);
- }
-
- of_node_put(phy_np);
-
- /* reset control is shared, hence initialize it first */
- err = reset_control_deassert(tegra->rst);
- if (err)
- return err;
-
- err = reset_control_assert(tegra->rst);
- if (err)
- return err;
-
- udelay(1);
-
- err = reset_control_deassert(tegra->rst);
- if (err)
- return err;
-
- return 0;
-}
-
-static int tegra_ehci_internal_port_reset(
- struct ehci_hcd *ehci,
- u32 __iomem *portsc_reg
-)
-{
- u32 temp;
- unsigned long flags;
- int retval = 0;
- int i, tries;
- u32 saved_usbintr;
-
- spin_lock_irqsave(&ehci->lock, flags);
- saved_usbintr = ehci_readl(ehci, &ehci->regs->intr_enable);
- /* disable USB interrupt */
- ehci_writel(ehci, 0, &ehci->regs->intr_enable);
- spin_unlock_irqrestore(&ehci->lock, flags);
-
- /*
- * Here we have to do Port Reset at most twice for
- * Port Enable bit to be set.
- */
- for (i = 0; i < 2; i++) {
- temp = ehci_readl(ehci, portsc_reg);
- temp |= PORT_RESET;
- ehci_writel(ehci, temp, portsc_reg);
- mdelay(10);
- temp &= ~PORT_RESET;
- ehci_writel(ehci, temp, portsc_reg);
- mdelay(1);
- tries = 100;
- do {
- mdelay(1);
- /*
- * Up to this point, Port Enable bit is
- * expected to be set after 2 ms waiting.
- * USB1 usually takes extra 45 ms, for safety,
- * we take 100 ms as timeout.
- */
- temp = ehci_readl(ehci, portsc_reg);
- } while (!(temp & PORT_PE) && tries--);
- if (temp & PORT_PE)
- break;
- }
- if (i == 2)
- retval = -ETIMEDOUT;
-
- /*
- * Clear Connect Status Change bit if it's set.
- * We can't clear PORT_PEC. It will also cause PORT_PE to be cleared.
- */
- if (temp & PORT_CSC)
- ehci_writel(ehci, PORT_CSC, portsc_reg);
-
- /*
- * Write to clear any interrupt status bits that might be set
- * during port reset.
- */
- temp = ehci_readl(ehci, &ehci->regs->status);
- ehci_writel(ehci, temp, &ehci->regs->status);
-
- /* restore original interrupt enable bits */
- ehci_writel(ehci, saved_usbintr, &ehci->regs->intr_enable);
- return retval;
-}
-
-static int tegra_ehci_hub_control(
- struct usb_hcd *hcd,
- u16 typeReq,
- u16 wValue,
- u16 wIndex,
- char *buf,
- u16 wLength
-)
-{
- struct ehci_hcd *ehci = hcd_to_ehci(hcd);
- struct tegra_ehci_hcd *tegra = (struct tegra_ehci_hcd *)ehci->priv;
- u32 __iomem *status_reg;
- u32 temp;
- unsigned long flags;
- int retval = 0;
-
- status_reg = &ehci->regs->port_status[(wIndex & 0xff) - 1];
-
- spin_lock_irqsave(&ehci->lock, flags);
-
- if (typeReq == GetPortStatus) {
- temp = ehci_readl(ehci, status_reg);
- if (tegra->port_resuming && !(temp & PORT_SUSPEND)) {
- /* Resume completed, re-enable disconnect detection */
- tegra->port_resuming = 0;
- tegra_usb_phy_postresume(hcd->usb_phy);
- }
- }
-
- else if (typeReq == SetPortFeature && wValue == USB_PORT_FEAT_SUSPEND) {
- temp = ehci_readl(ehci, status_reg);
- if ((temp & PORT_PE) == 0 || (temp & PORT_RESET) != 0) {
- retval = -EPIPE;
- goto done;
- }
-
- temp &= ~(PORT_RWC_BITS | PORT_WKCONN_E);
- temp |= PORT_WKDISC_E | PORT_WKOC_E;
- ehci_writel(ehci, temp | PORT_SUSPEND, status_reg);
-
- /*
- * If a transaction is in progress, there may be a delay in
- * suspending the port. Poll until the port is suspended.
- */
- if (ehci_handshake(ehci, status_reg, PORT_SUSPEND,
- PORT_SUSPEND, 5000))
- pr_err("%s: timeout waiting for SUSPEND\n", __func__);
-
- set_bit((wIndex & 0xff) - 1, &ehci->suspended_ports);
- goto done;
- }
-
- /* For USB1 port we need to issue Port Reset twice internally */
- if (tegra->needs_double_reset &&
- (typeReq == SetPortFeature && wValue == USB_PORT_FEAT_RESET)) {
- spin_unlock_irqrestore(&ehci->lock, flags);
- return tegra_ehci_internal_port_reset(ehci, status_reg);
- }
-
- /*
- * Tegra host controller will time the resume operation to clear the bit
- * when the port control state switches to HS or FS Idle. This behavior
- * is different from EHCI where the host controller driver is required
- * to set this bit to a zero after the resume duration is timed in the
- * driver.
- */
- else if (typeReq == ClearPortFeature &&
- wValue == USB_PORT_FEAT_SUSPEND) {
- temp = ehci_readl(ehci, status_reg);
- if ((temp & PORT_RESET) || !(temp & PORT_PE)) {
- retval = -EPIPE;
- goto done;
- }
-
- if (!(temp & PORT_SUSPEND))
- goto done;
-
- /* Disable disconnect detection during port resume */
- tegra_usb_phy_preresume(hcd->usb_phy);
-
- ehci->reset_done[wIndex-1] = jiffies + msecs_to_jiffies(25);
-
- temp &= ~(PORT_RWC_BITS | PORT_WAKE_BITS);
- /* start resume signalling */
- ehci_writel(ehci, temp | PORT_RESUME, status_reg);
- set_bit(wIndex-1, &ehci->resuming_ports);
-
- spin_unlock_irqrestore(&ehci->lock, flags);
- msleep(20);
- spin_lock_irqsave(&ehci->lock, flags);
-
- /* Poll until the controller clears RESUME and SUSPEND */
- if (ehci_handshake(ehci, status_reg, PORT_RESUME, 0, 2000))
- pr_err("%s: timeout waiting for RESUME\n", __func__);
- if (ehci_handshake(ehci, status_reg, PORT_SUSPEND, 0, 2000))
- pr_err("%s: timeout waiting for SUSPEND\n", __func__);
-
- ehci->reset_done[wIndex-1] = 0;
- clear_bit(wIndex-1, &ehci->resuming_ports);
-
- tegra->port_resuming = 1;
- goto done;
- }
-
- spin_unlock_irqrestore(&ehci->lock, flags);
-
- /* Handle the hub control events here */
- return ehci_hub_control(hcd, typeReq, wValue, wIndex, buf, wLength);
-
-done:
- spin_unlock_irqrestore(&ehci->lock, flags);
- return retval;
-}
-
-struct dma_aligned_buffer {
- void *kmalloc_ptr;
- void *old_xfer_buffer;
- u8 data[];
-};
-
-static void free_dma_aligned_buffer(struct urb *urb)
-{
- struct dma_aligned_buffer *temp;
- size_t length;
-
- if (!(urb->transfer_flags & URB_ALIGNED_TEMP_BUFFER))
- return;
-
- temp = container_of(urb->transfer_buffer,
- struct dma_aligned_buffer, data);
-
- if (usb_urb_dir_in(urb)) {
- if (usb_pipeisoc(urb->pipe))
- length = urb->transfer_buffer_length;
- else
- length = urb->actual_length;
-
- memcpy(temp->old_xfer_buffer, temp->data, length);
- }
- urb->transfer_buffer = temp->old_xfer_buffer;
- kfree(temp->kmalloc_ptr);
-
- urb->transfer_flags &= ~URB_ALIGNED_TEMP_BUFFER;
-}
-
-static int alloc_dma_aligned_buffer(struct urb *urb, gfp_t mem_flags)
-{
- struct dma_aligned_buffer *temp, *kmalloc_ptr;
- size_t kmalloc_size;
-
- if (urb->num_sgs || urb->sg ||
- urb->transfer_buffer_length == 0 ||
- !((uintptr_t)urb->transfer_buffer & (TEGRA_USB_DMA_ALIGN - 1)))
- return 0;
-
- /* Allocate a buffer with enough padding for alignment */
- kmalloc_size = urb->transfer_buffer_length +
- sizeof(struct dma_aligned_buffer) + TEGRA_USB_DMA_ALIGN - 1;
-
- kmalloc_ptr = kmalloc(kmalloc_size, mem_flags);
- if (!kmalloc_ptr)
- return -ENOMEM;
-
- /* Position our struct dma_aligned_buffer such that data is aligned */
- temp = PTR_ALIGN(kmalloc_ptr + 1, TEGRA_USB_DMA_ALIGN) - 1;
- temp->kmalloc_ptr = kmalloc_ptr;
- temp->old_xfer_buffer = urb->transfer_buffer;
- if (usb_urb_dir_out(urb))
- memcpy(temp->data, urb->transfer_buffer,
- urb->transfer_buffer_length);
- urb->transfer_buffer = temp->data;
-
- urb->transfer_flags |= URB_ALIGNED_TEMP_BUFFER;
-
- return 0;
-}
-
-static int tegra_ehci_map_urb_for_dma(struct usb_hcd *hcd, struct urb *urb,
- gfp_t mem_flags)
-{
- int ret;
-
- ret = alloc_dma_aligned_buffer(urb, mem_flags);
- if (ret)
- return ret;
-
- ret = usb_hcd_map_urb_for_dma(hcd, urb, mem_flags);
- if (ret)
- free_dma_aligned_buffer(urb);
-
- return ret;
-}
-
-static void tegra_ehci_unmap_urb_for_dma(struct usb_hcd *hcd, struct urb *urb)
-{
- usb_hcd_unmap_urb_for_dma(hcd, urb);
- free_dma_aligned_buffer(urb);
-}
-
-static const struct tegra_ehci_soc_config tegra30_soc_config = {
- .has_hostpc = true,
-};
-
-static const struct tegra_ehci_soc_config tegra20_soc_config = {
- .has_hostpc = false,
-};
-
-static const struct of_device_id tegra_ehci_of_match[] = {
- { .compatible = "nvidia,tegra30-ehci", .data = &tegra30_soc_config },
- { .compatible = "nvidia,tegra20-ehci", .data = &tegra20_soc_config },
- { },
-};
-
-static int tegra_ehci_probe(struct platform_device *pdev)
-{
- const struct of_device_id *match;
- const struct tegra_ehci_soc_config *soc_config;
- struct resource *res;
- struct usb_hcd *hcd;
- struct ehci_hcd *ehci;
- struct tegra_ehci_hcd *tegra;
- int err = 0;
- int irq;
- struct usb_phy *u_phy;
-
- match = of_match_device(tegra_ehci_of_match, &pdev->dev);
- if (!match) {
- dev_err(&pdev->dev, "Error: No device match found\n");
- return -ENODEV;
- }
- soc_config = match->data;
-
- /* Right now device-tree probed devices don't get dma_mask set.
- * Since shared usb code relies on it, set it here for now.
- * Once we have dma capability bindings this can go away.
- */
- err = dma_coerce_mask_and_coherent(&pdev->dev, DMA_BIT_MASK(32));
- if (err)
- return err;
-
- hcd = usb_create_hcd(&tegra_ehci_hc_driver, &pdev->dev,
- dev_name(&pdev->dev));
- if (!hcd) {
- dev_err(&pdev->dev, "Unable to create HCD\n");
- return -ENOMEM;
- }
- platform_set_drvdata(pdev, hcd);
- ehci = hcd_to_ehci(hcd);
- tegra = (struct tegra_ehci_hcd *)ehci->priv;
-
- hcd->has_tt = 1;
-
- tegra->clk = devm_clk_get(&pdev->dev, NULL);
- if (IS_ERR(tegra->clk)) {
- dev_err(&pdev->dev, "Can't get ehci clock\n");
- err = PTR_ERR(tegra->clk);
- goto cleanup_hcd_create;
- }
-
- tegra->rst = devm_reset_control_get_shared(&pdev->dev, "usb");
- if (IS_ERR(tegra->rst)) {
- dev_err(&pdev->dev, "Can't get ehci reset\n");
- err = PTR_ERR(tegra->rst);
- goto cleanup_hcd_create;
- }
-
- err = clk_prepare_enable(tegra->clk);
- if (err)
- goto cleanup_hcd_create;
-
- err = tegra_reset_usb_controller(pdev);
- if (err) {
- dev_err(&pdev->dev, "Failed to reset controller\n");
- goto cleanup_clk_en;
- }
-
- u_phy = devm_usb_get_phy_by_phandle(&pdev->dev, "nvidia,phy", 0);
- if (IS_ERR(u_phy)) {
- err = -EPROBE_DEFER;
- goto cleanup_clk_en;
- }
- hcd->usb_phy = u_phy;
- hcd->skip_phy_initialization = 1;
-
- tegra->needs_double_reset = of_property_read_bool(pdev->dev.of_node,
- "nvidia,needs-double-reset");
-
- res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
- hcd->regs = devm_ioremap_resource(&pdev->dev, res);
- if (IS_ERR(hcd->regs)) {
- err = PTR_ERR(hcd->regs);
- goto cleanup_clk_en;
- }
- hcd->rsrc_start = res->start;
- hcd->rsrc_len = resource_size(res);
-
- ehci->caps = hcd->regs + 0x100;
- ehci->has_hostpc = soc_config->has_hostpc;
-
- err = usb_phy_init(hcd->usb_phy);
- if (err) {
- dev_err(&pdev->dev, "Failed to initialize phy\n");
- goto cleanup_clk_en;
- }
-
- u_phy->otg = devm_kzalloc(&pdev->dev, sizeof(struct usb_otg),
- GFP_KERNEL);
- if (!u_phy->otg) {
- err = -ENOMEM;
- goto cleanup_phy;
- }
- u_phy->otg->host = hcd_to_bus(hcd);
-
- irq = platform_get_irq(pdev, 0);
- if (irq < 0) {
- err = irq;
- goto cleanup_phy;
- }
-
- otg_set_host(u_phy->otg, &hcd->self);
-
- err = usb_add_hcd(hcd, irq, IRQF_SHARED);
- if (err) {
- dev_err(&pdev->dev, "Failed to add USB HCD\n");
- goto cleanup_otg_set_host;
- }
- device_wakeup_enable(hcd->self.controller);
-
- return err;
-
-cleanup_otg_set_host:
- otg_set_host(u_phy->otg, NULL);
-cleanup_phy:
- usb_phy_shutdown(hcd->usb_phy);
-cleanup_clk_en:
- clk_disable_unprepare(tegra->clk);
-cleanup_hcd_create:
- usb_put_hcd(hcd);
- return err;
-}
-
-static int tegra_ehci_remove(struct platform_device *pdev)
-{
- struct usb_hcd *hcd = platform_get_drvdata(pdev);
- struct tegra_ehci_hcd *tegra =
- (struct tegra_ehci_hcd *)hcd_to_ehci(hcd)->priv;
-
- usb_remove_hcd(hcd);
- otg_set_host(hcd->usb_phy->otg, NULL);
- usb_phy_shutdown(hcd->usb_phy);
- clk_disable_unprepare(tegra->clk);
- usb_put_hcd(hcd);
-
- return 0;
-}
-
-static void tegra_ehci_hcd_shutdown(struct platform_device *pdev)
-{
- struct usb_hcd *hcd = platform_get_drvdata(pdev);
-
- if (hcd->driver->shutdown)
- hcd->driver->shutdown(hcd);
-}
-
-static struct platform_driver tegra_ehci_driver = {
- .probe = tegra_ehci_probe,
- .remove = tegra_ehci_remove,
- .shutdown = tegra_ehci_hcd_shutdown,
- .driver = {
- .name = DRV_NAME,
- .of_match_table = tegra_ehci_of_match,
- }
-};
-
-static int tegra_ehci_reset(struct usb_hcd *hcd)
-{
- struct ehci_hcd *ehci = hcd_to_ehci(hcd);
- int retval;
- int txfifothresh;
-
- retval = ehci_setup(hcd);
- if (retval)
- return retval;
-
- /*
- * We should really pull this value out of tegra_ehci_soc_config, but
- * to avoid needing access to it, make use of the fact that Tegra20 is
- * the only one so far that needs a value of 10, and Tegra20 is the
- * only one which doesn't set has_hostpc.
- */
- txfifothresh = ehci->has_hostpc ? 0x10 : 10;
- ehci_writel(ehci, txfifothresh << 16, &ehci->regs->txfill_tuning);
-
- return 0;
-}
-
-static const struct ehci_driver_overrides tegra_overrides __initconst = {
- .extra_priv_size = sizeof(struct tegra_ehci_hcd),
- .reset = tegra_ehci_reset,
-};
-
-static int __init ehci_tegra_init(void)
-{
- if (usb_disabled())
- return -ENODEV;
-
- pr_info(DRV_NAME ": " DRIVER_DESC "\n");
-
- ehci_init_driver(&tegra_ehci_hc_driver, &tegra_overrides);
-
- /*
- * The Tegra HW has some unusual quirks, which require Tegra-specific
- * workarounds. We override certain hc_driver functions here to
- * achieve that. We explicitly do not enhance ehci_driver_overrides to
- * allow this more easily, since this is an unusual case, and we don't
- * want to encourage others to override these functions by making it
- * too easy.
- */
-
- tegra_ehci_hc_driver.map_urb_for_dma = tegra_ehci_map_urb_for_dma;
- tegra_ehci_hc_driver.unmap_urb_for_dma = tegra_ehci_unmap_urb_for_dma;
- tegra_ehci_hc_driver.hub_control = tegra_ehci_hub_control;
-
- return platform_driver_register(&tegra_ehci_driver);
-}
-module_init(ehci_tegra_init);
-
-static void __exit ehci_tegra_cleanup(void)
-{
- platform_driver_unregister(&tegra_ehci_driver);
-}
-module_exit(ehci_tegra_cleanup);
-
-MODULE_DESCRIPTION(DRIVER_DESC);
-MODULE_LICENSE("GPL");
-MODULE_ALIAS("platform:" DRV_NAME);
-MODULE_DEVICE_TABLE(of, tegra_ehci_of_match);
--
2.29.2
The ehci-tegra driver was superseded by the generic ChipIdea USB driver,
update the tegra's defconfig accordingly.
Signed-off-by: Dmitry Osipenko <[email protected]>
---
arch/arm/configs/tegra_defconfig | 3 ++-
1 file changed, 2 insertions(+), 1 deletion(-)
diff --git a/arch/arm/configs/tegra_defconfig b/arch/arm/configs/tegra_defconfig
index 74739a52a8ad..ae0709265493 100644
--- a/arch/arm/configs/tegra_defconfig
+++ b/arch/arm/configs/tegra_defconfig
@@ -237,12 +237,13 @@ CONFIG_USB=y
CONFIG_USB_XHCI_HCD=y
CONFIG_USB_XHCI_TEGRA=y
CONFIG_USB_EHCI_HCD=y
-CONFIG_USB_EHCI_TEGRA=y
CONFIG_USB_ACM=y
CONFIG_USB_WDM=y
CONFIG_USB_STORAGE=y
CONFIG_USB_CHIPIDEA=y
CONFIG_USB_CHIPIDEA_UDC=y
+CONFIG_USB_CHIPIDEA_HOST=y
+CONFIG_USB_CHIPIDEA_TEGRA=y
CONFIG_USB_GADGET=y
CONFIG_MMC=y
CONFIG_MMC_BLOCK_MINORS=16
--
2.29.2
From: Peter Geis <[email protected]>
Add USB host mode to the Tegra HDRC driver. This allows us to benefit from
support provided by the generic ChipIdea driver instead of duplicating the
effort in a separate ehci-tegra driver.
Tested-by: Matt Merhar <[email protected]>
Tested-by: Nicolas Chauvet <[email protected]>
Tested-by: Ion Agorria <[email protected]>
Signed-off-by: Peter Geis <[email protected]>
Signed-off-by: Dmitry Osipenko <[email protected]>
---
drivers/usb/chipidea/Kconfig | 1 -
drivers/usb/chipidea/ci_hdrc_tegra.c | 243 ++++++++++++++++++++++++++-
drivers/usb/chipidea/core.c | 10 +-
drivers/usb/chipidea/host.c | 104 +++++++++++-
include/linux/usb/chipidea.h | 6 +
5 files changed, 356 insertions(+), 8 deletions(-)
diff --git a/drivers/usb/chipidea/Kconfig b/drivers/usb/chipidea/Kconfig
index 8685ead6ccc7..661818e8fed6 100644
--- a/drivers/usb/chipidea/Kconfig
+++ b/drivers/usb/chipidea/Kconfig
@@ -55,7 +55,6 @@ config USB_CHIPIDEA_GENERIC
config USB_CHIPIDEA_TEGRA
tristate "Enable Tegra USB glue driver" if EMBEDDED
depends on OF
- depends on USB_CHIPIDEA_UDC
default USB_CHIPIDEA
endif
diff --git a/drivers/usb/chipidea/ci_hdrc_tegra.c b/drivers/usb/chipidea/ci_hdrc_tegra.c
index d8efa80aa1c2..5fccdeeefc64 100644
--- a/drivers/usb/chipidea/ci_hdrc_tegra.c
+++ b/drivers/usb/chipidea/ci_hdrc_tegra.c
@@ -4,11 +4,18 @@
*/
#include <linux/clk.h>
+#include <linux/io.h>
#include <linux/module.h>
#include <linux/of_device.h>
#include <linux/reset.h>
+#include <linux/usb.h>
#include <linux/usb/chipidea.h>
+#include <linux/usb/hcd.h>
+#include <linux/usb/of.h>
+#include <linux/usb/phy.h>
+
+#include "../host/ehci.h"
#include "ci.h"
@@ -16,20 +23,47 @@ struct tegra_usb {
struct ci_hdrc_platform_data data;
struct platform_device *dev;
+ const struct tegra_usb_soc_info *soc;
struct usb_phy *phy;
struct clk *clk;
+
+ bool needs_double_reset;
};
struct tegra_usb_soc_info {
unsigned long flags;
+ unsigned int txfifothresh;
+ enum usb_dr_mode dr_mode;
+};
+
+static const struct tegra_usb_soc_info tegra20_ehci_soc_info = {
+ .flags = CI_HDRC_REQUIRES_ALIGNED_DMA |
+ CI_HDRC_OVERRIDE_PHY_CONTROL,
+ .dr_mode = USB_DR_MODE_HOST,
+ .txfifothresh = 10,
+};
+
+static const struct tegra_usb_soc_info tegra30_ehci_soc_info = {
+ .flags = CI_HDRC_REQUIRES_ALIGNED_DMA |
+ CI_HDRC_OVERRIDE_PHY_CONTROL,
+ .dr_mode = USB_DR_MODE_HOST,
+ .txfifothresh = 16,
};
static const struct tegra_usb_soc_info tegra_udc_soc_info = {
- .flags = CI_HDRC_REQUIRES_ALIGNED_DMA,
+ .flags = CI_HDRC_REQUIRES_ALIGNED_DMA |
+ CI_HDRC_OVERRIDE_PHY_CONTROL,
+ .dr_mode = USB_DR_MODE_UNKNOWN,
};
static const struct of_device_id tegra_usb_of_match[] = {
{
+ .compatible = "nvidia,tegra20-ehci",
+ .data = &tegra20_ehci_soc_info,
+ }, {
+ .compatible = "nvidia,tegra30-ehci",
+ .data = &tegra30_ehci_soc_info,
+ }, {
.compatible = "nvidia,tegra20-udc",
.data = &tegra_udc_soc_info,
}, {
@@ -47,6 +81,181 @@ static const struct of_device_id tegra_usb_of_match[] = {
};
MODULE_DEVICE_TABLE(of, tegra_usb_of_match);
+static int tegra_usb_reset_controller(struct device *dev)
+{
+ struct reset_control *rst, *rst_utmi;
+ struct device_node *phy_np;
+ int err;
+
+ rst = devm_reset_control_get_shared(dev, "usb");
+ if (IS_ERR(rst)) {
+ dev_err(dev, "can't get ehci reset: %pe\n", rst);
+ return PTR_ERR(rst);
+ }
+
+ phy_np = of_parse_phandle(dev->of_node, "nvidia,phy", 0);
+ if (!phy_np)
+ return -ENOENT;
+
+ /*
+ * The 1st USB controller contains some UTMI pad registers that are
+ * global for all the controllers on the chip. Those registers are
+ * also cleared when reset is asserted to the 1st controller.
+ */
+ rst_utmi = of_reset_control_get_shared(phy_np, "utmi-pads");
+ if (IS_ERR(rst_utmi)) {
+ dev_warn(dev, "can't get utmi-pads reset from the PHY\n");
+ dev_warn(dev, "continuing, but please update your DT\n");
+ } else {
+ /*
+ * PHY driver performs UTMI-pads reset in a case of a
+ * non-legacy DT.
+ */
+ reset_control_put(rst_utmi);
+ }
+
+ of_node_put(phy_np);
+
+ /* reset control is shared, hence initialize it first */
+ err = reset_control_deassert(rst);
+ if (err)
+ return err;
+
+ err = reset_control_assert(rst);
+ if (err)
+ return err;
+
+ udelay(1);
+
+ err = reset_control_deassert(rst);
+ if (err)
+ return err;
+
+ return 0;
+}
+
+static int tegra_usb_notify_event(struct ci_hdrc *ci, unsigned int event)
+{
+ struct tegra_usb *usb = dev_get_drvdata(ci->dev->parent);
+ struct ehci_hcd *ehci;
+
+ switch (event) {
+ case CI_HDRC_CONTROLLER_RESET_EVENT:
+ if (ci->hcd) {
+ ehci = hcd_to_ehci(ci->hcd);
+ ehci->has_tdi_phy_lpm = false;
+ ehci_writel(ehci, usb->soc->txfifothresh << 16,
+ &ehci->regs->txfill_tuning);
+ }
+ break;
+ }
+
+ return 0;
+}
+
+static int tegra_usb_internal_port_reset(struct ehci_hcd *ehci,
+ u32 __iomem *portsc_reg,
+ unsigned long *flags)
+{
+ u32 saved_usbintr, temp;
+ unsigned int i, tries;
+ int retval = 0;
+
+ saved_usbintr = ehci_readl(ehci, &ehci->regs->intr_enable);
+ /* disable USB interrupt */
+ ehci_writel(ehci, 0, &ehci->regs->intr_enable);
+ spin_unlock_irqrestore(&ehci->lock, *flags);
+
+ /*
+ * Here we have to do Port Reset at most twice for
+ * Port Enable bit to be set.
+ */
+ for (i = 0; i < 2; i++) {
+ temp = ehci_readl(ehci, portsc_reg);
+ temp |= PORT_RESET;
+ ehci_writel(ehci, temp, portsc_reg);
+ fsleep(10000);
+ temp &= ~PORT_RESET;
+ ehci_writel(ehci, temp, portsc_reg);
+ fsleep(1000);
+ tries = 100;
+ do {
+ fsleep(1000);
+ /*
+ * Up to this point, Port Enable bit is
+ * expected to be set after 2 ms waiting.
+ * USB1 usually takes extra 45 ms, for safety,
+ * we take 100 ms as timeout.
+ */
+ temp = ehci_readl(ehci, portsc_reg);
+ } while (!(temp & PORT_PE) && tries--);
+ if (temp & PORT_PE)
+ break;
+ }
+ if (i == 2)
+ retval = -ETIMEDOUT;
+
+ /*
+ * Clear Connect Status Change bit if it's set.
+ * We can't clear PORT_PEC. It will also cause PORT_PE to be cleared.
+ */
+ if (temp & PORT_CSC)
+ ehci_writel(ehci, PORT_CSC, portsc_reg);
+
+ /*
+ * Write to clear any interrupt status bits that might be set
+ * during port reset.
+ */
+ temp = ehci_readl(ehci, &ehci->regs->status);
+ ehci_writel(ehci, temp, &ehci->regs->status);
+
+ /* restore original interrupt-enable bits */
+ spin_lock_irqsave(&ehci->lock, *flags);
+ ehci_writel(ehci, saved_usbintr, &ehci->regs->intr_enable);
+
+ return retval;
+}
+
+static int tegra_ehci_hub_control(struct ci_hdrc *ci, u16 typeReq, u16 wValue,
+ u16 wIndex, char *buf, u16 wLength,
+ bool *done, unsigned long *flags)
+{
+ struct tegra_usb *usb = dev_get_drvdata(ci->dev->parent);
+ struct ehci_hcd *ehci = hcd_to_ehci(ci->hcd);
+ u32 __iomem *status_reg;
+ int retval = 0;
+
+ status_reg = &ehci->regs->port_status[(wIndex & 0xff) - 1];
+
+ switch (typeReq) {
+ case SetPortFeature:
+ if (wValue != USB_PORT_FEAT_RESET || !usb->needs_double_reset)
+ break;
+
+ /* for USB1 port we need to issue Port Reset twice internally */
+ retval = tegra_usb_internal_port_reset(ehci, status_reg, flags);
+ *done = true;
+ break;
+ }
+
+ return retval;
+}
+
+static void tegra_usb_enter_lpm(struct ci_hdrc *ci, bool enable)
+{
+ /*
+ * Touching any register which belongs to AHB clock domain will
+ * hang CPU if USB controller is put into low power mode because
+ * AHB USB clock is gated on Tegra in the LPM.
+ *
+ * Tegra PHY has a separate register for checking the clock status
+ * and usb_phy_set_suspend() takes care of gating/ungating the clocks
+ * and restoring the PHY state on Tegra. Hence DEVLC/PORTSC registers
+ * shouldn't be touched directly by the CI driver.
+ */
+ usb_phy_set_suspend(ci->usb_phy, enable);
+}
+
static int tegra_usb_probe(struct platform_device *pdev)
{
const struct tegra_usb_soc_info *soc;
@@ -83,24 +292,49 @@ static int tegra_usb_probe(struct platform_device *pdev)
return err;
}
+ if (device_property_present(&pdev->dev, "nvidia,needs-double-reset"))
+ usb->needs_double_reset = true;
+
+ err = tegra_usb_reset_controller(&pdev->dev);
+ if (err) {
+ dev_err(&pdev->dev, "failed to reset controller: %d\n", err);
+ goto fail_power_off;
+ }
+
+ /*
+ * USB controller registers shouldn't be touched before PHY is
+ * initialized, otherwise CPU will hang because clocks are gated.
+ * PHY driver controls gating of internal USB clocks on Tegra.
+ */
+ err = usb_phy_init(usb->phy);
+ if (err)
+ goto fail_power_off;
+
+ platform_set_drvdata(pdev, usb);
+
/* setup and register ChipIdea HDRC device */
+ usb->soc = soc;
usb->data.name = "tegra-usb";
usb->data.flags = soc->flags;
usb->data.usb_phy = usb->phy;
+ usb->data.dr_mode = soc->dr_mode;
usb->data.capoffset = DEF_CAPOFFSET;
+ usb->data.enter_lpm = tegra_usb_enter_lpm;
+ usb->data.hub_control = tegra_ehci_hub_control;
+ usb->data.notify_event = tegra_usb_notify_event;
usb->dev = ci_hdrc_add_device(&pdev->dev, pdev->resource,
pdev->num_resources, &usb->data);
if (IS_ERR(usb->dev)) {
err = PTR_ERR(usb->dev);
dev_err(&pdev->dev, "failed to add HDRC device: %d\n", err);
- goto fail_power_off;
+ goto phy_shutdown;
}
- platform_set_drvdata(pdev, usb);
-
return 0;
+phy_shutdown:
+ usb_phy_shutdown(usb->phy);
fail_power_off:
clk_disable_unprepare(usb->clk);
return err;
@@ -111,6 +345,7 @@ static int tegra_usb_remove(struct platform_device *pdev)
struct tegra_usb *usb = platform_get_drvdata(pdev);
ci_hdrc_remove_device(usb->dev);
+ usb_phy_shutdown(usb->phy);
clk_disable_unprepare(usb->clk);
return 0;
diff --git a/drivers/usb/chipidea/core.c b/drivers/usb/chipidea/core.c
index aa40e510b806..3f6c21406dbd 100644
--- a/drivers/usb/chipidea/core.c
+++ b/drivers/usb/chipidea/core.c
@@ -195,7 +195,7 @@ static void hw_wait_phy_stable(void)
}
/* The PHY enters/leaves low power mode */
-static void ci_hdrc_enter_lpm(struct ci_hdrc *ci, bool enable)
+static void ci_hdrc_enter_lpm_common(struct ci_hdrc *ci, bool enable)
{
enum ci_hw_regs reg = ci->hw_bank.lpm ? OP_DEVLC : OP_PORTSC;
bool lpm = !!(hw_read(ci, reg, PORTSC_PHCD(ci->hw_bank.lpm)));
@@ -208,6 +208,11 @@ static void ci_hdrc_enter_lpm(struct ci_hdrc *ci, bool enable)
0);
}
+static void ci_hdrc_enter_lpm(struct ci_hdrc *ci, bool enable)
+{
+ return ci->platdata->enter_lpm(ci, enable);
+}
+
static int hw_device_init(struct ci_hdrc *ci, void __iomem *base)
{
u32 reg;
@@ -790,6 +795,9 @@ static int ci_get_platdata(struct device *dev,
platdata->pins_device = p;
}
+ if (!platdata->enter_lpm)
+ platdata->enter_lpm = ci_hdrc_enter_lpm_common;
+
return 0;
}
diff --git a/drivers/usb/chipidea/host.c b/drivers/usb/chipidea/host.c
index 48e4a5ca1835..67247d2ac07a 100644
--- a/drivers/usb/chipidea/host.c
+++ b/drivers/usb/chipidea/host.c
@@ -29,6 +29,12 @@ struct ehci_ci_priv {
bool enabled;
};
+struct ci_hdrc_dma_aligned_buffer {
+ void *kmalloc_ptr;
+ void *old_xfer_buffer;
+ u8 data[0];
+};
+
static int ehci_ci_portpower(struct usb_hcd *hcd, int portnum, bool enable)
{
struct ehci_hcd *ehci = hcd_to_ehci(hcd);
@@ -160,14 +166,15 @@ static int host_start(struct ci_hdrc *ci)
pinctrl_select_state(ci->platdata->pctl,
ci->platdata->pins_host);
+ ci->hcd = hcd;
+
ret = usb_add_hcd(hcd, 0, 0);
if (ret) {
+ ci->hcd = NULL;
goto disable_reg;
} else {
struct usb_otg *otg = &ci->otg;
- ci->hcd = hcd;
-
if (ci_otg_is_fsm_mode(ci)) {
otg->host = &hcd->self;
hcd->self.otg_port = 1;
@@ -237,6 +244,7 @@ static int ci_ehci_hub_control(
u32 temp;
unsigned long flags;
int retval = 0;
+ bool done = false;
struct device *dev = hcd->self.controller;
struct ci_hdrc *ci = dev_get_drvdata(dev);
@@ -244,6 +252,13 @@ static int ci_ehci_hub_control(
spin_lock_irqsave(&ehci->lock, flags);
+ if (ci->platdata->hub_control) {
+ retval = ci->platdata->hub_control(ci, typeReq, wValue, wIndex,
+ buf, wLength, &done, &flags);
+ if (done)
+ goto done;
+ }
+
if (typeReq == SetPortFeature && wValue == USB_PORT_FEAT_SUSPEND) {
temp = ehci_readl(ehci, status_reg);
if ((temp & PORT_PE) == 0 || (temp & PORT_RESET) != 0) {
@@ -349,6 +364,86 @@ static int ci_ehci_bus_suspend(struct usb_hcd *hcd)
return 0;
}
+static void ci_hdrc_free_dma_aligned_buffer(struct urb *urb)
+{
+ struct ci_hdrc_dma_aligned_buffer *temp;
+ size_t length;
+
+ if (!(urb->transfer_flags & URB_ALIGNED_TEMP_BUFFER))
+ return;
+
+ temp = container_of(urb->transfer_buffer,
+ struct ci_hdrc_dma_aligned_buffer, data);
+
+ if (usb_urb_dir_in(urb)) {
+ if (usb_pipeisoc(urb->pipe))
+ length = urb->transfer_buffer_length;
+ else
+ length = urb->actual_length;
+
+ memcpy(temp->old_xfer_buffer, temp->data, length);
+ }
+ urb->transfer_buffer = temp->old_xfer_buffer;
+ kfree(temp->kmalloc_ptr);
+
+ urb->transfer_flags &= ~URB_ALIGNED_TEMP_BUFFER;
+}
+
+static int ci_hdrc_alloc_dma_aligned_buffer(struct urb *urb, gfp_t mem_flags)
+{
+ struct ci_hdrc_dma_aligned_buffer *temp, *kmalloc_ptr;
+ const unsigned int ci_hdrc_usb_dma_align = 32;
+ size_t kmalloc_size;
+
+ if (urb->num_sgs || urb->sg || urb->transfer_buffer_length == 0 ||
+ !((uintptr_t)urb->transfer_buffer & (ci_hdrc_usb_dma_align - 1)))
+ return 0;
+
+ /* Allocate a buffer with enough padding for alignment */
+ kmalloc_size = urb->transfer_buffer_length +
+ sizeof(struct ci_hdrc_dma_aligned_buffer) +
+ ci_hdrc_usb_dma_align - 1;
+
+ kmalloc_ptr = kmalloc(kmalloc_size, mem_flags);
+ if (!kmalloc_ptr)
+ return -ENOMEM;
+
+ /* Position our struct dma_aligned_buffer such that data is aligned */
+ temp = PTR_ALIGN(kmalloc_ptr + 1, ci_hdrc_usb_dma_align) - 1;
+ temp->kmalloc_ptr = kmalloc_ptr;
+ temp->old_xfer_buffer = urb->transfer_buffer;
+ if (usb_urb_dir_out(urb))
+ memcpy(temp->data, urb->transfer_buffer,
+ urb->transfer_buffer_length);
+ urb->transfer_buffer = temp->data;
+
+ urb->transfer_flags |= URB_ALIGNED_TEMP_BUFFER;
+
+ return 0;
+}
+
+static int ci_hdrc_map_urb_for_dma(struct usb_hcd *hcd, struct urb *urb,
+ gfp_t mem_flags)
+{
+ int ret;
+
+ ret = ci_hdrc_alloc_dma_aligned_buffer(urb, mem_flags);
+ if (ret)
+ return ret;
+
+ ret = usb_hcd_map_urb_for_dma(hcd, urb, mem_flags);
+ if (ret)
+ ci_hdrc_free_dma_aligned_buffer(urb);
+
+ return ret;
+}
+
+static void ci_hdrc_unmap_urb_for_dma(struct usb_hcd *hcd, struct urb *urb)
+{
+ usb_hcd_unmap_urb_for_dma(hcd, urb);
+ ci_hdrc_free_dma_aligned_buffer(urb);
+}
+
int ci_hdrc_host_init(struct ci_hdrc *ci)
{
struct ci_role_driver *rdrv;
@@ -366,6 +461,11 @@ int ci_hdrc_host_init(struct ci_hdrc *ci)
rdrv->name = "host";
ci->roles[CI_ROLE_HOST] = rdrv;
+ if (ci->platdata->flags & CI_HDRC_REQUIRES_ALIGNED_DMA) {
+ ci_ehci_hc_driver.map_urb_for_dma = ci_hdrc_map_urb_for_dma;
+ ci_ehci_hc_driver.unmap_urb_for_dma = ci_hdrc_unmap_urb_for_dma;
+ }
+
return 0;
}
diff --git a/include/linux/usb/chipidea.h b/include/linux/usb/chipidea.h
index 025b41687ce9..edf3342507f1 100644
--- a/include/linux/usb/chipidea.h
+++ b/include/linux/usb/chipidea.h
@@ -88,6 +88,12 @@ struct ci_hdrc_platform_data {
struct pinctrl_state *pins_default;
struct pinctrl_state *pins_host;
struct pinctrl_state *pins_device;
+
+ /* platform-specific hooks */
+ int (*hub_control)(struct ci_hdrc *ci, u16 typeReq, u16 wValue,
+ u16 wIndex, char *buf, u16 wLength,
+ bool *done, unsigned long *flags);
+ void (*enter_lpm)(struct ci_hdrc *ci, bool enable);
};
/* Default offset of capability registers */
--
2.29.2
Rename all occurrences in the code from "udc" to "usb" and change the
Kconfig entry in order to show that this driver supports USB modes other
than device-only mode. The follow up patch will add host-mode support and
it will be cleaner to perform the renaming separately, i.e. in this patch.
Tested-by: Matt Merhar <[email protected]>
Tested-by: Nicolas Chauvet <[email protected]>
Tested-by: Peter Geis <[email protected]>
Tested-by: Ion Agorria <[email protected]>
Signed-off-by: Dmitry Osipenko <[email protected]>
---
drivers/usb/chipidea/Kconfig | 2 +-
drivers/usb/chipidea/ci_hdrc_tegra.c | 78 ++++++++++++++--------------
2 files changed, 40 insertions(+), 40 deletions(-)
diff --git a/drivers/usb/chipidea/Kconfig b/drivers/usb/chipidea/Kconfig
index 8bafcfc6080d..8685ead6ccc7 100644
--- a/drivers/usb/chipidea/Kconfig
+++ b/drivers/usb/chipidea/Kconfig
@@ -53,7 +53,7 @@ config USB_CHIPIDEA_GENERIC
default USB_CHIPIDEA
config USB_CHIPIDEA_TEGRA
- tristate "Enable Tegra UDC glue driver" if EMBEDDED
+ tristate "Enable Tegra USB glue driver" if EMBEDDED
depends on OF
depends on USB_CHIPIDEA_UDC
default USB_CHIPIDEA
diff --git a/drivers/usb/chipidea/ci_hdrc_tegra.c b/drivers/usb/chipidea/ci_hdrc_tegra.c
index 10eaaba2a3f0..d8efa80aa1c2 100644
--- a/drivers/usb/chipidea/ci_hdrc_tegra.c
+++ b/drivers/usb/chipidea/ci_hdrc_tegra.c
@@ -12,7 +12,7 @@
#include "ci.h"
-struct tegra_udc {
+struct tegra_usb {
struct ci_hdrc_platform_data data;
struct platform_device *dev;
@@ -20,15 +20,15 @@ struct tegra_udc {
struct clk *clk;
};
-struct tegra_udc_soc_info {
+struct tegra_usb_soc_info {
unsigned long flags;
};
-static const struct tegra_udc_soc_info tegra_udc_soc_info = {
+static const struct tegra_usb_soc_info tegra_udc_soc_info = {
.flags = CI_HDRC_REQUIRES_ALIGNED_DMA,
};
-static const struct of_device_id tegra_udc_of_match[] = {
+static const struct of_device_id tegra_usb_of_match[] = {
{
.compatible = "nvidia,tegra20-udc",
.data = &tegra_udc_soc_info,
@@ -45,16 +45,16 @@ static const struct of_device_id tegra_udc_of_match[] = {
/* sentinel */
}
};
-MODULE_DEVICE_TABLE(of, tegra_udc_of_match);
+MODULE_DEVICE_TABLE(of, tegra_usb_of_match);
-static int tegra_udc_probe(struct platform_device *pdev)
+static int tegra_usb_probe(struct platform_device *pdev)
{
- const struct tegra_udc_soc_info *soc;
- struct tegra_udc *udc;
+ const struct tegra_usb_soc_info *soc;
+ struct tegra_usb *usb;
int err;
- udc = devm_kzalloc(&pdev->dev, sizeof(*udc), GFP_KERNEL);
- if (!udc)
+ usb = devm_kzalloc(&pdev->dev, sizeof(*usb), GFP_KERNEL);
+ if (!usb)
return -ENOMEM;
soc = of_device_get_match_data(&pdev->dev);
@@ -63,69 +63,69 @@ static int tegra_udc_probe(struct platform_device *pdev)
return -EINVAL;
}
- udc->phy = devm_usb_get_phy_by_phandle(&pdev->dev, "nvidia,phy", 0);
- if (IS_ERR(udc->phy)) {
- err = PTR_ERR(udc->phy);
+ usb->phy = devm_usb_get_phy_by_phandle(&pdev->dev, "nvidia,phy", 0);
+ if (IS_ERR(usb->phy)) {
+ err = PTR_ERR(usb->phy);
dev_err(&pdev->dev, "failed to get PHY: %d\n", err);
return err;
}
- udc->clk = devm_clk_get(&pdev->dev, NULL);
- if (IS_ERR(udc->clk)) {
- err = PTR_ERR(udc->clk);
+ usb->clk = devm_clk_get(&pdev->dev, NULL);
+ if (IS_ERR(usb->clk)) {
+ err = PTR_ERR(usb->clk);
dev_err(&pdev->dev, "failed to get clock: %d\n", err);
return err;
}
- err = clk_prepare_enable(udc->clk);
+ err = clk_prepare_enable(usb->clk);
if (err < 0) {
dev_err(&pdev->dev, "failed to enable clock: %d\n", err);
return err;
}
/* setup and register ChipIdea HDRC device */
- udc->data.name = "tegra-udc";
- udc->data.flags = soc->flags;
- udc->data.usb_phy = udc->phy;
- udc->data.capoffset = DEF_CAPOFFSET;
-
- udc->dev = ci_hdrc_add_device(&pdev->dev, pdev->resource,
- pdev->num_resources, &udc->data);
- if (IS_ERR(udc->dev)) {
- err = PTR_ERR(udc->dev);
+ usb->data.name = "tegra-usb";
+ usb->data.flags = soc->flags;
+ usb->data.usb_phy = usb->phy;
+ usb->data.capoffset = DEF_CAPOFFSET;
+
+ usb->dev = ci_hdrc_add_device(&pdev->dev, pdev->resource,
+ pdev->num_resources, &usb->data);
+ if (IS_ERR(usb->dev)) {
+ err = PTR_ERR(usb->dev);
dev_err(&pdev->dev, "failed to add HDRC device: %d\n", err);
goto fail_power_off;
}
- platform_set_drvdata(pdev, udc);
+ platform_set_drvdata(pdev, usb);
return 0;
fail_power_off:
- clk_disable_unprepare(udc->clk);
+ clk_disable_unprepare(usb->clk);
return err;
}
-static int tegra_udc_remove(struct platform_device *pdev)
+static int tegra_usb_remove(struct platform_device *pdev)
{
- struct tegra_udc *udc = platform_get_drvdata(pdev);
+ struct tegra_usb *usb = platform_get_drvdata(pdev);
- ci_hdrc_remove_device(udc->dev);
- clk_disable_unprepare(udc->clk);
+ ci_hdrc_remove_device(usb->dev);
+ clk_disable_unprepare(usb->clk);
return 0;
}
-static struct platform_driver tegra_udc_driver = {
+static struct platform_driver tegra_usb_driver = {
.driver = {
- .name = "tegra-udc",
- .of_match_table = tegra_udc_of_match,
+ .name = "tegra-usb",
+ .of_match_table = tegra_usb_of_match,
},
- .probe = tegra_udc_probe,
- .remove = tegra_udc_remove,
+ .probe = tegra_usb_probe,
+ .remove = tegra_usb_remove,
};
-module_platform_driver(tegra_udc_driver);
+module_platform_driver(tegra_usb_driver);
-MODULE_DESCRIPTION("NVIDIA Tegra USB device mode driver");
+MODULE_DESCRIPTION("NVIDIA Tegra USB driver");
MODULE_AUTHOR("Thierry Reding <[email protected]>");
MODULE_LICENSE("GPL v2");
--
2.29.2
Tegra PHY driver now supports waking up controller from a low power mode.
Enable runtime PM in order to put controller into the LPM during idle.
Tested-by: Matt Merhar <[email protected]>
Tested-by: Nicolas Chauvet <[email protected]>
Tested-by: Peter Geis <[email protected]>
Tested-by: Ion Agorria <[email protected]>
Signed-off-by: Dmitry Osipenko <[email protected]>
---
drivers/usb/chipidea/ci_hdrc_tegra.c | 13 ++++++++++---
1 file changed, 10 insertions(+), 3 deletions(-)
diff --git a/drivers/usb/chipidea/ci_hdrc_tegra.c b/drivers/usb/chipidea/ci_hdrc_tegra.c
index 5fccdeeefc64..655671159511 100644
--- a/drivers/usb/chipidea/ci_hdrc_tegra.c
+++ b/drivers/usb/chipidea/ci_hdrc_tegra.c
@@ -38,21 +38,24 @@ struct tegra_usb_soc_info {
static const struct tegra_usb_soc_info tegra20_ehci_soc_info = {
.flags = CI_HDRC_REQUIRES_ALIGNED_DMA |
- CI_HDRC_OVERRIDE_PHY_CONTROL,
+ CI_HDRC_OVERRIDE_PHY_CONTROL |
+ CI_HDRC_SUPPORTS_RUNTIME_PM,
.dr_mode = USB_DR_MODE_HOST,
.txfifothresh = 10,
};
static const struct tegra_usb_soc_info tegra30_ehci_soc_info = {
.flags = CI_HDRC_REQUIRES_ALIGNED_DMA |
- CI_HDRC_OVERRIDE_PHY_CONTROL,
+ CI_HDRC_OVERRIDE_PHY_CONTROL |
+ CI_HDRC_SUPPORTS_RUNTIME_PM,
.dr_mode = USB_DR_MODE_HOST,
.txfifothresh = 16,
};
static const struct tegra_usb_soc_info tegra_udc_soc_info = {
.flags = CI_HDRC_REQUIRES_ALIGNED_DMA |
- CI_HDRC_OVERRIDE_PHY_CONTROL,
+ CI_HDRC_OVERRIDE_PHY_CONTROL |
+ CI_HDRC_SUPPORTS_RUNTIME_PM,
.dr_mode = USB_DR_MODE_UNKNOWN,
};
@@ -323,6 +326,10 @@ static int tegra_usb_probe(struct platform_device *pdev)
usb->data.hub_control = tegra_ehci_hub_control;
usb->data.notify_event = tegra_usb_notify_event;
+ /* Tegra PHY driver currently doesn't support LPM for ULPI */
+ if (of_usb_get_phy_mode(pdev->dev.of_node) == USBPHY_INTERFACE_MODE_ULPI)
+ usb->data.flags &= ~CI_HDRC_SUPPORTS_RUNTIME_PM;
+
usb->dev = ci_hdrc_add_device(&pdev->dev, pdev->resource,
pdev->num_resources, &usb->data);
if (IS_ERR(usb->dev)) {
--
2.29.2
The PHY hardware needs the delay of 2ms after power up, otherwise initial
interrupt may be lost if USB controller is accessed before PHY is settled
down. Previously this issue was masked by implicit delays, but now it pops
up after squashing the older ehci-tegra driver into the ChipIdea driver.
Tested-by: Matt Merhar <[email protected]>
Tested-by: Nicolas Chauvet <[email protected]>
Tested-by: Peter Geis <[email protected]>
Tested-by: Ion Agorria <[email protected]>
Signed-off-by: Dmitry Osipenko <[email protected]>
---
drivers/usb/phy/phy-tegra-usb.c | 3 +++
1 file changed, 3 insertions(+)
diff --git a/drivers/usb/phy/phy-tegra-usb.c b/drivers/usb/phy/phy-tegra-usb.c
index 03a333797382..1296524e1bee 100644
--- a/drivers/usb/phy/phy-tegra-usb.c
+++ b/drivers/usb/phy/phy-tegra-usb.c
@@ -784,6 +784,9 @@ static int tegra_usb_phy_power_on(struct tegra_usb_phy *phy)
phy->powered_on = true;
+ /* Let PHY settle down */
+ usleep_range(2000, 2500);
+
return 0;
}
--
2.29.2
On Thu, Dec 17, 2020 at 12:40:00PM +0300, Dmitry Osipenko wrote:
> The PHY hardware needs the delay of 2ms after power up, otherwise initial
> interrupt may be lost if USB controller is accessed before PHY is settled
> down. Previously this issue was masked by implicit delays, but now it pops
> up after squashing the older ehci-tegra driver into the ChipIdea driver.
>
> Tested-by: Matt Merhar <[email protected]>
> Tested-by: Nicolas Chauvet <[email protected]>
> Tested-by: Peter Geis <[email protected]>
> Tested-by: Ion Agorria <[email protected]>
> Signed-off-by: Dmitry Osipenko <[email protected]>
> ---
> drivers/usb/phy/phy-tegra-usb.c | 3 +++
> 1 file changed, 3 insertions(+)
Acked-by: Thierry Reding <[email protected]>
On Thu, Dec 17, 2020 at 12:40:01PM +0300, Dmitry Osipenko wrote:
> Support programming of waking up from a low power mode by implementing the
> generic set_wakeup() callback of the USB PHY API.
>
> Tested-by: Matt Merhar <[email protected]>
> Tested-by: Nicolas Chauvet <[email protected]>
> Tested-by: Peter Geis <[email protected]>
> Tested-by: Ion Agorria <[email protected]>
> Signed-off-by: Dmitry Osipenko <[email protected]>
> ---
> drivers/usb/phy/phy-tegra-usb.c | 94 +++++++++++++++++++++++++++++--
> include/linux/usb/tegra_usb_phy.h | 2 +
> 2 files changed, 90 insertions(+), 6 deletions(-)
>
> diff --git a/drivers/usb/phy/phy-tegra-usb.c b/drivers/usb/phy/phy-tegra-usb.c
> index 1296524e1bee..46a1f61877ad 100644
> --- a/drivers/usb/phy/phy-tegra-usb.c
> +++ b/drivers/usb/phy/phy-tegra-usb.c
> @@ -45,6 +45,7 @@
> #define TEGRA_PORTSC1_RWC_BITS (PORT_CSC | PORT_PEC | PORT_OCC)
>
> #define USB_SUSP_CTRL 0x400
> +#define USB_WAKE_ON_RESUME_EN BIT(2)
> #define USB_WAKE_ON_CNNT_EN_DEV BIT(3)
> #define USB_WAKE_ON_DISCON_EN_DEV BIT(4)
> #define USB_SUSP_CLR BIT(5)
> @@ -56,6 +57,15 @@
> #define USB_SUSP_SET BIT(14)
> #define USB_WAKEUP_DEBOUNCE_COUNT(x) (((x) & 0x7) << 16)
>
> +#define USB_PHY_VBUS_SENSORS 0x404
> +#define B_SESS_VLD_WAKEUP_EN BIT(6)
> +#define B_VBUS_VLD_WAKEUP_EN BIT(14)
> +#define A_SESS_VLD_WAKEUP_EN BIT(22)
> +#define A_VBUS_VLD_WAKEUP_EN BIT(30)
> +
> +#define USB_PHY_VBUS_WAKEUP_ID 0x408
> +#define VBUS_WAKEUP_WAKEUP_EN BIT(30)
> +
> #define USB1_LEGACY_CTRL 0x410
> #define USB1_NO_LEGACY_MODE BIT(0)
> #define USB1_VBUS_SENSE_CTL_MASK (3 << 1)
> @@ -334,6 +344,11 @@ static int utmip_pad_power_on(struct tegra_usb_phy *phy)
> writel_relaxed(val, base + UTMIP_BIAS_CFG0);
> }
>
> + if (phy->pad_wakeup) {
> + phy->pad_wakeup = false;
> + utmip_pad_count--;
> + }
> +
> spin_unlock(&utmip_pad_lock);
>
> clk_disable_unprepare(phy->pad_clk);
> @@ -359,6 +374,17 @@ static int utmip_pad_power_off(struct tegra_usb_phy *phy)
> goto ulock;
> }
>
> + /*
> + * In accordance to TRM, OTG and Bias pad circuits could be turned off
> + * to save power if wake is enabled, but the VBUS-change detection
> + * method is board-specific and these circuits may need to be enabled
> + * to generate wakeup event, hence we will just keep them both enabled.
> + */
> + if (phy->wakeup_enabled) {
> + phy->pad_wakeup = true;
> + utmip_pad_count++;
> + }
> +
> if (--utmip_pad_count == 0) {
> val = readl_relaxed(base + UTMIP_BIAS_CFG0);
> val |= UTMIP_OTGPD | UTMIP_BIASPD;
> @@ -503,11 +529,24 @@ static int utmi_phy_power_on(struct tegra_usb_phy *phy)
> writel_relaxed(val, base + UTMIP_PLL_CFG1);
> }
>
> + val = readl_relaxed(base + USB_SUSP_CTRL);
> + val &= ~USB_WAKE_ON_RESUME_EN;
> + writel_relaxed(val, base + USB_SUSP_CTRL);
> +
> if (phy->mode == USB_DR_MODE_PERIPHERAL) {
> val = readl_relaxed(base + USB_SUSP_CTRL);
> val &= ~(USB_WAKE_ON_CNNT_EN_DEV | USB_WAKE_ON_DISCON_EN_DEV);
> writel_relaxed(val, base + USB_SUSP_CTRL);
>
> + val = readl_relaxed(base + USB_PHY_VBUS_WAKEUP_ID);
> + val &= ~VBUS_WAKEUP_WAKEUP_EN;
> + writel_relaxed(val, base + USB_PHY_VBUS_WAKEUP_ID);
> +
> + val = readl_relaxed(base + USB_PHY_VBUS_SENSORS);
> + val &= ~(A_VBUS_VLD_WAKEUP_EN | A_SESS_VLD_WAKEUP_EN);
> + val &= ~(B_VBUS_VLD_WAKEUP_EN | B_SESS_VLD_WAKEUP_EN);
> + writel_relaxed(val, base + USB_PHY_VBUS_SENSORS);
> +
> val = readl_relaxed(base + UTMIP_BAT_CHRG_CFG0);
> val &= ~UTMIP_PD_CHRG;
> writel_relaxed(val, base + UTMIP_BAT_CHRG_CFG0);
> @@ -605,31 +644,55 @@ static int utmi_phy_power_off(struct tegra_usb_phy *phy)
>
> utmi_phy_clk_disable(phy);
>
> - if (phy->mode == USB_DR_MODE_PERIPHERAL) {
> - val = readl_relaxed(base + USB_SUSP_CTRL);
> - val &= ~USB_WAKEUP_DEBOUNCE_COUNT(~0);
> - val |= USB_WAKE_ON_CNNT_EN_DEV | USB_WAKEUP_DEBOUNCE_COUNT(5);
> - writel_relaxed(val, base + USB_SUSP_CTRL);
> - }
> + /* PHY won't resume if reset is asserted */
> + if (phy->wakeup_enabled)
> + goto chrg_cfg0;
>
> val = readl_relaxed(base + USB_SUSP_CTRL);
> val |= UTMIP_RESET;
> writel_relaxed(val, base + USB_SUSP_CTRL);
>
> +chrg_cfg0:
I found this diffcult to read until I realized that it was basically
just the equivalent of this:
if (!phy->wakeup_enabled) {
val = readl_relaxed(base + USB_SUSP_CTRL);
val |= UTMIP_RESET;
writel_relaxed(val, base + USB_SUSP_CTRL);
}
> val = readl_relaxed(base + UTMIP_BAT_CHRG_CFG0);
> val |= UTMIP_PD_CHRG;
> writel_relaxed(val, base + UTMIP_BAT_CHRG_CFG0);
>
> + if (phy->wakeup_enabled)
> + goto xcvr_cfg1;
> +
> val = readl_relaxed(base + UTMIP_XCVR_CFG0);
> val |= UTMIP_FORCE_PD_POWERDOWN | UTMIP_FORCE_PD2_POWERDOWN |
> UTMIP_FORCE_PDZI_POWERDOWN;
> writel_relaxed(val, base + UTMIP_XCVR_CFG0);
>
> +xcvr_cfg1:
Similarly, I think this is more readable as:
if (!phy->wakeup_enabled) {
val = readl_relaxed(base + UTMIP_XCVR_CFG0);
val |= UTMIP_FORCE_PD_POWERDOWN | UTMIP_FORCE_PD2_POWERDOWN |
UTMIP_FORCE_PDZI_POWERDOWN;
writel_relaxed(val, base + UTMIP_XCVR_CFG0);
}
> val = readl_relaxed(base + UTMIP_XCVR_CFG1);
> val |= UTMIP_FORCE_PDDISC_POWERDOWN | UTMIP_FORCE_PDCHRP_POWERDOWN |
> UTMIP_FORCE_PDDR_POWERDOWN;
> writel_relaxed(val, base + UTMIP_XCVR_CFG1);
>
> + if (phy->wakeup_enabled) {
Which then also matches the style of this conditional here.
> + val = readl_relaxed(base + USB_SUSP_CTRL);
> + val &= ~USB_WAKEUP_DEBOUNCE_COUNT(~0);
> + val |= USB_WAKEUP_DEBOUNCE_COUNT(5);
> + val |= USB_WAKE_ON_RESUME_EN;
> + writel_relaxed(val, base + USB_SUSP_CTRL);
> +
> + /*
> + * Ask VBUS sensor to generate wake event once cable is
> + * connected.
> + */
> + if (phy->mode == USB_DR_MODE_PERIPHERAL) {
> + val = readl_relaxed(base + USB_PHY_VBUS_WAKEUP_ID);
> + val |= VBUS_WAKEUP_WAKEUP_EN;
> + writel_relaxed(val, base + USB_PHY_VBUS_WAKEUP_ID);
> +
> + val = readl_relaxed(base + USB_PHY_VBUS_SENSORS);
> + val |= A_VBUS_VLD_WAKEUP_EN;
> + writel_relaxed(val, base + USB_PHY_VBUS_SENSORS);
> + }
> + }
> +
> return utmip_pad_power_off(phy);
> }
>
> @@ -765,6 +828,15 @@ static int ulpi_phy_power_off(struct tegra_usb_phy *phy)
> usleep_range(5000, 6000);
> clk_disable_unprepare(phy->clk);
>
> + /*
> + * Wakeup currently unimplemented for ULPI, thus PHY needs to be
> + * force-resumed.
> + */
> + if (WARN_ON_ONCE(phy->wakeup_enabled)) {
> + ulpi_phy_power_on(phy);
> + return -EOPNOTSUPP;
> + }
How do we control phy->wakeup_enabled? Is this something that we can set
in device tree, for example? I hope so, because otherwise this would
cause a nasty splat every time we try to power-off a ULPI PHY.
Thierry
On Thu, Dec 17, 2020 at 12:40:03PM +0300, Dmitry Osipenko wrote:
> Rename all occurrences in the code from "udc" to "usb" and change the
> Kconfig entry in order to show that this driver supports USB modes other
> than device-only mode. The follow up patch will add host-mode support and
> it will be cleaner to perform the renaming separately, i.e. in this patch.
>
> Tested-by: Matt Merhar <[email protected]>
> Tested-by: Nicolas Chauvet <[email protected]>
> Tested-by: Peter Geis <[email protected]>
> Tested-by: Ion Agorria <[email protected]>
> Signed-off-by: Dmitry Osipenko <[email protected]>
> ---
> drivers/usb/chipidea/Kconfig | 2 +-
> drivers/usb/chipidea/ci_hdrc_tegra.c | 78 ++++++++++++++--------------
> 2 files changed, 40 insertions(+), 40 deletions(-)
>
> diff --git a/drivers/usb/chipidea/Kconfig b/drivers/usb/chipidea/Kconfig
> index 8bafcfc6080d..8685ead6ccc7 100644
> --- a/drivers/usb/chipidea/Kconfig
> +++ b/drivers/usb/chipidea/Kconfig
> @@ -53,7 +53,7 @@ config USB_CHIPIDEA_GENERIC
> default USB_CHIPIDEA
>
> config USB_CHIPIDEA_TEGRA
> - tristate "Enable Tegra UDC glue driver" if EMBEDDED
> + tristate "Enable Tegra USB glue driver" if EMBEDDED
> depends on OF
> depends on USB_CHIPIDEA_UDC
> default USB_CHIPIDEA
> diff --git a/drivers/usb/chipidea/ci_hdrc_tegra.c b/drivers/usb/chipidea/ci_hdrc_tegra.c
> index 10eaaba2a3f0..d8efa80aa1c2 100644
> --- a/drivers/usb/chipidea/ci_hdrc_tegra.c
> +++ b/drivers/usb/chipidea/ci_hdrc_tegra.c
> @@ -12,7 +12,7 @@
>
> #include "ci.h"
>
> -struct tegra_udc {
> +struct tegra_usb {
> struct ci_hdrc_platform_data data;
> struct platform_device *dev;
>
> @@ -20,15 +20,15 @@ struct tegra_udc {
> struct clk *clk;
> };
>
> -struct tegra_udc_soc_info {
> +struct tegra_usb_soc_info {
> unsigned long flags;
> };
>
> -static const struct tegra_udc_soc_info tegra_udc_soc_info = {
> +static const struct tegra_usb_soc_info tegra_udc_soc_info = {
> .flags = CI_HDRC_REQUIRES_ALIGNED_DMA,
> };
>
> -static const struct of_device_id tegra_udc_of_match[] = {
> +static const struct of_device_id tegra_usb_of_match[] = {
> {
> .compatible = "nvidia,tegra20-udc",
Do we perhaps also want to add a new tegra20-usb compatible string here
and deprecate the old one since this now no longer properly describes
the device.
In either case, this looks fine:
Acked-by: Thierry Reding <[email protected]>
On Thu, Dec 17, 2020 at 12:40:04PM +0300, Dmitry Osipenko wrote:
> From: Peter Geis <[email protected]>
>
> Add USB host mode to the Tegra HDRC driver. This allows us to benefit from
> support provided by the generic ChipIdea driver instead of duplicating the
> effort in a separate ehci-tegra driver.
>
> Tested-by: Matt Merhar <[email protected]>
> Tested-by: Nicolas Chauvet <[email protected]>
> Tested-by: Ion Agorria <[email protected]>
> Signed-off-by: Peter Geis <[email protected]>
> Signed-off-by: Dmitry Osipenko <[email protected]>
> ---
> drivers/usb/chipidea/Kconfig | 1 -
> drivers/usb/chipidea/ci_hdrc_tegra.c | 243 ++++++++++++++++++++++++++-
> drivers/usb/chipidea/core.c | 10 +-
> drivers/usb/chipidea/host.c | 104 +++++++++++-
> include/linux/usb/chipidea.h | 6 +
> 5 files changed, 356 insertions(+), 8 deletions(-)
Looks good:
Acked-by: Thierry Reding <[email protected]>
On Thu, Dec 17, 2020 at 12:40:05PM +0300, Dmitry Osipenko wrote:
> Tegra PHY driver now supports waking up controller from a low power mode.
> Enable runtime PM in order to put controller into the LPM during idle.
>
> Tested-by: Matt Merhar <[email protected]>
> Tested-by: Nicolas Chauvet <[email protected]>
> Tested-by: Peter Geis <[email protected]>
> Tested-by: Ion Agorria <[email protected]>
> Signed-off-by: Dmitry Osipenko <[email protected]>
> ---
> drivers/usb/chipidea/ci_hdrc_tegra.c | 13 ++++++++++---
> 1 file changed, 10 insertions(+), 3 deletions(-)
>
> diff --git a/drivers/usb/chipidea/ci_hdrc_tegra.c b/drivers/usb/chipidea/ci_hdrc_tegra.c
> index 5fccdeeefc64..655671159511 100644
> --- a/drivers/usb/chipidea/ci_hdrc_tegra.c
> +++ b/drivers/usb/chipidea/ci_hdrc_tegra.c
> @@ -38,21 +38,24 @@ struct tegra_usb_soc_info {
>
> static const struct tegra_usb_soc_info tegra20_ehci_soc_info = {
> .flags = CI_HDRC_REQUIRES_ALIGNED_DMA |
> - CI_HDRC_OVERRIDE_PHY_CONTROL,
> + CI_HDRC_OVERRIDE_PHY_CONTROL |
> + CI_HDRC_SUPPORTS_RUNTIME_PM,
> .dr_mode = USB_DR_MODE_HOST,
> .txfifothresh = 10,
> };
>
> static const struct tegra_usb_soc_info tegra30_ehci_soc_info = {
> .flags = CI_HDRC_REQUIRES_ALIGNED_DMA |
> - CI_HDRC_OVERRIDE_PHY_CONTROL,
> + CI_HDRC_OVERRIDE_PHY_CONTROL |
> + CI_HDRC_SUPPORTS_RUNTIME_PM,
> .dr_mode = USB_DR_MODE_HOST,
> .txfifothresh = 16,
> };
>
> static const struct tegra_usb_soc_info tegra_udc_soc_info = {
> .flags = CI_HDRC_REQUIRES_ALIGNED_DMA |
> - CI_HDRC_OVERRIDE_PHY_CONTROL,
> + CI_HDRC_OVERRIDE_PHY_CONTROL |
> + CI_HDRC_SUPPORTS_RUNTIME_PM,
> .dr_mode = USB_DR_MODE_UNKNOWN,
> };
>
> @@ -323,6 +326,10 @@ static int tegra_usb_probe(struct platform_device *pdev)
> usb->data.hub_control = tegra_ehci_hub_control;
> usb->data.notify_event = tegra_usb_notify_event;
>
> + /* Tegra PHY driver currently doesn't support LPM for ULPI */
> + if (of_usb_get_phy_mode(pdev->dev.of_node) == USBPHY_INTERFACE_MODE_ULPI)
> + usb->data.flags &= ~CI_HDRC_SUPPORTS_RUNTIME_PM;
> +
Does this prevent the wakeup_enabled from being set for ULPI PHYs?
Thierry
On Thu, Dec 17, 2020 at 12:40:06PM +0300, Dmitry Osipenko wrote:
> The ChipIdea driver now provides USB2 host mode support for NVIDIA Tegra
> SoCs. The ehci-tegra driver is obsolete now, remove it and redirect the
> older Kconfig entry to the CI driver.
>
> Tested-by: Matt Merhar <[email protected]>
> Tested-by: Nicolas Chauvet <[email protected]>
> Tested-by: Peter Geis <[email protected]>
> Tested-by: Ion Agorria <[email protected]>
> Signed-off-by: Dmitry Osipenko <[email protected]>
> ---
> drivers/usb/host/Kconfig | 8 +-
> drivers/usb/host/Makefile | 1 -
> drivers/usb/host/ehci-tegra.c | 604 ----------------------------------
> 3 files changed, 6 insertions(+), 607 deletions(-)
> delete mode 100644 drivers/usb/host/ehci-tegra.c
Acked-by: Thierry Reding <[email protected]>
On Thu, Dec 17, 2020 at 12:40:07PM +0300, Dmitry Osipenko wrote:
> The ehci-tegra driver was superseded by the generic ChipIdea USB driver,
> update the tegra's defconfig accordingly.
>
> Signed-off-by: Dmitry Osipenko <[email protected]>
> ---
> arch/arm/configs/tegra_defconfig | 3 ++-
> 1 file changed, 2 insertions(+), 1 deletion(-)
Greg, Peter, it might make sense for this to go through the USB tree
along with the rest of the series to make sure it goes in at the right
time. This file doesn't see many changes, so I expect there to be no
conflicts with the ARM SoC tree.
Acked-by: Thierry Reding <[email protected]>
If you'd rather not pick this up, I'll just wait until the rest are
applied and take this through the Tegra tree.
Thierry
17.12.2020 16:41, Thierry Reding пишет:
> On Thu, Dec 17, 2020 at 12:40:05PM +0300, Dmitry Osipenko wrote:
>> Tegra PHY driver now supports waking up controller from a low power mode.
>> Enable runtime PM in order to put controller into the LPM during idle.
>>
>> Tested-by: Matt Merhar <[email protected]>
>> Tested-by: Nicolas Chauvet <[email protected]>
>> Tested-by: Peter Geis <[email protected]>
>> Tested-by: Ion Agorria <[email protected]>
>> Signed-off-by: Dmitry Osipenko <[email protected]>
>> ---
>> drivers/usb/chipidea/ci_hdrc_tegra.c | 13 ++++++++++---
>> 1 file changed, 10 insertions(+), 3 deletions(-)
>>
>> diff --git a/drivers/usb/chipidea/ci_hdrc_tegra.c b/drivers/usb/chipidea/ci_hdrc_tegra.c
>> index 5fccdeeefc64..655671159511 100644
>> --- a/drivers/usb/chipidea/ci_hdrc_tegra.c
>> +++ b/drivers/usb/chipidea/ci_hdrc_tegra.c
>> @@ -38,21 +38,24 @@ struct tegra_usb_soc_info {
>>
>> static const struct tegra_usb_soc_info tegra20_ehci_soc_info = {
>> .flags = CI_HDRC_REQUIRES_ALIGNED_DMA |
>> - CI_HDRC_OVERRIDE_PHY_CONTROL,
>> + CI_HDRC_OVERRIDE_PHY_CONTROL |
>> + CI_HDRC_SUPPORTS_RUNTIME_PM,
>> .dr_mode = USB_DR_MODE_HOST,
>> .txfifothresh = 10,
>> };
>>
>> static const struct tegra_usb_soc_info tegra30_ehci_soc_info = {
>> .flags = CI_HDRC_REQUIRES_ALIGNED_DMA |
>> - CI_HDRC_OVERRIDE_PHY_CONTROL,
>> + CI_HDRC_OVERRIDE_PHY_CONTROL |
>> + CI_HDRC_SUPPORTS_RUNTIME_PM,
>> .dr_mode = USB_DR_MODE_HOST,
>> .txfifothresh = 16,
>> };
>>
>> static const struct tegra_usb_soc_info tegra_udc_soc_info = {
>> .flags = CI_HDRC_REQUIRES_ALIGNED_DMA |
>> - CI_HDRC_OVERRIDE_PHY_CONTROL,
>> + CI_HDRC_OVERRIDE_PHY_CONTROL |
>> + CI_HDRC_SUPPORTS_RUNTIME_PM,
>> .dr_mode = USB_DR_MODE_UNKNOWN,
>> };
>>
>> @@ -323,6 +326,10 @@ static int tegra_usb_probe(struct platform_device *pdev)
>> usb->data.hub_control = tegra_ehci_hub_control;
>> usb->data.notify_event = tegra_usb_notify_event;
>>
>> + /* Tegra PHY driver currently doesn't support LPM for ULPI */
>> + if (of_usb_get_phy_mode(pdev->dev.of_node) == USBPHY_INTERFACE_MODE_ULPI)
>> + usb->data.flags &= ~CI_HDRC_SUPPORTS_RUNTIME_PM;
>> +
>
> Does this prevent the wakeup_enabled from being set for ULPI PHYs?
Yes
17.12.2020 16:33, Thierry Reding пишет:
>> + /* PHY won't resume if reset is asserted */
>> + if (phy->wakeup_enabled)
>> + goto chrg_cfg0;
>>
>> val = readl_relaxed(base + USB_SUSP_CTRL);
>> val |= UTMIP_RESET;
>> writel_relaxed(val, base + USB_SUSP_CTRL);
>>
>> +chrg_cfg0:
> I found this diffcult to read until I realized that it was basically
> just the equivalent of this:
>
> if (!phy->wakeup_enabled) {
> val = readl_relaxed(base + USB_SUSP_CTRL);
> val |= UTMIP_RESET;
> writel_relaxed(val, base + USB_SUSP_CTRL);
> }
>
>> val = readl_relaxed(base + UTMIP_BAT_CHRG_CFG0);
>> val |= UTMIP_PD_CHRG;
>> writel_relaxed(val, base + UTMIP_BAT_CHRG_CFG0);
>>
>> + if (phy->wakeup_enabled)
>> + goto xcvr_cfg1;
>> +
>> val = readl_relaxed(base + UTMIP_XCVR_CFG0);
>> val |= UTMIP_FORCE_PD_POWERDOWN | UTMIP_FORCE_PD2_POWERDOWN |
>> UTMIP_FORCE_PDZI_POWERDOWN;
>> writel_relaxed(val, base + UTMIP_XCVR_CFG0);
>>
>> +xcvr_cfg1:
> Similarly, I think this is more readable as:
>
> if (!phy->wakeup_enabled) {
> val = readl_relaxed(base + UTMIP_XCVR_CFG0);
> val |= UTMIP_FORCE_PD_POWERDOWN | UTMIP_FORCE_PD2_POWERDOWN |
> UTMIP_FORCE_PDZI_POWERDOWN;
> writel_relaxed(val, base + UTMIP_XCVR_CFG0);
> }
>
>> val = readl_relaxed(base + UTMIP_XCVR_CFG1);
>> val |= UTMIP_FORCE_PDDISC_POWERDOWN | UTMIP_FORCE_PDCHRP_POWERDOWN |
>> UTMIP_FORCE_PDDR_POWERDOWN;
>> writel_relaxed(val, base + UTMIP_XCVR_CFG1);
>>
>> + if (phy->wakeup_enabled) {
> Which then also matches the style of this conditional here.
I'll change it in v3, thanks.
17.12.2020 16:36, Thierry Reding пишет:
> On Thu, Dec 17, 2020 at 12:40:03PM +0300, Dmitry Osipenko wrote:
>> Rename all occurrences in the code from "udc" to "usb" and change the
>> Kconfig entry in order to show that this driver supports USB modes other
>> than device-only mode. The follow up patch will add host-mode support and
>> it will be cleaner to perform the renaming separately, i.e. in this patch.
>>
>> Tested-by: Matt Merhar <[email protected]>
>> Tested-by: Nicolas Chauvet <[email protected]>
>> Tested-by: Peter Geis <[email protected]>
>> Tested-by: Ion Agorria <[email protected]>
>> Signed-off-by: Dmitry Osipenko <[email protected]>
>> ---
>> drivers/usb/chipidea/Kconfig | 2 +-
>> drivers/usb/chipidea/ci_hdrc_tegra.c | 78 ++++++++++++++--------------
>> 2 files changed, 40 insertions(+), 40 deletions(-)
>>
>> diff --git a/drivers/usb/chipidea/Kconfig b/drivers/usb/chipidea/Kconfig
>> index 8bafcfc6080d..8685ead6ccc7 100644
>> --- a/drivers/usb/chipidea/Kconfig
>> +++ b/drivers/usb/chipidea/Kconfig
>> @@ -53,7 +53,7 @@ config USB_CHIPIDEA_GENERIC
>> default USB_CHIPIDEA
>>
>> config USB_CHIPIDEA_TEGRA
>> - tristate "Enable Tegra UDC glue driver" if EMBEDDED
>> + tristate "Enable Tegra USB glue driver" if EMBEDDED
>> depends on OF
>> depends on USB_CHIPIDEA_UDC
>> default USB_CHIPIDEA
>> diff --git a/drivers/usb/chipidea/ci_hdrc_tegra.c b/drivers/usb/chipidea/ci_hdrc_tegra.c
>> index 10eaaba2a3f0..d8efa80aa1c2 100644
>> --- a/drivers/usb/chipidea/ci_hdrc_tegra.c
>> +++ b/drivers/usb/chipidea/ci_hdrc_tegra.c
>> @@ -12,7 +12,7 @@
>>
>> #include "ci.h"
>>
>> -struct tegra_udc {
>> +struct tegra_usb {
>> struct ci_hdrc_platform_data data;
>> struct platform_device *dev;
>>
>> @@ -20,15 +20,15 @@ struct tegra_udc {
>> struct clk *clk;
>> };
>>
>> -struct tegra_udc_soc_info {
>> +struct tegra_usb_soc_info {
>> unsigned long flags;
>> };
>>
>> -static const struct tegra_udc_soc_info tegra_udc_soc_info = {
>> +static const struct tegra_usb_soc_info tegra_udc_soc_info = {
>> .flags = CI_HDRC_REQUIRES_ALIGNED_DMA,
>> };
>>
>> -static const struct of_device_id tegra_udc_of_match[] = {
>> +static const struct of_device_id tegra_usb_of_match[] = {
>> {
>> .compatible = "nvidia,tegra20-udc",
>
> Do we perhaps also want to add a new tegra20-usb compatible string here
> and deprecate the old one since this now no longer properly describes
> the device.
Ideally it should have been "tegra20-otg" to match TRM, but UDC is also
okay since it's a part of OTG and kinda presumes the OTG support of USB1
controller for anyone who read the TRM. Hence there is no need to change
the compatible, IMO.
> In either case, this looks fine:
>
> Acked-by: Thierry Reding <[email protected]>
>
thanks
On Thu, Dec 17, 2020 at 04:45:03PM +0300, Dmitry Osipenko wrote:
> 17.12.2020 16:41, Thierry Reding пишет:
> > On Thu, Dec 17, 2020 at 12:40:05PM +0300, Dmitry Osipenko wrote:
> >> Tegra PHY driver now supports waking up controller from a low power mode.
> >> Enable runtime PM in order to put controller into the LPM during idle.
> >>
> >> Tested-by: Matt Merhar <[email protected]>
> >> Tested-by: Nicolas Chauvet <[email protected]>
> >> Tested-by: Peter Geis <[email protected]>
> >> Tested-by: Ion Agorria <[email protected]>
> >> Signed-off-by: Dmitry Osipenko <[email protected]>
> >> ---
> >> drivers/usb/chipidea/ci_hdrc_tegra.c | 13 ++++++++++---
> >> 1 file changed, 10 insertions(+), 3 deletions(-)
> >>
> >> diff --git a/drivers/usb/chipidea/ci_hdrc_tegra.c b/drivers/usb/chipidea/ci_hdrc_tegra.c
> >> index 5fccdeeefc64..655671159511 100644
> >> --- a/drivers/usb/chipidea/ci_hdrc_tegra.c
> >> +++ b/drivers/usb/chipidea/ci_hdrc_tegra.c
> >> @@ -38,21 +38,24 @@ struct tegra_usb_soc_info {
> >>
> >> static const struct tegra_usb_soc_info tegra20_ehci_soc_info = {
> >> .flags = CI_HDRC_REQUIRES_ALIGNED_DMA |
> >> - CI_HDRC_OVERRIDE_PHY_CONTROL,
> >> + CI_HDRC_OVERRIDE_PHY_CONTROL |
> >> + CI_HDRC_SUPPORTS_RUNTIME_PM,
> >> .dr_mode = USB_DR_MODE_HOST,
> >> .txfifothresh = 10,
> >> };
> >>
> >> static const struct tegra_usb_soc_info tegra30_ehci_soc_info = {
> >> .flags = CI_HDRC_REQUIRES_ALIGNED_DMA |
> >> - CI_HDRC_OVERRIDE_PHY_CONTROL,
> >> + CI_HDRC_OVERRIDE_PHY_CONTROL |
> >> + CI_HDRC_SUPPORTS_RUNTIME_PM,
> >> .dr_mode = USB_DR_MODE_HOST,
> >> .txfifothresh = 16,
> >> };
> >>
> >> static const struct tegra_usb_soc_info tegra_udc_soc_info = {
> >> .flags = CI_HDRC_REQUIRES_ALIGNED_DMA |
> >> - CI_HDRC_OVERRIDE_PHY_CONTROL,
> >> + CI_HDRC_OVERRIDE_PHY_CONTROL |
> >> + CI_HDRC_SUPPORTS_RUNTIME_PM,
> >> .dr_mode = USB_DR_MODE_UNKNOWN,
> >> };
> >>
> >> @@ -323,6 +326,10 @@ static int tegra_usb_probe(struct platform_device *pdev)
> >> usb->data.hub_control = tegra_ehci_hub_control;
> >> usb->data.notify_event = tegra_usb_notify_event;
> >>
> >> + /* Tegra PHY driver currently doesn't support LPM for ULPI */
> >> + if (of_usb_get_phy_mode(pdev->dev.of_node) == USBPHY_INTERFACE_MODE_ULPI)
> >> + usb->data.flags &= ~CI_HDRC_SUPPORTS_RUNTIME_PM;
> >> +
> >
> > Does this prevent the wakeup_enabled from being set for ULPI PHYs?
>
> Yes
Okay, it should be fine then to keep that WARN_ONCE in that prior patch
since we should really only get there if there's something seriously
wrong.
Thierry
On Thu, Dec 17, 2020 at 12:40:05PM +0300, Dmitry Osipenko wrote:
> Tegra PHY driver now supports waking up controller from a low power mode.
> Enable runtime PM in order to put controller into the LPM during idle.
>
> Tested-by: Matt Merhar <[email protected]>
> Tested-by: Nicolas Chauvet <[email protected]>
> Tested-by: Peter Geis <[email protected]>
> Tested-by: Ion Agorria <[email protected]>
> Signed-off-by: Dmitry Osipenko <[email protected]>
> ---
> drivers/usb/chipidea/ci_hdrc_tegra.c | 13 ++++++++++---
> 1 file changed, 10 insertions(+), 3 deletions(-)
Acked-by: Thierry Reding <[email protected]>
On Thu, Dec 17, 2020 at 04:47:50PM +0300, Dmitry Osipenko wrote:
> 17.12.2020 16:33, Thierry Reding пишет:
> >> + /* PHY won't resume if reset is asserted */
> >> + if (phy->wakeup_enabled)
> >> + goto chrg_cfg0;
> >>
> >> val = readl_relaxed(base + USB_SUSP_CTRL);
> >> val |= UTMIP_RESET;
> >> writel_relaxed(val, base + USB_SUSP_CTRL);
> >>
> >> +chrg_cfg0:
> > I found this diffcult to read until I realized that it was basically
> > just the equivalent of this:
> >
> > if (!phy->wakeup_enabled) {
> > val = readl_relaxed(base + USB_SUSP_CTRL);
> > val |= UTMIP_RESET;
> > writel_relaxed(val, base + USB_SUSP_CTRL);
> > }
> >
> >> val = readl_relaxed(base + UTMIP_BAT_CHRG_CFG0);
> >> val |= UTMIP_PD_CHRG;
> >> writel_relaxed(val, base + UTMIP_BAT_CHRG_CFG0);
> >>
> >> + if (phy->wakeup_enabled)
> >> + goto xcvr_cfg1;
> >> +
> >> val = readl_relaxed(base + UTMIP_XCVR_CFG0);
> >> val |= UTMIP_FORCE_PD_POWERDOWN | UTMIP_FORCE_PD2_POWERDOWN |
> >> UTMIP_FORCE_PDZI_POWERDOWN;
> >> writel_relaxed(val, base + UTMIP_XCVR_CFG0);
> >>
> >> +xcvr_cfg1:
> > Similarly, I think this is more readable as:
> >
> > if (!phy->wakeup_enabled) {
> > val = readl_relaxed(base + UTMIP_XCVR_CFG0);
> > val |= UTMIP_FORCE_PD_POWERDOWN | UTMIP_FORCE_PD2_POWERDOWN |
> > UTMIP_FORCE_PDZI_POWERDOWN;
> > writel_relaxed(val, base + UTMIP_XCVR_CFG0);
> > }
> >
> >> val = readl_relaxed(base + UTMIP_XCVR_CFG1);
> >> val |= UTMIP_FORCE_PDDISC_POWERDOWN | UTMIP_FORCE_PDCHRP_POWERDOWN |
> >> UTMIP_FORCE_PDDR_POWERDOWN;
> >> writel_relaxed(val, base + UTMIP_XCVR_CFG1);
> >>
> >> + if (phy->wakeup_enabled) {
> > Which then also matches the style of this conditional here.
>
> I'll change it in v3, thanks.
Given that my other comment about the WARN_ONCE seems to have been
resolved, with the above gotos replaced by conditionals as I suggested:
Acked-by: Thierry Reding <[email protected]>
On Thu, Dec 17, 2020 at 12:40:06PM +0300, Dmitry Osipenko wrote:
> The ChipIdea driver now provides USB2 host mode support for NVIDIA Tegra
> SoCs. The ehci-tegra driver is obsolete now, remove it and redirect the
> older Kconfig entry to the CI driver.
>
> Tested-by: Matt Merhar <[email protected]>
> Tested-by: Nicolas Chauvet <[email protected]>
> Tested-by: Peter Geis <[email protected]>
> Tested-by: Ion Agorria <[email protected]>
> Signed-off-by: Dmitry Osipenko <[email protected]>
> ---
> drivers/usb/host/Kconfig | 8 +-
> drivers/usb/host/Makefile | 1 -
> drivers/usb/host/ehci-tegra.c | 604 ----------------------------------
> 3 files changed, 6 insertions(+), 607 deletions(-)
> delete mode 100644 drivers/usb/host/ehci-tegra.c
>
> diff --git a/drivers/usb/host/Kconfig b/drivers/usb/host/Kconfig
> index 31e59309da1f..318315602337 100644
> --- a/drivers/usb/host/Kconfig
> +++ b/drivers/usb/host/Kconfig
> @@ -269,9 +269,13 @@ config USB_EHCI_HCD_AT91
> config USB_EHCI_TEGRA
> tristate "NVIDIA Tegra HCD support"
> depends on ARCH_TEGRA
> - select USB_EHCI_ROOT_HUB_TT
> - select USB_TEGRA_PHY
> + select USB_CHIPIDEA
> + select USB_CHIPIDEA_HOST
> + select USB_CHIPIDEA_TEGRA
> help
> + This option is deprecated now and the driver was removed, use
> + USB_CHIPIDEA_TEGRA instead.
> +
> This driver enables support for the internal USB Host Controllers
> found in NVIDIA Tegra SoCs. The controllers are EHCI compliant.
It doesn't really make sense to say "... the driver was removed..."
and then in the next paragraph say "This driver enables...". You
should change the second paragraph to begin: "Enable support for...".
That's a minor matter, though, and you can easily fix it in the next
patch version. Everything else is okay.
Acked-by: Alan Stern <[email protected]>
Alan Stern
17.12.2020 18:50, Alan Stern пишет:
> On Thu, Dec 17, 2020 at 12:40:06PM +0300, Dmitry Osipenko wrote:
>> The ChipIdea driver now provides USB2 host mode support for NVIDIA Tegra
>> SoCs. The ehci-tegra driver is obsolete now, remove it and redirect the
>> older Kconfig entry to the CI driver.
>>
>> Tested-by: Matt Merhar <[email protected]>
>> Tested-by: Nicolas Chauvet <[email protected]>
>> Tested-by: Peter Geis <[email protected]>
>> Tested-by: Ion Agorria <[email protected]>
>> Signed-off-by: Dmitry Osipenko <[email protected]>
>> ---
>> drivers/usb/host/Kconfig | 8 +-
>> drivers/usb/host/Makefile | 1 -
>> drivers/usb/host/ehci-tegra.c | 604 ----------------------------------
>> 3 files changed, 6 insertions(+), 607 deletions(-)
>> delete mode 100644 drivers/usb/host/ehci-tegra.c
>>
>> diff --git a/drivers/usb/host/Kconfig b/drivers/usb/host/Kconfig
>> index 31e59309da1f..318315602337 100644
>> --- a/drivers/usb/host/Kconfig
>> +++ b/drivers/usb/host/Kconfig
>> @@ -269,9 +269,13 @@ config USB_EHCI_HCD_AT91
>> config USB_EHCI_TEGRA
>> tristate "NVIDIA Tegra HCD support"
>> depends on ARCH_TEGRA
>> - select USB_EHCI_ROOT_HUB_TT
>> - select USB_TEGRA_PHY
>> + select USB_CHIPIDEA
>> + select USB_CHIPIDEA_HOST
>> + select USB_CHIPIDEA_TEGRA
>> help
>> + This option is deprecated now and the driver was removed, use
>> + USB_CHIPIDEA_TEGRA instead.
>> +
>> This driver enables support for the internal USB Host Controllers
>> found in NVIDIA Tegra SoCs. The controllers are EHCI compliant.
>
> It doesn't really make sense to say "... the driver was removed..."
> and then in the next paragraph say "This driver enables...". You
> should change the second paragraph to begin: "Enable support for...".
>
> That's a minor matter, though, and you can easily fix it in the next
> patch version. Everything else is okay.
>
> Acked-by: Alan Stern <[email protected]>
Okay, thanks.
17.12.2020 18:02, Thierry Reding пишет:
> On Thu, Dec 17, 2020 at 04:45:03PM +0300, Dmitry Osipenko wrote:
>> 17.12.2020 16:41, Thierry Reding пишет:
>>> On Thu, Dec 17, 2020 at 12:40:05PM +0300, Dmitry Osipenko wrote:
>>>> Tegra PHY driver now supports waking up controller from a low power mode.
>>>> Enable runtime PM in order to put controller into the LPM during idle.
>>>>
>>>> Tested-by: Matt Merhar <[email protected]>
>>>> Tested-by: Nicolas Chauvet <[email protected]>
>>>> Tested-by: Peter Geis <[email protected]>
>>>> Tested-by: Ion Agorria <[email protected]>
>>>> Signed-off-by: Dmitry Osipenko <[email protected]>
>>>> ---
>>>> drivers/usb/chipidea/ci_hdrc_tegra.c | 13 ++++++++++---
>>>> 1 file changed, 10 insertions(+), 3 deletions(-)
>>>>
>>>> diff --git a/drivers/usb/chipidea/ci_hdrc_tegra.c b/drivers/usb/chipidea/ci_hdrc_tegra.c
>>>> index 5fccdeeefc64..655671159511 100644
>>>> --- a/drivers/usb/chipidea/ci_hdrc_tegra.c
>>>> +++ b/drivers/usb/chipidea/ci_hdrc_tegra.c
>>>> @@ -38,21 +38,24 @@ struct tegra_usb_soc_info {
>>>>
>>>> static const struct tegra_usb_soc_info tegra20_ehci_soc_info = {
>>>> .flags = CI_HDRC_REQUIRES_ALIGNED_DMA |
>>>> - CI_HDRC_OVERRIDE_PHY_CONTROL,
>>>> + CI_HDRC_OVERRIDE_PHY_CONTROL |
>>>> + CI_HDRC_SUPPORTS_RUNTIME_PM,
>>>> .dr_mode = USB_DR_MODE_HOST,
>>>> .txfifothresh = 10,
>>>> };
>>>>
>>>> static const struct tegra_usb_soc_info tegra30_ehci_soc_info = {
>>>> .flags = CI_HDRC_REQUIRES_ALIGNED_DMA |
>>>> - CI_HDRC_OVERRIDE_PHY_CONTROL,
>>>> + CI_HDRC_OVERRIDE_PHY_CONTROL |
>>>> + CI_HDRC_SUPPORTS_RUNTIME_PM,
>>>> .dr_mode = USB_DR_MODE_HOST,
>>>> .txfifothresh = 16,
>>>> };
>>>>
>>>> static const struct tegra_usb_soc_info tegra_udc_soc_info = {
>>>> .flags = CI_HDRC_REQUIRES_ALIGNED_DMA |
>>>> - CI_HDRC_OVERRIDE_PHY_CONTROL,
>>>> + CI_HDRC_OVERRIDE_PHY_CONTROL |
>>>> + CI_HDRC_SUPPORTS_RUNTIME_PM,
>>>> .dr_mode = USB_DR_MODE_UNKNOWN,
>>>> };
>>>>
>>>> @@ -323,6 +326,10 @@ static int tegra_usb_probe(struct platform_device *pdev)
>>>> usb->data.hub_control = tegra_ehci_hub_control;
>>>> usb->data.notify_event = tegra_usb_notify_event;
>>>>
>>>> + /* Tegra PHY driver currently doesn't support LPM for ULPI */
>>>> + if (of_usb_get_phy_mode(pdev->dev.of_node) == USBPHY_INTERFACE_MODE_ULPI)
>>>> + usb->data.flags &= ~CI_HDRC_SUPPORTS_RUNTIME_PM;
>>>> +
>>>
>>> Does this prevent the wakeup_enabled from being set for ULPI PHYs?
>>
>> Yes
>
> Okay, it should be fine then to keep that WARN_ONCE in that prior patch
> since we should really only get there if there's something seriously
> wrong.
Correct, that is the actual intention of the warning.