Hi Andy,
This patchset adds support to DB600c which is based on APQ8064.
With this patchset, except spi I was able to test all the below features
on this board on top of v4.6-rc3.
1> i2c
2> spi
3> sd/mmc with card detect
4> eMMC
5> USB
6> SATA
7> on board Ethernet based on PCIE.
8> user and activity leds.
9> on board Magnetometer
This patchset also has a fix to i2c/spi pinctrls which was not set correctly
in my previous apq8064 patches, I have verified this patchset with eeprom and
sensors on the board, you might want to take that patch in next rc.
Changes since v1:
- renamed the dts and compatible strings according to the discussion.
- fixed/renamed led labels as suggeste by Rob, Nico and others.
- Added Acks for Bjorn
- Added Magnetometer support.
- Split the pinconfs to seperate file as suggested by Bjorn
- Remove activity leds default triggers, as it was not clear
which trigger was correct according to 96boards specs.
Can be added once we fix that.
Thanks,
srini
Srinivas Kandagatla (13):
ARM: dts: apq8064: fix the pinctrls for i2c and spi
ARM: dts: apq8064: add support to gsbi1 uart
ARM: dts: apq8064: add gsbi7 i2c support
ARM: dts: db600c: add board support with serial
ARM: dts: db600c: add pmic regulator supplies
ARM: dts: db600c: Add eMMC and SD card support
ARM: dts: db600c: add usb support
ARM: dts: db600c: add pcie support
ARM: dts: db600c: add on board sata support.
ARM: dts: db600c: Add on board leds support
ARM: dts: db600c: add i2c support
ARM: dts: db600c: add spi support
ARM: dts: db600c: add support to magnetometer
arch/arm/boot/dts/Makefile | 1 +
.../boot/dts/qcom-apq8064-arrow-db600c-pins.dtsi | 52 +++
arch/arm/boot/dts/qcom-apq8064-arrow-db600c.dts | 349 +++++++++++++++++++++
arch/arm/boot/dts/qcom-apq8064-pins.dtsi | 39 +++
arch/arm/boot/dts/qcom-apq8064.dtsi | 41 ++-
5 files changed, 476 insertions(+), 6 deletions(-)
create mode 100644 arch/arm/boot/dts/qcom-apq8064-arrow-db600c-pins.dtsi
create mode 100644 arch/arm/boot/dts/qcom-apq8064-arrow-db600c.dts
--
2.5.0
This patch fixes pinctrls for spi and i2c nodes whose default and sleep
states are together, which is incorrect.
Without this patch i2c/spi would not be functional.
Signed-off-by: Srinivas Kandagatla <[email protected]>
Acked-by: Bjorn Andersson <[email protected]>
---
arch/arm/boot/dts/qcom-apq8064.dtsi | 18 ++++++++++++------
1 file changed, 12 insertions(+), 6 deletions(-)
diff --git a/arch/arm/boot/dts/qcom-apq8064.dtsi b/arch/arm/boot/dts/qcom-apq8064.dtsi
index 65d0e8d..c6ff8fc 100644
--- a/arch/arm/boot/dts/qcom-apq8064.dtsi
+++ b/arch/arm/boot/dts/qcom-apq8064.dtsi
@@ -227,7 +227,8 @@
gsbi1_i2c: i2c@12460000 {
compatible = "qcom,i2c-qup-v1.1.1";
- pinctrl-0 = <&i2c1_pins &i2c1_pins_sleep>;
+ pinctrl-0 = <&i2c1_pins>;
+ pinctrl-1 = <&i2c1_pins_sleep>;
pinctrl-names = "default", "sleep";
reg = <0x12460000 0x1000>;
interrupts = <0 194 IRQ_TYPE_NONE>;
@@ -255,7 +256,8 @@
gsbi2_i2c: i2c@124a0000 {
compatible = "qcom,i2c-qup-v1.1.1";
reg = <0x124a0000 0x1000>;
- pinctrl-0 = <&i2c2_pins &i2c2_pins_sleep>;
+ pinctrl-0 = <&i2c2_pins>;
+ pinctrl-1 = <&i2c2_pins_sleep>;
pinctrl-names = "default", "sleep";
interrupts = <0 196 IRQ_TYPE_NONE>;
clocks = <&gcc GSBI2_QUP_CLK>, <&gcc GSBI2_H_CLK>;
@@ -277,7 +279,8 @@
ranges;
gsbi3_i2c: i2c@16280000 {
compatible = "qcom,i2c-qup-v1.1.1";
- pinctrl-0 = <&i2c3_pins &i2c3_pins_sleep>;
+ pinctrl-0 = <&i2c3_pins>;
+ pinctrl-1 = <&i2c3_pins_sleep>;
pinctrl-names = "default", "sleep";
reg = <0x16280000 0x1000>;
interrupts = <GIC_SPI 151 IRQ_TYPE_NONE>;
@@ -302,7 +305,8 @@
gsbi4_i2c: i2c@16380000 {
compatible = "qcom,i2c-qup-v1.1.1";
- pinctrl-0 = <&i2c4_pins &i2c4_pins_sleep>;
+ pinctrl-0 = <&i2c4_pins>;
+ pinctrl-1 = <&i2c4_pins_sleep>;
pinctrl-names = "default", "sleep";
reg = <0x16380000 0x1000>;
interrupts = <GIC_SPI 153 IRQ_TYPE_NONE>;
@@ -337,7 +341,8 @@
compatible = "qcom,spi-qup-v1.1.1";
reg = <0x1a280000 0x1000>;
interrupts = <0 155 0>;
- pinctrl-0 = <&spi5_default &spi5_sleep>;
+ pinctrl-0 = <&spi5_default>;
+ pinctrl-1 = <&spi5_sleep>;
pinctrl-names = "default", "sleep";
clocks = <&gcc GSBI5_QUP_CLK>, <&gcc GSBI5_H_CLK>;
clock-names = "core", "iface";
@@ -370,7 +375,8 @@
gsbi6_i2c: i2c@16580000 {
compatible = "qcom,i2c-qup-v1.1.1";
- pinctrl-0 = <&i2c6_pins &i2c6_pins_sleep>;
+ pinctrl-0 = <&i2c6_pins>;
+ pinctrl-1 = <&i2c6_pins_sleep>;
pinctrl-names = "default", "sleep";
reg = <0x16580000 0x1000>;
interrupts = <GIC_SPI 157 IRQ_TYPE_NONE>;
--
2.5.0
This patch adds support to gsbi7 i2c which is used in some of the new
boards.
Signed-off-by: Srinivas Kandagatla <[email protected]>
---
arch/arm/boot/dts/qcom-apq8064-pins.dtsi | 25 +++++++++++++++++++++++++
arch/arm/boot/dts/qcom-apq8064.dtsi | 13 +++++++++++++
2 files changed, 38 insertions(+)
diff --git a/arch/arm/boot/dts/qcom-apq8064-pins.dtsi b/arch/arm/boot/dts/qcom-apq8064-pins.dtsi
index 8bb5e5f..4102a98 100644
--- a/arch/arm/boot/dts/qcom-apq8064-pins.dtsi
+++ b/arch/arm/boot/dts/qcom-apq8064-pins.dtsi
@@ -219,4 +219,29 @@
function = "gsbi7";
};
};
+
+ i2c7_pins: i2c7 {
+ mux {
+ pins = "gpio84", "gpio85";
+ function = "gsbi7";
+ };
+
+ pinconf {
+ pins = "gpio84", "gpio85";
+ drive-strength = <16>;
+ bias-disable;
+ };
+ };
+
+ i2c7_pins_sleep: i2c7_pins_sleep {
+ mux {
+ pins = "gpio84", "gpio85";
+ function = "gpio";
+ };
+ pinconf {
+ pins = "gpio84", "gpio85";
+ drive-strength = <2>;
+ bias-disable = <0>;
+ };
+ };
};
diff --git a/arch/arm/boot/dts/qcom-apq8064.dtsi b/arch/arm/boot/dts/qcom-apq8064.dtsi
index 81b4290..f064f59 100644
--- a/arch/arm/boot/dts/qcom-apq8064.dtsi
+++ b/arch/arm/boot/dts/qcom-apq8064.dtsi
@@ -417,6 +417,19 @@
clock-names = "core", "iface";
status = "disabled";
};
+
+ gsbi7_i2c: i2c@16680000 {
+ compatible = "qcom,i2c-qup-v1.1.1";
+ pinctrl-0 = <&i2c7_pins>;
+ pinctrl-1 = <&i2c7_pins_sleep>;
+ pinctrl-names = "default", "sleep";
+ reg = <0x16680000 0x1000>;
+ interrupts = <GIC_SPI 159 IRQ_TYPE_NONE>;
+ clocks = <&gcc GSBI7_QUP_CLK>,
+ <&gcc GSBI7_H_CLK>;
+ clock-names = "core", "iface";
+ status = "disabled";
+ };
};
rng@1a500000 {
--
2.5.0
This patch adds support to DB600c with basic serial ports.
DB600c is based on APQ8064.
Signed-off-by: Srinivas Kandagatla <[email protected]>
---
arch/arm/boot/dts/Makefile | 1 +
arch/arm/boot/dts/qcom-apq8064-arrow-db600c.dts | 36 +++++++++++++++++++++++++
2 files changed, 37 insertions(+)
create mode 100644 arch/arm/boot/dts/qcom-apq8064-arrow-db600c.dts
diff --git a/arch/arm/boot/dts/Makefile b/arch/arm/boot/dts/Makefile
index 95c1923..fef61b3 100644
--- a/arch/arm/boot/dts/Makefile
+++ b/arch/arm/boot/dts/Makefile
@@ -539,6 +539,7 @@ dtb-$(CONFIG_ARCH_ORION5X) += \
dtb-$(CONFIG_ARCH_PRIMA2) += \
prima2-evb.dtb
dtb-$(CONFIG_ARCH_QCOM) += \
+ qcom-apq8064-arrow-db600c.dtb \
qcom-apq8064-cm-qs600.dtb \
qcom-apq8064-ifc6410.dtb \
qcom-apq8064-sony-xperia-yuga.dtb \
diff --git a/arch/arm/boot/dts/qcom-apq8064-arrow-db600c.dts b/arch/arm/boot/dts/qcom-apq8064-arrow-db600c.dts
new file mode 100644
index 0000000..57d4500
--- /dev/null
+++ b/arch/arm/boot/dts/qcom-apq8064-arrow-db600c.dts
@@ -0,0 +1,36 @@
+#include "qcom-apq8064-v2.0.dtsi"
+
+/ {
+ model = "Arrow Electronics, APQ8064 DB600c";
+ compatible = "arrow,db600c", "qcom,apq8064";
+
+ aliases {
+ serial0 = &gsbi7_serial;
+ serial1 = &gsbi1_serial;
+ };
+
+ soc {
+ gsbi@12440000 {
+ status = "okay";
+ qcom,mode = <GSBI_PROT_UART_W_FC>;
+ serial@12450000 {
+ label = "LS-UART1";
+ status = "okay";
+ pinctrl-names = "default";
+ pinctrl-0 = <&gsbi1_uart_4pins>;
+ };
+ };
+
+ /* DEBUG UART */
+ gsbi@16600000 {
+ status = "okay";
+ qcom,mode = <GSBI_PROT_I2C_UART>;
+ serial@16640000 {
+ label = "LS-UART0";
+ status = "okay";
+ pinctrl-names = "default";
+ pinctrl-0 = <&gsbi7_uart_2pins>;
+ };
+ };
+ };
+};
--
2.5.0
This patch adds support to 4 user leds, wlan and bt led on board.
Signed-off-by: Srinivas Kandagatla <[email protected]>
---
.../boot/dts/qcom-apq8064-arrow-db600c-pins.dtsi | 23 +++++++++++
arch/arm/boot/dts/qcom-apq8064-arrow-db600c.dts | 47 ++++++++++++++++++++++
2 files changed, 70 insertions(+)
diff --git a/arch/arm/boot/dts/qcom-apq8064-arrow-db600c-pins.dtsi b/arch/arm/boot/dts/qcom-apq8064-arrow-db600c-pins.dtsi
index 0610f00..3b55bb9 100644
--- a/arch/arm/boot/dts/qcom-apq8064-arrow-db600c-pins.dtsi
+++ b/arch/arm/boot/dts/qcom-apq8064-arrow-db600c-pins.dtsi
@@ -18,4 +18,27 @@
bias-disable;
};
};
+
+ user_leds: user-leds {
+ mux {
+ pins = "gpio3", "gpio7", "gpio10", "gpio11";
+ function = "gpio";
+ };
+
+ conf {
+ pins = "gpio3", "gpio7", "gpio10", "gpio11";
+ function = "gpio";
+ output-low;
+ };
+ };
+};
+
+&pm8921_mpps {
+ mpp_leds: mpp-leds {
+ pinconf {
+ pins = "mpp7", "mpp8";
+ function = "digital";
+ output-low;
+ };
+ };
};
diff --git a/arch/arm/boot/dts/qcom-apq8064-arrow-db600c.dts b/arch/arm/boot/dts/qcom-apq8064-arrow-db600c.dts
index 6f97ddc..8c18a4b 100644
--- a/arch/arm/boot/dts/qcom-apq8064-arrow-db600c.dts
+++ b/arch/arm/boot/dts/qcom-apq8064-arrow-db600c.dts
@@ -153,6 +153,53 @@
};
};
+ leds {
+ pinctrl-names = "default";
+ pinctrl-0 = <&user_leds>, <&mpp_leds>;
+
+ compatible = "gpio-leds";
+
+ user-led0 {
+ label = "user0-led";
+ gpios = <&tlmm_pinmux 3 GPIO_ACTIVE_HIGH>;
+ linux,default-trigger = "heartbeat";
+ default-state = "off";
+ };
+
+ user-led1 {
+ label = "user1-led";
+ gpios = <&tlmm_pinmux 7 GPIO_ACTIVE_HIGH>;
+ linux,default-trigger = "mmc0";
+ default-state = "off";
+ };
+
+ user-led2 {
+ label = "user2-led";
+ gpios = <&tlmm_pinmux 10 GPIO_ACTIVE_HIGH>;
+ linux,default-trigger = "mmc1";
+ default-state = "off";
+ };
+
+ user-led3 {
+ label = "user3-led";
+ gpios = <&tlmm_pinmux 11 GPIO_ACTIVE_HIGH>;
+ linux,default-trigger = "none";
+ default-state = "off";
+ };
+
+ wifi-led {
+ label = "WiFi-led";
+ gpios = <&pm8921_mpps 7 GPIO_ACTIVE_HIGH>;
+ default-state = "off";
+ };
+
+ bt-led {
+ label = "BT-led";
+ gpios = <&pm8921_mpps 8 GPIO_ACTIVE_HIGH>;
+ default-state = "off";
+ };
+ };
+
pci@1b500000 {
status = "okay";
vdda-supply = <&pm8921_s3>;
--
2.5.0
This patch enables sata and regulators required to get on board sata
working.
Signed-off-by: Srinivas Kandagatla <[email protected]>
Acked-by: Bjorn Andersson <[email protected]>
---
arch/arm/boot/dts/qcom-apq8064-arrow-db600c.dts | 13 +++++++++++++
1 file changed, 13 insertions(+)
diff --git a/arch/arm/boot/dts/qcom-apq8064-arrow-db600c.dts b/arch/arm/boot/dts/qcom-apq8064-arrow-db600c.dts
index 4f2218c..6f97ddc 100644
--- a/arch/arm/boot/dts/qcom-apq8064-arrow-db600c.dts
+++ b/arch/arm/boot/dts/qcom-apq8064-arrow-db600c.dts
@@ -123,6 +123,10 @@
lvs6 {
bias-pull-down;
};
+
+ lvs7 {
+ bias-pull-down;
+ };
};
};
@@ -159,6 +163,15 @@
perst-gpio = <&tlmm_pinmux 27 GPIO_ACTIVE_LOW>;
};
+ phy@1b400000 {
+ status = "okay";
+ };
+
+ sata@29000000 {
+ status = "okay";
+ target-supply = <&pm8921_lvs7>;
+ };
+
/* OTG */
phy@12500000 {
status = "okay";
--
2.5.0
This patch adds support to on board LIS3MDLTR magnetometer.
Signed-off-by: Srinivas Kandagatla <[email protected]>
---
arch/arm/boot/dts/qcom-apq8064-arrow-db600c-pins.dtsi | 8 ++++++++
arch/arm/boot/dts/qcom-apq8064-arrow-db600c.dts | 13 +++++++++++++
2 files changed, 21 insertions(+)
diff --git a/arch/arm/boot/dts/qcom-apq8064-arrow-db600c-pins.dtsi b/arch/arm/boot/dts/qcom-apq8064-arrow-db600c-pins.dtsi
index 3b55bb9..a3efb97 100644
--- a/arch/arm/boot/dts/qcom-apq8064-arrow-db600c-pins.dtsi
+++ b/arch/arm/boot/dts/qcom-apq8064-arrow-db600c-pins.dtsi
@@ -31,6 +31,14 @@
output-low;
};
};
+
+ magneto_pins: magneto-pins {
+ mux {
+ pins = "gpio31", "gpio48";
+ function = "gpio";
+ bias-disable;
+ };
+ };
};
&pm8921_mpps {
diff --git a/arch/arm/boot/dts/qcom-apq8064-arrow-db600c.dts b/arch/arm/boot/dts/qcom-apq8064-arrow-db600c.dts
index 34bb415..e01b27e 100644
--- a/arch/arm/boot/dts/qcom-apq8064-arrow-db600c.dts
+++ b/arch/arm/boot/dts/qcom-apq8064-arrow-db600c.dts
@@ -153,6 +153,19 @@
/* On Low speed expansion and Sensors */
label = "LS-I2C0";
status = "okay";
+ lis3mdl_mag@1e {
+ compatible = "st,lis3mdl-magn";
+ reg = <0x1e>;
+ vdd-supply = <&vcc3v3>;
+ vddio-supply = <&pm8921_s4>;
+ pinctrl-names = "default";
+ pinctrl-0 = <&magneto_pins>;
+ interrupt-parent = <&tlmm_pinmux>;
+
+ st,drdy-int-pin = <2>;
+ interrupts = <48 IRQ_TYPE_EDGE_RISING>, /* DRDY line */
+ <31 IRQ_TYPE_EDGE_RISING>; /* INT */
+ };
};
};
--
2.5.0
This patch adds spi nodes required to provide spi bus support on LS
expansion.
Signed-off-by: Srinivas Kandagatla <[email protected]>
---
arch/arm/boot/dts/qcom-apq8064-arrow-db600c.dts | 10 ++++++++++
1 file changed, 10 insertions(+)
diff --git a/arch/arm/boot/dts/qcom-apq8064-arrow-db600c.dts b/arch/arm/boot/dts/qcom-apq8064-arrow-db600c.dts
index 2f0dfff..34bb415 100644
--- a/arch/arm/boot/dts/qcom-apq8064-arrow-db600c.dts
+++ b/arch/arm/boot/dts/qcom-apq8064-arrow-db600c.dts
@@ -13,6 +13,7 @@
i2c1 = &gsbi3_i2c;
i2c2 = &gsbi4_i2c;
i2c3 = &gsbi7_i2c;
+ spi0 = &gsbi5_spi;
};
regulators {
@@ -181,6 +182,15 @@
};
};
+ gsbi@1a200000 {
+ status = "okay";
+ spi@1a280000 {
+ /* On Low speed expansion */
+ label = "LS-SPI0";
+ status = "okay";
+ };
+ };
+
/* DEBUG UART */
gsbi@16600000 {
status = "okay";
--
2.5.0
This patch adds nodes required to enable 4 i2c buses on the board which
are connected to various sensors and eeprom.
Signed-off-by: Srinivas Kandagatla <[email protected]>
---
arch/arm/boot/dts/qcom-apq8064-arrow-db600c.dts | 46 +++++++++++++++++++++++++
1 file changed, 46 insertions(+)
diff --git a/arch/arm/boot/dts/qcom-apq8064-arrow-db600c.dts b/arch/arm/boot/dts/qcom-apq8064-arrow-db600c.dts
index 8c18a4b..2f0dfff 100644
--- a/arch/arm/boot/dts/qcom-apq8064-arrow-db600c.dts
+++ b/arch/arm/boot/dts/qcom-apq8064-arrow-db600c.dts
@@ -9,6 +9,10 @@
aliases {
serial0 = &gsbi7_serial;
serial1 = &gsbi1_serial;
+ i2c0 = &gsbi2_i2c;
+ i2c1 = &gsbi3_i2c;
+ i2c2 = &gsbi4_i2c;
+ i2c3 = &gsbi7_i2c;
};
regulators {
@@ -141,6 +145,42 @@
};
};
+ gsbi@12480000 {
+ status = "okay";
+ qcom,mode = <GSBI_PROT_I2C>;
+ i2c@124a0000 {
+ /* On Low speed expansion and Sensors */
+ label = "LS-I2C0";
+ status = "okay";
+ };
+ };
+
+ gsbi@16200000 {
+ status = "okay";
+ qcom,mode = <GSBI_PROT_I2C>;
+ i2c@16280000 {
+ /* On Low speed expansion */
+ status = "okay";
+ label = "LS-I2C1";
+ clock-frequency = <200000>;
+ eeprom@52 {
+ compatible = "atmel,24c128";
+ reg = <0x52>;
+ pagesize = <64>;
+ };
+ };
+ };
+
+ gsbi@16300000 {
+ status = "okay";
+ qcom,mode = <GSBI_PROT_I2C>;
+ i2c@16380000 {
+ /* On High speed expansion */
+ label = "HS-CAM-I2C3";
+ status = "okay";
+ };
+ };
+
/* DEBUG UART */
gsbi@16600000 {
status = "okay";
@@ -151,6 +191,12 @@
pinctrl-names = "default";
pinctrl-0 = <&gsbi7_uart_2pins>;
};
+
+ i2c@16680000 {
+ /* On High speed expansion */
+ status = "okay";
+ label = "HS-CAM-I2C2";
+ };
};
leds {
--
2.5.0
This patch adds pmic regulator supplies connected on the board.
Rest of the invidual regulators would be added as and when required by
the devices.
Signed-off-by: Srinivas Kandagatla <[email protected]>
Acked-by: Bjorn Andersson <[email protected]>
---
arch/arm/boot/dts/qcom-apq8064-arrow-db600c.dts | 62 +++++++++++++++++++++++++
1 file changed, 62 insertions(+)
diff --git a/arch/arm/boot/dts/qcom-apq8064-arrow-db600c.dts b/arch/arm/boot/dts/qcom-apq8064-arrow-db600c.dts
index 57d4500..6695b00 100644
--- a/arch/arm/boot/dts/qcom-apq8064-arrow-db600c.dts
+++ b/arch/arm/boot/dts/qcom-apq8064-arrow-db600c.dts
@@ -9,7 +9,69 @@
serial1 = &gsbi1_serial;
};
+ regulators {
+ compatible = "simple-bus";
+ vph: regulator-fixed@1 {
+ compatible = "regulator-fixed";
+ regulator-min-microvolt = <4500000>;
+ regulator-max-microvolt = <4500000>;
+ regulator-name = "VPH";
+ regulator-type = "voltage";
+ regulator-boot-on;
+ };
+ };
+
soc {
+ rpm@108000 {
+ regulators {
+ vdd_s1-supply = <&vph>;
+ vdd_s2-supply = <&vph>;
+ vdd_s3-supply = <&vph>;
+ vdd_s4-supply = <&vph>;
+ vdd_s5-supply = <&vph>;
+ vdd_s6-supply = <&vph>;
+ vdd_s7-supply = <&vph>;
+ vdd_l1_l2_l12_l18-supply = <&pm8921_s4>;
+ vdd_l3_l15_l17-supply = <&vph>;
+ vdd_l4_l14-supply = <&vph>;
+ vdd_l5_l8_l16-supply = <&vph>;
+ vdd_l6_l7-supply = <&vph>;
+ vdd_l9_l11-supply = <&vph>;
+ vdd_l10_l22-supply = <&vph>;
+ vdd_l21_l23_l29-supply = <&vph>;
+ vdd_l24-supply = <&pm8921_s1>;
+ vdd_l25-supply = <&pm8921_s1>;
+ vdd_l26-supply = <&pm8921_s7>;
+ vdd_l27-supply = <&pm8921_s7>;
+ vdd_l28-supply = <&pm8921_s7>;
+ vin_lvs1_3_6-supply = <&pm8921_s4>;
+ vin_lvs2-supply = <&pm8921_s1>;
+ vin_lvs4_5_7-supply = <&pm8921_s4>;
+
+ s1 {
+ regulator-always-on;
+ regulator-min-microvolt = <1225000>;
+ regulator-max-microvolt = <1225000>;
+ qcom,switch-mode-frequency = <3200000>;
+ bias-pull-down;
+ };
+
+ s4 {
+ regulator-min-microvolt = <1800000>;
+ regulator-max-microvolt = <1800000>;
+ qcom,switch-mode-frequency = <3200000>;
+ bias-pull-down;
+ regulator-always-on;
+ };
+
+ s7 {
+ regulator-min-microvolt = <1300000>;
+ regulator-max-microvolt = <1300000>;
+ qcom,switch-mode-frequency = <3200000>;
+ };
+ };
+ };
+
gsbi@12440000 {
status = "okay";
qcom,mode = <GSBI_PROT_UART_W_FC>;
--
2.5.0
This patch adds eMMC and SD card support with card detect and adding
required regulators.
Signed-off-by: Srinivas Kandagatla <[email protected]>
Acked-by: Bjorn Andersson <[email protected]>
---
.../boot/dts/qcom-apq8064-arrow-db600c-pins.dtsi | 9 ++++++
arch/arm/boot/dts/qcom-apq8064-arrow-db600c.dts | 34 ++++++++++++++++++++++
2 files changed, 43 insertions(+)
create mode 100644 arch/arm/boot/dts/qcom-apq8064-arrow-db600c-pins.dtsi
diff --git a/arch/arm/boot/dts/qcom-apq8064-arrow-db600c-pins.dtsi b/arch/arm/boot/dts/qcom-apq8064-arrow-db600c-pins.dtsi
new file mode 100644
index 0000000..7339919
--- /dev/null
+++ b/arch/arm/boot/dts/qcom-apq8064-arrow-db600c-pins.dtsi
@@ -0,0 +1,9 @@
+&tlmm_pinmux {
+ card_detect: card-detect {
+ mux {
+ pins = "gpio26";
+ function = "gpio";
+ bias-disable;
+ };
+ };
+};
diff --git a/arch/arm/boot/dts/qcom-apq8064-arrow-db600c.dts b/arch/arm/boot/dts/qcom-apq8064-arrow-db600c.dts
index 6695b00..d921424 100644
--- a/arch/arm/boot/dts/qcom-apq8064-arrow-db600c.dts
+++ b/arch/arm/boot/dts/qcom-apq8064-arrow-db600c.dts
@@ -1,4 +1,6 @@
#include "qcom-apq8064-v2.0.dtsi"
+#include "qcom-apq8064-arrow-db600c-pins.dtsi"
+#include <dt-bindings/gpio/gpio.h>
/ {
model = "Arrow Electronics, APQ8064 DB600c";
@@ -69,6 +71,20 @@
regulator-max-microvolt = <1300000>;
qcom,switch-mode-frequency = <3200000>;
};
+
+ l5 {
+ regulator-min-microvolt = <2750000>;
+ regulator-max-microvolt = <3000000>;
+ bias-pull-down;
+ regulator-boot-on;
+ regulator-always-on;
+ };
+
+ l6 {
+ regulator-min-microvolt = <2950000>;
+ regulator-max-microvolt = <2950000>;
+ bias-pull-down;
+ };
};
};
@@ -94,5 +110,23 @@
pinctrl-0 = <&gsbi7_uart_2pins>;
};
};
+
+ amba {
+ /* eMMC */
+ sdcc@12400000 {
+ status = "okay";
+ vmmc-supply = <&pm8921_l5>;
+ vqmmc-supply = <&pm8921_s4>;
+ };
+
+ /* External micro SD card */
+ sdcc@12180000 {
+ status = "okay";
+ vmmc-supply = <&pm8921_l6>;
+ pinctrl-names = "default";
+ pinctrl-0 = <&card_detect>;
+ cd-gpios = <&tlmm_pinmux 26 GPIO_ACTIVE_HIGH>;
+ };
+ };
};
};
--
2.5.0
This patch adds usb host and otg support on board with required
regulators.
Signed-off-by: Srinivas Kandagatla <[email protected]>
Acked-by: Bjorn Andersson <[email protected]>
---
arch/arm/boot/dts/qcom-apq8064-arrow-db600c.dts | 64 +++++++++++++++++++++++++
1 file changed, 64 insertions(+)
diff --git a/arch/arm/boot/dts/qcom-apq8064-arrow-db600c.dts b/arch/arm/boot/dts/qcom-apq8064-arrow-db600c.dts
index d921424..2c563df 100644
--- a/arch/arm/boot/dts/qcom-apq8064-arrow-db600c.dts
+++ b/arch/arm/boot/dts/qcom-apq8064-arrow-db600c.dts
@@ -58,6 +58,12 @@
bias-pull-down;
};
+ s3 {
+ regulator-min-microvolt = <1000000>;
+ regulator-max-microvolt = <1400000>;
+ qcom,switch-mode-frequency = <4800000>;
+ };
+
s4 {
regulator-min-microvolt = <1800000>;
regulator-max-microvolt = <1800000>;
@@ -72,6 +78,18 @@
qcom,switch-mode-frequency = <3200000>;
};
+ l3 {
+ regulator-min-microvolt = <3050000>;
+ regulator-max-microvolt = <3300000>;
+ bias-pull-down;
+ };
+
+ l4 {
+ regulator-min-microvolt = <1000000>;
+ regulator-max-microvolt = <1800000>;
+ bias-pull-down;
+ };
+
l5 {
regulator-min-microvolt = <2750000>;
regulator-max-microvolt = <3000000>;
@@ -85,6 +103,12 @@
regulator-max-microvolt = <2950000>;
bias-pull-down;
};
+
+ l23 {
+ regulator-min-microvolt = <1700000>;
+ regulator-max-microvolt = <1900000>;
+ bias-pull-down;
+ };
};
};
@@ -111,6 +135,46 @@
};
};
+ /* OTG */
+ phy@12500000 {
+ status = "okay";
+ dr_mode = "peripheral";
+ vddcx-supply = <&pm8921_s3>;
+ v3p3-supply = <&pm8921_l3>;
+ v1p8-supply = <&pm8921_l4>;
+ };
+
+ phy@12520000 {
+ status = "okay";
+ vddcx-supply = <&pm8921_s3>;
+ v3p3-supply = <&pm8921_l3>;
+ v1p8-supply = <&pm8921_l23>;
+ };
+
+ phy@12530000 {
+ status = "okay";
+ vddcx-supply = <&pm8921_s3>;
+ v3p3-supply = <&pm8921_l3>;
+ v1p8-supply = <&pm8921_l23>;
+ };
+
+ gadget@12500000 {
+ status = "okay";
+ };
+
+ /* OTG */
+ usb@12500000 {
+ status = "okay";
+ };
+
+ usb@12520000 {
+ status = "okay";
+ };
+
+ usb@12530000 {
+ status = "okay";
+ };
+
amba {
/* eMMC */
sdcc@12400000 {
--
2.5.0
This patch adds pcie and regulators required to get on board ATL1C
ethernet working.
Signed-off-by: Srinivas Kandagatla <[email protected]>
Acked-by: Bjorn Andersson <[email protected]>
---
.../boot/dts/qcom-apq8064-arrow-db600c-pins.dtsi | 12 +++++++++++
arch/arm/boot/dts/qcom-apq8064-arrow-db600c.dts | 24 ++++++++++++++++++++++
2 files changed, 36 insertions(+)
diff --git a/arch/arm/boot/dts/qcom-apq8064-arrow-db600c-pins.dtsi b/arch/arm/boot/dts/qcom-apq8064-arrow-db600c-pins.dtsi
index 7339919..0610f00 100644
--- a/arch/arm/boot/dts/qcom-apq8064-arrow-db600c-pins.dtsi
+++ b/arch/arm/boot/dts/qcom-apq8064-arrow-db600c-pins.dtsi
@@ -6,4 +6,16 @@
bias-disable;
};
};
+
+ pcie_pins: pcie-pinmux {
+ mux {
+ pins = "gpio27";
+ function = "gpio";
+ };
+ conf {
+ pins = "gpio27";
+ drive-strength = <12>;
+ bias-disable;
+ };
+ };
};
diff --git a/arch/arm/boot/dts/qcom-apq8064-arrow-db600c.dts b/arch/arm/boot/dts/qcom-apq8064-arrow-db600c.dts
index 2c563df..4f2218c 100644
--- a/arch/arm/boot/dts/qcom-apq8064-arrow-db600c.dts
+++ b/arch/arm/boot/dts/qcom-apq8064-arrow-db600c.dts
@@ -21,6 +21,16 @@
regulator-type = "voltage";
regulator-boot-on;
};
+
+ /* on board fixed 3.3v supply */
+ vcc3v3: vcc3v3 {
+ compatible = "regulator-fixed";
+ regulator-name = "VCC3V3";
+ regulator-min-microvolt = <3300000>;
+ regulator-max-microvolt = <3300000>;
+ regulator-always-on;
+ };
+
};
soc {
@@ -109,6 +119,10 @@
regulator-max-microvolt = <1900000>;
bias-pull-down;
};
+
+ lvs6 {
+ bias-pull-down;
+ };
};
};
@@ -135,6 +149,16 @@
};
};
+ pci@1b500000 {
+ status = "okay";
+ vdda-supply = <&pm8921_s3>;
+ vdda_phy-supply = <&pm8921_lvs6>;
+ vdda_refclk-supply = <&vcc3v3>;
+ pinctrl-0 = <&pcie_pins>;
+ pinctrl-names = "default";
+ perst-gpio = <&tlmm_pinmux 27 GPIO_ACTIVE_LOW>;
+ };
+
/* OTG */
phy@12500000 {
status = "okay";
--
2.5.0
This patch adds support to gsbi1 uart and its pinctrls nodes.
Signed-off-by: Srinivas Kandagatla <[email protected]>
---
arch/arm/boot/dts/qcom-apq8064-pins.dtsi | 14 ++++++++++++++
arch/arm/boot/dts/qcom-apq8064.dtsi | 10 ++++++++++
2 files changed, 24 insertions(+)
diff --git a/arch/arm/boot/dts/qcom-apq8064-pins.dtsi b/arch/arm/boot/dts/qcom-apq8064-pins.dtsi
index b57c59d..8bb5e5f 100644
--- a/arch/arm/boot/dts/qcom-apq8064-pins.dtsi
+++ b/arch/arm/boot/dts/qcom-apq8064-pins.dtsi
@@ -39,6 +39,20 @@
};
};
+ gsbi1_uart_2pins: gsbi1_uart_2pins {
+ mux {
+ pins = "gpio18", "gpio19";
+ function = "gsbi1";
+ };
+ };
+
+ gsbi1_uart_4pins: gsbi1_uart_4pins {
+ mux {
+ pins = "gpio18", "gpio19", "gpio20", "gpio21";
+ function = "gsbi1";
+ };
+ };
+
i2c2_pins: i2c2 {
mux {
pins = "gpio24", "gpio25";
diff --git a/arch/arm/boot/dts/qcom-apq8064.dtsi b/arch/arm/boot/dts/qcom-apq8064.dtsi
index c6ff8fc..81b4290 100644
--- a/arch/arm/boot/dts/qcom-apq8064.dtsi
+++ b/arch/arm/boot/dts/qcom-apq8064.dtsi
@@ -225,6 +225,16 @@
syscon-tcsr = <&tcsr>;
+ gsbi1_serial: serial@12450000 {
+ compatible = "qcom,msm-uartdm-v1.3", "qcom,msm-uartdm";
+ reg = <0x12450000 0x100>,
+ <0x12400000 0x03>;
+ interrupts = <0 193 0x0>;
+ clocks = <&gcc GSBI1_UART_CLK>, <&gcc GSBI1_H_CLK>;
+ clock-names = "core", "iface";
+ status = "disabled";
+ };
+
gsbi1_i2c: i2c@12460000 {
compatible = "qcom,i2c-qup-v1.1.1";
pinctrl-0 = <&i2c1_pins>;
--
2.5.0
On 04/12/2016 02:33 AM, Srinivas Kandagatla wrote:
> This patch adds pmic regulator supplies connected on the board.
> Rest of the invidual regulators would be added as and when required by
> the devices.
>
> Signed-off-by: Srinivas Kandagatla <[email protected]>
> Acked-by: Bjorn Andersson <[email protected]>
> ---
> arch/arm/boot/dts/qcom-apq8064-arrow-db600c.dts | 62 +++++++++++++++++++++++++
> 1 file changed, 62 insertions(+)
>
> diff --git a/arch/arm/boot/dts/qcom-apq8064-arrow-db600c.dts b/arch/arm/boot/dts/qcom-apq8064-arrow-db600c.dts
> index 57d4500..6695b00 100644
> --- a/arch/arm/boot/dts/qcom-apq8064-arrow-db600c.dts
> +++ b/arch/arm/boot/dts/qcom-apq8064-arrow-db600c.dts
> @@ -9,7 +9,69 @@
> serial1 = &gsbi1_serial;
> };
>
> + regulators {
> + compatible = "simple-bus";
> + vph: regulator-fixed@1 {
> + compatible = "regulator-fixed";
> + regulator-min-microvolt = <4500000>;
> + regulator-max-microvolt = <4500000>;
> + regulator-name = "VPH";
> + regulator-type = "voltage";
> + regulator-boot-on;
> + };
> + };
Just curious why we added the vph supply? Is that for some framework
requirement? We haven't done this on other boards, although we probably
should if there's a good reason for it.
--
Qualcomm Innovation Center, Inc. is a member of Code Aurora Forum,
a Linux Foundation Collaborative Project
On 19/04/16 20:10, Stephen Boyd wrote:
> On 04/12/2016 02:33 AM, Srinivas Kandagatla wrote:
>> This patch adds pmic regulator supplies connected on the board.
>> Rest of the invidual regulators would be added as and when required by
>> the devices.
>>
>> Signed-off-by: Srinivas Kandagatla <[email protected]>
>> Acked-by: Bjorn Andersson <[email protected]>
>> ---
>> arch/arm/boot/dts/qcom-apq8064-arrow-db600c.dts | 62 +++++++++++++++++++++++++
>> 1 file changed, 62 insertions(+)
>>
>> diff --git a/arch/arm/boot/dts/qcom-apq8064-arrow-db600c.dts b/arch/arm/boot/dts/qcom-apq8064-arrow-db600c.dts
>> index 57d4500..6695b00 100644
>> --- a/arch/arm/boot/dts/qcom-apq8064-arrow-db600c.dts
>> +++ b/arch/arm/boot/dts/qcom-apq8064-arrow-db600c.dts
>> @@ -9,7 +9,69 @@
>> serial1 = &gsbi1_serial;
>> };
>>
>> + regulators {
>> + compatible = "simple-bus";
>> + vph: regulator-fixed@1 {
>> + compatible = "regulator-fixed";
>> + regulator-min-microvolt = <4500000>;
>> + regulator-max-microvolt = <4500000>;
>> + regulator-name = "VPH";
>> + regulator-type = "voltage";
>> + regulator-boot-on;
>> + };
>> + };
>
> Just curious why we added the vph supply? Is that for some framework
> requirement? We haven't done this on other boards, although we probably
> should if there's a good reason for it.
This is an on board 12V TO 4.5V @5.5A DC/DC convertor for PMIC VPH
power. Yep we should do something similar on the other boards too.
Without this probably you would notice some error messages from
rpm_regulators about missing supply nodes.
thanks,
srini
>