2020-08-30 13:54:50

by Krzysztof Kozlowski

Subject: [PATCH 01/33] ARM: dts: exynos: Silence i2c-gpio dtschema warning in Galaxy I9100

The name of I2C controller over GPIO lines node ends with '-gpio' which
confuses dtschema:

/arch/arm/boot/dts/exynos4210-i9100.dt.yaml: /: i2c-gpio:
{'compatible': ['i2c-gpio'], ... 'maxim,over-volt': [[4500]]}} is not of type 'array'
From schema: lib/python3.6/site-packages/dtschema/schemas/gpio/gpio-consumer.yaml

Add a '-0' suffix to silence it. This pattern on naming i2c-gpio is
already present in many other dts. No functional change.

Signed-off-by: Krzysztof Kozlowski <[email protected]>
---
arch/arm/boot/dts/exynos4210-i9100.dts | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/arch/arm/boot/dts/exynos4210-i9100.dts b/arch/arm/boot/dts/exynos4210-i9100.dts
index 6d0c04d77a39..3eb11cc2c3c5 100644
--- a/arch/arm/boot/dts/exynos4210-i9100.dts
+++ b/arch/arm/boot/dts/exynos4210-i9100.dts
@@ -123,7 +123,7 @@
reset-gpios = <&gpl1 2 GPIO_ACTIVE_LOW>;
};

- i2c_max17042_fuel: i2c-gpio {
+ i2c_max17042_fuel: i2c-gpio-0 {
compatible = "i2c-gpio";
#address-cells = <1>;
#size-cells = <0>;
--
2.17.1

2020-08-30 13:55:26

by Krzysztof Kozlowski

Subject: [PATCH 02/33] ARM: dts: exynos: Correct GPU regulator properties in Galaxy I9100

The regulator property 'regulator-microvolt-offset' should be put next
to regulator definition, not consumer.

The property 'regulator-microsecs-delay' is not valid at all.

Signed-off-by: Krzysztof Kozlowski <[email protected]>
---
arch/arm/boot/dts/exynos4210-i9100.dts | 3 +--
1 file changed, 1 insertion(+), 2 deletions(-)

diff --git a/arch/arm/boot/dts/exynos4210-i9100.dts b/arch/arm/boot/dts/exynos4210-i9100.dts
index 3eb11cc2c3c5..6fa57d1fa1d7 100644
--- a/arch/arm/boot/dts/exynos4210-i9100.dts
+++ b/arch/arm/boot/dts/exynos4210-i9100.dts
@@ -304,8 +304,6 @@
status = "okay";

mali-supply = <&vg3d_breg>;
- regulator-microvolt-offset = <50000>;
- regulator-microsecs-delay = <50>;
};

&hsotg {
@@ -524,6 +522,7 @@
regulator-name = "G3D_1.1V";
regulator-min-microvolt = <900000>;
regulator-max-microvolt = <1200000>;
+ regulator-microvolt-offset = <50000>;
regulator-always-on;
};

--
2.17.1

2020-08-30 13:58:39

by Krzysztof Kozlowski

Subject: [PATCH 04/33] ARM: dts: exynos: Correct S3C RTC bindings and enable it in Origen

The S3C RTC requires 32768 Hz clock as input which is provided by PMIC
(Maxim MAX8997). However there is no clock provided for the PMIC and
the driver registers the clock as regulator. This is an old driver
which will not be updated so add a workaround:
1. Enable the "clock" regulator in PMIC,
2. Add a fixed-clock to fill missing clock phandle reference in S3C RTC.

This allows to enable the S3C RTC and fixes dtbs_check warnings:

arch/arm/boot/dts/exynos4210-origen.dt.yaml: rtc@10070000: clocks: [[5, 346]] is too short
arch/arm/boot/dts/exynos4210-origen.dt.yaml: rtc@10070000: clock-names: ['rtc'] is too short

Signed-off-by: Krzysztof Kozlowski <[email protected]>
---
arch/arm/boot/dts/exynos4210-origen.dts | 14 ++++++++++++++
1 file changed, 14 insertions(+)

diff --git a/arch/arm/boot/dts/exynos4210-origen.dts b/arch/arm/boot/dts/exynos4210-origen.dts
index 890525b10d22..747221bbb856 100644
--- a/arch/arm/boot/dts/exynos4210-origen.dts
+++ b/arch/arm/boot/dts/exynos4210-origen.dts
@@ -100,6 +100,13 @@
compatible = "samsung,clock-xusbxti";
clock-frequency = <24000000>;
};
+
+ pmic_ap_clk: pmic-ap-clk {
+ /* Workaround for missing clock on max8997 PMIC */
+ compatible = "fixed-clock";
+ #clock-cells = <0>;
+ clock-frequency = <32768>;
+ };
};

display-timings {
@@ -286,6 +293,11 @@
regulator-boot-on;
regulator-always-on;
};
+
+ EN32KHZ_AP {
+ regulator-name = "EN32KHZ_AP";
+ regulator-always-on;
+ };
};
};
};
@@ -331,6 +343,8 @@

&rtc {
status = "okay";
+ clocks = <&clock CLK_RTC>, <&pmic_ap_clk>;
+ clock-names = "rtc", "rtc_src";
};

&tmu {
--
2.17.1

2020-08-30 14:00:20

by Krzysztof Kozlowski

Subject: [PATCH 10/33] ARM: dts: exynos: Add and enable 32 kHz modem clock in Trats

The PMIC has a 32768 Hz clock used by the modem which is implemented by
driver as a regulator. Add and enable it to be sure modem get's its
signal.

Signed-off-by: Krzysztof Kozlowski <[email protected]>
---
arch/arm/boot/dts/exynos4210-trats.dts | 5 +++++
1 file changed, 5 insertions(+)

diff --git a/arch/arm/boot/dts/exynos4210-trats.dts b/arch/arm/boot/dts/exynos4210-trats.dts
index 634f009b622e..0f3af293d9d3 100644
--- a/arch/arm/boot/dts/exynos4210-trats.dts
+++ b/arch/arm/boot/dts/exynos4210-trats.dts
@@ -456,6 +456,11 @@
regulator-name = "EN32KHZ_AP";
regulator-always-on;
};
+
+ EN32KHZ_CP {
+ regulator-name = "EN32KHZ_CP";
+ regulator-always-on;
+ };
};
};
};
--
2.17.1

2020-08-30 14:00:20

by Krzysztof Kozlowski

Subject: [PATCH 13/33] ARM: dts: exynos: Align SPI GPIO node name with dtschema in Universal C210

The device tree schema expects SPI controller to be named "spi",
otherwise dtbs_check complain with a warning like:

arch/arm/boot/dts/exynos4210-universal_c210.dt.yaml: spi-lcd:
$nodename:0: 'spi-lcd' does not match '^spi(@.*|-[0-9a-f])*$'

Signed-off-by: Krzysztof Kozlowski <[email protected]>
---
arch/arm/boot/dts/exynos4210-universal_c210.dts | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/arch/arm/boot/dts/exynos4210-universal_c210.dts b/arch/arm/boot/dts/exynos4210-universal_c210.dts
index 7c83ce019b44..3509fdf8f245 100644
--- a/arch/arm/boot/dts/exynos4210-universal_c210.dts
+++ b/arch/arm/boot/dts/exynos4210-universal_c210.dts
@@ -119,7 +119,7 @@
enable-active-high;
};

- spi-lcd {
+ spi-3 {
compatible = "spi-gpio";
#address-cells = <1>;
#size-cells = <0>;
--
2.17.1

2020-08-30 14:01:23

by Krzysztof Kozlowski

Subject: [PATCH 17/33] ARM: dts: exynos: Override thermal by label in Galaxy I9000

Using full paths to extend or override a device tree node is error prone
since if there was a typo error, a new node will be created instead of
extending the node as it was desired. This will lead to run-time errors
that could be hard to detect.

A mistyped label on the other hand, will cause a dtc compile error
(during build time).

Signed-off-by: Krzysztof Kozlowski <[email protected]>
---
arch/arm/boot/dts/exynos4210-i9100.dts | 28 ++++++++++++--------------
1 file changed, 13 insertions(+), 15 deletions(-)

diff --git a/arch/arm/boot/dts/exynos4210-i9100.dts b/arch/arm/boot/dts/exynos4210-i9100.dts
index 5623e17889a5..799b69e1a93a 100644
--- a/arch/arm/boot/dts/exynos4210-i9100.dts
+++ b/arch/arm/boot/dts/exynos4210-i9100.dts
@@ -217,21 +217,6 @@
clock-frequency = <32768>;
};
};
-
- thermal-zones {
- cpu_thermal: cpu-thermal {
- cooling-maps {
- map0 {
- /* Corresponds to 800MHz */
- cooling-device = <&cpu0 2 2>;
- };
- map1 {
- /* Corresponds to 200MHz */
- cooling-device = <&cpu0 4 4>;
- };
- };
- };
- };
};

&camera {
@@ -242,6 +227,19 @@
cpu0-supply = <&varm_breg>;
};

+&cpu_thermal {
+ cooling-maps {
+ map0 {
+ /* Corresponds to 800MHz */
+ cooling-device = <&cpu0 2 2>;
+ };
+ map1 {
+ /* Corresponds to 200MHz */
+ cooling-device = <&cpu0 4 4>;
+ };
+ };
+};
+
&ehci {
status = "okay";

--
2.17.1

2020-08-30 14:01:44

by Krzysztof Kozlowski

Subject: [PATCH 18/33] ARM: dts: exynos: Override thermal by label in Trats

Using full paths to extend or override a device tree node is error prone
since if there was a typo error, a new node will be created instead of
extending the node as it was desired. This will lead to run-time errors
that could be hard to detect.

A mistyped label on the other hand, will cause a dtc compile error
(during build time).

Signed-off-by: Krzysztof Kozlowski <[email protected]>
---
arch/arm/boot/dts/exynos4210-trats.dts | 29 ++++++++++++--------------
1 file changed, 13 insertions(+), 16 deletions(-)

diff --git a/arch/arm/boot/dts/exynos4210-trats.dts b/arch/arm/boot/dts/exynos4210-trats.dts
index 33b40f619dea..75483e08b4b4 100644
--- a/arch/arm/boot/dts/exynos4210-trats.dts
+++ b/arch/arm/boot/dts/exynos4210-trats.dts
@@ -140,22 +140,6 @@
clock-frequency = <32768>;
};
};
-
- thermal-zones {
- cpu_thermal: cpu-thermal {
- cooling-maps {
- map0 {
- /* Corresponds to 800MHz at freq_table */
- cooling-device = <&cpu0 2 2>, <&cpu1 2 2>;
- };
- map1 {
- /* Corresponds to 200MHz at freq_table */
- cooling-device = <&cpu0 4 4>, <&cpu1 4 4>;
- };
- };
- };
- };
-
};

&camera {
@@ -166,6 +150,19 @@
cpu0-supply = <&varm_breg>;
};

+&cpu_thermal {
+ cooling-maps {
+ map0 {
+ /* Corresponds to 800MHz at freq_table */
+ cooling-device = <&cpu0 2 2>, <&cpu1 2 2>;
+ };
+ map1 {
+ /* Corresponds to 200MHz at freq_table */
+ cooling-device = <&cpu0 4 4>, <&cpu1 4 4>;
+ };
+ };
+};
+
&dsi_0 {
vddcore-supply = <&vusb_reg>;
vddio-supply = <&vmipi_reg>;
--
2.17.1

2020-08-30 14:02:27

by Krzysztof Kozlowski

Subject: [PATCH 11/33] ARM: dts: exynos: Remove empty camera pinctrl configuration in Trats

The camera's pinctrl configuration is simply empty and not effective.
Remove it to fix dtbs_check warning:

arch/arm/boot/dts/exynos4210-trats.dt.yaml: camera: pinctrl-0: True is not of type 'array'

Signed-off-by: Krzysztof Kozlowski <[email protected]>
---
arch/arm/boot/dts/exynos4210-trats.dts | 2 --
1 file changed, 2 deletions(-)

diff --git a/arch/arm/boot/dts/exynos4210-trats.dts b/arch/arm/boot/dts/exynos4210-trats.dts
index 0f3af293d9d3..33b40f619dea 100644
--- a/arch/arm/boot/dts/exynos4210-trats.dts
+++ b/arch/arm/boot/dts/exynos4210-trats.dts
@@ -159,8 +159,6 @@
};

&camera {
- pinctrl-names = "default";
- pinctrl-0 = <>;
status = "okay";
};

--
2.17.1

2020-08-30 14:02:33

by Krzysztof Kozlowski

Subject: [PATCH 19/33] ARM: dts: exynos: Add CPU cooling in Origen

Add missing cooling devices for CPU thermal zones in Exynos4210 Origen
board. This allows to scale down CPU frequency (and voltage) in case of
thermal pressure.

Signed-off-by: Krzysztof Kozlowski <[email protected]>

---

Not tested on HW.
---
arch/arm/boot/dts/exynos4210-origen.dts | 13 +++++++++++++
1 file changed, 13 insertions(+)

diff --git a/arch/arm/boot/dts/exynos4210-origen.dts b/arch/arm/boot/dts/exynos4210-origen.dts
index fcf45619a3e4..d6d8a8096eb4 100644
--- a/arch/arm/boot/dts/exynos4210-origen.dts
+++ b/arch/arm/boot/dts/exynos4210-origen.dts
@@ -129,6 +129,19 @@
cpu0-supply = <&buck1_reg>;
};

+&cpu_thermal {
+ cooling-maps {
+ map0 {
+ /* Corresponds to 800MHz */
+ cooling-device = <&cpu0 2 2>;
+ };
+ map1 {
+ /* Corresponds to 200MHz */
+ cooling-device = <&cpu0 4 4>;
+ };
+ };
+};
+
&exynos_usbphy {
status = "okay";
};
--
2.17.1

2020-08-30 14:03:02

by Krzysztof Kozlowski

Subject: [PATCH 22/33] ARM: dts: exynos: Align MHL GPIO pin configuration with dtschema on Galaxy I9100

Align the name of mag-mhl-gpio node to avoid dtschema confusion and
dtbs_check warning:

arch/arm/boot/dts/exynos4210-i9100.dt.yaml: pinctrl@11000000: mag-mhl-gpio:
{'samsung,pins': ['gpd0-2'], 'samsung,pin-function': [[3]], 'samsung,pin-pud': [[0]]} is not of type 'array'
From schema: dtschema/schemas/gpio/gpio-consumer.yaml

Signed-off-by: Krzysztof Kozlowski <[email protected]>
---
arch/arm/boot/dts/exynos4210-i9100.dts | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/arch/arm/boot/dts/exynos4210-i9100.dts b/arch/arm/boot/dts/exynos4210-i9100.dts
index 799b69e1a93a..5370ee477186 100644
--- a/arch/arm/boot/dts/exynos4210-i9100.dts
+++ b/arch/arm/boot/dts/exynos4210-i9100.dts
@@ -681,7 +681,7 @@
samsung,pin-val = <0>;
};

- mag_mhl_gpio: mag-mhl-gpio {
+ mag_mhl_gpio: mag-mhl {
samsung,pins = "gpd0-2";
samsung,pin-function = <EXYNOS_PIN_FUNC_3>;
samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
--
2.17.1

2020-08-30 14:03:24

by Krzysztof Kozlowski

Subject: [PATCH 33/33] ARM: dts: exynos: Correct whitespace and indentation issues

Remove double space after '=' and fix indentation in Exynos3250,
Exynos4210 and Exynos4412 boards.

Signed-off-by: Krzysztof Kozlowski <[email protected]>
---
arch/arm/boot/dts/exynos3250-monk.dts | 2 +-
arch/arm/boot/dts/exynos3250-rinato.dts | 2 +-
arch/arm/boot/dts/exynos4210-trats.dts | 138 +++++++++---------
.../boot/dts/exynos4210-universal_c210.dts | 4 +-
arch/arm/boot/dts/exynos4412-i9300.dts | 2 +-
arch/arm/boot/dts/exynos4412-i9305.dts | 2 +-
arch/arm/boot/dts/exynos4412-n710x.dts | 2 +-
arch/arm/boot/dts/exynos4412-trats2.dts | 2 +-
8 files changed, 77 insertions(+), 77 deletions(-)

diff --git a/arch/arm/boot/dts/exynos3250-monk.dts b/arch/arm/boot/dts/exynos3250-monk.dts
index ca29d7ed8216..9d77a73bc92b 100644
--- a/arch/arm/boot/dts/exynos3250-monk.dts
+++ b/arch/arm/boot/dts/exynos3250-monk.dts
@@ -26,7 +26,7 @@

memory@40000000 {
device_type = "memory";
- reg = <0x40000000 0x1ff00000>;
+ reg = <0x40000000 0x1ff00000>;
};

firmware@205f000 {
diff --git a/arch/arm/boot/dts/exynos3250-rinato.dts b/arch/arm/boot/dts/exynos3250-rinato.dts
index aba8350cfdaf..3df003af0d15 100644
--- a/arch/arm/boot/dts/exynos3250-rinato.dts
+++ b/arch/arm/boot/dts/exynos3250-rinato.dts
@@ -30,7 +30,7 @@

memory@40000000 {
device_type = "memory";
- reg = <0x40000000 0x1ff00000>;
+ reg = <0x40000000 0x1ff00000>;
};

firmware@205f000 {
diff --git a/arch/arm/boot/dts/exynos4210-trats.dts b/arch/arm/boot/dts/exynos4210-trats.dts
index 75483e08b4b4..2b49c1d77391 100644
--- a/arch/arm/boot/dts/exynos4210-trats.dts
+++ b/arch/arm/boot/dts/exynos4210-trats.dts
@@ -316,135 +316,135 @@

regulators {
valive_reg: LDO2 {
- regulator-name = "VALIVE_1.1V_C210";
- regulator-min-microvolt = <1100000>;
- regulator-max-microvolt = <1100000>;
- regulator-always-on;
+ regulator-name = "VALIVE_1.1V_C210";
+ regulator-min-microvolt = <1100000>;
+ regulator-max-microvolt = <1100000>;
+ regulator-always-on;
};

vusb_reg: LDO3 {
- regulator-name = "VUSB_1.1V_C210";
- regulator-min-microvolt = <1100000>;
- regulator-max-microvolt = <1100000>;
+ regulator-name = "VUSB_1.1V_C210";
+ regulator-min-microvolt = <1100000>;
+ regulator-max-microvolt = <1100000>;
};

vmipi_reg: LDO4 {
- regulator-name = "VMIPI_1.8V";
- regulator-min-microvolt = <1800000>;
- regulator-max-microvolt = <1800000>;
+ regulator-name = "VMIPI_1.8V";
+ regulator-min-microvolt = <1800000>;
+ regulator-max-microvolt = <1800000>;
};

vpda_reg: LDO6 {
- regulator-name = "VCC_1.8V_PDA";
- regulator-min-microvolt = <1800000>;
- regulator-max-microvolt = <1800000>;
- regulator-always-on;
+ regulator-name = "VCC_1.8V_PDA";
+ regulator-min-microvolt = <1800000>;
+ regulator-max-microvolt = <1800000>;
+ regulator-always-on;
};

vcam_reg: LDO7 {
- regulator-name = "CAM_ISP_1.8V";
- regulator-min-microvolt = <1800000>;
- regulator-max-microvolt = <1800000>;
+ regulator-name = "CAM_ISP_1.8V";
+ regulator-min-microvolt = <1800000>;
+ regulator-max-microvolt = <1800000>;
};

vusbdac_reg: LDO8 {
- regulator-name = "VUSB+VDAC_3.3V_C210";
- regulator-min-microvolt = <3300000>;
- regulator-max-microvolt = <3300000>;
+ regulator-name = "VUSB+VDAC_3.3V_C210";
+ regulator-min-microvolt = <3300000>;
+ regulator-max-microvolt = <3300000>;
};

vccpda_reg: LDO9 {
- regulator-name = "VCC_2.8V_PDA";
- regulator-min-microvolt = <2800000>;
- regulator-max-microvolt = <2800000>;
- regulator-always-on;
+ regulator-name = "VCC_2.8V_PDA";
+ regulator-min-microvolt = <2800000>;
+ regulator-max-microvolt = <2800000>;
+ regulator-always-on;
};

vpll_reg: LDO10 {
- regulator-name = "VPLL_1.1V_C210";
- regulator-min-microvolt = <1100000>;
- regulator-max-microvolt = <1100000>;
- regulator-always-on;
+ regulator-name = "VPLL_1.1V_C210";
+ regulator-min-microvolt = <1100000>;
+ regulator-max-microvolt = <1100000>;
+ regulator-always-on;
};

vtcam_reg: LDO12 {
- regulator-name = "VT_CAM_1.8V";
- regulator-min-microvolt = <1800000>;
- regulator-max-microvolt = <1800000>;
+ regulator-name = "VT_CAM_1.8V";
+ regulator-min-microvolt = <1800000>;
+ regulator-max-microvolt = <1800000>;
};

vcclcd_reg: LDO13 {
- regulator-name = "VCC_3.3V_LCD";
- regulator-min-microvolt = <3300000>;
- regulator-max-microvolt = <3300000>;
+ regulator-name = "VCC_3.3V_LCD";
+ regulator-min-microvolt = <3300000>;
+ regulator-max-microvolt = <3300000>;
};

vlcd_reg: LDO15 {
- regulator-name = "VLCD_2.2V";
- regulator-min-microvolt = <2200000>;
- regulator-max-microvolt = <2200000>;
+ regulator-name = "VLCD_2.2V";
+ regulator-min-microvolt = <2200000>;
+ regulator-max-microvolt = <2200000>;
};

camsensor_reg: LDO16 {
- regulator-name = "CAM_SENSOR_IO_1.8V";
- regulator-min-microvolt = <1800000>;
- regulator-max-microvolt = <1800000>;
+ regulator-name = "CAM_SENSOR_IO_1.8V";
+ regulator-min-microvolt = <1800000>;
+ regulator-max-microvolt = <1800000>;
};

tflash_reg: LDO17 {
- regulator-name = "VTF_2.8V";
- regulator-min-microvolt = <2800000>;
- regulator-max-microvolt = <2800000>;
+ regulator-name = "VTF_2.8V";
+ regulator-min-microvolt = <2800000>;
+ regulator-max-microvolt = <2800000>;
};

vddq_reg: LDO21 {
- regulator-name = "VDDQ_M1M2_1.2V";
- regulator-min-microvolt = <1200000>;
- regulator-max-microvolt = <1200000>;
- regulator-always-on;
+ regulator-name = "VDDQ_M1M2_1.2V";
+ regulator-min-microvolt = <1200000>;
+ regulator-max-microvolt = <1200000>;
+ regulator-always-on;
};

varm_breg: BUCK1 {
- regulator-name = "VARM_1.2V_C210";
- regulator-min-microvolt = <900000>;
- regulator-max-microvolt = <1350000>;
- regulator-always-on;
+ regulator-name = "VARM_1.2V_C210";
+ regulator-min-microvolt = <900000>;
+ regulator-max-microvolt = <1350000>;
+ regulator-always-on;
};

vint_breg: BUCK2 {
- regulator-name = "VINT_1.1V_C210";
- regulator-min-microvolt = <900000>;
- regulator-max-microvolt = <1100000>;
- regulator-always-on;
+ regulator-name = "VINT_1.1V_C210";
+ regulator-min-microvolt = <900000>;
+ regulator-max-microvolt = <1100000>;
+ regulator-always-on;
};

camisp_breg: BUCK4 {
- regulator-name = "CAM_ISP_CORE_1.2V";
- regulator-min-microvolt = <1200000>;
- regulator-max-microvolt = <1200000>;
+ regulator-name = "CAM_ISP_CORE_1.2V";
+ regulator-min-microvolt = <1200000>;
+ regulator-max-microvolt = <1200000>;
};

vmem_breg: BUCK5 {
- regulator-name = "VMEM_1.2V_C210";
- regulator-min-microvolt = <1200000>;
- regulator-max-microvolt = <1200000>;
- regulator-always-on;
+ regulator-name = "VMEM_1.2V_C210";
+ regulator-min-microvolt = <1200000>;
+ regulator-max-microvolt = <1200000>;
+ regulator-always-on;
};

vccsub_breg: BUCK7 {
- regulator-name = "VCC_SUB_2.0V";
- regulator-min-microvolt = <2000000>;
- regulator-max-microvolt = <2000000>;
- regulator-always-on;
+ regulator-name = "VCC_SUB_2.0V";
+ regulator-min-microvolt = <2000000>;
+ regulator-max-microvolt = <2000000>;
+ regulator-always-on;
};

safe1_sreg: ESAFEOUT1 {
- regulator-name = "SAFEOUT1";
+ regulator-name = "SAFEOUT1";
};

safe2_sreg: ESAFEOUT2 {
- regulator-name = "SAFEOUT2";
- regulator-boot-on;
+ regulator-name = "SAFEOUT2";
+ regulator-boot-on;
};

EN32KHZ_AP {
diff --git a/arch/arm/boot/dts/exynos4210-universal_c210.dts b/arch/arm/boot/dts/exynos4210-universal_c210.dts
index 546d84fe4599..a9f4db533183 100644
--- a/arch/arm/boot/dts/exynos4210-universal_c210.dts
+++ b/arch/arm/boot/dts/exynos4210-universal_c210.dts
@@ -49,7 +49,7 @@
};

vemmc_reg: voltage-regulator {
- compatible = "regulator-fixed";
+ compatible = "regulator-fixed";
regulator-name = "VMEM_VDD_2_8V";
regulator-min-microvolt = <2800000>;
regulator-max-microvolt = <2800000>;
@@ -111,7 +111,7 @@
};

tsp_reg: voltage-regulator {
- compatible = "regulator-fixed";
+ compatible = "regulator-fixed";
regulator-name = "TSP_2_8V";
regulator-min-microvolt = <2800000>;
regulator-max-microvolt = <2800000>;
diff --git a/arch/arm/boot/dts/exynos4412-i9300.dts b/arch/arm/boot/dts/exynos4412-i9300.dts
index 3691802b69c5..07fbcf845c49 100644
--- a/arch/arm/boot/dts/exynos4412-i9300.dts
+++ b/arch/arm/boot/dts/exynos4412-i9300.dts
@@ -17,7 +17,7 @@

memory@40000000 {
device_type = "memory";
- reg = <0x40000000 0x40000000>;
+ reg = <0x40000000 0x40000000>;
};
};

diff --git a/arch/arm/boot/dts/exynos4412-i9305.dts b/arch/arm/boot/dts/exynos4412-i9305.dts
index 54a2a55dbf70..6bc3d897f432 100644
--- a/arch/arm/boot/dts/exynos4412-i9305.dts
+++ b/arch/arm/boot/dts/exynos4412-i9305.dts
@@ -10,7 +10,7 @@

memory@40000000 {
device_type = "memory";
- reg = <0x40000000 0x80000000>;
+ reg = <0x40000000 0x80000000>;
};
};

diff --git a/arch/arm/boot/dts/exynos4412-n710x.dts b/arch/arm/boot/dts/exynos4412-n710x.dts
index 2361d89a79a8..a47b7f35fc80 100644
--- a/arch/arm/boot/dts/exynos4412-n710x.dts
+++ b/arch/arm/boot/dts/exynos4412-n710x.dts
@@ -8,7 +8,7 @@

memory@40000000 {
device_type = "memory";
- reg = <0x40000000 0x80000000>;
+ reg = <0x40000000 0x80000000>;
};

/* bootargs are passed in by bootloader */
diff --git a/arch/arm/boot/dts/exynos4412-trats2.dts b/arch/arm/boot/dts/exynos4412-trats2.dts
index aac533933c61..7b447b63007e 100644
--- a/arch/arm/boot/dts/exynos4412-trats2.dts
+++ b/arch/arm/boot/dts/exynos4412-trats2.dts
@@ -18,7 +18,7 @@

memory@40000000 {
device_type = "memory";
- reg = <0x40000000 0x40000000>;
+ reg = <0x40000000 0x40000000>;
};

chosen {
--
2.17.1

2020-08-30 14:04:27

by Krzysztof Kozlowski

Subject: [PATCH 31/33] ARM: dts: exynos: Correct S3C RTC bindings in SMDK4412

The S3C RTC requires 32768 Hz clock as input which is provided by PMIC.
However the PMIC is not described in DTS at all so at least add a
workaround to model its clock with fixed-clock and silence dtbs_check
warnings like:

arch/arm/boot/dts/exynos4412-smdk4412.dt.yaml: rtc@10070000: clocks: [[7, 346]] is too short
arch/arm/boot/dts/exynos4412-smdk4412.dt.yaml: rtc@10070000: clock-names: ['rtc'] is too short

Signed-off-by: Krzysztof Kozlowski <[email protected]>
---
arch/arm/boot/dts/exynos4412-smdk4412.dts | 12 ++++++++++++
1 file changed, 12 insertions(+)

diff --git a/arch/arm/boot/dts/exynos4412-smdk4412.dts b/arch/arm/boot/dts/exynos4412-smdk4412.dts
index 3667fa048e0f..49971203a8aa 100644
--- a/arch/arm/boot/dts/exynos4412-smdk4412.dts
+++ b/arch/arm/boot/dts/exynos4412-smdk4412.dts
@@ -37,6 +37,13 @@
compatible = "samsung,clock-xusbxti";
clock-frequency = <24000000>;
};
+
+ pmic_ap_clk: pmic-ap-clk {
+ /* Workaround for missing clock on PMIC */
+ compatible = "fixed-clock";
+ #clock-cells = <0>;
+ clock-frequency = <32768>;
+ };
};
};

@@ -142,6 +149,11 @@
};
};

+&rtc {
+ clocks = <&clock CLK_RTC>, <&pmic_ap_clk>;
+ clock-names = "rtc", "rtc_src";
+};
+
&sdhci_2 {
bus-width = <4>;
pinctrl-0 = <&sd2_clk &sd2_cmd &sd2_bus4 &sd2_cd>;
--
2.17.1

2020-08-30 14:04:33

by Krzysztof Kozlowski

Subject: [PATCH 23/33] ARM: dts: exynos: Remove empty camera pinctrl configuration in Odroid X/U3

The camera's pinctrl configuration is simply empty and not effective.
Remove it to fix dtbs_check warning:

arch/arm/boot/dts/exynos4412-odroidx.dt.yaml: camera: pinctrl-0: True is not of type 'array'

Signed-off-by: Krzysztof Kozlowski <[email protected]>
---
arch/arm/boot/dts/exynos4412-odroid-common.dtsi | 2 --
1 file changed, 2 deletions(-)

diff --git a/arch/arm/boot/dts/exynos4412-odroid-common.dtsi b/arch/arm/boot/dts/exynos4412-odroid-common.dtsi
index a5c1ce1e396c..6d3576e21ffa 100644
--- a/arch/arm/boot/dts/exynos4412-odroid-common.dtsi
+++ b/arch/arm/boot/dts/exynos4412-odroid-common.dtsi
@@ -136,8 +136,6 @@

&camera {
status = "okay";
- pinctrl-names = "default";
- pinctrl-0 = <>;
};

&clock {
--
2.17.1

2020-08-30 14:06:14

by Krzysztof Kozlowski

Subject: [PATCH 32/33] ARM: dts: exynos: Correct S3C RTC bindings in Tiny4412

The S3C RTC requires 32768 Hz clock as input which is provided by PMIC.
However the PMIC is not described in DTS at all so at least add a
workaround to model its clock with fixed-clock. This fixes S3C RTC and
silences dtbs_check warnings like:

arch/arm/boot/dts/exynos4412-tiny4412.dt.yaml: rtc@10070000: clocks: [[7, 346]] is too short
arch/arm/boot/dts/exynos4412-tiny4412.dt.yaml: rtc@10070000: clock-names: ['rtc'] is too short

Signed-off-by: Krzysztof Kozlowski <[email protected]>
---
arch/arm/boot/dts/exynos4412-tiny4412.dts | 9 +++++++++
1 file changed, 9 insertions(+)

diff --git a/arch/arm/boot/dts/exynos4412-tiny4412.dts b/arch/arm/boot/dts/exynos4412-tiny4412.dts
index 7512c86e634e..017b26108bb0 100644
--- a/arch/arm/boot/dts/exynos4412-tiny4412.dts
+++ b/arch/arm/boot/dts/exynos4412-tiny4412.dts
@@ -65,6 +65,13 @@
compatible = "samsung,clock-xusbxti";
clock-frequency = <24000000>;
};
+
+ pmic_ap_clk: pmic-ap-clk {
+ /* Workaround for missing clock on PMIC */
+ compatible = "fixed-clock";
+ #clock-cells = <0>;
+ clock-frequency = <32768>;
+ };
};

panel {
@@ -110,6 +117,8 @@

&rtc {
status = "okay";
+ clocks = <&clock CLK_RTC>, <&pmic_ap_clk>;
+ clock-names = "rtc", "rtc_src";
};

&sdhci_2 {
--
2.17.1

2020-08-30 14:07:32

by Krzysztof Kozlowski

Subject: [PATCH 30/33] ARM: dts: exynos: Add CPU cooling in Tiny4412

Add missing cooling devices for CPU thermal zones in Exynos4412 Tiny4412
board. This allows to scale down CPU frequency (and voltage) in case of
thermal pressure.

Signed-off-by: Krzysztof Kozlowski <[email protected]>
---
arch/arm/boot/dts/exynos4412-tiny4412.dts | 15 +++++++++++++++
1 file changed, 15 insertions(+)

diff --git a/arch/arm/boot/dts/exynos4412-tiny4412.dts b/arch/arm/boot/dts/exynos4412-tiny4412.dts
index 3a91de8a8082..7512c86e634e 100644
--- a/arch/arm/boot/dts/exynos4412-tiny4412.dts
+++ b/arch/arm/boot/dts/exynos4412-tiny4412.dts
@@ -78,6 +78,21 @@
};
};

+&cpu_thermal {
+ cooling-maps {
+ cooling_map0: map0 {
+ /* Corresponds to 800MHz at freq_table */
+ cooling-device = <&cpu0 7 7>, <&cpu1 7 7>,
+ <&cpu2 7 7>, <&cpu3 7 7>;
+ };
+ cooling_map1: map1 {
+ /* Corresponds to 200MHz at freq_table */
+ cooling-device = <&cpu0 13 13>, <&cpu1 13 13>,
+ <&cpu2 13 13>, <&cpu3 13 13>;
+ };
+ };
+};
+
&fimd {
pinctrl-0 = <&lcd_clk>, <&lcd_data24>;
pinctrl-names = "default";
--
2.17.1

2020-08-30 14:08:06

by Krzysztof Kozlowski

Subject: [PATCH 29/33] ARM: dts: exynos: Add CPU cooling in SMDK4412

Add missing cooling devices for CPU thermal zones in Exynos4412 SMDK4412
board. This allows to scale down CPU frequency (and voltage) in case of
thermal pressure.

Signed-off-by: Krzysztof Kozlowski <[email protected]>
---
arch/arm/boot/dts/exynos4412-smdk4412.dts | 15 +++++++++++++++
1 file changed, 15 insertions(+)

diff --git a/arch/arm/boot/dts/exynos4412-smdk4412.dts b/arch/arm/boot/dts/exynos4412-smdk4412.dts
index e70fb6e601f0..3667fa048e0f 100644
--- a/arch/arm/boot/dts/exynos4412-smdk4412.dts
+++ b/arch/arm/boot/dts/exynos4412-smdk4412.dts
@@ -40,6 +40,21 @@
};
};

+&cpu_thermal {
+ cooling-maps {
+ cooling_map0: map0 {
+ /* Corresponds to 800MHz at freq_table */
+ cooling-device = <&cpu0 7 7>, <&cpu1 7 7>,
+ <&cpu2 7 7>, <&cpu3 7 7>;
+ };
+ cooling_map1: map1 {
+ /* Corresponds to 200MHz at freq_table */
+ cooling-device = <&cpu0 13 13>, <&cpu1 13 13>,
+ <&cpu2 13 13>, <&cpu3 13 13>;
+ };
+ };
+};
+
&keypad {
samsung,keypad-num-rows = <3>;
samsung,keypad-num-columns = <8>;
--
2.17.1

2020-08-30 14:08:42

by Krzysztof Kozlowski

Subject: [PATCH 28/33] ARM: dts: exynos: Add CPU cooling in Exynos4412 Origen

Add missing cooling devices for CPU thermal zones in Exynos4412 Origen
board. This allows to scale down CPU frequency (and voltage) in case of
thermal pressure.

Signed-off-by: Krzysztof Kozlowski <[email protected]>
---
arch/arm/boot/dts/exynos4412-origen.dts | 15 +++++++++++++++
1 file changed, 15 insertions(+)

diff --git a/arch/arm/boot/dts/exynos4412-origen.dts b/arch/arm/boot/dts/exynos4412-origen.dts
index 4c52ca6dbe57..c2e793b69e7d 100644
--- a/arch/arm/boot/dts/exynos4412-origen.dts
+++ b/arch/arm/boot/dts/exynos4412-origen.dts
@@ -75,6 +75,21 @@
cpu0-supply = <&buck2_reg>;
};

+&cpu_thermal {
+ cooling-maps {
+ cooling_map0: map0 {
+ /* Corresponds to 800MHz at freq_table */
+ cooling-device = <&cpu0 7 7>, <&cpu1 7 7>,
+ <&cpu2 7 7>, <&cpu3 7 7>;
+ };
+ cooling_map1: map1 {
+ /* Corresponds to 200MHz at freq_table */
+ cooling-device = <&cpu0 13 13>, <&cpu1 13 13>,
+ <&cpu2 13 13>, <&cpu3 13 13>;
+ };
+ };
+};
+
&exynos_usbphy {
status = "okay";
};
--
2.17.1

2020-08-30 14:10:13

by Krzysztof Kozlowski

Subject: [PATCH 27/33] ARM: dts: exynos: Override thermal by label in Exynos4412 Odroids

Using full paths to extend or override a device tree node is error prone
since if there was a typo error, a new node will be created instead of
extending the node as it was desired. This will lead to run-time errors
that could be hard to detect.

A mistyped label on the other hand, will cause a dtc compile error
(during build time).

Signed-off-by: Krzysztof Kozlowski <[email protected]>
---
.../boot/dts/exynos4412-odroid-common.dtsi | 34 ++++++--------
arch/arm/boot/dts/exynos4412-odroidu3.dts | 46 +++++++++----------
2 files changed, 36 insertions(+), 44 deletions(-)

diff --git a/arch/arm/boot/dts/exynos4412-odroid-common.dtsi b/arch/arm/boot/dts/exynos4412-odroid-common.dtsi
index 6d3576e21ffa..ca3c78e0966c 100644
--- a/arch/arm/boot/dts/exynos4412-odroid-common.dtsi
+++ b/arch/arm/boot/dts/exynos4412-odroid-common.dtsi
@@ -66,25 +66,6 @@
clock-frequency = <24000000>;
};
};
-
- thermal-zones {
- cpu_thermal: cpu-thermal {
- cooling-maps {
- cooling_map0: map0 {
- /* Corresponds to 800MHz at freq_table */
- cooling-device = <&cpu0 7 7>, <&cpu1 7 7>,
- <&cpu2 7 7>, <&cpu3 7 7>;
- };
- cooling_map1: map1 {
- /* Corresponds to 200MHz at freq_table */
- cooling-device = <&cpu0 13 13>,
- <&cpu1 13 13>,
- <&cpu2 13 13>,
- <&cpu3 13 13>;
- };
- };
- };
- };
};

&bus_dmc {
@@ -172,6 +153,21 @@
};
};

+&cpu_thermal {
+ cooling-maps {
+ cooling_map0: map0 {
+ /* Corresponds to 800MHz at freq_table */
+ cooling-device = <&cpu0 7 7>, <&cpu1 7 7>,
+ <&cpu2 7 7>, <&cpu3 7 7>;
+ };
+ cooling_map1: map1 {
+ /* Corresponds to 200MHz at freq_table */
+ cooling-device = <&cpu0 13 13>, <&cpu1 13 13>,
+ <&cpu2 13 13>, <&cpu3 13 13>;
+ };
+ };
+};
+
&pinctrl_1 {
gpio_power_key: power_key {
samsung,pins = "gpx1-3";
diff --git a/arch/arm/boot/dts/exynos4412-odroidu3.dts b/arch/arm/boot/dts/exynos4412-odroidu3.dts
index 8ff243ba4542..b8549d846f86 100644
--- a/arch/arm/boot/dts/exynos4412-odroidu3.dts
+++ b/arch/arm/boot/dts/exynos4412-odroidu3.dts
@@ -37,31 +37,6 @@
#cooling-cells = <2>;
cooling-levels = <0 102 170 230>;
};
-
- thermal-zones {
- cpu_thermal: cpu-thermal {
- cooling-maps {
- map0 {
- trip = <&cpu_alert1>;
- cooling-device = <&cpu0 9 9>, <&cpu1 9 9>,
- <&cpu2 9 9>, <&cpu3 9 9>,
- <&fan0 1 2>;
- };
- map1 {
- trip = <&cpu_alert2>;
- cooling-device = <&cpu0 15 15>,
- <&cpu1 15 15>,
- <&cpu2 15 15>,
- <&cpu3 15 15>,
- <&fan0 2 3>;
- };
- map2 {
- trip = <&cpu_alert0>;
- cooling-device = <&fan0 0 1>;
- };
- };
- };
- };
};

&adc {
@@ -76,6 +51,27 @@
regulator-max-microvolt = <3300000>;
};

+&cpu_thermal {
+ cooling-maps {
+ map0 {
+ trip = <&cpu_alert1>;
+ cooling-device = <&cpu0 9 9>, <&cpu1 9 9>,
+ <&cpu2 9 9>, <&cpu3 9 9>,
+ <&fan0 1 2>;
+ };
+ map1 {
+ trip = <&cpu_alert2>;
+ cooling-device = <&cpu0 15 15>, <&cpu1 15 15>,
+ <&cpu2 15 15>, <&cpu3 15 15>,
+ <&fan0 2 3>;
+ };
+ map2 {
+ trip = <&cpu_alert0>;
+ cooling-device = <&fan0 0 1>;
+ };
+ };
+};
+
&hdmicec {
needs-hpd;
};
--
2.17.1

2020-08-30 14:10:30

by Krzysztof Kozlowski

Subject: [PATCH 26/33] ARM: dts: exynos: Override thermal by label in Midas

Using full paths to extend or override a device tree node is error prone
since if there was a typo error, a new node will be created instead of
extending the node as it was desired. This will lead to run-time errors
that could be hard to detect.

A mistyped label on the other hand, will cause a dtc compile error
(during build time).

Signed-off-by: Krzysztof Kozlowski <[email protected]>
---
arch/arm/boot/dts/exynos4412-midas.dtsi | 34 +++++++++++--------------
1 file changed, 15 insertions(+), 19 deletions(-)

diff --git a/arch/arm/boot/dts/exynos4412-midas.dtsi b/arch/arm/boot/dts/exynos4412-midas.dtsi
index 32d2e539b2dd..7e7c243ff196 100644
--- a/arch/arm/boot/dts/exynos4412-midas.dtsi
+++ b/arch/arm/boot/dts/exynos4412-midas.dtsi
@@ -319,25 +319,6 @@
pulldown-ohm = <100000>; /* 100K */
io-channels = <&adc 2>; /* Battery temperature */
};
-
- thermal-zones {
- cpu_thermal: cpu-thermal {
- cooling-maps {
- map0 {
- /* Corresponds to 800MHz at freq_table */
- cooling-device = <&cpu0 7 7>, <&cpu1 7 7>,
- <&cpu2 7 7>, <&cpu3 7 7>;
- };
- map1 {
- /* Corresponds to 200MHz at freq_table */
- cooling-device = <&cpu0 13 13>,
- <&cpu1 13 13>,
- <&cpu2 13 13>,
- <&cpu3 13 13>;
- };
- };
- };
- };
};

&adc {
@@ -406,6 +387,21 @@
cpu0-supply = <&buck2_reg>;
};

+&cpu_thermal {
+ cooling-maps {
+ map0 {
+ /* Corresponds to 800MHz at freq_table */
+ cooling-device = <&cpu0 7 7>, <&cpu1 7 7>,
+ <&cpu2 7 7>, <&cpu3 7 7>;
+ };
+ map1 {
+ /* Corresponds to 200MHz at freq_table */
+ cooling-device = <&cpu0 13 13>, <&cpu1 13 13>,
+ <&cpu2 13 13>, <&cpu3 13 13>;
+ };
+ };
+};
+
&csis_0 {
status = "okay";
vddcore-supply = <&ldo8_reg>;
--
2.17.1

2020-08-30 14:10:48

by Krzysztof Kozlowski

Subject: [PATCH 25/33] ARM: dts: exynos: Add S5M8767 clocks for RTC in Exynos4412 Origen

Add node for clock controller of Samsung S5M8767 PMIC. This provides
the 32768 Hz clock required by S3C RTC. Except making the S3C RTC
working, this also fixes dtbs_check warnings:

arch/arm/boot/dts/exynos4412-origen.dt.yaml: rtc@10070000: clocks: [[7, 346]] is too short
arch/arm/boot/dts/exynos4412-origen.dt.yaml: rtc@10070000: clock-names: ['rtc'] is too short

Signed-off-by: Krzysztof Kozlowski <[email protected]>
---
arch/arm/boot/dts/exynos4412-origen.dts | 10 ++++++++++
1 file changed, 10 insertions(+)

diff --git a/arch/arm/boot/dts/exynos4412-origen.dts b/arch/arm/boot/dts/exynos4412-origen.dts
index 8b11ad391252..4c52ca6dbe57 100644
--- a/arch/arm/boot/dts/exynos4412-origen.dts
+++ b/arch/arm/boot/dts/exynos4412-origen.dts
@@ -11,6 +11,7 @@

/dts-v1/;
#include "exynos4412.dtsi"
+#include <dt-bindings/clock/samsung,s2mps11.h>
#include <dt-bindings/gpio/gpio.h>
#include <dt-bindings/input/input.h>
#include "exynos-mfc-reserved-memory.dtsi"
@@ -129,6 +130,13 @@
<1200000>, <1200000>,
<1200000>, <1200000>;

+ s5m8767_osc: clocks {
+ compatible = "samsung,s5m8767-clk";
+ #clock-cells = <1>;
+ clock-output-names = "s5m8767_ap", "s5m8767_cp",
+ "s5m8767_bt";
+ };
+
regulators {
ldo1_reg: LDO1 {
regulator-name = "VDD_ALIVE";
@@ -499,6 +507,8 @@

&rtc {
status = "okay";
+ clocks = <&clock CLK_RTC>, <&s5m8767_osc S2MPS11_CLK_AP>;
+ clock-names = "rtc", "rtc_src";
};

&sdhci_2 {
--
2.17.1

2020-08-30 14:11:05

by Krzysztof Kozlowski

Subject: [PATCH 24/33] ARM: dts: exynos: Correct compatible of fixed clocks in Midas boards

The fixed clocks implemented by Samsung clock drivers use only one
compatible so drop the additional "fixed-clock" to fix dtbs_check
warnings like:

arch/arm/boot/dts/exynos4412-i9300.dt.yaml: xxti: compatible:0: 'fixed-clock' was expected
From schema: Documentation/devicetree/bindings/clock/fixed-clock.yaml
arch/arm/boot/dts/exynos4412-i9300.dt.yaml: xxti: compatible: ['samsung,clock-xxti', 'fixed-clock'] is too long
arch/arm/boot/dts/exynos4412-i9300.dt.yaml: xxti: compatible: Additional items are not allowed ('fixed-clock' was unexpected)
arch/arm/boot/dts/exynos4412-i9300.dt.yaml: xxti: '#clock-cells' is a required property

Signed-off-by: Krzysztof Kozlowski <[email protected]>
---
arch/arm/boot/dts/exynos4412-midas.dtsi | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/arch/arm/boot/dts/exynos4412-midas.dtsi b/arch/arm/boot/dts/exynos4412-midas.dtsi
index 8e7a03228d7b..32d2e539b2dd 100644
--- a/arch/arm/boot/dts/exynos4412-midas.dtsi
+++ b/arch/arm/boot/dts/exynos4412-midas.dtsi
@@ -37,12 +37,12 @@

fixed-rate-clocks {
xxti {
- compatible = "samsung,clock-xxti", "fixed-clock";
+ compatible = "samsung,clock-xxti";
clock-frequency = <0>;
};

xusbxti {
- compatible = "samsung,clock-xusbxti", "fixed-clock";
+ compatible = "samsung,clock-xusbxti";
clock-frequency = <24000000>;
};
};
--
2.17.1

2020-08-30 14:12:03

by Krzysztof Kozlowski

Subject: [PATCH 15/33] ARM: dts: exynos: Align SPI GPIO node name with dtschema in Galaxy I9100

The device tree schema expects SPI controller to be named "spi",
otherwise dtbs_check complain with a warning like:

arch/arm/boot/dts/exynos4210-i9100.dt.yaml: spi-lcd:
$nodename:0: 'spi-lcd' does not match '^spi(@.*|-[0-9a-f])*$'

Signed-off-by: Krzysztof Kozlowski <[email protected]>
---
arch/arm/boot/dts/exynos4210-i9100.dts | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/arch/arm/boot/dts/exynos4210-i9100.dts b/arch/arm/boot/dts/exynos4210-i9100.dts
index 1d200a5e1b72..5623e17889a5 100644
--- a/arch/arm/boot/dts/exynos4210-i9100.dts
+++ b/arch/arm/boot/dts/exynos4210-i9100.dts
@@ -147,7 +147,7 @@
};
};

- spi-lcd {
+ spi-3 {
compatible = "spi-gpio";
#address-cells = <1>;
#size-cells = <0>;
--
2.17.1

2020-08-30 14:12:41

by Krzysztof Kozlowski

Subject: [PATCH 03/33] ARM: dts: exynos: Correct S3C RTC bindings and enable it in Galaxy I9100

The S3C RTC requires 32768 Hz clock as input which is provided by PMIC
(Maxim MAX8997). However there is no clock provided for the PMIC and
the driver registers the clock as regulator. This is an old driver
which will not be updated so add a workaround:
1. Enable the "clock" regulator in PMIC,
2. Add a fixed-clock to fill missing clock phandle reference in S3C RTC.

This allows to enable the S3C RTC and fixes dtbs_check warnings:

arch/arm/boot/dts/exynos4210-i9100.dt.yaml: rtc@10070000: clocks: [[5, 346]] is too short
arch/arm/boot/dts/exynos4210-i9100.dt.yaml: rtc@10070000: clock-names: ['rtc'] is too short

Signed-off-by: Krzysztof Kozlowski <[email protected]>
---
arch/arm/boot/dts/exynos4210-i9100.dts | 18 ++++++++++++++++++
1 file changed, 18 insertions(+)

diff --git a/arch/arm/boot/dts/exynos4210-i9100.dts b/arch/arm/boot/dts/exynos4210-i9100.dts
index 6fa57d1fa1d7..d63274c8539d 100644
--- a/arch/arm/boot/dts/exynos4210-i9100.dts
+++ b/arch/arm/boot/dts/exynos4210-i9100.dts
@@ -209,6 +209,13 @@
compatible = "samsung,clock-xusbxti";
clock-frequency = <24000000>;
};
+
+ pmic_ap_clk: pmic-ap-clk {
+ /* Workaround for missing clock on max8997 PMIC */
+ compatible = "fixed-clock";
+ #clock-cells = <0>;
+ clock-frequency = <32768>;
+ };
};

thermal-zones {
@@ -568,6 +575,11 @@
regulator-max-microvolt = <4100000>;
regulator-always-on;
};
+
+ EN32KHZ_AP {
+ regulator-name = "EN32KHZ_AP";
+ regulator-always-on;
+ };
};
};
};
@@ -688,6 +700,12 @@
};
};

+&rtc {
+ status = "okay";
+ clocks = <&clock CLK_RTC>, <&pmic_ap_clk>;
+ clock-names = "rtc", "rtc_src";
+};
+
&sdhci_0 {
status = "okay";

--
2.17.1

2020-08-30 14:13:54

by Krzysztof Kozlowski

Subject: [PATCH 12/33] ARM: dts: exynos: Remove empty camera pinctrl configuration in Universal C210

The camera's pinctrl configuration is simply empty and not effective.
Remove it to fix dtbs_check warning:

arch/arm/boot/dts/exynos4210-universal_c210.dt.yaml: camera: pinctrl-0: True is not of type 'array'

Signed-off-by: Krzysztof Kozlowski <[email protected]>
---
arch/arm/boot/dts/exynos4210-universal_c210.dts | 3 ---
1 file changed, 3 deletions(-)

diff --git a/arch/arm/boot/dts/exynos4210-universal_c210.dts b/arch/arm/boot/dts/exynos4210-universal_c210.dts
index 9479e41bdc2a..7c83ce019b44 100644
--- a/arch/arm/boot/dts/exynos4210-universal_c210.dts
+++ b/arch/arm/boot/dts/exynos4210-universal_c210.dts
@@ -190,9 +190,6 @@

&camera {
status = "okay";
-
- pinctrl-names = "default";
- pinctrl-0 = <>;
};

&cpu0 {
--
2.17.1

2020-08-30 14:14:17

by Krzysztof Kozlowski

Subject: [PATCH 09/33] ARM: dts: exynos: Add and enable 32 kHz modem clock in Origen

The PMIC has a 32768 Hz clock used by the modem which is implemented by
driver as a regulator. Add and enable it to be sure modem get's its
signal.

Signed-off-by: Krzysztof Kozlowski <[email protected]>
---
arch/arm/boot/dts/exynos4210-origen.dts | 5 +++++
1 file changed, 5 insertions(+)

diff --git a/arch/arm/boot/dts/exynos4210-origen.dts b/arch/arm/boot/dts/exynos4210-origen.dts
index 747221bbb856..fcf45619a3e4 100644
--- a/arch/arm/boot/dts/exynos4210-origen.dts
+++ b/arch/arm/boot/dts/exynos4210-origen.dts
@@ -298,6 +298,11 @@
regulator-name = "EN32KHZ_AP";
regulator-always-on;
};
+
+ EN32KHZ_CP {
+ regulator-name = "EN32KHZ_CP";
+ regulator-always-on;
+ };
};
};
};
--
2.17.1

2020-08-30 14:14:43

by Krzysztof Kozlowski

Subject: [PATCH 21/33] ARM: dts: exynos: Add CPU cooling in Universal C210

Add missing cooling devices for CPU thermal zones in Exynos4210
Universal C310 board. This allows to scale down CPU frequency (and
voltage) in case of thermal pressure.

Signed-off-by: Krzysztof Kozlowski <[email protected]>
---
arch/arm/boot/dts/exynos4210-universal_c210.dts | 13 +++++++++++++
1 file changed, 13 insertions(+)

diff --git a/arch/arm/boot/dts/exynos4210-universal_c210.dts b/arch/arm/boot/dts/exynos4210-universal_c210.dts
index 279f0f8f86ed..546d84fe4599 100644
--- a/arch/arm/boot/dts/exynos4210-universal_c210.dts
+++ b/arch/arm/boot/dts/exynos4210-universal_c210.dts
@@ -196,6 +196,19 @@
cpu0-supply = <&vdd_arm_reg>;
};

+&cpu_thermal {
+ cooling-maps {
+ map0 {
+ /* Corresponds to 800MHz */
+ cooling-device = <&cpu0 2 2>;
+ };
+ map1 {
+ /* Corresponds to 200MHz */
+ cooling-device = <&cpu0 4 4>;
+ };
+ };
+};
+
&ehci {
status = "okay";
phys = <&exynos_usbphy 1>;
--
2.17.1

2020-08-30 14:14:43

by Krzysztof Kozlowski

Subject: [PATCH 08/33] ARM: dts: exynos: Add and enable 32 kHz modem clock in Galaxy I9100

The PMIC has a 32768 Hz clock used by the modem which is implemented by
driver as a regulator. Add and enable it to be sure modem get's its
signal.

Signed-off-by: Krzysztof Kozlowski <[email protected]>
---
arch/arm/boot/dts/exynos4210-i9100.dts | 5 +++++
1 file changed, 5 insertions(+)

diff --git a/arch/arm/boot/dts/exynos4210-i9100.dts b/arch/arm/boot/dts/exynos4210-i9100.dts
index d63274c8539d..1d200a5e1b72 100644
--- a/arch/arm/boot/dts/exynos4210-i9100.dts
+++ b/arch/arm/boot/dts/exynos4210-i9100.dts
@@ -580,6 +580,11 @@
regulator-name = "EN32KHZ_AP";
regulator-always-on;
};
+
+ EN32KHZ_CP {
+ regulator-name = "EN32KHZ_CP";
+ regulator-always-on;
+ };
};
};
};
--
2.17.1

2020-08-30 14:14:44

by Krzysztof Kozlowski

Subject: [PATCH 20/33] ARM: dts: exynos: Add CPU cooling in SMDKv310

Add missing cooling devices for CPU thermal zones in Exynos4210 SMDKv310
board. This allows to scale down CPU frequency (and voltage) in case of
thermal pressure.

Signed-off-by: Krzysztof Kozlowski <[email protected]>
---
arch/arm/boot/dts/exynos4210-smdkv310.dts | 13 +++++++++++++
1 file changed, 13 insertions(+)

diff --git a/arch/arm/boot/dts/exynos4210-smdkv310.dts b/arch/arm/boot/dts/exynos4210-smdkv310.dts
index 0b0e86737b26..c5609afa6101 100644
--- a/arch/arm/boot/dts/exynos4210-smdkv310.dts
+++ b/arch/arm/boot/dts/exynos4210-smdkv310.dts
@@ -50,6 +50,19 @@
};
};

+&cpu_thermal {
+ cooling-maps {
+ map0 {
+ /* Corresponds to 800MHz */
+ cooling-device = <&cpu0 2 2>;
+ };
+ map1 {
+ /* Corresponds to 200MHz */
+ cooling-device = <&cpu0 4 4>;
+ };
+ };
+};
+
&i2c_0 {
#address-cells = <1>;
#size-cells = <0>;
--
2.17.1

2020-08-30 14:14:44

by Krzysztof Kozlowski

Subject: [PATCH 16/33] ARM: dts: exynos: Override thermal by label in Exynos4210

Using full paths to extend or override a device tree node is error prone
since if there was a typo error, a new node will be created instead of
extending the node as it was desired. This will lead to run-time errors
that could be hard to detect.

A mistyped label on the other hand, will cause a dtc compile error
(during build time).

Signed-off-by: Krzysztof Kozlowski <[email protected]>
---
arch/arm/boot/dts/exynos4210.dtsi | 36 +++++++++++++++----------------
1 file changed, 17 insertions(+), 19 deletions(-)

diff --git a/arch/arm/boot/dts/exynos4210.dtsi b/arch/arm/boot/dts/exynos4210.dtsi
index 73360f29d53e..fddc661ded28 100644
--- a/arch/arm/boot/dts/exynos4210.dtsi
+++ b/arch/arm/boot/dts/exynos4210.dtsi
@@ -365,26 +365,24 @@
};
};
};
+};

- thermal-zones {
- cpu_thermal: cpu-thermal {
- polling-delay-passive = <0>;
- polling-delay = <0>;
- thermal-sensors = <&tmu 0>;
-
- trips {
- cpu_alert0: cpu-alert-0 {
- temperature = <85000>; /* millicelsius */
- };
- cpu_alert1: cpu-alert-1 {
- temperature = <100000>; /* millicelsius */
- };
- cpu_alert2: cpu-alert-2 {
- temperature = <110000>; /* millicelsius */
- };
- };
- };
- };
+&cpu_alert0 {
+ temperature = <85000>; /* millicelsius */
+};
+
+&cpu_alert1 {
+ temperature = <100000>; /* millicelsius */
+};
+
+&cpu_alert2 {
+ temperature = <110000>; /* millicelsius */
+};
+
+&cpu_thermal {
+ polling-delay-passive = <0>;
+ polling-delay = <0>;
+ thermal-sensors = <&tmu 0>;
};

&gic {
--
2.17.1

2020-08-30 14:15:39

by Krzysztof Kozlowski

Subject: [PATCH 07/33] ARM: dts: exynos: Correct S3C RTC bindings in SMDKv310

The S3C RTC requires 32768 Hz clock as input which is provided by PMIC.
However there is no clock provided for the PMIC and the driver registers
the clock as regulator. This is an old driver which will not be updated
so add a workaround - a fixed-clock to fill missing clock phandle
reference in S3C RTC.

This allows to enable the S3C RTC and fixes dtbs_check warnings:

arch/arm/boot/dts/exynos4210-smdkv310.dt.yaml: rtc@10070000: clocks: [[5, 346]] is too short
arch/arm/boot/dts/exynos4210-smdkv310.dt.yaml: rtc@10070000: clock-names: ['rtc'] is too short

Signed-off-by: Krzysztof Kozlowski <[email protected]>
---
arch/arm/boot/dts/exynos4210-smdkv310.dts | 12 ++++++++++++
1 file changed, 12 insertions(+)

diff --git a/arch/arm/boot/dts/exynos4210-smdkv310.dts b/arch/arm/boot/dts/exynos4210-smdkv310.dts
index 77fc11e593ad..0b0e86737b26 100644
--- a/arch/arm/boot/dts/exynos4210-smdkv310.dts
+++ b/arch/arm/boot/dts/exynos4210-smdkv310.dts
@@ -40,6 +40,13 @@
compatible = "samsung,clock-xusbxti";
clock-frequency = <24000000>;
};
+
+ pmic_ap_clk: pmic-ap-clk {
+ /* Workaround for missing clock on PMIC */
+ compatible = "fixed-clock";
+ #clock-cells = <0>;
+ clock-frequency = <32768>;
+ };
};
};

@@ -148,6 +155,11 @@
};
};

+&rtc {
+ clocks = <&clock CLK_RTC>, <&pmic_ap_clk>;
+ clock-names = "rtc", "rtc_src";
+};
+
&sdhci_2 {
bus-width = <4>;
pinctrl-names = "default";
--
2.17.1

2020-08-30 14:16:28

by Krzysztof Kozlowski

Subject: [PATCH 06/33] ARM: dts: exynos: Correct S3C RTC bindings and enable it in Universal C210

The S3C RTC requires 32768 Hz clock as input which is provided by PMIC.
However there is no clock provided for the PMIC and the driver registers
the clock as regulator. This is an old driver which will not be updated
so add a workaround - add a fixed-clock to fill missing clock phandle
reference in S3C RTC. The "clock" regulator in PMIC is already present
and enabled.

This allows to enable the S3C RTC and fixes dtbs_check warnings:

arch/arm/boot/dts/exynos4210-universal_c210.dt.yaml: rtc@10070000: clocks: [[5, 346]] is too short
arch/arm/boot/dts/exynos4210-universal_c210.dt.yaml: rtc@10070000: clock-names: ['rtc'] is too short

Signed-off-by: Krzysztof Kozlowski <[email protected]>
---
arch/arm/boot/dts/exynos4210-universal_c210.dts | 13 +++++++++++++
1 file changed, 13 insertions(+)

diff --git a/arch/arm/boot/dts/exynos4210-universal_c210.dts b/arch/arm/boot/dts/exynos4210-universal_c210.dts
index 99ce53b120ac..9479e41bdc2a 100644
--- a/arch/arm/boot/dts/exynos4210-universal_c210.dts
+++ b/arch/arm/boot/dts/exynos4210-universal_c210.dts
@@ -39,6 +39,13 @@
compatible = "samsung,clock-xusbxti";
clock-frequency = <24000000>;
};
+
+ pmic_ap_clk: pmic-ap-clk {
+ /* Workaround for missing clock on PMIC */
+ compatible = "fixed-clock";
+ #clock-cells = <0>;
+ clock-frequency = <32768>;
+ };
};

vemmc_reg: voltage-regulator {
@@ -537,6 +544,12 @@
status = "okay";
};

+&rtc {
+ status = "okay";
+ clocks = <&clock CLK_RTC>, <&pmic_ap_clk>;
+ clock-names = "rtc", "rtc_src";
+};
+
&sdhci_0 {
bus-width = <8>;
non-removable;
--
2.17.1

2020-08-30 14:16:28

by Krzysztof Kozlowski

Subject: [RFT 14/33] ARM: dts: exynos: Replace deprecated GPIO spi-gpio properties in Universal C210

"gpio-sck" and "gpio-mosi" are deprecated so update the DTS to fix
dtbs_checks warnings like:

arch/arm/boot/dts/exynos4210-universal_c210.dt.yaml: spi-lcd:
gpio-sck: False schema does not allow [[85, 1, 0]]

Signed-off-by: Krzysztof Kozlowski <[email protected]>
---
arch/arm/boot/dts/exynos4210-universal_c210.dts | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/arch/arm/boot/dts/exynos4210-universal_c210.dts b/arch/arm/boot/dts/exynos4210-universal_c210.dts
index 3509fdf8f245..279f0f8f86ed 100644
--- a/arch/arm/boot/dts/exynos4210-universal_c210.dts
+++ b/arch/arm/boot/dts/exynos4210-universal_c210.dts
@@ -124,8 +124,8 @@
#address-cells = <1>;
#size-cells = <0>;

- gpio-sck = <&gpy3 1 GPIO_ACTIVE_HIGH>;
- gpio-mosi = <&gpy3 3 GPIO_ACTIVE_HIGH>;
+ sck-gpios = <&gpy3 1 GPIO_ACTIVE_HIGH>;
+ mosi-gpios = <&gpy3 3 GPIO_ACTIVE_HIGH>;
num-chipselects = <1>;
cs-gpios = <&gpy4 3 GPIO_ACTIVE_LOW>;

--
2.17.1

2020-08-30 14:18:59

by Krzysztof Kozlowski

Subject: [PATCH 05/33] ARM: dts: exynos: Correct S3C RTC bindings and enable it in Trats

The S3C RTC requires 32768 Hz clock as input which is provided by PMIC
(Maxim MAX8997). However there is no clock provided for the PMIC and
the driver registers the clock as regulator. This is an old driver
which will not be updated so add a workaround:
1. Enable the "clock" regulator in PMIC,
2. Add a fixed-clock to fill missing clock phandle reference in S3C RTC.

This allows to enable the S3C RTC and fixes dtbs_check warnings:

arch/arm/boot/dts/exynos4210-trats.dt.yaml: rtc@10070000: clocks: [[5, 346]] is too short
arch/arm/boot/dts/exynos4210-trats.dt.yaml: rtc@10070000: clock-names: ['rtc'] is too short

Signed-off-by: Krzysztof Kozlowski <[email protected]>
---
arch/arm/boot/dts/exynos4210-trats.dts | 18 ++++++++++++++++++
1 file changed, 18 insertions(+)

diff --git a/arch/arm/boot/dts/exynos4210-trats.dts b/arch/arm/boot/dts/exynos4210-trats.dts
index 5cc96f04a4fa..634f009b622e 100644
--- a/arch/arm/boot/dts/exynos4210-trats.dts
+++ b/arch/arm/boot/dts/exynos4210-trats.dts
@@ -132,6 +132,13 @@
compatible = "samsung,clock-xusbxti";
clock-frequency = <24000000>;
};
+
+ pmic_ap_clk: pmic-ap-clk {
+ /* Workaround for missing clock on max8997 PMIC */
+ compatible = "fixed-clock";
+ #clock-cells = <0>;
+ clock-frequency = <32768>;
+ };
};

thermal-zones {
@@ -444,10 +451,21 @@
regulator-name = "SAFEOUT2";
regulator-boot-on;
};
+
+ EN32KHZ_AP {
+ regulator-name = "EN32KHZ_AP";
+ regulator-always-on;
+ };
};
};
};

+&rtc {
+ status = "okay";
+ clocks = <&clock CLK_RTC>, <&pmic_ap_clk>;
+ clock-names = "rtc", "rtc_src";
+};
+
&sdhci_0 {
bus-width = <8>;
non-removable;
--
2.17.1

2020-08-31 08:33:30

by Marek Szyprowski

Subject: Re: [PATCH 23/33] ARM: dts: exynos: Remove empty camera pinctrl configuration in Odroid X/U3

Hi Krzysztof,

On 30.08.2020 15:51, Krzysztof Kozlowski wrote:
> The camera's pinctrl configuration is simply empty and not effective.
> Remove it to fix dtbs_check warning:
>
> arch/arm/boot/dts/exynos4412-odroidx.dt.yaml: camera: pinctrl-0: True is not of type 'array'
>
> Signed-off-by: Krzysztof Kozlowski <[email protected]>

I think that this was intentional to properly enable support for
mem-2-mem mode in Exynos4-IS (FIMC), but I'm not sure what are the
default values if no pinctrl properties are provided. Sylwester, could
you comment?

> ---
> arch/arm/boot/dts/exynos4412-odroid-common.dtsi | 2 --
> 1 file changed, 2 deletions(-)
>
> diff --git a/arch/arm/boot/dts/exynos4412-odroid-common.dtsi b/arch/arm/boot/dts/exynos4412-odroid-common.dtsi
> index a5c1ce1e396c..6d3576e21ffa 100644
> --- a/arch/arm/boot/dts/exynos4412-odroid-common.dtsi
> +++ b/arch/arm/boot/dts/exynos4412-odroid-common.dtsi
> @@ -136,8 +136,6 @@
>
> &camera {
> status = "okay";
> - pinctrl-names = "default";
> - pinctrl-0 = <>;
> };
>
> &clock {

Best regards
--
Marek Szyprowski, PhD
Samsung R&D Institute Poland

2020-08-31 08:40:41

by Krzysztof Kozlowski

Subject: Re: [PATCH 23/33] ARM: dts: exynos: Remove empty camera pinctrl configuration in Odroid X/U3

On Mon, 31 Aug 2020 at 10:31, Marek Szyprowski <[email protected]> wrote:
>
> Hi Krzysztof,
>
> On 30.08.2020 15:51, Krzysztof Kozlowski wrote:
> > The camera's pinctrl configuration is simply empty and not effective.
> > Remove it to fix dtbs_check warning:
> >
> > arch/arm/boot/dts/exynos4412-odroidx.dt.yaml: camera: pinctrl-0: True is not of type 'array'
> >
> > Signed-off-by: Krzysztof Kozlowski <[email protected]>
>
> I think that this was intentional to properly enable support for
> mem-2-mem mode in Exynos4-IS (FIMC), but I'm not sure what are the
> default values if no pinctrl properties are provided. Sylwester, could
> you comment?

Indeed it could be intentional... I see now errors:
[ 33.752203] s5p-fimc-md soc:camera: Failed to get pinctrl: -19

I wonder why getting an empty pinctrl is needed... maybe the driver
should accept missing pinctrl?

Best regards,
Krzysztof

2020-08-31 08:46:27

by Marek Szyprowski

Subject: Re: [PATCH 23/33] ARM: dts: exynos: Remove empty camera pinctrl configuration in Odroid X/U3

Hi Krzysztof,

On 31.08.2020 10:38, Krzysztof Kozlowski wrote:
> On Mon, 31 Aug 2020 at 10:31, Marek Szyprowski <[email protected]> wrote:
>> On 30.08.2020 15:51, Krzysztof Kozlowski wrote:
>>> The camera's pinctrl configuration is simply empty and not effective.
>>> Remove it to fix dtbs_check warning:
>>>
>>> arch/arm/boot/dts/exynos4412-odroidx.dt.yaml: camera: pinctrl-0: True is not of type 'array'
>>>
>>> Signed-off-by: Krzysztof Kozlowski <[email protected]>
>> I think that this was intentional to properly enable support for
>> mem-2-mem mode in Exynos4-IS (FIMC), but I'm not sure what are the
>> default values if no pinctrl properties are provided. Sylwester, could
>> you comment?
> Indeed it could be intentional... I see now errors:
> [ 33.752203] s5p-fimc-md soc:camera: Failed to get pinctrl: -19
>
> I wonder why getting an empty pinctrl is needed... maybe the driver
> should accept missing pinctrl?

Please ensure that you have those patches applied:

https://patchwork.kernel.org/patch/11707579/

https://patchwork.kernel.org/patch/11707577/

https://patchwork.kernel.org/patch/11705409/


Best regards
--
Marek Szyprowski, PhD
Samsung R&D Institute Poland

2020-08-31 09:17:21

by Marek Szyprowski

Subject: Re: [PATCH 09/33] ARM: dts: exynos: Add and enable 32 kHz modem clock in Origen

Hi Krzysztof,

On 30.08.2020 15:51, Krzysztof Kozlowski wrote:
> The PMIC has a 32768 Hz clock used by the modem which is implemented by
> driver as a regulator. Add and enable it to be sure modem get's its
> signal.
>
> Signed-off-by: Krzysztof Kozlowski <[email protected]>

Origen board doesn't have any modem/cp, so I see no point in enabling
this clock.

> ---
> arch/arm/boot/dts/exynos4210-origen.dts | 5 +++++
> 1 file changed, 5 insertions(+)
>
> diff --git a/arch/arm/boot/dts/exynos4210-origen.dts b/arch/arm/boot/dts/exynos4210-origen.dts
> index 747221bbb856..fcf45619a3e4 100644
> --- a/arch/arm/boot/dts/exynos4210-origen.dts
> +++ b/arch/arm/boot/dts/exynos4210-origen.dts
> @@ -298,6 +298,11 @@
> regulator-name = "EN32KHZ_AP";
> regulator-always-on;
> };
> +
> + EN32KHZ_CP {
> + regulator-name = "EN32KHZ_CP";
> + regulator-always-on;
> + };
> };
> };
> };

Best regards
--
Marek Szyprowski, PhD
Samsung R&D Institute Poland

2020-08-31 09:26:18

by Marek Szyprowski

Subject: Re: [RFT 14/33] ARM: dts: exynos: Replace deprecated GPIO spi-gpio properties in Universal C210

On 30.08.2020 15:51, Krzysztof Kozlowski wrote:
> "gpio-sck" and "gpio-mosi" are deprecated so update the DTS to fix
> dtbs_checks warnings like:
>
> arch/arm/boot/dts/exynos4210-universal_c210.dt.yaml: spi-lcd:
> gpio-sck: False schema does not allow [[85, 1, 0]]
>
> Signed-off-by: Krzysztof Kozlowski <[email protected]>
Tested-by: Marek Szyprowski <[email protected]>
> ---
> arch/arm/boot/dts/exynos4210-universal_c210.dts | 4 ++--
> 1 file changed, 2 insertions(+), 2 deletions(-)
>
> diff --git a/arch/arm/boot/dts/exynos4210-universal_c210.dts b/arch/arm/boot/dts/exynos4210-universal_c210.dts
> index 3509fdf8f245..279f0f8f86ed 100644
> --- a/arch/arm/boot/dts/exynos4210-universal_c210.dts
> +++ b/arch/arm/boot/dts/exynos4210-universal_c210.dts
> @@ -124,8 +124,8 @@
> #address-cells = <1>;
> #size-cells = <0>;
>
> - gpio-sck = <&gpy3 1 GPIO_ACTIVE_HIGH>;
> - gpio-mosi = <&gpy3 3 GPIO_ACTIVE_HIGH>;
> + sck-gpios = <&gpy3 1 GPIO_ACTIVE_HIGH>;
> + mosi-gpios = <&gpy3 3 GPIO_ACTIVE_HIGH>;
> num-chipselects = <1>;
> cs-gpios = <&gpy4 3 GPIO_ACTIVE_LOW>;
>

Best regards
--
Marek Szyprowski, PhD
Samsung R&D Institute Poland

2020-08-31 09:40:14

by Krzysztof Kozlowski

Subject: Re: [PATCH 09/33] ARM: dts: exynos: Add and enable 32 kHz modem clock in Origen

On Mon, 31 Aug 2020 at 11:16, Marek Szyprowski <[email protected]> wrote:
>
> Hi Krzysztof,
>
> On 30.08.2020 15:51, Krzysztof Kozlowski wrote:
> > The PMIC has a 32768 Hz clock used by the modem which is implemented by
> > driver as a regulator. Add and enable it to be sure modem get's its
> > signal.
> >
> > Signed-off-by: Krzysztof Kozlowski <[email protected]>
>
> Origen board doesn't have any modem/cp, so I see no point in enabling
> this clock.

Good point, thanks for review.

Best regards,
Krzysztof

2020-08-31 09:50:54

by Marek Szyprowski

Subject: Re: [PATCH 06/33] ARM: dts: exynos: Correct S3C RTC bindings and enable it in Universal C210

On 30.08.2020 15:51, Krzysztof Kozlowski wrote:
> The S3C RTC requires 32768 Hz clock as input which is provided by PMIC.
> However there is no clock provided for the PMIC and the driver registers
> the clock as regulator. This is an old driver which will not be updated
> so add a workaround - add a fixed-clock to fill missing clock phandle
> reference in S3C RTC. The "clock" regulator in PMIC is already present
> and enabled.
>
> This allows to enable the S3C RTC and fixes dtbs_check warnings:
>
> arch/arm/boot/dts/exynos4210-universal_c210.dt.yaml: rtc@10070000: clocks: [[5, 346]] is too short
> arch/arm/boot/dts/exynos4210-universal_c210.dt.yaml: rtc@10070000: clock-names: ['rtc'] is too short
>
> Signed-off-by: Krzysztof Kozlowski <[email protected]>

Confirmed, this workaround enables s3c-rtc driver operation on this board.

Tested-by: Marek Szyprowski <[email protected]>

> ---
> arch/arm/boot/dts/exynos4210-universal_c210.dts | 13 +++++++++++++
> 1 file changed, 13 insertions(+)
>
> diff --git a/arch/arm/boot/dts/exynos4210-universal_c210.dts b/arch/arm/boot/dts/exynos4210-universal_c210.dts
> index 99ce53b120ac..9479e41bdc2a 100644
> --- a/arch/arm/boot/dts/exynos4210-universal_c210.dts
> +++ b/arch/arm/boot/dts/exynos4210-universal_c210.dts
> @@ -39,6 +39,13 @@
> compatible = "samsung,clock-xusbxti";
> clock-frequency = <24000000>;
> };
> +
> + pmic_ap_clk: pmic-ap-clk {
> + /* Workaround for missing clock on PMIC */
> + compatible = "fixed-clock";
> + #clock-cells = <0>;
> + clock-frequency = <32768>;
> + };
> };
>
> vemmc_reg: voltage-regulator {
> @@ -537,6 +544,12 @@
> status = "okay";
> };
>
> +&rtc {
> + status = "okay";
> + clocks = <&clock CLK_RTC>, <&pmic_ap_clk>;
> + clock-names = "rtc", "rtc_src";
> +};
> +
> &sdhci_0 {
> bus-width = <8>;
> non-removable;

Best regards
--
Marek Szyprowski, PhD
Samsung R&D Institute Poland

2020-08-31 09:52:07

by Marek Szyprowski

Subject: Re: [PATCH 05/33] ARM: dts: exynos: Correct S3C RTC bindings and enable it in Trats

On 30.08.2020 15:51, Krzysztof Kozlowski wrote:
> The S3C RTC requires 32768 Hz clock as input which is provided by PMIC
> (Maxim MAX8997). However there is no clock provided for the PMIC and
> the driver registers the clock as regulator. This is an old driver
> which will not be updated so add a workaround:
> 1. Enable the "clock" regulator in PMIC,
> 2. Add a fixed-clock to fill missing clock phandle reference in S3C RTC.
>
> This allows to enable the S3C RTC and fixes dtbs_check warnings:
>
> arch/arm/boot/dts/exynos4210-trats.dt.yaml: rtc@10070000: clocks: [[5, 346]] is too short
> arch/arm/boot/dts/exynos4210-trats.dt.yaml: rtc@10070000: clock-names: ['rtc'] is too short
>
> Signed-off-by: Krzysztof Kozlowski <[email protected]>

Confirmed, this workaround enables s3c-rtc driver operation on this board.

Tested-by: Marek Szyprowski <[email protected]>

> ---
> arch/arm/boot/dts/exynos4210-trats.dts | 18 ++++++++++++++++++
> 1 file changed, 18 insertions(+)
>
> diff --git a/arch/arm/boot/dts/exynos4210-trats.dts b/arch/arm/boot/dts/exynos4210-trats.dts
> index 5cc96f04a4fa..634f009b622e 100644
> --- a/arch/arm/boot/dts/exynos4210-trats.dts
> +++ b/arch/arm/boot/dts/exynos4210-trats.dts
> @@ -132,6 +132,13 @@
> compatible = "samsung,clock-xusbxti";
> clock-frequency = <24000000>;
> };
> +
> + pmic_ap_clk: pmic-ap-clk {
> + /* Workaround for missing clock on max8997 PMIC */
> + compatible = "fixed-clock";
> + #clock-cells = <0>;
> + clock-frequency = <32768>;
> + };
> };
>
> thermal-zones {
> @@ -444,10 +451,21 @@
> regulator-name = "SAFEOUT2";
> regulator-boot-on;
> };
> +
> + EN32KHZ_AP {
> + regulator-name = "EN32KHZ_AP";
> + regulator-always-on;
> + };
> };
> };
> };
>
> +&rtc {
> + status = "okay";
> + clocks = <&clock CLK_RTC>, <&pmic_ap_clk>;
> + clock-names = "rtc", "rtc_src";
> +};
> +
> &sdhci_0 {
> bus-width = <8>;
> non-removable;

Best regards
--
Marek Szyprowski, PhD
Samsung R&D Institute Poland

2020-08-31 09:52:27

by Marek Szyprowski

Subject: Re: [PATCH 04/33] ARM: dts: exynos: Correct S3C RTC bindings and enable it in Origen

On 30.08.2020 15:51, Krzysztof Kozlowski wrote:
> The S3C RTC requires 32768 Hz clock as input which is provided by PMIC
> (Maxim MAX8997). However there is no clock provided for the PMIC and
> the driver registers the clock as regulator. This is an old driver
> which will not be updated so add a workaround:
> 1. Enable the "clock" regulator in PMIC,
> 2. Add a fixed-clock to fill missing clock phandle reference in S3C RTC.
>
> This allows to enable the S3C RTC and fixes dtbs_check warnings:
>
> arch/arm/boot/dts/exynos4210-origen.dt.yaml: rtc@10070000: clocks: [[5, 346]] is too short
> arch/arm/boot/dts/exynos4210-origen.dt.yaml: rtc@10070000: clock-names: ['rtc'] is too short
>
> Signed-off-by: Krzysztof Kozlowski <[email protected]>

Confirmed, this workaround enables s3c-rtc driver operation on this board.

Tested-by: Marek Szyprowski <[email protected]>

> ---
> arch/arm/boot/dts/exynos4210-origen.dts | 14 ++++++++++++++
> 1 file changed, 14 insertions(+)
>
> diff --git a/arch/arm/boot/dts/exynos4210-origen.dts b/arch/arm/boot/dts/exynos4210-origen.dts
> index 890525b10d22..747221bbb856 100644
> --- a/arch/arm/boot/dts/exynos4210-origen.dts
> +++ b/arch/arm/boot/dts/exynos4210-origen.dts
> @@ -100,6 +100,13 @@
> compatible = "samsung,clock-xusbxti";
> clock-frequency = <24000000>;
> };
> +
> + pmic_ap_clk: pmic-ap-clk {
> + /* Workaround for missing clock on max8997 PMIC */
> + compatible = "fixed-clock";
> + #clock-cells = <0>;
> + clock-frequency = <32768>;
> + };
> };
>
> display-timings {
> @@ -286,6 +293,11 @@
> regulator-boot-on;
> regulator-always-on;
> };
> +
> + EN32KHZ_AP {
> + regulator-name = "EN32KHZ_AP";
> + regulator-always-on;
> + };
> };
> };
> };
> @@ -331,6 +343,8 @@
>
> &rtc {
> status = "okay";
> + clocks = <&clock CLK_RTC>, <&pmic_ap_clk>;
> + clock-names = "rtc", "rtc_src";
> };
>
> &tmu {

Best regards
--
Marek Szyprowski, PhD
Samsung R&D Institute Poland

2020-08-31 10:37:11

by Sylwester Nawrocki

Subject: Re: [PATCH 23/33] ARM: dts: exynos: Remove empty camera pinctrl configuration in Odroid X/U3

Hi,

On 8/31/20 10:38, Krzysztof Kozlowski wrote:
> On Mon, 31 Aug 2020 at 10:31, Marek Szyprowski <[email protected]> wrote:
>> On 30.08.2020 15:51, Krzysztof Kozlowski wrote:
>>> The camera's pinctrl configuration is simply empty and not effective.
>>> Remove it to fix dtbs_check warning:
>>>
>>> arch/arm/boot/dts/exynos4412-odroidx.dt.yaml: camera: pinctrl-0: True is not of type 'array'
>>>
>>> Signed-off-by: Krzysztof Kozlowski <[email protected]>
>>
>> I think that this was intentional to properly enable support for
>> mem-2-mem mode in Exynos4-IS (FIMC), but I'm not sure what are the
>> default values if no pinctrl properties are provided. Sylwester, could
>> you comment?
>
> Indeed it could be intentional... I see now errors:
> [ 33.752203] s5p-fimc-md soc:camera: Failed to get pinctrl: -19
>
> I wonder why getting an empty pinctrl is needed... maybe the driver
> should accept missing pinctrl?

It might have been better to have the pinctrl properties optional, as there
might be boards without the image sensor attached and FIMC could still be
used in memory-to-memory mode, as Marek pointed out. But it seems too late
now to change that. The binding defines the pinctrl properties as required
(Documentation/devicetree/bindings/media/samsung-fimc.txt) and we need to
keep them in dtses.

--
Regards,
Sylwester

2020-08-31 10:43:57

by Krzysztof Kozlowski

Subject: Re: [PATCH 23/33] ARM: dts: exynos: Remove empty camera pinctrl configuration in Odroid X/U3

On Mon, 31 Aug 2020 at 12:35, Sylwester Nawrocki <[email protected]> wrote:
>
> Hi,
>
> On 8/31/20 10:38, Krzysztof Kozlowski wrote:
> > On Mon, 31 Aug 2020 at 10:31, Marek Szyprowski <[email protected]> wrote:
> >> On 30.08.2020 15:51, Krzysztof Kozlowski wrote:
> >>> The camera's pinctrl configuration is simply empty and not effective.
> >>> Remove it to fix dtbs_check warning:
> >>>
> >>> arch/arm/boot/dts/exynos4412-odroidx.dt.yaml: camera: pinctrl-0: True is not of type 'array'
> >>>
> >>> Signed-off-by: Krzysztof Kozlowski <[email protected]>
> >>
> >> I think that this was intentional to properly enable support for
> >> mem-2-mem mode in Exynos4-IS (FIMC), but I'm not sure what are the
> >> default values if no pinctrl properties are provided. Sylwester, could
> >> you comment?
> >
> > Indeed it could be intentional... I see now errors:
> > [ 33.752203] s5p-fimc-md soc:camera: Failed to get pinctrl: -19
> >
> > I wonder why getting an empty pinctrl is needed... maybe the driver
> > should accept missing pinctrl?
>
> It might have been better to have the pinctrl properties optional, as there
> might be boards without the image sensor attached and FIMC could still be
> used in memory-to-memory mode, as Marek pointed out. But it seems too late
> now to change that. The binding defines the pinctrl properties as required
> (Documentation/devicetree/bindings/media/samsung-fimc.txt) and we need to
> keep them in dtses.

You can always make a required property optional and it is not a break
of ABI. The other way around would be a break. Why then not changing
the driver to accept optional pinctrl?

Best regards,
Krzysztof

2020-08-31 13:58:17

by Sylwester Nawrocki

Subject: Re: [PATCH 23/33] ARM: dts: exynos: Remove empty camera pinctrl configuration in Odroid X/U3

On 31.08.2020 12:42, Krzysztof Kozlowski wrote:
> On Mon, 31 Aug 2020 at 12:35, Sylwester Nawrocki <[email protected]> wrote:
>> On 8/31/20 10:38, Krzysztof Kozlowski wrote:
>>> On Mon, 31 Aug 2020 at 10:31, Marek Szyprowski <[email protected]> wrote:
>>>> On 30.08.2020 15:51, Krzysztof Kozlowski wrote:
>>>>> The camera's pinctrl configuration is simply empty and not effective.
>>>>> Remove it to fix dtbs_check warning:
>>>>>
>>>>> arch/arm/boot/dts/exynos4412-odroidx.dt.yaml: camera: pinctrl-0: True is not of type 'array'
>>>>>
>>>>> Signed-off-by: Krzysztof Kozlowski <[email protected]>
>>>>
>>>> I think that this was intentional to properly enable support for
>>>> mem-2-mem mode in Exynos4-IS (FIMC), but I'm not sure what are the
>>>> default values if no pinctrl properties are provided. Sylwester, could
>>>> you comment?
>>>
>>> Indeed it could be intentional... I see now errors:
>>> [ 33.752203] s5p-fimc-md soc:camera: Failed to get pinctrl: -19
>>>
>>> I wonder why getting an empty pinctrl is needed... maybe the driver
>>> should accept missing pinctrl?
>>
>> It might have been better to have the pinctrl properties optional, as there
>> might be boards without the image sensor attached and FIMC could still be
>> used in memory-to-memory mode, as Marek pointed out. But it seems too late
>> now to change that. The binding defines the pinctrl properties as required
>> (Documentation/devicetree/bindings/media/samsung-fimc.txt) and we need to
>> keep them in dtses.
>
> You can always make a required property optional and it is not a break
> of ABI. The other way around would be a break. Why then not changing
> the driver to accept optional pinctrl?

Feel free to send the patch, I would prefer to leave that as is though.
Is it really suddenly a problem to use an empty property? The pinctrl
bindings allows it.

--
Regards,
Sylwester

2020-08-31 14:00:30

by Krzysztof Kozlowski

Subject: Re: [PATCH 23/33] ARM: dts: exynos: Remove empty camera pinctrl configuration in Odroid X/U3

On Mon, 31 Aug 2020 at 15:57, Sylwester Nawrocki <[email protected]> wrote:
>
> On 31.08.2020 12:42, Krzysztof Kozlowski wrote:
> > On Mon, 31 Aug 2020 at 12:35, Sylwester Nawrocki <[email protected]> wrote:
> >> On 8/31/20 10:38, Krzysztof Kozlowski wrote:
> >>> On Mon, 31 Aug 2020 at 10:31, Marek Szyprowski <[email protected]> wrote:
> >>>> On 30.08.2020 15:51, Krzysztof Kozlowski wrote:
> >>>>> The camera's pinctrl configuration is simply empty and not effective.
> >>>>> Remove it to fix dtbs_check warning:
> >>>>>
> >>>>> arch/arm/boot/dts/exynos4412-odroidx.dt.yaml: camera: pinctrl-0: True is not of type 'array'
> >>>>>
> >>>>> Signed-off-by: Krzysztof Kozlowski <[email protected]>
> >>>>
> >>>> I think that this was intentional to properly enable support for
> >>>> mem-2-mem mode in Exynos4-IS (FIMC), but I'm not sure what are the
> >>>> default values if no pinctrl properties are provided. Sylwester, could
> >>>> you comment?
> >>>
> >>> Indeed it could be intentional... I see now errors:
> >>> [ 33.752203] s5p-fimc-md soc:camera: Failed to get pinctrl: -19
> >>>
> >>> I wonder why getting an empty pinctrl is needed... maybe the driver
> >>> should accept missing pinctrl?
> >>
> >> It might have been better to have the pinctrl properties optional, as there
> >> might be boards without the image sensor attached and FIMC could still be
> >> used in memory-to-memory mode, as Marek pointed out. But it seems too late
> >> now to change that. The binding defines the pinctrl properties as required
> >> (Documentation/devicetree/bindings/media/samsung-fimc.txt) and we need to
> >> keep them in dtses.
> >
> > You can always make a required property optional and it is not a break
> > of ABI. The other way around would be a break. Why then not changing
> > the driver to accept optional pinctrl?
>
> Feel free to send the patch, I would prefer to leave that as is though.
> Is it really suddenly a problem to use an empty property? The pinctrl
> bindings allows it.

The bindings scream:
arch/arm/boot/dts/exynos4412-odroidx.dt.yaml: camera: pinctrl-0: True
is not of type 'array'
so either we should model it differently (not as empty array), update
the driver to make it optional or change the bindings/dtschema. I'll
see how to fix it properly.

Best regards,
Krzysztof

2020-09-02 15:40:08

by Krzysztof Kozlowski

Subject: Re: [PATCH 01/33] ARM: dts: exynos: Silence i2c-gpio dtschema warning in Galaxy I9100

On Sun, Aug 30, 2020 at 03:51:28PM +0200, Krzysztof Kozlowski wrote:
> The name of I2C controller over GPIO lines node ends with '-gpio' which
> confuses dtschema:
>
> /arch/arm/boot/dts/exynos4210-i9100.dt.yaml: /: i2c-gpio:
> {'compatible': ['i2c-gpio'], ... 'maxim,over-volt': [[4500]]}} is not of type 'array'
> From schema: lib/python3.6/site-packages/dtschema/schemas/gpio/gpio-consumer.yaml
>
> Add a '-0' suffix to silence it. This pattern on naming i2c-gpio is
> already present in many other dts. No functional change.
>
> Signed-off-by: Krzysztof Kozlowski <[email protected]>
> ---
> arch/arm/boot/dts/exynos4210-i9100.dts | 2 +-
> 1 file changed, 1 insertion(+), 1 deletion(-)

Applied.

Best regards,
Krzysztof

2020-09-02 15:43:00

by Krzysztof Kozlowski

Subject: Re: [PATCH 08/33] ARM: dts: exynos: Add and enable 32 kHz modem clock in Galaxy I9100

On Sun, Aug 30, 2020 at 03:51:35PM +0200, Krzysztof Kozlowski wrote:
> The PMIC has a 32768 Hz clock used by the modem which is implemented by
> driver as a regulator. Add and enable it to be sure modem get's its
> signal.
>
> Signed-off-by: Krzysztof Kozlowski <[email protected]>
> ---
> arch/arm/boot/dts/exynos4210-i9100.dts | 5 +++++
> 1 file changed, 5 insertions(+)

Applied all 1-8. Skipping 9th patch.

Best regards,
Krzysztof

2020-09-02 15:48:49

by Krzysztof Kozlowski

Subject: Re: [PATCH 22/33] ARM: dts: exynos: Align MHL GPIO pin configuration with dtschema on Galaxy I9100

On Sun, Aug 30, 2020 at 03:51:49PM +0200, Krzysztof Kozlowski wrote:
> Align the name of mag-mhl-gpio node to avoid dtschema confusion and
> dtbs_check warning:
>
> arch/arm/boot/dts/exynos4210-i9100.dt.yaml: pinctrl@11000000: mag-mhl-gpio:
> {'samsung,pins': ['gpd0-2'], 'samsung,pin-function': [[3]], 'samsung,pin-pud': [[0]]} is not of type 'array'
> From schema: dtschema/schemas/gpio/gpio-consumer.yaml
>
> Signed-off-by: Krzysztof Kozlowski <[email protected]>
> ---
> arch/arm/boot/dts/exynos4210-i9100.dts | 2 +-
> 1 file changed, 1 insertion(+), 1 deletion(-)

Applied 13-22.

Best regards,
Krzysztof

2020-09-02 15:51:07

by Krzysztof Kozlowski

Subject: Re: [PATCH 24/33] ARM: dts: exynos: Correct compatible of fixed clocks in Midas boards

On Sun, Aug 30, 2020 at 03:51:51PM +0200, Krzysztof Kozlowski wrote:
> The fixed clocks implemented by Samsung clock drivers use only one
> compatible so drop the additional "fixed-clock" to fix dtbs_check
> warnings like:
>
> arch/arm/boot/dts/exynos4412-i9300.dt.yaml: xxti: compatible:0: 'fixed-clock' was expected
> From schema: Documentation/devicetree/bindings/clock/fixed-clock.yaml
> arch/arm/boot/dts/exynos4412-i9300.dt.yaml: xxti: compatible: ['samsung,clock-xxti', 'fixed-clock'] is too long
> arch/arm/boot/dts/exynos4412-i9300.dt.yaml: xxti: compatible: Additional items are not allowed ('fixed-clock' was unexpected)
> arch/arm/boot/dts/exynos4412-i9300.dt.yaml: xxti: '#clock-cells' is a required property
>
> Signed-off-by: Krzysztof Kozlowski <[email protected]>
> ---
> arch/arm/boot/dts/exynos4412-midas.dtsi | 4 ++--
> 1 file changed, 2 insertions(+), 2 deletions(-)

Applied 24-33.

Best regards,
Krzysztof