Amlogic A4 and A5 are application processors designed for smart audio
and IoT applications.
Add the new A4 SoC/board device tree bindings.
Add the new A5 SoC/board device tree bindings.
Add basic support for the A4 based Amlogic AV400 board, which describes
the following components: CPU, GIC, IRQ, Timer and UART. These are capable of
booting up into the serial console.
Add basic support for the A5 based Amlogic AV400 board, which describes
the following components: CPU, GIC, IRQ, Timer and UART. These are capable of
booting up into the serial console.
Signed-off-by: Xianwei Zhao <[email protected]>
---
Xianwei Zhao (4):
dt-bindings: arm: amlogic: add A4 support
dt-bindings: arm: amlogic: add A5 support
arm64: dts: add support for A4 based Amlogic BA400
arm64: dts: add support for A5 based Amlogic AV400
Documentation/devicetree/bindings/arm/amlogic.yaml | 15 ++++
arch/arm64/boot/dts/amlogic/Makefile | 2 +
.../boot/dts/amlogic/amlogic-a4-a113l2-ba400.dts | 43 ++++++++++
arch/arm64/boot/dts/amlogic/amlogic-a4.dtsi | 99 ++++++++++++++++++++++
.../boot/dts/amlogic/amlogic-a5-a113x2-av400.dts | 43 ++++++++++
arch/arm64/boot/dts/amlogic/amlogic-a5.dtsi | 94 ++++++++++++++++++++
6 files changed, 296 insertions(+)
---
base-commit: 7092cfae086f0bc235baca413d0bd904f182670c
change-id: 20240312-basic_dt-15e47525a413
Best regards,
--
Xianwei Zhao <[email protected]>
From: Xianwei Zhao <[email protected]>
Amlogic A5 is an application processor designed for smart audio
and IoT applications.
Add basic support for the A5 based Amlogic AV400 board, which describes
the following components: CPU, GIC, IRQ, Timer and UART.
These are capable of booting up into the serial console.
Signed-off-by: Xianwei Zhao <[email protected]>
---
arch/arm64/boot/dts/amlogic/Makefile | 1 +
.../boot/dts/amlogic/amlogic-a5-a113x2-av400.dts | 43 ++++++++++
arch/arm64/boot/dts/amlogic/amlogic-a5.dtsi | 94 ++++++++++++++++++++++
3 files changed, 138 insertions(+)
diff --git a/arch/arm64/boot/dts/amlogic/Makefile b/arch/arm64/boot/dts/amlogic/Makefile
index 9a50ec11bb8d..154c9efb26e4 100644
--- a/arch/arm64/boot/dts/amlogic/Makefile
+++ b/arch/arm64/boot/dts/amlogic/Makefile
@@ -1,5 +1,6 @@
# SPDX-License-Identifier: GPL-2.0
dtb-$(CONFIG_ARCH_MESON) += amlogic-a4-a113l2-ba400.dtb
+dtb-$(CONFIG_ARCH_MESON) += amlogic-a5-a113x2-av400.dtb
dtb-$(CONFIG_ARCH_MESON) += amlogic-c3-c302x-aw409.dtb
dtb-$(CONFIG_ARCH_MESON) += amlogic-t7-a311d2-an400.dtb
dtb-$(CONFIG_ARCH_MESON) += amlogic-t7-a311d2-khadas-vim4.dtb
diff --git a/arch/arm64/boot/dts/amlogic/amlogic-a5-a113x2-av400.dts b/arch/arm64/boot/dts/amlogic/amlogic-a5-a113x2-av400.dts
new file mode 100644
index 000000000000..e36fae1cf844
--- /dev/null
+++ b/arch/arm64/boot/dts/amlogic/amlogic-a5-a113x2-av400.dts
@@ -0,0 +1,43 @@
+// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
+/*
+ * Copyright (c) 2024 Amlogic, Inc. All rights reserved.
+ */
+
+/dts-v1/;
+
+#include "amlogic-a5.dtsi"
+
+/ {
+ model = "Amlogic A113X2 av400 Development Board";
+ compatible = "amlogic,av400","amlogic,a5";
+ interrupt-parent = <&gic>;
+ #address-cells = <2>;
+ #size-cells = <2>;
+
+ aliases {
+ serial0 = &uart_b;
+ };
+
+ memory@0 {
+ device_type = "memory";
+ reg = <0x0 0x0 0x0 0x40000000>;
+ };
+
+ reserved-memory {
+ #address-cells = <2>;
+ #size-cells = <2>;
+ ranges;
+
+ /* 52 MiB reserved for ARM Trusted Firmware */
+ secmon_reserved:linux,secmon {
+ compatible = "shared-dma-pool";
+ no-map;
+ alignment = <0x0 0x400000>;
+ reg = <0x0 0x05000000 0x0 0x3400000>;
+ };
+ };
+};
+
+&uart_b {
+ status = "okay";
+};
diff --git a/arch/arm64/boot/dts/amlogic/amlogic-a5.dtsi b/arch/arm64/boot/dts/amlogic/amlogic-a5.dtsi
new file mode 100644
index 000000000000..bfb9f13f84ec
--- /dev/null
+++ b/arch/arm64/boot/dts/amlogic/amlogic-a5.dtsi
@@ -0,0 +1,94 @@
+// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
+/*
+ * Copyright (c) 2024 Amlogic, Inc. All rights reserved.
+ */
+
+#include <dt-bindings/interrupt-controller/irq.h>
+#include <dt-bindings/interrupt-controller/arm-gic.h>
+#include <dt-bindings/gpio/gpio.h>
+/ {
+ cpus {
+ #address-cells = <2>;
+ #size-cells = <0>;
+
+ cpu0: cpu@0 {
+ device_type = "cpu";
+ compatible = "arm,cortex-a55";
+ reg = <0x0 0x0>;
+ enable-method = "psci";
+ };
+
+ cpu1: cpu@100 {
+ device_type = "cpu";
+ compatible = "arm,cortex-a55";
+ reg = <0x0 0x100>;
+ enable-method = "psci";
+ };
+
+ cpu2: cpu@200 {
+ device_type = "cpu";
+ compatible = "arm,cortex-a55";
+ reg = <0x0 0x200>;
+ enable-method = "psci";
+ };
+
+ cpu3: cpu@300 {
+ device_type = "cpu";
+ compatible = "arm,cortex-a55";
+ reg = <0x0 0x300>;
+ enable-method = "psci";
+ };
+ };
+
+ timer {
+ compatible = "arm,armv8-timer";
+ interrupts = <GIC_PPI 13 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>,
+ <GIC_PPI 14 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>,
+ <GIC_PPI 11 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>,
+ <GIC_PPI 10 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>;
+ };
+
+ xtal: xtal-clk {
+ compatible = "fixed-clock";
+ clock-frequency = <24000000>;
+ clock-output-names = "xtal";
+ #clock-cells = <0>;
+ };
+
+ soc {
+ compatible = "simple-bus";
+ #address-cells = <2>;
+ #size-cells = <2>;
+ ranges;
+
+ gic: interrupt-controller@fff01000 {
+ compatible = "arm,gic-400";
+ #interrupt-cells = <3>;
+ #address-cells = <0>;
+ interrupt-controller;
+ reg = <0x0 0xfff01000 0 0x1000>,
+ <0x0 0xfff02000 0 0x2000>,
+ <0x0 0xfff04000 0 0x2000>,
+ <0x0 0xfff06000 0 0x2000>;
+ interrupts = <GIC_PPI 9 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_HIGH)>;
+ };
+
+ apb@fe000000 {
+ compatible = "simple-bus";
+ reg = <0x0 0xfe000000 0x0 0x480000>;
+ #address-cells = <2>;
+ #size-cells = <2>;
+ ranges = <0x0 0x0 0x0 0xfe000000 0x0 0x480000>;
+
+ uart_b: serial@7a000 {
+ compatible = "amlogic,meson-s4-uart",
+ "amlogic,meson-ao-uart";
+ reg = <0x0 0x7a000 0x0 0x18>;
+ interrupts = <GIC_SPI 169 IRQ_TYPE_EDGE_RISING>;
+ clocks = <&xtal>, <&xtal>, <&xtal>;
+ clock-names = "xtal", "pclk", "baud";
+ status = "disabled";
+ };
+ };
+ };
+};
--
2.37.1
From: Xianwei Zhao <[email protected]>
Document the new A4 SoC/board device tree bindings.
Amlogic A4 is an application processor designed for smart audio
and IoT applications.
Signed-off-by: Xianwei Zhao <[email protected]>
---
Documentation/devicetree/bindings/arm/amlogic.yaml | 8 ++++++++
1 file changed, 8 insertions(+)
diff --git a/Documentation/devicetree/bindings/arm/amlogic.yaml b/Documentation/devicetree/bindings/arm/amlogic.yaml
index 949537cea6be..9a135fe1c862 100644
--- a/Documentation/devicetree/bindings/arm/amlogic.yaml
+++ b/Documentation/devicetree/bindings/arm/amlogic.yaml
@@ -201,6 +201,14 @@ properties:
- amlogic,ad402
- const: amlogic,a1
+ - description: Boards with the Amlogic A4 A113L2 SoC
+ items:
+ - enum:
+ - amlogic,ba400
+ - amlogic,ba401
+ - amlogic,ba409
+ - const: amlogic,a4
+
- description: Boards with the Amlogic C3 C302X/C308L SoC
items:
- enum:
--
2.37.1
From: Xianwei Zhao <[email protected]>
Document the new A5 SoC/board device tree bindings.
Amlogic A5 is an application processor designed for smart audio
and IoT applications.
Signed-off-by: Xianwei Zhao <[email protected]>
---
Documentation/devicetree/bindings/arm/amlogic.yaml | 7 +++++++
1 file changed, 7 insertions(+)
diff --git a/Documentation/devicetree/bindings/arm/amlogic.yaml b/Documentation/devicetree/bindings/arm/amlogic.yaml
index 9a135fe1c862..6090cb674b65 100644
--- a/Documentation/devicetree/bindings/arm/amlogic.yaml
+++ b/Documentation/devicetree/bindings/arm/amlogic.yaml
@@ -209,6 +209,13 @@ properties:
- amlogic,ba409
- const: amlogic,a4
+ - description: Boards with the Amlogic A5 A113X2 SoC
+ items:
+ - enum:
+ - amlogic,av400
+ - amlogic,av409
+ - const: amlogic,a5
+
- description: Boards with the Amlogic C3 C302X/C308L SoC
items:
- enum:
--
2.37.1
From: Xianwei Zhao <[email protected]>
Amlogic A4 is an application processor designed for smart audio
and IoT applications.
Add basic support for the A4 based Amlogic BA400 board, which describes
the following components: CPU, GIC, IRQ, Timer and UART.
These are capable of booting up into the serial console.
Signed-off-by: Xianwei Zhao <[email protected]>
---
arch/arm64/boot/dts/amlogic/Makefile | 1 +
.../boot/dts/amlogic/amlogic-a4-a113l2-ba400.dts | 43 ++++++++++
arch/arm64/boot/dts/amlogic/amlogic-a4.dtsi | 99 ++++++++++++++++++++++
3 files changed, 143 insertions(+)
diff --git a/arch/arm64/boot/dts/amlogic/Makefile b/arch/arm64/boot/dts/amlogic/Makefile
index 1ab160bf928a..9a50ec11bb8d 100644
--- a/arch/arm64/boot/dts/amlogic/Makefile
+++ b/arch/arm64/boot/dts/amlogic/Makefile
@@ -1,4 +1,5 @@
# SPDX-License-Identifier: GPL-2.0
+dtb-$(CONFIG_ARCH_MESON) += amlogic-a4-a113l2-ba400.dtb
dtb-$(CONFIG_ARCH_MESON) += amlogic-c3-c302x-aw409.dtb
dtb-$(CONFIG_ARCH_MESON) += amlogic-t7-a311d2-an400.dtb
dtb-$(CONFIG_ARCH_MESON) += amlogic-t7-a311d2-khadas-vim4.dtb
diff --git a/arch/arm64/boot/dts/amlogic/amlogic-a4-a113l2-ba400.dts b/arch/arm64/boot/dts/amlogic/amlogic-a4-a113l2-ba400.dts
new file mode 100644
index 000000000000..60f9f23858c6
--- /dev/null
+++ b/arch/arm64/boot/dts/amlogic/amlogic-a4-a113l2-ba400.dts
@@ -0,0 +1,43 @@
+// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
+/*
+ * Copyright (c) 2024 Amlogic, Inc. All rights reserved.
+ */
+
+/dts-v1/;
+
+#include "amlogic-a4.dtsi"
+
+/ {
+ model = "Amlogic A113L2 ba400 Development Board";
+ compatible = "amlogic,ba400","amlogic,a4";
+ interrupt-parent = <&gic>;
+ #address-cells = <2>;
+ #size-cells = <2>;
+
+ aliases {
+ serial0 = &uart_b;
+ };
+
+ memory@0 {
+ device_type = "memory";
+ reg = <0x0 0x0 0x0 0x40000000>;
+ };
+
+ reserved-memory {
+ #address-cells = <2>;
+ #size-cells = <2>;
+ ranges;
+
+ /* 52 MiB reserved for ARM Trusted Firmware */
+ secmon_reserved:linux,secmon {
+ compatible = "shared-dma-pool";
+ no-map;
+ alignment = <0x0 0x400000>;
+ reg = <0x0 0x05000000 0x0 0x3400000>;
+ };
+ };
+};
+
+&uart_b {
+ status = "okay";
+};
diff --git a/arch/arm64/boot/dts/amlogic/amlogic-a4.dtsi b/arch/arm64/boot/dts/amlogic/amlogic-a4.dtsi
new file mode 100644
index 000000000000..7e8745010b52
--- /dev/null
+++ b/arch/arm64/boot/dts/amlogic/amlogic-a4.dtsi
@@ -0,0 +1,99 @@
+// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
+/*
+ * Copyright (c) 2024 Amlogic, Inc. All rights reserved.
+ */
+
+#include <dt-bindings/interrupt-controller/irq.h>
+#include <dt-bindings/interrupt-controller/arm-gic.h>
+#include <dt-bindings/gpio/gpio.h>
+/ {
+ cpus {
+ #address-cells = <2>;
+ #size-cells = <0>;
+
+ cpu0: cpu@0 {
+ device_type = "cpu";
+ compatible = "arm,cortex-a53";
+ reg = <0x0 0x0>;
+ enable-method = "psci";
+ };
+
+ cpu1: cpu@1 {
+ device_type = "cpu";
+ compatible = "arm,cortex-a53";
+ reg = <0x0 0x1>;
+ enable-method = "psci";
+ };
+
+ cpu2: cpu@2 {
+ device_type = "cpu";
+ compatible = "arm,cortex-a53";
+ reg = <0x0 0x2>;
+ enable-method = "psci";
+ };
+
+ cpu3: cpu@3 {
+ device_type = "cpu";
+ compatible = "arm,cortex-a53";
+ reg = <0x0 0x3>;
+ enable-method = "psci";
+ };
+ };
+
+ timer {
+ compatible = "arm,armv8-timer";
+ interrupts = <GIC_PPI 13 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>,
+ <GIC_PPI 14 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>,
+ <GIC_PPI 11 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>,
+ <GIC_PPI 10 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>;
+ };
+
+ psci {
+ compatible = "arm,psci-0.2";
+ method = "smc";
+ };
+
+ xtal: xtal-clk {
+ compatible = "fixed-clock";
+ clock-frequency = <24000000>;
+ clock-output-names = "xtal";
+ #clock-cells = <0>;
+ };
+
+ soc {
+ compatible = "simple-bus";
+ #address-cells = <2>;
+ #size-cells = <2>;
+ ranges;
+
+ gic: interrupt-controller@fff01000 {
+ compatible = "arm,gic-400";
+ #interrupt-cells = <3>;
+ #address-cells = <0>;
+ interrupt-controller;
+ reg = <0x0 0xfff01000 0 0x1000>,
+ <0x0 0xfff02000 0 0x2000>,
+ <0x0 0xfff04000 0 0x2000>,
+ <0x0 0xfff06000 0 0x2000>;
+ interrupts = <GIC_PPI 9 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_HIGH)>;
+ };
+
+ apb@fe000000 {
+ compatible = "simple-bus";
+ reg = <0x0 0xfe000000 0x0 0x480000>;
+ #address-cells = <2>;
+ #size-cells = <2>;
+ ranges = <0x0 0x0 0x0 0xfe000000 0x0 0x480000>;
+
+ uart_b: serial@7a000 {
+ compatible = "amlogic,meson-s4-uart",
+ "amlogic,meson-ao-uart";
+ reg = <0x0 0x7a000 0x0 0x18>;
+ interrupts = <GIC_SPI 169 IRQ_TYPE_EDGE_RISING>;
+ clocks = <&xtal>, <&xtal>, <&xtal>;
+ clock-names = "xtal", "pclk", "baud";
+ status = "disabled";
+ };
+ };
+ };
+};
--
2.37.1
On Tue 12 Mar 2024 at 17:18, Xianwei Zhao via B4 Relay <[email protected]> wrote:
> From: Xianwei Zhao <[email protected]>
>
> Amlogic A4 is an application processor designed for smart audio
> and IoT applications.
>
> Add basic support for the A4 based Amlogic BA400 board, which describes
> the following components: CPU, GIC, IRQ, Timer and UART.
> These are capable of booting up into the serial console.
>
> Signed-off-by: Xianwei Zhao <[email protected]>
> ---
> arch/arm64/boot/dts/amlogic/Makefile | 1 +
> .../boot/dts/amlogic/amlogic-a4-a113l2-ba400.dts | 43 ++++++++++
> arch/arm64/boot/dts/amlogic/amlogic-a4.dtsi | 99 ++++++++++++++++++++++
> 3 files changed, 143 insertions(+)
>
> diff --git a/arch/arm64/boot/dts/amlogic/Makefile b/arch/arm64/boot/dts/amlogic/Makefile
> index 1ab160bf928a..9a50ec11bb8d 100644
> --- a/arch/arm64/boot/dts/amlogic/Makefile
> +++ b/arch/arm64/boot/dts/amlogic/Makefile
> @@ -1,4 +1,5 @@
> # SPDX-License-Identifier: GPL-2.0
> +dtb-$(CONFIG_ARCH_MESON) += amlogic-a4-a113l2-ba400.dtb
> dtb-$(CONFIG_ARCH_MESON) += amlogic-c3-c302x-aw409.dtb
> dtb-$(CONFIG_ARCH_MESON) += amlogic-t7-a311d2-an400.dtb
> dtb-$(CONFIG_ARCH_MESON) += amlogic-t7-a311d2-khadas-vim4.dtb
> diff --git a/arch/arm64/boot/dts/amlogic/amlogic-a4-a113l2-ba400.dts b/arch/arm64/boot/dts/amlogic/amlogic-a4-a113l2-ba400.dts
> new file mode 100644
> index 000000000000..60f9f23858c6
> --- /dev/null
> +++ b/arch/arm64/boot/dts/amlogic/amlogic-a4-a113l2-ba400.dts
> @@ -0,0 +1,43 @@
> +// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
> +/*
> + * Copyright (c) 2024 Amlogic, Inc. All rights reserved.
> + */
> +
> +/dts-v1/;
> +
> +#include "amlogic-a4.dtsi"
Could you describe how the a4 and a5 differs from each other ?
The description given in the commit description is the same.
Beside the a53 vs a55, I'm not seeing much of a difference.
Admittedly, there is not much yet but I wonder if a4 and a5 should have
a common dtsi.
> +
> +/ {
> + model = "Amlogic A113L2 ba400 Development Board";
> + compatible = "amlogic,ba400","amlogic,a4";
> + interrupt-parent = <&gic>;
> + #address-cells = <2>;
> + #size-cells = <2>;
> +
> + aliases {
> + serial0 = &uart_b;
> + };
> +
> + memory@0 {
> + device_type = "memory";
> + reg = <0x0 0x0 0x0 0x40000000>;
> + };
> +
> + reserved-memory {
> + #address-cells = <2>;
> + #size-cells = <2>;
> + ranges;
> +
> + /* 52 MiB reserved for ARM Trusted Firmware */
That's a lot of memory to blindly reserve.
Any chance we can stop doing that and have u-boot amend reserved memory
zone based on the actual needs of the device ?
> + secmon_reserved:linux,secmon {
> + compatible = "shared-dma-pool";
> + no-map;
> + alignment = <0x0 0x400000>;
> + reg = <0x0 0x05000000 0x0 0x3400000>;
> + };
> + };
> +};
> +
> +&uart_b {
> + status = "okay";
> +};
> diff --git a/arch/arm64/boot/dts/amlogic/amlogic-a4.dtsi b/arch/arm64/boot/dts/amlogic/amlogic-a4.dtsi
> new file mode 100644
> index 000000000000..7e8745010b52
> --- /dev/null
> +++ b/arch/arm64/boot/dts/amlogic/amlogic-a4.dtsi
> @@ -0,0 +1,99 @@
> +// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
> +/*
> + * Copyright (c) 2024 Amlogic, Inc. All rights reserved.
> + */
> +
> +#include <dt-bindings/interrupt-controller/irq.h>
> +#include <dt-bindings/interrupt-controller/arm-gic.h>
> +#include <dt-bindings/gpio/gpio.h>
> +/ {
> + cpus {
> + #address-cells = <2>;
> + #size-cells = <0>;
> +
> + cpu0: cpu@0 {
> + device_type = "cpu";
> + compatible = "arm,cortex-a53";
> + reg = <0x0 0x0>;
> + enable-method = "psci";
> + };
> +
> + cpu1: cpu@1 {
> + device_type = "cpu";
> + compatible = "arm,cortex-a53";
> + reg = <0x0 0x1>;
> + enable-method = "psci";
> + };
> +
> + cpu2: cpu@2 {
> + device_type = "cpu";
> + compatible = "arm,cortex-a53";
> + reg = <0x0 0x2>;
> + enable-method = "psci";
> + };
> +
> + cpu3: cpu@3 {
> + device_type = "cpu";
> + compatible = "arm,cortex-a53";
> + reg = <0x0 0x3>;
> + enable-method = "psci";
> + };
> + };
> +
> + timer {
> + compatible = "arm,armv8-timer";
> + interrupts = <GIC_PPI 13 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>,
> + <GIC_PPI 14 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>,
> + <GIC_PPI 11 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>,
> + <GIC_PPI 10 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>;
> + };
> +
> + psci {
> + compatible = "arm,psci-0.2";
Really ? still on the that old version ?
> + method = "smc";
> + };
> +
> + xtal: xtal-clk {
> + compatible = "fixed-clock";
> + clock-frequency = <24000000>;
> + clock-output-names = "xtal";
> + #clock-cells = <0>;
> + };
> +
> + soc {
> + compatible = "simple-bus";
> + #address-cells = <2>;
> + #size-cells = <2>;
> + ranges;
> +
> + gic: interrupt-controller@fff01000 {
> + compatible = "arm,gic-400";
> + #interrupt-cells = <3>;
> + #address-cells = <0>;
> + interrupt-controller;
> + reg = <0x0 0xfff01000 0 0x1000>,
> + <0x0 0xfff02000 0 0x2000>,
> + <0x0 0xfff04000 0 0x2000>,
> + <0x0 0xfff06000 0 0x2000>;
> + interrupts = <GIC_PPI 9 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_HIGH)>;
> + };
> +
> + apb@fe000000 {
> + compatible = "simple-bus";
> + reg = <0x0 0xfe000000 0x0 0x480000>;
> + #address-cells = <2>;
> + #size-cells = <2>;
> + ranges = <0x0 0x0 0x0 0xfe000000 0x0 0x480000>;
> +
> + uart_b: serial@7a000 {
> + compatible = "amlogic,meson-s4-uart",
> + "amlogic,meson-ao-uart";
> + reg = <0x0 0x7a000 0x0 0x18>;
> + interrupts = <GIC_SPI 169 IRQ_TYPE_EDGE_RISING>;
> + clocks = <&xtal>, <&xtal>, <&xtal>;
> + clock-names = "xtal", "pclk", "baud";
> + status = "disabled";
> + };
> + };
> + };
> +};
--
Jerome
On 12/03/2024 10:18, Xianwei Zhao via B4 Relay wrote:
> From: Xianwei Zhao <[email protected]>
>
> Document the new A4 SoC/board device tree bindings.
>
> Amlogic A4 is an application processor designed for smart audio
> and IoT applications.
Acked-by: Krzysztof Kozlowski <[email protected]>
Best regards,
Krzysztof
On 12/03/2024 10:18, Xianwei Zhao via B4 Relay wrote:
> From: Xianwei Zhao <[email protected]>
>
> Amlogic A4 is an application processor designed for smart audio
> and IoT applications.
>
> Add basic support for the A4 based Amlogic BA400 board, which describes
> the following components: CPU, GIC, IRQ, Timer and UART.
> These are capable of booting up into the serial console.
>
> Signed-off-by: Xianwei Zhao <[email protected]>
> ---
> arch/arm64/boot/dts/amlogic/Makefile | 1 +
> .../boot/dts/amlogic/amlogic-a4-a113l2-ba400.dts | 43 ++++++++++
> arch/arm64/boot/dts/amlogic/amlogic-a4.dtsi | 99 ++++++++++++++++++++++
> 3 files changed, 143 insertions(+)
>
> diff --git a/arch/arm64/boot/dts/amlogic/Makefile b/arch/arm64/boot/dts/amlogic/Makefile
> index 1ab160bf928a..9a50ec11bb8d 100644
> --- a/arch/arm64/boot/dts/amlogic/Makefile
> +++ b/arch/arm64/boot/dts/amlogic/Makefile
> @@ -1,4 +1,5 @@
> # SPDX-License-Identifier: GPL-2.0
> +dtb-$(CONFIG_ARCH_MESON) += amlogic-a4-a113l2-ba400.dtb
> dtb-$(CONFIG_ARCH_MESON) += amlogic-c3-c302x-aw409.dtb
> dtb-$(CONFIG_ARCH_MESON) += amlogic-t7-a311d2-an400.dtb
> dtb-$(CONFIG_ARCH_MESON) += amlogic-t7-a311d2-khadas-vim4.dtb
> diff --git a/arch/arm64/boot/dts/amlogic/amlogic-a4-a113l2-ba400.dts b/arch/arm64/boot/dts/amlogic/amlogic-a4-a113l2-ba400.dts
> new file mode 100644
> index 000000000000..60f9f23858c6
> --- /dev/null
> +++ b/arch/arm64/boot/dts/amlogic/amlogic-a4-a113l2-ba400.dts
> @@ -0,0 +1,43 @@
> +// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
> +/*
> + * Copyright (c) 2024 Amlogic, Inc. All rights reserved.
> + */
> +
> +/dts-v1/;
> +
> +#include "amlogic-a4.dtsi"
> +
> +/ {
> + model = "Amlogic A113L2 ba400 Development Board";
> + compatible = "amlogic,ba400","amlogic,a4";
> + interrupt-parent = <&gic>;
> + #address-cells = <2>;
> + #size-cells = <2>;
> +
> + aliases {
> + serial0 = &uart_b;
> + };
> +
> + memory@0 {
> + device_type = "memory";
> + reg = <0x0 0x0 0x0 0x40000000>;
> + };
> +
> + reserved-memory {
> + #address-cells = <2>;
> + #size-cells = <2>;
> + ranges;
> +
> + /* 52 MiB reserved for ARM Trusted Firmware */
> + secmon_reserved:linux,secmon {
Missing space after:, unusual format of node name. Are you sure this
fits DTS coding convention?
> + compatible = "shared-dma-pool";
> + no-map;
> + alignment = <0x0 0x400000>;
> + reg = <0x0 0x05000000 0x0 0x3400000>;
> + };
> + };
> +};
> +
> +&uart_b {
> + status = "okay";
> +};
> diff --git a/arch/arm64/boot/dts/amlogic/amlogic-a4.dtsi b/arch/arm64/boot/dts/amlogic/amlogic-a4.dtsi
> new file mode 100644
> index 000000000000..7e8745010b52
> --- /dev/null
> +++ b/arch/arm64/boot/dts/amlogic/amlogic-a4.dtsi
> @@ -0,0 +1,99 @@
> +// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
> +/*
> + * Copyright (c) 2024 Amlogic, Inc. All rights reserved.
> + */
> +
> +#include <dt-bindings/interrupt-controller/irq.h>
> +#include <dt-bindings/interrupt-controller/arm-gic.h>
> +#include <dt-bindings/gpio/gpio.h>
> +/ {
> + cpus {
> + #address-cells = <2>;
> + #size-cells = <0>;
> +
> + cpu0: cpu@0 {
> + device_type = "cpu";
> + compatible = "arm,cortex-a53";
> + reg = <0x0 0x0>;
> + enable-method = "psci";
> + };
> +
> + cpu1: cpu@1 {
> + device_type = "cpu";
> + compatible = "arm,cortex-a53";
> + reg = <0x0 0x1>;
> + enable-method = "psci";
> + };
> +
> + cpu2: cpu@2 {
> + device_type = "cpu";
> + compatible = "arm,cortex-a53";
> + reg = <0x0 0x2>;
> + enable-method = "psci";
> + };
> +
> + cpu3: cpu@3 {
> + device_type = "cpu";
> + compatible = "arm,cortex-a53";
> + reg = <0x0 0x3>;
> + enable-method = "psci";
> + };
> + };
> +
> + timer {
> + compatible = "arm,armv8-timer";
> + interrupts = <GIC_PPI 13 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>,
> + <GIC_PPI 14 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>,
> + <GIC_PPI 11 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>,
> + <GIC_PPI 10 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>;
> + };
> +
> + psci {
> + compatible = "arm,psci-0.2";
> + method = "smc";
> + };
> +
> + xtal: xtal-clk {
> + compatible = "fixed-clock";
> + clock-frequency = <24000000>;
> + clock-output-names = "xtal";
> + #clock-cells = <0>;
> + };
> +
> + soc {
> + compatible = "simple-bus";
> + #address-cells = <2>;
> + #size-cells = <2>;
> + ranges;
> +
> + gic: interrupt-controller@fff01000 {
> + compatible = "arm,gic-400";
> + #interrupt-cells = <3>;
> + #address-cells = <0>;
> + interrupt-controller;
> + reg = <0x0 0xfff01000 0 0x1000>,
> + <0x0 0xfff02000 0 0x2000>,
> + <0x0 0xfff04000 0 0x2000>,
> + <0x0 0xfff06000 0 0x2000>;
Odd order of properties... reg is usually the second.
Best regards,
Krzysztof
On 12/03/2024 10:18, Xianwei Zhao via B4 Relay wrote:
> From: Xianwei Zhao <[email protected]>
>
> Document the new A5 SoC/board device tree bindings.
>
> Amlogic A5 is an application processor designed for smart audio
> and IoT applications.
>
> Signed-off-by: Xianwei Zhao <[email protected]>
> ---
> Documentation/devicetree/bindings/arm/amlogic.yaml | 7 +++++++
> 1 file changed, 7 insertions(+)
>
Acked-by: Krzysztof Kozlowski <[email protected]>
Best regards,
Krzysztof
On Tue, Mar 12, 2024 at 10:19 AM Xianwei Zhao via B4 Relay
<[email protected]> wrote:
[...]
> + - description: Boards with the Amlogic A4 A113L2 SoC
> + items:
> + - enum:
> + - amlogic,ba400
> + - amlogic,ba401
> + - amlogic,ba409
Within this series you are only sending a .dts with "amlogic,ba400"
What about the other two compatible strings?
On Tue, Mar 12, 2024 at 10:19 AM Xianwei Zhao via B4 Relay
<[email protected]> wrote:
[...]
> + - description: Boards with the Amlogic A5 A113X2 SoC
> + items:
> + - enum:
> + - amlogic,av400
> + - amlogic,av409
Similar question as for the A4 SoC: this series does not have a .dts
for "amlogic,av409" - what's the plan with that board?
On Tue, Mar 12, 2024 at 10:19 AM Xianwei Zhao via B4 Relay
<[email protected]> wrote:
[...]
> + apb@fe000000 {
Node names need to be generic - since this is a bug it needs to be:
bus@fe000000 {
Or if you want to make it clear how this bus is called then you can use:
apb: bus@fe000000 {
The same comment applies to the amlogic-a5.dtsi patch (4/4).
And while here, I fully agree with Jerome: having a bit more details
would be great so we can judge on whether a common .dtsi makes sense.
For this it would be helpful to know how many IP blocks those two SoCs
have in common and how many are different.
Best regards,
Martin
Hi Martin,
Thanks for your review.
On 2024/3/13 01:20, Martin Blumenstingl wrote:
> [ EXTERNAL EMAIL ]
>
> On Tue, Mar 12, 2024 at 10:19 AM Xianwei Zhao via B4 Relay
> <[email protected]> wrote:
> [...]
>> + - description: Boards with the Amlogic A4 A113L2 SoC
>> + items:
>> + - enum:
>> + - amlogic,ba400
>> + - amlogic,ba401
>> + - amlogic,ba409
> Within this series you are only sending a .dts with "amlogic,ba400"
> What about the other two compatible strings?
I will delete other two compatible strings. I re-add them when I submit
BA401 and BA409 device trees.
Hi Martin,
Thanks for your reply.
On 2024/3/13 01:21, Martin Blumenstingl wrote:
> [ EXTERNAL EMAIL ]
>
> On Tue, Mar 12, 2024 at 10:19 AM Xianwei Zhao via B4 Relay
> <[email protected]> wrote:
> [...]
>> + - description: Boards with the Amlogic A5 A113X2 SoC
>> + items:
>> + - enum:
>> + - amlogic,av400
>> + - amlogic,av409
> Similar question as for the A4 SoC: this series does not have a .dts
> for "amlogic,av409" - what's the plan with that board?
I will delete this strings. I re-add it when I submit AV409 device tree.
Hello Xianwei,
On Tue, Mar 12, 2024 at 05:18:59PM +0800, Xianwei Zhao via B4 Relay wrote:
> From: Xianwei Zhao <[email protected]>
>
> Amlogic A4 is an application processor designed for smart audio
> and IoT applications.
>
> Add basic support for the A4 based Amlogic BA400 board, which describes
> the following components: CPU, GIC, IRQ, Timer and UART.
> These are capable of booting up into the serial console.
>
> Signed-off-by: Xianwei Zhao <[email protected]>
> ---
> arch/arm64/boot/dts/amlogic/Makefile | 1 +
> .../boot/dts/amlogic/amlogic-a4-a113l2-ba400.dts | 43 ++++++++++
> arch/arm64/boot/dts/amlogic/amlogic-a4.dtsi | 99 ++++++++++++++++++++++
> 3 files changed, 143 insertions(+)
>
> diff --git a/arch/arm64/boot/dts/amlogic/Makefile b/arch/arm64/boot/dts/amlogic/Makefile
> index 1ab160bf928a..9a50ec11bb8d 100644
> --- a/arch/arm64/boot/dts/amlogic/Makefile
> +++ b/arch/arm64/boot/dts/amlogic/Makefile
> @@ -1,4 +1,5 @@
> # SPDX-License-Identifier: GPL-2.0
> +dtb-$(CONFIG_ARCH_MESON) += amlogic-a4-a113l2-ba400.dtb
> dtb-$(CONFIG_ARCH_MESON) += amlogic-c3-c302x-aw409.dtb
> dtb-$(CONFIG_ARCH_MESON) += amlogic-t7-a311d2-an400.dtb
> dtb-$(CONFIG_ARCH_MESON) += amlogic-t7-a311d2-khadas-vim4.dtb
> diff --git a/arch/arm64/boot/dts/amlogic/amlogic-a4-a113l2-ba400.dts b/arch/arm64/boot/dts/amlogic/amlogic-a4-a113l2-ba400.dts
> new file mode 100644
> index 000000000000..60f9f23858c6
> --- /dev/null
> +++ b/arch/arm64/boot/dts/amlogic/amlogic-a4-a113l2-ba400.dts
> @@ -0,0 +1,43 @@
> +// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
> +/*
> + * Copyright (c) 2024 Amlogic, Inc. All rights reserved.
> + */
> +
> +/dts-v1/;
> +
> +#include "amlogic-a4.dtsi"
> +
> +/ {
> + model = "Amlogic A113L2 ba400 Development Board";
> + compatible = "amlogic,ba400","amlogic,a4";
> + interrupt-parent = <&gic>;
> + #address-cells = <2>;
> + #size-cells = <2>;
> +
> + aliases {
> + serial0 = &uart_b;
> + };
> +
> + memory@0 {
> + device_type = "memory";
> + reg = <0x0 0x0 0x0 0x40000000>;
> + };
> +
> + reserved-memory {
> + #address-cells = <2>;
> + #size-cells = <2>;
> + ranges;
> +
> + /* 52 MiB reserved for ARM Trusted Firmware */
> + secmon_reserved:linux,secmon {
> + compatible = "shared-dma-pool";
> + no-map;
> + alignment = <0x0 0x400000>;
> + reg = <0x0 0x05000000 0x0 0x3400000>;
> + };
> + };
> +};
> +
> +&uart_b {
> + status = "okay";
> +};
> diff --git a/arch/arm64/boot/dts/amlogic/amlogic-a4.dtsi b/arch/arm64/boot/dts/amlogic/amlogic-a4.dtsi
> new file mode 100644
> index 000000000000..7e8745010b52
> --- /dev/null
> +++ b/arch/arm64/boot/dts/amlogic/amlogic-a4.dtsi
> @@ -0,0 +1,99 @@
> +// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
> +/*
> + * Copyright (c) 2024 Amlogic, Inc. All rights reserved.
> + */
> +
> +#include <dt-bindings/interrupt-controller/irq.h>
> +#include <dt-bindings/interrupt-controller/arm-gic.h>
> +#include <dt-bindings/gpio/gpio.h>
> +/ {
> + cpus {
> + #address-cells = <2>;
> + #size-cells = <0>;
> +
> + cpu0: cpu@0 {
> + device_type = "cpu";
> + compatible = "arm,cortex-a53";
> + reg = <0x0 0x0>;
> + enable-method = "psci";
> + };
> +
> + cpu1: cpu@1 {
> + device_type = "cpu";
> + compatible = "arm,cortex-a53";
> + reg = <0x0 0x1>;
> + enable-method = "psci";
> + };
> +
> + cpu2: cpu@2 {
> + device_type = "cpu";
> + compatible = "arm,cortex-a53";
> + reg = <0x0 0x2>;
> + enable-method = "psci";
> + };
> +
> + cpu3: cpu@3 {
> + device_type = "cpu";
> + compatible = "arm,cortex-a53";
> + reg = <0x0 0x3>;
> + enable-method = "psci";
> + };
> + };
> +
> + timer {
> + compatible = "arm,armv8-timer";
> + interrupts = <GIC_PPI 13 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>,
> + <GIC_PPI 14 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>,
> + <GIC_PPI 11 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>,
> + <GIC_PPI 10 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>;
> + };
> +
> + psci {
> + compatible = "arm,psci-0.2";
> + method = "smc";
> + };
> +
> + xtal: xtal-clk {
> + compatible = "fixed-clock";
> + clock-frequency = <24000000>;
> + clock-output-names = "xtal";
> + #clock-cells = <0>;
> + };
> +
> + soc {
> + compatible = "simple-bus";
> + #address-cells = <2>;
> + #size-cells = <2>;
> + ranges;
> +
> + gic: interrupt-controller@fff01000 {
> + compatible = "arm,gic-400";
> + #interrupt-cells = <3>;
> + #address-cells = <0>;
> + interrupt-controller;
> + reg = <0x0 0xfff01000 0 0x1000>,
> + <0x0 0xfff02000 0 0x2000>,
> + <0x0 0xfff04000 0 0x2000>,
> + <0x0 0xfff06000 0 0x2000>;
> + interrupts = <GIC_PPI 9 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_HIGH)>;
> + };
> +
> + apb@fe000000 {
> + compatible = "simple-bus";
> + reg = <0x0 0xfe000000 0x0 0x480000>;
> + #address-cells = <2>;
> + #size-cells = <2>;
> + ranges = <0x0 0x0 0x0 0xfe000000 0x0 0x480000>;
> +
> + uart_b: serial@7a000 {
> + compatible = "amlogic,meson-s4-uart",
If I'm not wrong, you need to create dt-binding alias for meson-a4-uart
and use it as 3rd compatible string.
> + "amlogic,meson-ao-uart";
> + reg = <0x0 0x7a000 0x0 0x18>;
> + interrupts = <GIC_SPI 169 IRQ_TYPE_EDGE_RISING>;
> + clocks = <&xtal>, <&xtal>, <&xtal>;
> + clock-names = "xtal", "pclk", "baud";
> + status = "disabled";
> + };
> + };
> + };
> +};
>
> --
> 2.37.1
>
>
> _______________________________________________
> linux-amlogic mailing list
> [email protected]
> http://lists.infradead.org/mailman/listinfo/linux-amlogic
--
Thank you,
Dmitry
Hi Krzysztof,
Thanks for your reivew.
On 2024/3/12 19:07, Krzysztof Kozlowski wrote:
> [ EXTERNAL EMAIL ]
>
> On 12/03/2024 10:18, Xianwei Zhao via B4 Relay wrote:
>> From: Xianwei Zhao <[email protected]>
>>
>> Amlogic A4 is an application processor designed for smart audio
>> and IoT applications.
>>
>> Add basic support for the A4 based Amlogic BA400 board, which describes
>> the following components: CPU, GIC, IRQ, Timer and UART.
>> These are capable of booting up into the serial console.
>>
>> Signed-off-by: Xianwei Zhao <[email protected]>
>> ---
>> arch/arm64/boot/dts/amlogic/Makefile | 1 +
>> .../boot/dts/amlogic/amlogic-a4-a113l2-ba400.dts | 43 ++++++++++
>> arch/arm64/boot/dts/amlogic/amlogic-a4.dtsi | 99 ++++++++++++++++++++++
>> 3 files changed, 143 insertions(+)
>>
>> diff --git a/arch/arm64/boot/dts/amlogic/Makefile b/arch/arm64/boot/dts/amlogic/Makefile
>> index 1ab160bf928a..9a50ec11bb8d 100644
>> --- a/arch/arm64/boot/dts/amlogic/Makefile
>> +++ b/arch/arm64/boot/dts/amlogic/Makefile
>> @@ -1,4 +1,5 @@
>> # SPDX-License-Identifier: GPL-2.0
>> +dtb-$(CONFIG_ARCH_MESON) += amlogic-a4-a113l2-ba400.dtb
>> dtb-$(CONFIG_ARCH_MESON) += amlogic-c3-c302x-aw409.dtb
>> dtb-$(CONFIG_ARCH_MESON) += amlogic-t7-a311d2-an400.dtb
>> dtb-$(CONFIG_ARCH_MESON) += amlogic-t7-a311d2-khadas-vim4.dtb
>> diff --git a/arch/arm64/boot/dts/amlogic/amlogic-a4-a113l2-ba400.dts b/arch/arm64/boot/dts/amlogic/amlogic-a4-a113l2-ba400.dts
>> new file mode 100644
>> index 000000000000..60f9f23858c6
>> --- /dev/null
>> +++ b/arch/arm64/boot/dts/amlogic/amlogic-a4-a113l2-ba400.dts
>> @@ -0,0 +1,43 @@
>> +// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
>> +/*
>> + * Copyright (c) 2024 Amlogic, Inc. All rights reserved.
>> + */
>> +
>> +/dts-v1/;
>> +
>> +#include "amlogic-a4.dtsi"
>> +
>> +/ {
>> + model = "Amlogic A113L2 ba400 Development Board";
>> + compatible = "amlogic,ba400","amlogic,a4";
>> + interrupt-parent = <&gic>;
>> + #address-cells = <2>;
>> + #size-cells = <2>;
>> +
>> + aliases {
>> + serial0 = &uart_b;
>> + };
>> +
>> + memory@0 {
>> + device_type = "memory";
>> + reg = <0x0 0x0 0x0 0x40000000>;
>> + };
>> +
>> + reserved-memory {
>> + #address-cells = <2>;
>> + #size-cells = <2>;
>> + ranges;
>> +
>> + /* 52 MiB reserved for ARM Trusted Firmware */
>> + secmon_reserved:linux,secmon {
>
> Missing space after:, unusual format of node name. Are you sure this
> fits DTS coding convention?
>
Will fix it.
>> + compatible = "shared-dma-pool";
>> + no-map;
>> + alignment = <0x0 0x400000>;
>> + reg = <0x0 0x05000000 0x0 0x3400000>;
>> + };
>> + };
>> +};
>> +
>> +&uart_b {
>> + status = "okay";
>> +};
>> diff --git a/arch/arm64/boot/dts/amlogic/amlogic-a4.dtsi b/arch/arm64/boot/dts/amlogic/amlogic-a4.dtsi
>> new file mode 100644
>> index 000000000000..7e8745010b52
>> --- /dev/null
>> +++ b/arch/arm64/boot/dts/amlogic/amlogic-a4.dtsi
>> @@ -0,0 +1,99 @@
>> +// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
>> +/*
>> + * Copyright (c) 2024 Amlogic, Inc. All rights reserved.
>> + */
>> +
>> +#include <dt-bindings/interrupt-controller/irq.h>
>> +#include <dt-bindings/interrupt-controller/arm-gic.h>
>> +#include <dt-bindings/gpio/gpio.h>
>> +/ {
>> + cpus {
>> + #address-cells = <2>;
>> + #size-cells = <0>;
>> +
>> + cpu0: cpu@0 {
>> + device_type = "cpu";
>> + compatible = "arm,cortex-a53";
>> + reg = <0x0 0x0>;
>> + enable-method = "psci";
>> + };
>> +
>> + cpu1: cpu@1 {
>> + device_type = "cpu";
>> + compatible = "arm,cortex-a53";
>> + reg = <0x0 0x1>;
>> + enable-method = "psci";
>> + };
>> +
>> + cpu2: cpu@2 {
>> + device_type = "cpu";
>> + compatible = "arm,cortex-a53";
>> + reg = <0x0 0x2>;
>> + enable-method = "psci";
>> + };
>> +
>> + cpu3: cpu@3 {
>> + device_type = "cpu";
>> + compatible = "arm,cortex-a53";
>> + reg = <0x0 0x3>;
>> + enable-method = "psci";
>> + };
>> + };
>> +
>> + timer {
>> + compatible = "arm,armv8-timer";
>> + interrupts = <GIC_PPI 13 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>,
>> + <GIC_PPI 14 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>,
>> + <GIC_PPI 11 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>,
>> + <GIC_PPI 10 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>;
>> + };
>> +
>> + psci {
>> + compatible = "arm,psci-0.2";
>> + method = "smc";
>> + };
>> +
>> + xtal: xtal-clk {
>> + compatible = "fixed-clock";
>> + clock-frequency = <24000000>;
>> + clock-output-names = "xtal";
>> + #clock-cells = <0>;
>> + };
>> +
>> + soc {
>> + compatible = "simple-bus";
>> + #address-cells = <2>;
>> + #size-cells = <2>;
>> + ranges;
>> +
>> + gic: interrupt-controller@fff01000 {
>> + compatible = "arm,gic-400";
>> + #interrupt-cells = <3>;
>> + #address-cells = <0>;
>> + interrupt-controller;
>> + reg = <0x0 0xfff01000 0 0x1000>,
>> + <0x0 0xfff02000 0 0x2000>,
>> + <0x0 0xfff04000 0 0x2000>,
>> + <0x0 0xfff06000 0 0x2000>;
>
> Odd order of properties... reg is usually the second.
Yes. Will fix it.
>
>
>
> Best regards,
> Krzysztof
>
Hi Martin,
Thanks for your review.
On 2024/3/13 01:29, Martin Blumenstingl wrote:
> [ EXTERNAL EMAIL ]
>
> On Tue, Mar 12, 2024 at 10:19 AM Xianwei Zhao via B4 Relay
> <[email protected]> wrote:
> [...]
>> + apb@fe000000 {
> Node names need to be generic - since this is a bug it needs to be:
> bus@fe000000 {
> Or if you want to make it clear how this bus is called then you can use:
> apb: bus@fe000000 {
>
Will fix it.
> The same comment applies to the amlogic-a5.dtsi patch (4/4).
> And while here, I fully agree with Jerome: having a bit more details
> would be great so we can judge on whether a common .dtsi makes sense.
> For this it would be helpful to know how many IP blocks those two SoCs
> have in common and how many are different.
>
They are mostly the same, but the follow-on series is unclear, and I
would like to wait for the follow-on chips to come out before
considering a merger with common dtsi file.
>
> Best regards,
> Martin
Hi Dmitry,
Thanks for your review.
On 2024/3/13 17:53, Dmitry Rokosov wrote:
> [????????? [email protected] ????????? https://aka.ms/LearnAboutSenderIdentification?????????????]
>
> [ EXTERNAL EMAIL ]
>
> Hello Xianwei,
>
> On Tue, Mar 12, 2024 at 05:18:59PM +0800, Xianwei Zhao via B4 Relay wrote:
>> From: Xianwei Zhao <[email protected]>
>>
>> Amlogic A4 is an application processor designed for smart audio
>> and IoT applications.
>>
>> Add basic support for the A4 based Amlogic BA400 board, which describes
>> the following components: CPU, GIC, IRQ, Timer and UART.
>> These are capable of booting up into the serial console.
>>
>> Signed-off-by: Xianwei Zhao <[email protected]>
>> ---
>> arch/arm64/boot/dts/amlogic/Makefile | 1 +
>> .../boot/dts/amlogic/amlogic-a4-a113l2-ba400.dts | 43 ++++++++++
>> arch/arm64/boot/dts/amlogic/amlogic-a4.dtsi | 99 ++++++++++++++++++++++
>> 3 files changed, 143 insertions(+)
>>
>> diff --git a/arch/arm64/boot/dts/amlogic/Makefile b/arch/arm64/boot/dts/amlogic/Makefile
>> index 1ab160bf928a..9a50ec11bb8d 100644
>> --- a/arch/arm64/boot/dts/amlogic/Makefile
>> +++ b/arch/arm64/boot/dts/amlogic/Makefile
>> @@ -1,4 +1,5 @@
>> # SPDX-License-Identifier: GPL-2.0
>> +dtb-$(CONFIG_ARCH_MESON) += amlogic-a4-a113l2-ba400.dtb
>> dtb-$(CONFIG_ARCH_MESON) += amlogic-c3-c302x-aw409.dtb
>> dtb-$(CONFIG_ARCH_MESON) += amlogic-t7-a311d2-an400.dtb
>> dtb-$(CONFIG_ARCH_MESON) += amlogic-t7-a311d2-khadas-vim4.dtb
>> diff --git a/arch/arm64/boot/dts/amlogic/amlogic-a4-a113l2-ba400.dts b/arch/arm64/boot/dts/amlogic/amlogic-a4-a113l2-ba400.dts
>> new file mode 100644
>> index 000000000000..60f9f23858c6
>> --- /dev/null
>> +++ b/arch/arm64/boot/dts/amlogic/amlogic-a4-a113l2-ba400.dts
>> @@ -0,0 +1,43 @@
>> +// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
>> +/*
>> + * Copyright (c) 2024 Amlogic, Inc. All rights reserved.
>> + */
>> +
>> +/dts-v1/;
>> +
>> +#include "amlogic-a4.dtsi"
>> +
>> +/ {
>> + model = "Amlogic A113L2 ba400 Development Board";
>> + compatible = "amlogic,ba400","amlogic,a4";
>> + interrupt-parent = <&gic>;
>> + #address-cells = <2>;
>> + #size-cells = <2>;
>> +
>> + aliases {
>> + serial0 = &uart_b;
>> + };
>> +
>> + memory@0 {
>> + device_type = "memory";
>> + reg = <0x0 0x0 0x0 0x40000000>;
>> + };
>> +
>> + reserved-memory {
>> + #address-cells = <2>;
>> + #size-cells = <2>;
>> + ranges;
>> +
>> + /* 52 MiB reserved for ARM Trusted Firmware */
>> + secmon_reserved:linux,secmon {
>> + compatible = "shared-dma-pool";
>> + no-map;
>> + alignment = <0x0 0x400000>;
>> + reg = <0x0 0x05000000 0x0 0x3400000>;
>> + };
>> + };
>> +};
>> +
>> +&uart_b {
>> + status = "okay";
>> +};
>> diff --git a/arch/arm64/boot/dts/amlogic/amlogic-a4.dtsi b/arch/arm64/boot/dts/amlogic/amlogic-a4.dtsi
>> new file mode 100644
>> index 000000000000..7e8745010b52
>> --- /dev/null
>> +++ b/arch/arm64/boot/dts/amlogic/amlogic-a4.dtsi
>> @@ -0,0 +1,99 @@
>> +// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
>> +/*
>> + * Copyright (c) 2024 Amlogic, Inc. All rights reserved.
>> + */
>> +
>> +#include <dt-bindings/interrupt-controller/irq.h>
>> +#include <dt-bindings/interrupt-controller/arm-gic.h>
>> +#include <dt-bindings/gpio/gpio.h>
>> +/ {
>> + cpus {
>> + #address-cells = <2>;
>> + #size-cells = <0>;
>> +
>> + cpu0: cpu@0 {
>> + device_type = "cpu";
>> + compatible = "arm,cortex-a53";
>> + reg = <0x0 0x0>;
>> + enable-method = "psci";
>> + };
>> +
>> + cpu1: cpu@1 {
>> + device_type = "cpu";
>> + compatible = "arm,cortex-a53";
>> + reg = <0x0 0x1>;
>> + enable-method = "psci";
>> + };
>> +
>> + cpu2: cpu@2 {
>> + device_type = "cpu";
>> + compatible = "arm,cortex-a53";
>> + reg = <0x0 0x2>;
>> + enable-method = "psci";
>> + };
>> +
>> + cpu3: cpu@3 {
>> + device_type = "cpu";
>> + compatible = "arm,cortex-a53";
>> + reg = <0x0 0x3>;
>> + enable-method = "psci";
>> + };
>> + };
>> +
>> + timer {
>> + compatible = "arm,armv8-timer";
>> + interrupts = <GIC_PPI 13 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>,
>> + <GIC_PPI 14 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>,
>> + <GIC_PPI 11 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>,
>> + <GIC_PPI 10 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>;
>> + };
>> +
>> + psci {
>> + compatible = "arm,psci-0.2";
>> + method = "smc";
>> + };
>> +
>> + xtal: xtal-clk {
>> + compatible = "fixed-clock";
>> + clock-frequency = <24000000>;
>> + clock-output-names = "xtal";
>> + #clock-cells = <0>;
>> + };
>> +
>> + soc {
>> + compatible = "simple-bus";
>> + #address-cells = <2>;
>> + #size-cells = <2>;
>> + ranges;
>> +
>> + gic: interrupt-controller@fff01000 {
>> + compatible = "arm,gic-400";
>> + #interrupt-cells = <3>;
>> + #address-cells = <0>;
>> + interrupt-controller;
>> + reg = <0x0 0xfff01000 0 0x1000>,
>> + <0x0 0xfff02000 0 0x2000>,
>> + <0x0 0xfff04000 0 0x2000>,
>> + <0x0 0xfff06000 0 0x2000>;
>> + interrupts = <GIC_PPI 9 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_HIGH)>;
>> + };
>> +
>> + apb@fe000000 {
>> + compatible = "simple-bus";
>> + reg = <0x0 0xfe000000 0x0 0x480000>;
>> + #address-cells = <2>;
>> + #size-cells = <2>;
>> + ranges = <0x0 0x0 0x0 0xfe000000 0x0 0x480000>;
>> +
>> + uart_b: serial@7a000 {
>> + compatible = "amlogic,meson-s4-uart",
>
> If I'm not wrong, you need to create dt-binding alias for meson-a4-uart
> and use it as 3rd compatible string.
>
On UART module, A4 and A5 SoCs exactly the same as S4. There's no
difference.
>> + "amlogic,meson-ao-uart";
>> + reg = <0x0 0x7a000 0x0 0x18>;
>> + interrupts = <GIC_SPI 169 IRQ_TYPE_EDGE_RISING>;
>> + clocks = <&xtal>, <&xtal>, <&xtal>;
>> + clock-names = "xtal", "pclk", "baud";
>> + status = "disabled";
>> + };
>> + };
>> + };
>> +};
>>
>> --
>> 2.37.1
>>
>>
>> _______________________________________________
>> linux-amlogic mailing list
>> [email protected]
>> http://lists.infradead.org/mailman/listinfo/linux-amlogic
>
> --
> Thank you,
> Dmitry
On 14/03/2024 06:19, Xianwei Zhao wrote:
>>> +
>>> + apb@fe000000 {
>>> + compatible = "simple-bus";
>>> + reg = <0x0 0xfe000000 0x0 0x480000>;
>>> + #address-cells = <2>;
>>> + #size-cells = <2>;
>>> + ranges = <0x0 0x0 0x0 0xfe000000 0x0 0x480000>;
>>> +
>>> + uart_b: serial@7a000 {
>>> + compatible = "amlogic,meson-s4-uart",
>>
>> If I'm not wrong, you need to create dt-binding alias for meson-a4-uart
>> and use it as 3rd compatible string.
>>
> On UART module, A4 and A5 SoCs exactly the same as S4. There's no
> difference.
That's not really the point. You are supposed to always provide SoC
specific compatible in front of the fallback. See writing bindings document.
Best regards,
Krzysztof
Hi Jerome,
Thanks for your review.
On 2024/3/12 17:55, Jerome Brunet wrote:
> [ EXTERNAL EMAIL ]
>
> On Tue 12 Mar 2024 at 17:18, Xianwei Zhao via B4 Relay <[email protected]> wrote:
>
>> From: Xianwei Zhao <[email protected]>
>>
>> Amlogic A4 is an application processor designed for smart audio
>> and IoT applications.
>>
>> Add basic support for the A4 based Amlogic BA400 board, which describes
>> the following components: CPU, GIC, IRQ, Timer and UART.
>> These are capable of booting up into the serial console.
>>
>> Signed-off-by: Xianwei Zhao <[email protected]>
>> ---
>> arch/arm64/boot/dts/amlogic/Makefile | 1 +
>> .../boot/dts/amlogic/amlogic-a4-a113l2-ba400.dts | 43 ++++++++++
>> arch/arm64/boot/dts/amlogic/amlogic-a4.dtsi | 99 ++++++++++++++++++++++
>> 3 files changed, 143 insertions(+)
>>
>> diff --git a/arch/arm64/boot/dts/amlogic/Makefile b/arch/arm64/boot/dts/amlogic/Makefile
>> index 1ab160bf928a..9a50ec11bb8d 100644
>> --- a/arch/arm64/boot/dts/amlogic/Makefile
>> +++ b/arch/arm64/boot/dts/amlogic/Makefile
>> @@ -1,4 +1,5 @@
>> # SPDX-License-Identifier: GPL-2.0
>> +dtb-$(CONFIG_ARCH_MESON) += amlogic-a4-a113l2-ba400.dtb
>> dtb-$(CONFIG_ARCH_MESON) += amlogic-c3-c302x-aw409.dtb
>> dtb-$(CONFIG_ARCH_MESON) += amlogic-t7-a311d2-an400.dtb
>> dtb-$(CONFIG_ARCH_MESON) += amlogic-t7-a311d2-khadas-vim4.dtb
>> diff --git a/arch/arm64/boot/dts/amlogic/amlogic-a4-a113l2-ba400.dts b/arch/arm64/boot/dts/amlogic/amlogic-a4-a113l2-ba400.dts
>> new file mode 100644
>> index 000000000000..60f9f23858c6
>> --- /dev/null
>> +++ b/arch/arm64/boot/dts/amlogic/amlogic-a4-a113l2-ba400.dts
>> @@ -0,0 +1,43 @@
>> +// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
>> +/*
>> + * Copyright (c) 2024 Amlogic, Inc. All rights reserved.
>> + */
>> +
>> +/dts-v1/;
>> +
>> +#include "amlogic-a4.dtsi"
>
> Could you describe how the a4 and a5 differs from each other ?
> The description given in the commit description is the same.
>
> Beside the a53 vs a55, I'm not seeing much of a difference.
> Admittedly, there is not much yet but I wonder if a4 and a5 should have
> a common dtsi.
>
They are mostly the same, A5 include HiFi-DSP and NPU, but A4 is not.
And some peripheral modules are different, such as SPI and Ehernet phy.
I would like to wait for the follow-on chips to come out before
considering a merger with common dtsi file.
>> +
>> +/ {
>> + model = "Amlogic A113L2 ba400 Development Board";
>> + compatible = "amlogic,ba400","amlogic,a4";
>> + interrupt-parent = <&gic>;
>> + #address-cells = <2>;
>> + #size-cells = <2>;
>> +
>> + aliases {
>> + serial0 = &uart_b;
>> + };
>> +
>> + memory@0 {
>> + device_type = "memory";
>> + reg = <0x0 0x0 0x0 0x40000000>;
>> + };
>> +
>> + reserved-memory {
>> + #address-cells = <2>;
>> + #size-cells = <2>;
>> + ranges;
>> +
>> + /* 52 MiB reserved for ARM Trusted Firmware */
>
> That's a lot of memory to blindly reserve.
> Any chance we can stop doing that and have u-boot amend reserved memory
> zone based on the actual needs of the device ?
Yes. U-boot will change size of reserved memory base on actual usage.
>
>> + secmon_reserved:linux,secmon {
>> + compatible = "shared-dma-pool";
>> + no-map;
>> + alignment = <0x0 0x400000>;
>> + reg = <0x0 0x05000000 0x0 0x3400000>;
>> + };
>> + };
>> +};
>> +
>> +&uart_b {
>> + status = "okay";
>> +};
>> diff --git a/arch/arm64/boot/dts/amlogic/amlogic-a4.dtsi b/arch/arm64/boot/dts/amlogic/amlogic-a4.dtsi
>> new file mode 100644
>> index 000000000000..7e8745010b52
>> --- /dev/null
>> +++ b/arch/arm64/boot/dts/amlogic/amlogic-a4.dtsi
>> @@ -0,0 +1,99 @@
>> +// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
>> +/*
>> + * Copyright (c) 2024 Amlogic, Inc. All rights reserved.
>> + */
>> +
>> +#include <dt-bindings/interrupt-controller/irq.h>
>> +#include <dt-bindings/interrupt-controller/arm-gic.h>
>> +#include <dt-bindings/gpio/gpio.h>
>> +/ {
>> + cpus {
>> + #address-cells = <2>;
>> + #size-cells = <0>;
>> +
>> + cpu0: cpu@0 {
>> + device_type = "cpu";
>> + compatible = "arm,cortex-a53";
>> + reg = <0x0 0x0>;
>> + enable-method = "psci";
>> + };
>> +
>> + cpu1: cpu@1 {
>> + device_type = "cpu";
>> + compatible = "arm,cortex-a53";
>> + reg = <0x0 0x1>;
>> + enable-method = "psci";
>> + };
>> +
>> + cpu2: cpu@2 {
>> + device_type = "cpu";
>> + compatible = "arm,cortex-a53";
>> + reg = <0x0 0x2>;
>> + enable-method = "psci";
>> + };
>> +
>> + cpu3: cpu@3 {
>> + device_type = "cpu";
>> + compatible = "arm,cortex-a53";
>> + reg = <0x0 0x3>;
>> + enable-method = "psci";
>> + };
>> + };
>> +
>> + timer {
>> + compatible = "arm,armv8-timer";
>> + interrupts = <GIC_PPI 13 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>,
>> + <GIC_PPI 14 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>,
>> + <GIC_PPI 11 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>,
>> + <GIC_PPI 10 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>;
>> + };
>> +
>> + psci {
>> + compatible = "arm,psci-0.2";
>
> Really ? still on the that old version ?
> Will fix it. Use psci-1.0
>> + method = "smc";
>> + };
>> +
>> + xtal: xtal-clk {
>> + compatible = "fixed-clock";
>> + clock-frequency = <24000000>;
>> + clock-output-names = "xtal";
>> + #clock-cells = <0>;
>> + };
>> +
>> + soc {
>> + compatible = "simple-bus";
>> + #address-cells = <2>;
>> + #size-cells = <2>;
>> + ranges;
>> +
>> + gic: interrupt-controller@fff01000 {
>> + compatible = "arm,gic-400";
>> + #interrupt-cells = <3>;
>> + #address-cells = <0>;
>> + interrupt-controller;
>> + reg = <0x0 0xfff01000 0 0x1000>,
>> + <0x0 0xfff02000 0 0x2000>,
>> + <0x0 0xfff04000 0 0x2000>,
>> + <0x0 0xfff06000 0 0x2000>;
>> + interrupts = <GIC_PPI 9 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_HIGH)>;
>> + };
>> +
>> + apb@fe000000 {
>> + compatible = "simple-bus";
>> + reg = <0x0 0xfe000000 0x0 0x480000>;
>> + #address-cells = <2>;
>> + #size-cells = <2>;
>> + ranges = <0x0 0x0 0x0 0xfe000000 0x0 0x480000>;
>> +
>> + uart_b: serial@7a000 {
>> + compatible = "amlogic,meson-s4-uart",
>> + "amlogic,meson-ao-uart";
>> + reg = <0x0 0x7a000 0x0 0x18>;
>> + interrupts = <GIC_SPI 169 IRQ_TYPE_EDGE_RISING>;
>> + clocks = <&xtal>, <&xtal>, <&xtal>;
>> + clock-names = "xtal", "pclk", "baud";
>> + status = "disabled";
>> + };
>> + };
>> + };
>> +};
>
>
> --
> Jerome
On 14/03/2024 06:19, Xianwei Zhao wrote:
> Hi Dmitry,
> Thanks for your review.
>
> On 2024/3/13 17:53, Dmitry Rokosov wrote:
>> [????????? [email protected] ????????? https://aka.ms/LearnAboutSenderIdentification?????????????]
>>
>> [ EXTERNAL EMAIL ]
>>
>> Hello Xianwei,
>>
>> On Tue, Mar 12, 2024 at 05:18:59PM +0800, Xianwei Zhao via B4 Relay wrote:
>>> From: Xianwei Zhao <[email protected]>
>>>
>>> Amlogic A4 is an application processor designed for smart audio
>>> and IoT applications.
>>>
>>> Add basic support for the A4 based Amlogic BA400 board, which describes
>>> the following components: CPU, GIC, IRQ, Timer and UART.
>>> These are capable of booting up into the serial console.
>>>
>>> Signed-off-by: Xianwei Zhao <[email protected]>
>>> ---
>>> arch/arm64/boot/dts/amlogic/Makefile | 1 +
>>> .../boot/dts/amlogic/amlogic-a4-a113l2-ba400.dts | 43 ++++++++++
>>> arch/arm64/boot/dts/amlogic/amlogic-a4.dtsi | 99 ++++++++++++++++++++++
>>> 3 files changed, 143 insertions(+)
>>>
>>> diff --git a/arch/arm64/boot/dts/amlogic/Makefile b/arch/arm64/boot/dts/amlogic/Makefile
>>> index 1ab160bf928a..9a50ec11bb8d 100644
>>> --- a/arch/arm64/boot/dts/amlogic/Makefile
>>> +++ b/arch/arm64/boot/dts/amlogic/Makefile
>>> @@ -1,4 +1,5 @@
>>> # SPDX-License-Identifier: GPL-2.0
>>> +dtb-$(CONFIG_ARCH_MESON) += amlogic-a4-a113l2-ba400.dtb
>>> dtb-$(CONFIG_ARCH_MESON) += amlogic-c3-c302x-aw409.dtb
>>> dtb-$(CONFIG_ARCH_MESON) += amlogic-t7-a311d2-an400.dtb
>>> dtb-$(CONFIG_ARCH_MESON) += amlogic-t7-a311d2-khadas-vim4.dtb
>>> diff --git a/arch/arm64/boot/dts/amlogic/amlogic-a4-a113l2-ba400.dts b/arch/arm64/boot/dts/amlogic/amlogic-a4-a113l2-ba400.dts
>>> new file mode 100644
>>> index 000000000000..60f9f23858c6
>>> --- /dev/null
>>> +++ b/arch/arm64/boot/dts/amlogic/amlogic-a4-a113l2-ba400.dts
>>> @@ -0,0 +1,43 @@
>>> +// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
>>> +/*
>>> + * Copyright (c) 2024 Amlogic, Inc. All rights reserved.
>>> + */
>>> +
>>> +/dts-v1/;
>>> +
>>> +#include "amlogic-a4.dtsi"
>>> +
>>> +/ {
>>> + model = "Amlogic A113L2 ba400 Development Board";
>>> + compatible = "amlogic,ba400","amlogic,a4";
>>> + interrupt-parent = <&gic>;
>>> + #address-cells = <2>;
>>> + #size-cells = <2>;
>>> +
>>> + aliases {
>>> + serial0 = &uart_b;
>>> + };
>>> +
>>> + memory@0 {
>>> + device_type = "memory";
>>> + reg = <0x0 0x0 0x0 0x40000000>;
>>> + };
>>> +
>>> + reserved-memory {
>>> + #address-cells = <2>;
>>> + #size-cells = <2>;
>>> + ranges;
>>> +
>>> + /* 52 MiB reserved for ARM Trusted Firmware */
>>> + secmon_reserved:linux,secmon {
>>> + compatible = "shared-dma-pool";
>>> + no-map;
>>> + alignment = <0x0 0x400000>;
>>> + reg = <0x0 0x05000000 0x0 0x3400000>;
>>> + };
>>> + };
>>> +};
>>> +
>>> +&uart_b {
>>> + status = "okay";
>>> +};
>>> diff --git a/arch/arm64/boot/dts/amlogic/amlogic-a4.dtsi b/arch/arm64/boot/dts/amlogic/amlogic-a4.dtsi
>>> new file mode 100644
>>> index 000000000000..7e8745010b52
>>> --- /dev/null
>>> +++ b/arch/arm64/boot/dts/amlogic/amlogic-a4.dtsi
>>> @@ -0,0 +1,99 @@
>>> +// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
>>> +/*
>>> + * Copyright (c) 2024 Amlogic, Inc. All rights reserved.
>>> + */
>>> +
>>> +#include <dt-bindings/interrupt-controller/irq.h>
>>> +#include <dt-bindings/interrupt-controller/arm-gic.h>
>>> +#include <dt-bindings/gpio/gpio.h>
>>> +/ {
>>> + cpus {
>>> + #address-cells = <2>;
>>> + #size-cells = <0>;
>>> +
>>> + cpu0: cpu@0 {
>>> + device_type = "cpu";
>>> + compatible = "arm,cortex-a53";
>>> + reg = <0x0 0x0>;
>>> + enable-method = "psci";
>>> + };
>>> +
>>> + cpu1: cpu@1 {
>>> + device_type = "cpu";
>>> + compatible = "arm,cortex-a53";
>>> + reg = <0x0 0x1>;
>>> + enable-method = "psci";
>>> + };
>>> +
>>> + cpu2: cpu@2 {
>>> + device_type = "cpu";
>>> + compatible = "arm,cortex-a53";
>>> + reg = <0x0 0x2>;
>>> + enable-method = "psci";
>>> + };
>>> +
>>> + cpu3: cpu@3 {
>>> + device_type = "cpu";
>>> + compatible = "arm,cortex-a53";
>>> + reg = <0x0 0x3>;
>>> + enable-method = "psci";
>>> + };
>>> + };
>>> +
>>> + timer {
>>> + compatible = "arm,armv8-timer";
>>> + interrupts = <GIC_PPI 13 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>,
>>> + <GIC_PPI 14 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>,
>>> + <GIC_PPI 11 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>,
>>> + <GIC_PPI 10 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>;
>>> + };
>>> +
>>> + psci {
>>> + compatible = "arm,psci-0.2";
>>> + method = "smc";
>>> + };
>>> +
>>> + xtal: xtal-clk {
>>> + compatible = "fixed-clock";
>>> + clock-frequency = <24000000>;
>>> + clock-output-names = "xtal";
>>> + #clock-cells = <0>;
>>> + };
>>> +
>>> + soc {
>>> + compatible = "simple-bus";
>>> + #address-cells = <2>;
>>> + #size-cells = <2>;
>>> + ranges;
>>> +
>>> + gic: interrupt-controller@fff01000 {
>>> + compatible = "arm,gic-400";
>>> + #interrupt-cells = <3>;
>>> + #address-cells = <0>;
>>> + interrupt-controller;
>>> + reg = <0x0 0xfff01000 0 0x1000>,
>>> + <0x0 0xfff02000 0 0x2000>,
>>> + <0x0 0xfff04000 0 0x2000>,
>>> + <0x0 0xfff06000 0 0x2000>;
>>> + interrupts = <GIC_PPI 9 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_HIGH)>;
>>> + };
>>> +
>>> + apb@fe000000 {
>>> + compatible = "simple-bus";
>>> + reg = <0x0 0xfe000000 0x0 0x480000>;
>>> + #address-cells = <2>;
>>> + #size-cells = <2>;
>>> + ranges = <0x0 0x0 0x0 0xfe000000 0x0 0x480000>;
>>> +
>>> + uart_b: serial@7a000 {
>>> + compatible = "amlogic,meson-s4-uart",
>>
>> If I'm not wrong, you need to create dt-binding alias for meson-a4-uart
>> and use it as 3rd compatible string.
Please add an A4 and A5 compatible using amlogic,meson-s4-uart as fallback,
and drop the ao-uart since there's no more AO uart.
Follow how it was done for the T7 in Documentation/devicetree/bindings/serial/amlogic,meson-uart.yaml
The amlogic,meson-s4-uart will provide an earlycon like ao-uart did.
Thanks,
Neil
>>
> On UART module, A4 and A5 SoCs exactly the same as S4. There's no difference.
>>> + "amlogic,meson-ao-uart";
>>> + reg = <0x0 0x7a000 0x0 0x18>;
>>> + interrupts = <GIC_SPI 169 IRQ_TYPE_EDGE_RISING>;
>>> + clocks = <&xtal>, <&xtal>, <&xtal>;
>>> + clock-names = "xtal", "pclk", "baud";
>>> + status = "disabled";
>>> + };
>>> + };
>>> + };
>>> +};
>>>
>>> --
>>> 2.37.1
>>>
>>>
>>> _______________________________________________
>>> linux-amlogic mailing list
>>> [email protected]
>>> http://lists.infradead.org/mailman/listinfo/linux-amlogic
>>
>> --
>> Thank you,
>> Dmitry
On Thu 14 Mar 2024 at 16:08, Xianwei Zhao <[email protected]> wrote:
>>> +
>>> +#include "amlogic-a4.dtsi"
>> Could you describe how the a4 and a5 differs from each other ?
>> The description given in the commit description is the same.
>> Beside the a53 vs a55, I'm not seeing much of a difference.
>> Admittedly, there is not much yet but I wonder if a4 and a5 should have
>> a common dtsi.
>>
> They are mostly the same, A5 include HiFi-DSP and NPU, but A4 is not. And
> some peripheral modules are different, such as SPI and Ehernet phy.
>
> I would like to wait for the follow-on chips to come out before considering
> a merger with common dtsi file.
>
No, Please do it now. There is no reason for the community to review the
same thing twice if the SoCs are "mostly the same".
>>> +
>>> +/ {
>>> + model = "Amlogic A113L2 ba400 Development Board";
>>> + compatible = "amlogic,ba400","amlogic,a4";
>>> + interrupt-parent = <&gic>;
>>> + #address-cells = <2>;
>>> + #size-cells = <2>;
>>> +
>>> + aliases {
>>> + serial0 = &uart_b;
>>> + };
>>> +
>>> + memory@0 {
>>> + device_type = "memory";
>>> + reg = <0x0 0x0 0x0 0x40000000>;
>>> + };
>>> +
>>> + reserved-memory {
>>> + #address-cells = <2>;
>>> + #size-cells = <2>;
>>> + ranges;
>>> +
>>> + /* 52 MiB reserved for ARM Trusted Firmware */
>> That's a lot of memory to blindly reserve.
>> Any chance we can stop doing that and have u-boot amend reserved memory
>> zone based on the actual needs of the device ?
> Yes. U-boot will change size of reserved memory base on actual usage.
Then u-boot should add (not change) the memory if necessary.
Please drop this.
>>
>>> + secmon_reserved:linux,secmon {
>>> + compatible = "shared-dma-pool";
>>> + no-map;
>>> + alignment = <0x0 0x400000>;
>>> + reg = <0x0 0x05000000 0x0 0x3400000>;
>>> + };
>>> + };
>>> +};
>>> +
Hi Neil,
Thanks for your review.
On 2024/3/14 17:04, Neil Armstrong wrote:
> [ EXTERNAL EMAIL ]
>
> On 14/03/2024 06:19, Xianwei Zhao wrote:
>> Hi Dmitry,
>> Thanks for your review.
>>
>> On 2024/3/13 17:53, Dmitry Rokosov wrote:
>>> [????????? [email protected] ?????????
>>> https://aka.ms/LearnAboutSenderIdentification?????????????]
>>>
>>> [ EXTERNAL EMAIL ]
>>>
>>> Hello Xianwei,
>>>
>>> On Tue, Mar 12, 2024 at 05:18:59PM +0800, Xianwei Zhao via B4 Relay
>>> wrote:
>>>> From: Xianwei Zhao <[email protected]>
>>>>
>>>> Amlogic A4 is an application processor designed for smart audio
>>>> and IoT applications.
>>>>
>>>> Add basic support for the A4 based Amlogic BA400 board, which describes
>>>> the following components: CPU, GIC, IRQ, Timer and UART.
>>>> These are capable of booting up into the serial console.
>>>>
>>>> Signed-off-by: Xianwei Zhao <[email protected]>
>>>> ---
>>>> arch/arm64/boot/dts/amlogic/Makefile | 1 +
>>>> .../boot/dts/amlogic/amlogic-a4-a113l2-ba400.dts | 43 ++++++++++
>>>> arch/arm64/boot/dts/amlogic/amlogic-a4.dtsi | 99
>>>> ++++++++++++++++++++++
>>>> 3 files changed, 143 insertions(+)
>>>>
>>>> diff --git a/arch/arm64/boot/dts/amlogic/Makefile
>>>> b/arch/arm64/boot/dts/amlogic/Makefile
>>>> index 1ab160bf928a..9a50ec11bb8d 100644
>>>> --- a/arch/arm64/boot/dts/amlogic/Makefile
>>>> +++ b/arch/arm64/boot/dts/amlogic/Makefile
>>>> @@ -1,4 +1,5 @@
>>>> # SPDX-License-Identifier: GPL-2.0
>>>> +dtb-$(CONFIG_ARCH_MESON) += amlogic-a4-a113l2-ba400.dtb
>>>> dtb-$(CONFIG_ARCH_MESON) += amlogic-c3-c302x-aw409.dtb
>>>> dtb-$(CONFIG_ARCH_MESON) += amlogic-t7-a311d2-an400.dtb
>>>> dtb-$(CONFIG_ARCH_MESON) += amlogic-t7-a311d2-khadas-vim4.dtb
>>>> diff --git a/arch/arm64/boot/dts/amlogic/amlogic-a4-a113l2-ba400.dts
>>>> b/arch/arm64/boot/dts/amlogic/amlogic-a4-a113l2-ba400.dts
>>>> new file mode 100644
>>>> index 000000000000..60f9f23858c6
>>>> --- /dev/null
>>>> +++ b/arch/arm64/boot/dts/amlogic/amlogic-a4-a113l2-ba400.dts
>>>> @@ -0,0 +1,43 @@
>>>> +// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
>>>> +/*
>>>> + * Copyright (c) 2024 Amlogic, Inc. All rights reserved.
>>>> + */
>>>> +
>>>> +/dts-v1/;
>>>> +
>>>> +#include "amlogic-a4.dtsi"
>>>> +
>>>> +/ {
>>>> + model = "Amlogic A113L2 ba400 Development Board";
>>>> + compatible = "amlogic,ba400","amlogic,a4";
>>>> + interrupt-parent = <&gic>;
>>>> + #address-cells = <2>;
>>>> + #size-cells = <2>;
>>>> +
>>>> + aliases {
>>>> + serial0 = &uart_b;
>>>> + };
>>>> +
>>>> + memory@0 {
>>>> + device_type = "memory";
>>>> + reg = <0x0 0x0 0x0 0x40000000>;
>>>> + };
>>>> +
>>>> + reserved-memory {
>>>> + #address-cells = <2>;
>>>> + #size-cells = <2>;
>>>> + ranges;
>>>> +
>>>> + /* 52 MiB reserved for ARM Trusted Firmware */
>>>> + secmon_reserved:linux,secmon {
>>>> + compatible = "shared-dma-pool";
>>>> + no-map;
>>>> + alignment = <0x0 0x400000>;
>>>> + reg = <0x0 0x05000000 0x0 0x3400000>;
>>>> + };
>>>> + };
>>>> +};
>>>> +
>>>> +&uart_b {
>>>> + status = "okay";
>>>> +};
>>>> diff --git a/arch/arm64/boot/dts/amlogic/amlogic-a4.dtsi
>>>> b/arch/arm64/boot/dts/amlogic/amlogic-a4.dtsi
>>>> new file mode 100644
>>>> index 000000000000..7e8745010b52
>>>> --- /dev/null
>>>> +++ b/arch/arm64/boot/dts/amlogic/amlogic-a4.dtsi
>>>> @@ -0,0 +1,99 @@
>>>> +// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
>>>> +/*
>>>> + * Copyright (c) 2024 Amlogic, Inc. All rights reserved.
>>>> + */
>>>> +
>>>> +#include <dt-bindings/interrupt-controller/irq.h>
>>>> +#include <dt-bindings/interrupt-controller/arm-gic.h>
>>>> +#include <dt-bindings/gpio/gpio.h>
>>>> +/ {
>>>> + cpus {
>>>> + #address-cells = <2>;
>>>> + #size-cells = <0>;
>>>> +
>>>> + cpu0: cpu@0 {
>>>> + device_type = "cpu";
>>>> + compatible = "arm,cortex-a53";
>>>> + reg = <0x0 0x0>;
>>>> + enable-method = "psci";
>>>> + };
>>>> +
>>>> + cpu1: cpu@1 {
>>>> + device_type = "cpu";
>>>> + compatible = "arm,cortex-a53";
>>>> + reg = <0x0 0x1>;
>>>> + enable-method = "psci";
>>>> + };
>>>> +
>>>> + cpu2: cpu@2 {
>>>> + device_type = "cpu";
>>>> + compatible = "arm,cortex-a53";
>>>> + reg = <0x0 0x2>;
>>>> + enable-method = "psci";
>>>> + };
>>>> +
>>>> + cpu3: cpu@3 {
>>>> + device_type = "cpu";
>>>> + compatible = "arm,cortex-a53";
>>>> + reg = <0x0 0x3>;
>>>> + enable-method = "psci";
>>>> + };
>>>> + };
>>>> +
>>>> + timer {
>>>> + compatible = "arm,armv8-timer";
>>>> + interrupts = <GIC_PPI 13 (GIC_CPU_MASK_SIMPLE(4) |
>>>> IRQ_TYPE_LEVEL_LOW)>,
>>>> + <GIC_PPI 14 (GIC_CPU_MASK_SIMPLE(4) |
>>>> IRQ_TYPE_LEVEL_LOW)>,
>>>> + <GIC_PPI 11 (GIC_CPU_MASK_SIMPLE(4) |
>>>> IRQ_TYPE_LEVEL_LOW)>,
>>>> + <GIC_PPI 10 (GIC_CPU_MASK_SIMPLE(4) |
>>>> IRQ_TYPE_LEVEL_LOW)>;
>>>> + };
>>>> +
>>>> + psci {
>>>> + compatible = "arm,psci-0.2";
>>>> + method = "smc";
>>>> + };
>>>> +
>>>> + xtal: xtal-clk {
>>>> + compatible = "fixed-clock";
>>>> + clock-frequency = <24000000>;
>>>> + clock-output-names = "xtal";
>>>> + #clock-cells = <0>;
>>>> + };
>>>> +
>>>> + soc {
>>>> + compatible = "simple-bus";
>>>> + #address-cells = <2>;
>>>> + #size-cells = <2>;
>>>> + ranges;
>>>> +
>>>> + gic: interrupt-controller@fff01000 {
>>>> + compatible = "arm,gic-400";
>>>> + #interrupt-cells = <3>;
>>>> + #address-cells = <0>;
>>>> + interrupt-controller;
>>>> + reg = <0x0 0xfff01000 0 0x1000>,
>>>> + <0x0 0xfff02000 0 0x2000>,
>>>> + <0x0 0xfff04000 0 0x2000>,
>>>> + <0x0 0xfff06000 0 0x2000>;
>>>> + interrupts = <GIC_PPI 9
>>>> (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_HIGH)>;
>>>> + };
>>>> +
>>>> + apb@fe000000 {
>>>> + compatible = "simple-bus";
>>>> + reg = <0x0 0xfe000000 0x0 0x480000>;
>>>> + #address-cells = <2>;
>>>> + #size-cells = <2>;
>>>> + ranges = <0x0 0x0 0x0 0xfe000000 0x0 0x480000>;
>>>> +
>>>> + uart_b: serial@7a000 {
>>>> + compatible = "amlogic,meson-s4-uart",
>>>
>>> If I'm not wrong, you need to create dt-binding alias for meson-a4-uart
>>> and use it as 3rd compatible string.
>
> Please add an A4 and A5 compatible using amlogic,meson-s4-uart as fallback,
> and drop the ao-uart since there's no more AO uart.
>
> Follow how it was done for the T7 in
> Documentation/devicetree/bindings/serial/amlogic,meson-uart.yaml
>
> The amlogic,meson-s4-uart will provide an earlycon like ao-uart did.
>
Will do.
> Thanks,
> Neil
>
>>>
>> On UART module, A4 and A5 SoCs exactly the same as S4. There's no
>> difference.
>>>> + "amlogic,meson-ao-uart";
>>>> + reg = <0x0 0x7a000 0x0 0x18>;
>>>> + interrupts = <GIC_SPI 169
>>>> IRQ_TYPE_EDGE_RISING>;
>>>> + clocks = <&xtal>, <&xtal>, <&xtal>;
>>>> + clock-names = "xtal", "pclk", "baud";
>>>> + status = "disabled";
>>>> + };
>>>> + };
>>>> + };
>>>> +};
>>>>
>>>> --
>>>> 2.37.1
>>>>
>>>>
>>>> _______________________________________________
>>>> linux-amlogic mailing list
>>>> [email protected]
>>>> http://lists.infradead.org/mailman/listinfo/linux-amlogic
>>>
>>> --
>>> Thank you,
>>> Dmitry
>
Hi Krzysztof,
Thanks for your reply.
On 2024/3/14 14:58, Krzysztof Kozlowski wrote:
> [ EXTERNAL EMAIL ]
>
> On 14/03/2024 06:19, Xianwei Zhao wrote:
>>>> +
>>>> + apb@fe000000 {
>>>> + compatible = "simple-bus";
>>>> + reg = <0x0 0xfe000000 0x0 0x480000>;
>>>> + #address-cells = <2>;
>>>> + #size-cells = <2>;
>>>> + ranges = <0x0 0x0 0x0 0xfe000000 0x0 0x480000>;
>>>> +
>>>> + uart_b: serial@7a000 {
>>>> + compatible = "amlogic,meson-s4-uart",
>>>
>>> If I'm not wrong, you need to create dt-binding alias for meson-a4-uart
>>> and use it as 3rd compatible string.
>>>
>> On UART module, A4 and A5 SoCs exactly the same as S4. There's no
>> difference.
>
> That's not really the point. You are supposed to always provide SoC
> specific compatible in front of the fallback. See writing bindings document.
>
Will add bindings.
If two chips use a common dtsi, and this module is in the common dtsi,
can I only add one to suit this two chips?
>
> Best regards,
> Krzysztof
>
Hi Jerome,
Thanks for your reply.
On 2024/3/14 17:26, Jerome Brunet wrote:
> [ EXTERNAL EMAIL ]
>
> On Thu 14 Mar 2024 at 16:08, Xianwei Zhao <[email protected]> wrote:
>
>>>> +
>>>> +#include "amlogic-a4.dtsi"
>>> Could you describe how the a4 and a5 differs from each other ?
>>> The description given in the commit description is the same.
>>> Beside the a53 vs a55, I'm not seeing much of a difference.
>>> Admittedly, there is not much yet but I wonder if a4 and a5 should have
>>> a common dtsi.
>>>
>> They are mostly the same, A5 include HiFi-DSP and NPU, but A4 is not. And
>> some peripheral modules are different, such as SPI and Ehernet phy.
>>
>> I would like to wait for the follow-on chips to come out before considering
>> a merger with common dtsi file.
>>
>
> No, Please do it now. There is no reason for the community to review the
> same thing twice if the SoCs are "mostly the same".
>
OK, I will do it.
>>>> +
>>>> +/ {
>>>> + model = "Amlogic A113L2 ba400 Development Board";
>>>> + compatible = "amlogic,ba400","amlogic,a4";
>>>> + interrupt-parent = <&gic>;
>>>> + #address-cells = <2>;
>>>> + #size-cells = <2>;
>>>> +
>>>> + aliases {
>>>> + serial0 = &uart_b;
>>>> + };
>>>> +
>>>> + memory@0 {
>>>> + device_type = "memory";
>>>> + reg = <0x0 0x0 0x0 0x40000000>;
>>>> + };
>>>> +
>>>> + reserved-memory {
>>>> + #address-cells = <2>;
>>>> + #size-cells = <2>;
>>>> + ranges;
>>>> +
>>>> + /* 52 MiB reserved for ARM Trusted Firmware */
>>> That's a lot of memory to blindly reserve.
>>> Any chance we can stop doing that and have u-boot amend reserved memory
>>> zone based on the actual needs of the device ?
>> Yes. U-boot will change size of reserved memory base on actual usage.
>
> Then u-boot should add (not change) the memory if necessary.
> Please drop this.
>
Amlogic's u-boot will change the reserved memory size, size is not an
issue. But Some one use u-boot himself not Amlogic's, If here drop this,
there is a strange problem when it runs.
>>>
>>>> + secmon_reserved:linux,secmon {
>>>> + compatible = "shared-dma-pool";
>>>> + no-map;
>>>> + alignment = <0x0 0x400000>;
>>>> + reg = <0x0 0x05000000 0x0 0x3400000>;
>>>> + };
>>>> + };
>>>> +};
>>>> +
>