We get a few warnings when building kernel with W=1:
drivers/gpu/drm/amd/amdgpu/../powerplay/smumgr/fiji_smumgr.c:162:5: warning: no previous prototype for 'fiji_setup_pwr_virus' [-Wmissing-prototypes]
drivers/gpu/drm/amd/amdgpu/../powerplay/smumgr/fiji_smc.c:2052:5: warning: no previous prototype for 'fiji_program_mem_timing_parameters' [-Wmissing-prototypes]
drivers/gpu/drm/amd/amdgpu/../powerplay/smumgr/polaris10_smumgr.c:175:5: warning: no previous prototype for 'polaris10_avfs_event_mgr' [-Wmissing-prototypes]
drivers/gpu/drm/amd/amdgpu/../powerplay/hwmgr/cz_hwmgr.c:1020:5: warning: no previous prototype for 'cz_tf_reset_acp_boot_level' [-Wmissing-prototypes]
drivers/gpu/drm/amd/amdgpu/../powerplay/hwmgr/smu7_hwmgr.c:92:26: warning: no previous prototype for 'cast_phw_smu7_power_state' [-Wmissing-prototypes]
....
In fact, these functions are only used in the file in which they are
declared and don't need a declaration, but can be made static.
So this patch marks these functions with 'static'.
Signed-off-by: Baoyou Xie <[email protected]>
---
drivers/gpu/drm/amd/powerplay/amd_powerplay.c | 6 ++-
drivers/gpu/drm/amd/powerplay/hwmgr/cz_hwmgr.c | 12 +++---
.../amd/powerplay/hwmgr/process_pptables_v1_0.c | 6 +--
.../gpu/drm/amd/powerplay/hwmgr/processpptables.c | 4 +-
.../amd/powerplay/hwmgr/smu7_clockpowergating.c | 10 ++---
drivers/gpu/drm/amd/powerplay/hwmgr/smu7_hwmgr.c | 49 ++++++++++++----------
drivers/gpu/drm/amd/powerplay/smumgr/fiji_smc.c | 2 +-
drivers/gpu/drm/amd/powerplay/smumgr/fiji_smumgr.c | 12 +++---
.../drm/amd/powerplay/smumgr/polaris10_smumgr.c | 5 ++-
9 files changed, 57 insertions(+), 49 deletions(-)
diff --git a/drivers/gpu/drm/amd/powerplay/amd_powerplay.c b/drivers/gpu/drm/amd/powerplay/amd_powerplay.c
index 7174f7a..eecfbc5 100644
--- a/drivers/gpu/drm/amd/powerplay/amd_powerplay.c
+++ b/drivers/gpu/drm/amd/powerplay/amd_powerplay.c
@@ -436,7 +436,9 @@ static enum PP_StateUILabel power_state_convert(enum amd_pm_state_type state)
}
}
-int pp_dpm_dispatch_tasks(void *handle, enum amd_pp_event event_id, void *input, void *output)
+static int
+pp_dpm_dispatch_tasks(void *handle, enum amd_pp_event event_id, void *input,
+ void *output)
{
int ret = 0;
struct pp_instance *pp_handle;
@@ -475,7 +477,7 @@ int pp_dpm_dispatch_tasks(void *handle, enum amd_pp_event event_id, void *input,
return ret;
}
-enum amd_pm_state_type pp_dpm_get_current_power_state(void *handle)
+static enum amd_pm_state_type pp_dpm_get_current_power_state(void *handle)
{
struct pp_hwmgr *hwmgr;
struct pp_power_state *state;
diff --git a/drivers/gpu/drm/amd/powerplay/hwmgr/cz_hwmgr.c b/drivers/gpu/drm/amd/powerplay/hwmgr/cz_hwmgr.c
index 9604249..4b14f25 100644
--- a/drivers/gpu/drm/amd/powerplay/hwmgr/cz_hwmgr.c
+++ b/drivers/gpu/drm/amd/powerplay/hwmgr/cz_hwmgr.c
@@ -66,7 +66,7 @@ static const struct cz_power_state *cast_const_PhwCzPowerState(
return (struct cz_power_state *)hw_ps;
}
-uint32_t cz_get_eclk_level(struct pp_hwmgr *hwmgr,
+static uint32_t cz_get_eclk_level(struct pp_hwmgr *hwmgr,
uint32_t clock, uint32_t msg)
{
int i = 0;
@@ -1017,7 +1017,7 @@ static int cz_tf_program_bootup_state(struct pp_hwmgr *hwmgr, void *input,
return 0;
}
-int cz_tf_reset_acp_boot_level(struct pp_hwmgr *hwmgr, void *input,
+static int cz_tf_reset_acp_boot_level(struct pp_hwmgr *hwmgr, void *input,
void *output, void *storage, int result)
{
struct cz_hwmgr *cz_hwmgr = (struct cz_hwmgr *)(hwmgr->backend);
@@ -1225,7 +1225,7 @@ static int cz_hwmgr_backend_fini(struct pp_hwmgr *hwmgr)
return 0;
}
-int cz_phm_force_dpm_highest(struct pp_hwmgr *hwmgr)
+static int cz_phm_force_dpm_highest(struct pp_hwmgr *hwmgr)
{
struct cz_hwmgr *cz_hwmgr = (struct cz_hwmgr *)(hwmgr->backend);
@@ -1239,7 +1239,7 @@ int cz_phm_force_dpm_highest(struct pp_hwmgr *hwmgr)
return 0;
}
-int cz_phm_unforce_dpm_levels(struct pp_hwmgr *hwmgr)
+static int cz_phm_unforce_dpm_levels(struct pp_hwmgr *hwmgr)
{
struct cz_hwmgr *cz_hwmgr = (struct cz_hwmgr *)(hwmgr->backend);
struct phm_clock_voltage_dependency_table *table =
@@ -1277,7 +1277,7 @@ int cz_phm_unforce_dpm_levels(struct pp_hwmgr *hwmgr)
return 0;
}
-int cz_phm_force_dpm_lowest(struct pp_hwmgr *hwmgr)
+static int cz_phm_force_dpm_lowest(struct pp_hwmgr *hwmgr)
{
struct cz_hwmgr *cz_hwmgr = (struct cz_hwmgr *)(hwmgr->backend);
@@ -1533,7 +1533,7 @@ static int cz_dpm_get_pp_table_entry(struct pp_hwmgr *hwmgr,
return result;
}
-int cz_get_power_state_size(struct pp_hwmgr *hwmgr)
+static int cz_get_power_state_size(struct pp_hwmgr *hwmgr)
{
return sizeof(struct cz_power_state);
}
diff --git a/drivers/gpu/drm/amd/powerplay/hwmgr/process_pptables_v1_0.c b/drivers/gpu/drm/amd/powerplay/hwmgr/process_pptables_v1_0.c
index 7de701d..155cd0d 100644
--- a/drivers/gpu/drm/amd/powerplay/hwmgr/process_pptables_v1_0.c
+++ b/drivers/gpu/drm/amd/powerplay/hwmgr/process_pptables_v1_0.c
@@ -131,7 +131,7 @@ static int set_platform_caps(struct pp_hwmgr *hwmgr, uint32_t powerplay_caps)
/**
* Private Function to get the PowerPlay Table Address.
*/
-const void *get_powerplay_table(struct pp_hwmgr *hwmgr)
+static const void *get_powerplay_table(struct pp_hwmgr *hwmgr)
{
int index = GetIndexIntoMasterTable(DATA, PowerPlayInfo);
@@ -1049,7 +1049,7 @@ static int check_powerplay_tables(
return 0;
}
-int pp_tables_v1_0_initialize(struct pp_hwmgr *hwmgr)
+static int pp_tables_v1_0_initialize(struct pp_hwmgr *hwmgr)
{
int result = 0;
const ATOM_Tonga_POWERPLAYTABLE *powerplay_table;
@@ -1100,7 +1100,7 @@ int pp_tables_v1_0_initialize(struct pp_hwmgr *hwmgr)
return result;
}
-int pp_tables_v1_0_uninitialize(struct pp_hwmgr *hwmgr)
+static int pp_tables_v1_0_uninitialize(struct pp_hwmgr *hwmgr)
{
struct phm_ppt_v1_information *pp_table_information =
(struct phm_ppt_v1_information *)(hwmgr->pptable);
diff --git a/drivers/gpu/drm/amd/powerplay/hwmgr/processpptables.c b/drivers/gpu/drm/amd/powerplay/hwmgr/processpptables.c
index ccf7ebe..bd1f190 100644
--- a/drivers/gpu/drm/amd/powerplay/hwmgr/processpptables.c
+++ b/drivers/gpu/drm/amd/powerplay/hwmgr/processpptables.c
@@ -1507,7 +1507,7 @@ static int init_phase_shedding_table(struct pp_hwmgr *hwmgr,
return 0;
}
-int get_number_of_vce_state_table_entries(
+static int get_number_of_vce_state_table_entries(
struct pp_hwmgr *hwmgr)
{
const ATOM_PPLIB_POWERPLAYTABLE *table =
@@ -1521,7 +1521,7 @@ int get_number_of_vce_state_table_entries(
return 0;
}
-int get_vce_state_table_entry(struct pp_hwmgr *hwmgr,
+static int get_vce_state_table_entry(struct pp_hwmgr *hwmgr,
unsigned long i,
struct pp_vce_state *vce_state,
void **clock_info,
diff --git a/drivers/gpu/drm/amd/powerplay/hwmgr/smu7_clockpowergating.c b/drivers/gpu/drm/amd/powerplay/hwmgr/smu7_clockpowergating.c
index 6eb6db1..f5a58d4 100644
--- a/drivers/gpu/drm/amd/powerplay/hwmgr/smu7_clockpowergating.c
+++ b/drivers/gpu/drm/amd/powerplay/hwmgr/smu7_clockpowergating.c
@@ -75,7 +75,7 @@ int smu7_powerdown_uvd(struct pp_hwmgr *hwmgr)
return 0;
}
-int smu7_powerup_uvd(struct pp_hwmgr *hwmgr)
+static int smu7_powerup_uvd(struct pp_hwmgr *hwmgr)
{
if (phm_cf_want_uvd_power_gating(hwmgr)) {
if (phm_cap_enabled(hwmgr->platform_descriptor.platformCaps,
@@ -91,7 +91,7 @@ int smu7_powerup_uvd(struct pp_hwmgr *hwmgr)
return 0;
}
-int smu7_powerdown_vce(struct pp_hwmgr *hwmgr)
+static int smu7_powerdown_vce(struct pp_hwmgr *hwmgr)
{
if (phm_cf_want_vce_power_gating(hwmgr))
return smum_send_msg_to_smc(hwmgr->smumgr,
@@ -99,7 +99,7 @@ int smu7_powerdown_vce(struct pp_hwmgr *hwmgr)
return 0;
}
-int smu7_powerup_vce(struct pp_hwmgr *hwmgr)
+static int smu7_powerup_vce(struct pp_hwmgr *hwmgr)
{
if (phm_cf_want_vce_power_gating(hwmgr))
return smum_send_msg_to_smc(hwmgr->smumgr,
@@ -107,7 +107,7 @@ int smu7_powerup_vce(struct pp_hwmgr *hwmgr)
return 0;
}
-int smu7_powerdown_samu(struct pp_hwmgr *hwmgr)
+static int smu7_powerdown_samu(struct pp_hwmgr *hwmgr)
{
if (phm_cap_enabled(hwmgr->platform_descriptor.platformCaps,
PHM_PlatformCaps_SamuPowerGating))
@@ -116,7 +116,7 @@ int smu7_powerdown_samu(struct pp_hwmgr *hwmgr)
return 0;
}
-int smu7_powerup_samu(struct pp_hwmgr *hwmgr)
+static int smu7_powerup_samu(struct pp_hwmgr *hwmgr)
{
if (phm_cap_enabled(hwmgr->platform_descriptor.platformCaps,
PHM_PlatformCaps_SamuPowerGating))
diff --git a/drivers/gpu/drm/amd/powerplay/hwmgr/smu7_hwmgr.c b/drivers/gpu/drm/amd/powerplay/hwmgr/smu7_hwmgr.c
index 609996c..33b7528 100644
--- a/drivers/gpu/drm/amd/powerplay/hwmgr/smu7_hwmgr.c
+++ b/drivers/gpu/drm/amd/powerplay/hwmgr/smu7_hwmgr.c
@@ -89,7 +89,7 @@ enum DPM_EVENT_SRC {
static const unsigned long PhwVIslands_Magic = (unsigned long)(PHM_VIslands_Magic);
-struct smu7_power_state *cast_phw_smu7_power_state(
+static struct smu7_power_state *cast_phw_smu7_power_state(
struct pp_hw_power_state *hw_ps)
{
PP_ASSERT_WITH_CODE((PhwVIslands_Magic == hw_ps->magic),
@@ -99,7 +99,7 @@ struct smu7_power_state *cast_phw_smu7_power_state(
return (struct smu7_power_state *)hw_ps;
}
-const struct smu7_power_state *cast_const_phw_smu7_power_state(
+static const struct smu7_power_state *cast_const_phw_smu7_power_state(
const struct pp_hw_power_state *hw_ps)
{
PP_ASSERT_WITH_CODE((PhwVIslands_Magic == hw_ps->magic),
@@ -115,7 +115,7 @@ const struct smu7_power_state *cast_const_phw_smu7_power_state(
* @param hwmgr the address of the powerplay hardware manager.
* @return always 0
*/
-int smu7_get_mc_microcode_version (struct pp_hwmgr *hwmgr)
+static int smu7_get_mc_microcode_version(struct pp_hwmgr *hwmgr)
{
cgs_write_register(hwmgr->device, mmMC_SEQ_IO_DEBUG_INDEX, 0x9F);
@@ -124,7 +124,7 @@ int smu7_get_mc_microcode_version (struct pp_hwmgr *hwmgr)
return 0;
}
-uint16_t smu7_get_current_pcie_speed(struct pp_hwmgr *hwmgr)
+static uint16_t smu7_get_current_pcie_speed(struct pp_hwmgr *hwmgr)
{
uint32_t speedCntl = 0;
@@ -135,7 +135,7 @@ uint16_t smu7_get_current_pcie_speed(struct pp_hwmgr *hwmgr)
PCIE_LC_SPEED_CNTL, LC_CURRENT_DATA_RATE));
}
-int smu7_get_current_pcie_lane_number(struct pp_hwmgr *hwmgr)
+static int smu7_get_current_pcie_lane_number(struct pp_hwmgr *hwmgr)
{
uint32_t link_width;
@@ -155,7 +155,7 @@ int smu7_get_current_pcie_lane_number(struct pp_hwmgr *hwmgr)
* @param pHwMgr the address of the powerplay hardware manager.
* @return always PP_Result_OK
*/
-int smu7_enable_smc_voltage_controller(struct pp_hwmgr *hwmgr)
+static int smu7_enable_smc_voltage_controller(struct pp_hwmgr *hwmgr)
{
if (hwmgr->feature_mask & PP_SMC_VOLTAGE_CONTROL_MASK)
smum_send_msg_to_smc(hwmgr->smumgr, PPSMC_MSG_Voltage_Cntl_Enable);
@@ -802,7 +802,7 @@ static int smu7_setup_dpm_tables_v1(struct pp_hwmgr *hwmgr)
return 0;
}
-int smu7_setup_default_dpm_tables(struct pp_hwmgr *hwmgr)
+static int smu7_setup_default_dpm_tables(struct pp_hwmgr *hwmgr)
{
struct smu7_hwmgr *data = (struct smu7_hwmgr *)(hwmgr->backend);
@@ -1153,7 +1153,7 @@ static int smu7_disable_thermal_auto_throttle(struct pp_hwmgr *hwmgr)
return smu7_disable_auto_throttle_source(hwmgr, PHM_AutoThrottleSource_Thermal);
}
-int smu7_pcie_performance_request(struct pp_hwmgr *hwmgr)
+static int smu7_pcie_performance_request(struct pp_hwmgr *hwmgr)
{
struct smu7_hwmgr *data = (struct smu7_hwmgr *)(hwmgr->backend);
data->pcie_performance_request = true;
@@ -1161,7 +1161,7 @@ int smu7_pcie_performance_request(struct pp_hwmgr *hwmgr)
return 0;
}
-int smu7_enable_dpm_tasks(struct pp_hwmgr *hwmgr)
+static int smu7_enable_dpm_tasks(struct pp_hwmgr *hwmgr)
{
int tmp_result = 0;
int result = 0;
@@ -1277,7 +1277,7 @@ int smu7_enable_dpm_tasks(struct pp_hwmgr *hwmgr)
return 0;
}
-int smu7_disable_dpm_tasks(struct pp_hwmgr *hwmgr)
+static int smu7_disable_dpm_tasks(struct pp_hwmgr *hwmgr)
{
int tmp_result, result = 0;
@@ -1341,7 +1341,7 @@ int smu7_disable_dpm_tasks(struct pp_hwmgr *hwmgr)
return result;
}
-int smu7_reset_asic_tasks(struct pp_hwmgr *hwmgr)
+static int smu7_reset_asic_tasks(struct pp_hwmgr *hwmgr)
{
return 0;
@@ -1864,7 +1864,7 @@ static int smu7_set_private_data_based_on_pptable_v1(struct pp_hwmgr *hwmgr)
return 0;
}
-int smu7_patch_voltage_workaround(struct pp_hwmgr *hwmgr)
+static int smu7_patch_voltage_workaround(struct pp_hwmgr *hwmgr)
{
struct phm_ppt_v1_information *table_info =
(struct phm_ppt_v1_information *)(hwmgr->pptable);
@@ -2253,7 +2253,7 @@ static int smu7_set_private_data_based_on_pptable_v0(struct pp_hwmgr *hwmgr)
return 0;
}
-int smu7_hwmgr_backend_init(struct pp_hwmgr *hwmgr)
+static int smu7_hwmgr_backend_init(struct pp_hwmgr *hwmgr)
{
struct smu7_hwmgr *data;
int result;
@@ -3672,14 +3672,16 @@ static int smu7_set_max_fan_pwm_output(struct pp_hwmgr *hwmgr, uint16_t us_max_f
PPSMC_MSG_SetFanPwmMax, us_max_fan_pwm);
}
-int smu7_notify_smc_display_change(struct pp_hwmgr *hwmgr, bool has_display)
+static int
+smu7_notify_smc_display_change(struct pp_hwmgr *hwmgr, bool has_display)
{
PPSMC_Msg msg = has_display ? (PPSMC_Msg)PPSMC_HasDisplay : (PPSMC_Msg)PPSMC_NoDisplay;
return (smum_send_msg_to_smc(hwmgr->smumgr, msg) == 0) ? 0 : -1;
}
-int smu7_notify_smc_display_config_after_ps_adjustment(struct pp_hwmgr *hwmgr)
+static int
+smu7_notify_smc_display_config_after_ps_adjustment(struct pp_hwmgr *hwmgr)
{
uint32_t num_active_displays = 0;
struct cgs_display_info info = {0};
@@ -3701,7 +3703,7 @@ int smu7_notify_smc_display_config_after_ps_adjustment(struct pp_hwmgr *hwmgr)
* @param hwmgr the address of the powerplay hardware manager.
* @return always OK
*/
-int smu7_program_display_gap(struct pp_hwmgr *hwmgr)
+static int smu7_program_display_gap(struct pp_hwmgr *hwmgr)
{
struct smu7_hwmgr *data = (struct smu7_hwmgr *)(hwmgr->backend);
uint32_t num_active_displays = 0;
@@ -3751,7 +3753,7 @@ int smu7_program_display_gap(struct pp_hwmgr *hwmgr)
return 0;
}
-int smu7_display_configuration_changed_task(struct pp_hwmgr *hwmgr)
+static int smu7_display_configuration_changed_task(struct pp_hwmgr *hwmgr)
{
return smu7_program_display_gap(hwmgr);
}
@@ -3775,13 +3777,14 @@ static int smu7_set_max_fan_rpm_output(struct pp_hwmgr *hwmgr, uint16_t us_max_f
PPSMC_MSG_SetFanRpmMax, us_max_fan_rpm);
}
-int smu7_register_internal_thermal_interrupt(struct pp_hwmgr *hwmgr,
+static int smu7_register_internal_thermal_interrupt(struct pp_hwmgr *hwmgr,
const void *thermal_interrupt_info)
{
return 0;
}
-bool smu7_check_smc_update_required_for_display_configuration(struct pp_hwmgr *hwmgr)
+static bool smu7_check_smc_update_required_for_display_configuration(
+ struct pp_hwmgr *hwmgr)
{
struct smu7_hwmgr *data = (struct smu7_hwmgr *)(hwmgr->backend);
bool is_update_required = false;
@@ -3810,7 +3813,9 @@ static inline bool smu7_are_power_levels_equal(const struct smu7_performance_lev
(pl1->pcie_lane == pl2->pcie_lane));
}
-int smu7_check_states_equal(struct pp_hwmgr *hwmgr, const struct pp_hw_power_state *pstate1, const struct pp_hw_power_state *pstate2, bool *equal)
+static int smu7_check_states_equal(struct pp_hwmgr *hwmgr,
+ const struct pp_hw_power_state *pstate1,
+ const struct pp_hw_power_state *pstate2, bool *equal)
{
const struct smu7_power_state *psa;
const struct smu7_power_state *psb;
@@ -3843,7 +3848,7 @@ int smu7_check_states_equal(struct pp_hwmgr *hwmgr, const struct pp_hw_power_sta
return 0;
}
-int smu7_upload_mc_firmware(struct pp_hwmgr *hwmgr)
+static int smu7_upload_mc_firmware(struct pp_hwmgr *hwmgr)
{
struct smu7_hwmgr *data = (struct smu7_hwmgr *)(hwmgr->backend);
@@ -3972,7 +3977,7 @@ static int smu7_init_sclk_threshold(struct pp_hwmgr *hwmgr)
return 0;
}
-int smu7_setup_asic_task(struct pp_hwmgr *hwmgr)
+static int smu7_setup_asic_task(struct pp_hwmgr *hwmgr)
{
int tmp_result, result = 0;
diff --git a/drivers/gpu/drm/amd/powerplay/smumgr/fiji_smc.c b/drivers/gpu/drm/amd/powerplay/smumgr/fiji_smc.c
index 76310ac..e7e8944 100644
--- a/drivers/gpu/drm/amd/powerplay/smumgr/fiji_smc.c
+++ b/drivers/gpu/drm/amd/powerplay/smumgr/fiji_smc.c
@@ -2049,7 +2049,7 @@ int fiji_thermal_setup_fan_table(struct pp_hwmgr *hwmgr)
return 0;
}
-int fiji_program_mem_timing_parameters(struct pp_hwmgr *hwmgr)
+static int fiji_program_mem_timing_parameters(struct pp_hwmgr *hwmgr)
{
struct smu7_hwmgr *data = (struct smu7_hwmgr *)(hwmgr->backend);
diff --git a/drivers/gpu/drm/amd/powerplay/smumgr/fiji_smumgr.c b/drivers/gpu/drm/amd/powerplay/smumgr/fiji_smumgr.c
index 02fe1df..b86e48f 100755
--- a/drivers/gpu/drm/amd/powerplay/smumgr/fiji_smumgr.c
+++ b/drivers/gpu/drm/amd/powerplay/smumgr/fiji_smumgr.c
@@ -159,7 +159,7 @@ static int fiji_start_smu_in_non_protection_mode(struct pp_smumgr *smumgr)
return result;
}
-int fiji_setup_pwr_virus(struct pp_smumgr *smumgr)
+static int fiji_setup_pwr_virus(struct pp_smumgr *smumgr)
{
int i, result = -1;
uint32_t reg, data;
@@ -224,7 +224,7 @@ static int fiji_start_avfs_btc(struct pp_smumgr *smumgr)
return result;
}
-int fiji_setup_pm_fuse_for_avfs(struct pp_smumgr *smumgr)
+static int fiji_setup_pm_fuse_for_avfs(struct pp_smumgr *smumgr)
{
int result = 0;
uint32_t table_start;
@@ -260,7 +260,7 @@ int fiji_setup_pm_fuse_for_avfs(struct pp_smumgr *smumgr)
return result;
}
-int fiji_setup_graphics_level_structure(struct pp_smumgr *smumgr)
+static int fiji_setup_graphics_level_structure(struct pp_smumgr *smumgr)
{
int32_t vr_config;
uint32_t table_start;
@@ -299,7 +299,7 @@ int fiji_setup_graphics_level_structure(struct pp_smumgr *smumgr)
}
/* Work in Progress */
-int fiji_restore_vft_table(struct pp_smumgr *smumgr)
+static int fiji_restore_vft_table(struct pp_smumgr *smumgr)
{
struct fiji_smumgr *priv = (struct fiji_smumgr *)(smumgr->backend);
@@ -311,7 +311,7 @@ int fiji_restore_vft_table(struct pp_smumgr *smumgr)
}
/* Work in Progress */
-int fiji_save_vft_table(struct pp_smumgr *smumgr)
+static int fiji_save_vft_table(struct pp_smumgr *smumgr)
{
struct fiji_smumgr *priv = (struct fiji_smumgr *)(smumgr->backend);
@@ -322,7 +322,7 @@ int fiji_save_vft_table(struct pp_smumgr *smumgr)
return -EINVAL;
}
-int fiji_avfs_event_mgr(struct pp_smumgr *smumgr, bool smu_started)
+static int fiji_avfs_event_mgr(struct pp_smumgr *smumgr, bool smu_started)
{
struct fiji_smumgr *priv = (struct fiji_smumgr *)(smumgr->backend);
diff --git a/drivers/gpu/drm/amd/powerplay/smumgr/polaris10_smumgr.c b/drivers/gpu/drm/amd/powerplay/smumgr/polaris10_smumgr.c
index 5c3598a..f38a687 100644
--- a/drivers/gpu/drm/amd/powerplay/smumgr/polaris10_smumgr.c
+++ b/drivers/gpu/drm/amd/powerplay/smumgr/polaris10_smumgr.c
@@ -118,7 +118,7 @@ static int polaris10_perform_btc(struct pp_smumgr *smumgr)
}
-int polaris10_setup_graphics_level_structure(struct pp_smumgr *smumgr)
+static int polaris10_setup_graphics_level_structure(struct pp_smumgr *smumgr)
{
uint32_t vr_config;
uint32_t dpm_table_start;
@@ -172,7 +172,8 @@ int polaris10_setup_graphics_level_structure(struct pp_smumgr *smumgr)
return 0;
}
-int polaris10_avfs_event_mgr(struct pp_smumgr *smumgr, bool SMU_VFT_INTACT)
+static int
+polaris10_avfs_event_mgr(struct pp_smumgr *smumgr, bool SMU_VFT_INTACT)
{
struct polaris10_smumgr *smu_data = (struct polaris10_smumgr *)(smumgr->backend);
--
2.7.4
Oh dear, still more of these? Why not perhaps fix them all at once into
a series?
In any case, Acked-by: Edward O'Callaghan <[email protected]>
On 10/22/2016 07:56 PM, Baoyou Xie wrote:
> We get a few warnings when building kernel with W=1:
> drivers/gpu/drm/amd/amdgpu/../powerplay/smumgr/fiji_smumgr.c:162:5: warning: no previous prototype for 'fiji_setup_pwr_virus' [-Wmissing-prototypes]
> drivers/gpu/drm/amd/amdgpu/../powerplay/smumgr/fiji_smc.c:2052:5: warning: no previous prototype for 'fiji_program_mem_timing_parameters' [-Wmissing-prototypes]
> drivers/gpu/drm/amd/amdgpu/../powerplay/smumgr/polaris10_smumgr.c:175:5: warning: no previous prototype for 'polaris10_avfs_event_mgr' [-Wmissing-prototypes]
> drivers/gpu/drm/amd/amdgpu/../powerplay/hwmgr/cz_hwmgr.c:1020:5: warning: no previous prototype for 'cz_tf_reset_acp_boot_level' [-Wmissing-prototypes]
> drivers/gpu/drm/amd/amdgpu/../powerplay/hwmgr/smu7_hwmgr.c:92:26: warning: no previous prototype for 'cast_phw_smu7_power_state' [-Wmissing-prototypes]
> ....
>
> In fact, these functions are only used in the file in which they are
> declared and don't need a declaration, but can be made static.
> So this patch marks these functions with 'static'.
>
> Signed-off-by: Baoyou Xie <[email protected]>
> ---
> drivers/gpu/drm/amd/powerplay/amd_powerplay.c | 6 ++-
> drivers/gpu/drm/amd/powerplay/hwmgr/cz_hwmgr.c | 12 +++---
> .../amd/powerplay/hwmgr/process_pptables_v1_0.c | 6 +--
> .../gpu/drm/amd/powerplay/hwmgr/processpptables.c | 4 +-
> .../amd/powerplay/hwmgr/smu7_clockpowergating.c | 10 ++---
> drivers/gpu/drm/amd/powerplay/hwmgr/smu7_hwmgr.c | 49 ++++++++++++----------
> drivers/gpu/drm/amd/powerplay/smumgr/fiji_smc.c | 2 +-
> drivers/gpu/drm/amd/powerplay/smumgr/fiji_smumgr.c | 12 +++---
> .../drm/amd/powerplay/smumgr/polaris10_smumgr.c | 5 ++-
> 9 files changed, 57 insertions(+), 49 deletions(-)
>
> diff --git a/drivers/gpu/drm/amd/powerplay/amd_powerplay.c b/drivers/gpu/drm/amd/powerplay/amd_powerplay.c
> index 7174f7a..eecfbc5 100644
> --- a/drivers/gpu/drm/amd/powerplay/amd_powerplay.c
> +++ b/drivers/gpu/drm/amd/powerplay/amd_powerplay.c
> @@ -436,7 +436,9 @@ static enum PP_StateUILabel power_state_convert(enum amd_pm_state_type state)
> }
> }
>
> -int pp_dpm_dispatch_tasks(void *handle, enum amd_pp_event event_id, void *input, void *output)
> +static int
> +pp_dpm_dispatch_tasks(void *handle, enum amd_pp_event event_id, void *input,
> + void *output)
> {
> int ret = 0;
> struct pp_instance *pp_handle;
> @@ -475,7 +477,7 @@ int pp_dpm_dispatch_tasks(void *handle, enum amd_pp_event event_id, void *input,
> return ret;
> }
>
> -enum amd_pm_state_type pp_dpm_get_current_power_state(void *handle)
> +static enum amd_pm_state_type pp_dpm_get_current_power_state(void *handle)
> {
> struct pp_hwmgr *hwmgr;
> struct pp_power_state *state;
> diff --git a/drivers/gpu/drm/amd/powerplay/hwmgr/cz_hwmgr.c b/drivers/gpu/drm/amd/powerplay/hwmgr/cz_hwmgr.c
> index 9604249..4b14f25 100644
> --- a/drivers/gpu/drm/amd/powerplay/hwmgr/cz_hwmgr.c
> +++ b/drivers/gpu/drm/amd/powerplay/hwmgr/cz_hwmgr.c
> @@ -66,7 +66,7 @@ static const struct cz_power_state *cast_const_PhwCzPowerState(
> return (struct cz_power_state *)hw_ps;
> }
>
> -uint32_t cz_get_eclk_level(struct pp_hwmgr *hwmgr,
> +static uint32_t cz_get_eclk_level(struct pp_hwmgr *hwmgr,
> uint32_t clock, uint32_t msg)
> {
> int i = 0;
> @@ -1017,7 +1017,7 @@ static int cz_tf_program_bootup_state(struct pp_hwmgr *hwmgr, void *input,
> return 0;
> }
>
> -int cz_tf_reset_acp_boot_level(struct pp_hwmgr *hwmgr, void *input,
> +static int cz_tf_reset_acp_boot_level(struct pp_hwmgr *hwmgr, void *input,
> void *output, void *storage, int result)
> {
> struct cz_hwmgr *cz_hwmgr = (struct cz_hwmgr *)(hwmgr->backend);
> @@ -1225,7 +1225,7 @@ static int cz_hwmgr_backend_fini(struct pp_hwmgr *hwmgr)
> return 0;
> }
>
> -int cz_phm_force_dpm_highest(struct pp_hwmgr *hwmgr)
> +static int cz_phm_force_dpm_highest(struct pp_hwmgr *hwmgr)
> {
> struct cz_hwmgr *cz_hwmgr = (struct cz_hwmgr *)(hwmgr->backend);
>
> @@ -1239,7 +1239,7 @@ int cz_phm_force_dpm_highest(struct pp_hwmgr *hwmgr)
> return 0;
> }
>
> -int cz_phm_unforce_dpm_levels(struct pp_hwmgr *hwmgr)
> +static int cz_phm_unforce_dpm_levels(struct pp_hwmgr *hwmgr)
> {
> struct cz_hwmgr *cz_hwmgr = (struct cz_hwmgr *)(hwmgr->backend);
> struct phm_clock_voltage_dependency_table *table =
> @@ -1277,7 +1277,7 @@ int cz_phm_unforce_dpm_levels(struct pp_hwmgr *hwmgr)
> return 0;
> }
>
> -int cz_phm_force_dpm_lowest(struct pp_hwmgr *hwmgr)
> +static int cz_phm_force_dpm_lowest(struct pp_hwmgr *hwmgr)
> {
> struct cz_hwmgr *cz_hwmgr = (struct cz_hwmgr *)(hwmgr->backend);
>
> @@ -1533,7 +1533,7 @@ static int cz_dpm_get_pp_table_entry(struct pp_hwmgr *hwmgr,
> return result;
> }
>
> -int cz_get_power_state_size(struct pp_hwmgr *hwmgr)
> +static int cz_get_power_state_size(struct pp_hwmgr *hwmgr)
> {
> return sizeof(struct cz_power_state);
> }
> diff --git a/drivers/gpu/drm/amd/powerplay/hwmgr/process_pptables_v1_0.c b/drivers/gpu/drm/amd/powerplay/hwmgr/process_pptables_v1_0.c
> index 7de701d..155cd0d 100644
> --- a/drivers/gpu/drm/amd/powerplay/hwmgr/process_pptables_v1_0.c
> +++ b/drivers/gpu/drm/amd/powerplay/hwmgr/process_pptables_v1_0.c
> @@ -131,7 +131,7 @@ static int set_platform_caps(struct pp_hwmgr *hwmgr, uint32_t powerplay_caps)
> /**
> * Private Function to get the PowerPlay Table Address.
> */
> -const void *get_powerplay_table(struct pp_hwmgr *hwmgr)
> +static const void *get_powerplay_table(struct pp_hwmgr *hwmgr)
> {
> int index = GetIndexIntoMasterTable(DATA, PowerPlayInfo);
>
> @@ -1049,7 +1049,7 @@ static int check_powerplay_tables(
> return 0;
> }
>
> -int pp_tables_v1_0_initialize(struct pp_hwmgr *hwmgr)
> +static int pp_tables_v1_0_initialize(struct pp_hwmgr *hwmgr)
> {
> int result = 0;
> const ATOM_Tonga_POWERPLAYTABLE *powerplay_table;
> @@ -1100,7 +1100,7 @@ int pp_tables_v1_0_initialize(struct pp_hwmgr *hwmgr)
> return result;
> }
>
> -int pp_tables_v1_0_uninitialize(struct pp_hwmgr *hwmgr)
> +static int pp_tables_v1_0_uninitialize(struct pp_hwmgr *hwmgr)
> {
> struct phm_ppt_v1_information *pp_table_information =
> (struct phm_ppt_v1_information *)(hwmgr->pptable);
> diff --git a/drivers/gpu/drm/amd/powerplay/hwmgr/processpptables.c b/drivers/gpu/drm/amd/powerplay/hwmgr/processpptables.c
> index ccf7ebe..bd1f190 100644
> --- a/drivers/gpu/drm/amd/powerplay/hwmgr/processpptables.c
> +++ b/drivers/gpu/drm/amd/powerplay/hwmgr/processpptables.c
> @@ -1507,7 +1507,7 @@ static int init_phase_shedding_table(struct pp_hwmgr *hwmgr,
> return 0;
> }
>
> -int get_number_of_vce_state_table_entries(
> +static int get_number_of_vce_state_table_entries(
> struct pp_hwmgr *hwmgr)
> {
> const ATOM_PPLIB_POWERPLAYTABLE *table =
> @@ -1521,7 +1521,7 @@ int get_number_of_vce_state_table_entries(
> return 0;
> }
>
> -int get_vce_state_table_entry(struct pp_hwmgr *hwmgr,
> +static int get_vce_state_table_entry(struct pp_hwmgr *hwmgr,
> unsigned long i,
> struct pp_vce_state *vce_state,
> void **clock_info,
> diff --git a/drivers/gpu/drm/amd/powerplay/hwmgr/smu7_clockpowergating.c b/drivers/gpu/drm/amd/powerplay/hwmgr/smu7_clockpowergating.c
> index 6eb6db1..f5a58d4 100644
> --- a/drivers/gpu/drm/amd/powerplay/hwmgr/smu7_clockpowergating.c
> +++ b/drivers/gpu/drm/amd/powerplay/hwmgr/smu7_clockpowergating.c
> @@ -75,7 +75,7 @@ int smu7_powerdown_uvd(struct pp_hwmgr *hwmgr)
> return 0;
> }
>
> -int smu7_powerup_uvd(struct pp_hwmgr *hwmgr)
> +static int smu7_powerup_uvd(struct pp_hwmgr *hwmgr)
> {
> if (phm_cf_want_uvd_power_gating(hwmgr)) {
> if (phm_cap_enabled(hwmgr->platform_descriptor.platformCaps,
> @@ -91,7 +91,7 @@ int smu7_powerup_uvd(struct pp_hwmgr *hwmgr)
> return 0;
> }
>
> -int smu7_powerdown_vce(struct pp_hwmgr *hwmgr)
> +static int smu7_powerdown_vce(struct pp_hwmgr *hwmgr)
> {
> if (phm_cf_want_vce_power_gating(hwmgr))
> return smum_send_msg_to_smc(hwmgr->smumgr,
> @@ -99,7 +99,7 @@ int smu7_powerdown_vce(struct pp_hwmgr *hwmgr)
> return 0;
> }
>
> -int smu7_powerup_vce(struct pp_hwmgr *hwmgr)
> +static int smu7_powerup_vce(struct pp_hwmgr *hwmgr)
> {
> if (phm_cf_want_vce_power_gating(hwmgr))
> return smum_send_msg_to_smc(hwmgr->smumgr,
> @@ -107,7 +107,7 @@ int smu7_powerup_vce(struct pp_hwmgr *hwmgr)
> return 0;
> }
>
> -int smu7_powerdown_samu(struct pp_hwmgr *hwmgr)
> +static int smu7_powerdown_samu(struct pp_hwmgr *hwmgr)
> {
> if (phm_cap_enabled(hwmgr->platform_descriptor.platformCaps,
> PHM_PlatformCaps_SamuPowerGating))
> @@ -116,7 +116,7 @@ int smu7_powerdown_samu(struct pp_hwmgr *hwmgr)
> return 0;
> }
>
> -int smu7_powerup_samu(struct pp_hwmgr *hwmgr)
> +static int smu7_powerup_samu(struct pp_hwmgr *hwmgr)
> {
> if (phm_cap_enabled(hwmgr->platform_descriptor.platformCaps,
> PHM_PlatformCaps_SamuPowerGating))
> diff --git a/drivers/gpu/drm/amd/powerplay/hwmgr/smu7_hwmgr.c b/drivers/gpu/drm/amd/powerplay/hwmgr/smu7_hwmgr.c
> index 609996c..33b7528 100644
> --- a/drivers/gpu/drm/amd/powerplay/hwmgr/smu7_hwmgr.c
> +++ b/drivers/gpu/drm/amd/powerplay/hwmgr/smu7_hwmgr.c
> @@ -89,7 +89,7 @@ enum DPM_EVENT_SRC {
>
> static const unsigned long PhwVIslands_Magic = (unsigned long)(PHM_VIslands_Magic);
>
> -struct smu7_power_state *cast_phw_smu7_power_state(
> +static struct smu7_power_state *cast_phw_smu7_power_state(
> struct pp_hw_power_state *hw_ps)
> {
> PP_ASSERT_WITH_CODE((PhwVIslands_Magic == hw_ps->magic),
> @@ -99,7 +99,7 @@ struct smu7_power_state *cast_phw_smu7_power_state(
> return (struct smu7_power_state *)hw_ps;
> }
>
> -const struct smu7_power_state *cast_const_phw_smu7_power_state(
> +static const struct smu7_power_state *cast_const_phw_smu7_power_state(
> const struct pp_hw_power_state *hw_ps)
> {
> PP_ASSERT_WITH_CODE((PhwVIslands_Magic == hw_ps->magic),
> @@ -115,7 +115,7 @@ const struct smu7_power_state *cast_const_phw_smu7_power_state(
> * @param hwmgr the address of the powerplay hardware manager.
> * @return always 0
> */
> -int smu7_get_mc_microcode_version (struct pp_hwmgr *hwmgr)
> +static int smu7_get_mc_microcode_version(struct pp_hwmgr *hwmgr)
> {
> cgs_write_register(hwmgr->device, mmMC_SEQ_IO_DEBUG_INDEX, 0x9F);
>
> @@ -124,7 +124,7 @@ int smu7_get_mc_microcode_version (struct pp_hwmgr *hwmgr)
> return 0;
> }
>
> -uint16_t smu7_get_current_pcie_speed(struct pp_hwmgr *hwmgr)
> +static uint16_t smu7_get_current_pcie_speed(struct pp_hwmgr *hwmgr)
> {
> uint32_t speedCntl = 0;
>
> @@ -135,7 +135,7 @@ uint16_t smu7_get_current_pcie_speed(struct pp_hwmgr *hwmgr)
> PCIE_LC_SPEED_CNTL, LC_CURRENT_DATA_RATE));
> }
>
> -int smu7_get_current_pcie_lane_number(struct pp_hwmgr *hwmgr)
> +static int smu7_get_current_pcie_lane_number(struct pp_hwmgr *hwmgr)
> {
> uint32_t link_width;
>
> @@ -155,7 +155,7 @@ int smu7_get_current_pcie_lane_number(struct pp_hwmgr *hwmgr)
> * @param pHwMgr the address of the powerplay hardware manager.
> * @return always PP_Result_OK
> */
> -int smu7_enable_smc_voltage_controller(struct pp_hwmgr *hwmgr)
> +static int smu7_enable_smc_voltage_controller(struct pp_hwmgr *hwmgr)
> {
> if (hwmgr->feature_mask & PP_SMC_VOLTAGE_CONTROL_MASK)
> smum_send_msg_to_smc(hwmgr->smumgr, PPSMC_MSG_Voltage_Cntl_Enable);
> @@ -802,7 +802,7 @@ static int smu7_setup_dpm_tables_v1(struct pp_hwmgr *hwmgr)
> return 0;
> }
>
> -int smu7_setup_default_dpm_tables(struct pp_hwmgr *hwmgr)
> +static int smu7_setup_default_dpm_tables(struct pp_hwmgr *hwmgr)
> {
> struct smu7_hwmgr *data = (struct smu7_hwmgr *)(hwmgr->backend);
>
> @@ -1153,7 +1153,7 @@ static int smu7_disable_thermal_auto_throttle(struct pp_hwmgr *hwmgr)
> return smu7_disable_auto_throttle_source(hwmgr, PHM_AutoThrottleSource_Thermal);
> }
>
> -int smu7_pcie_performance_request(struct pp_hwmgr *hwmgr)
> +static int smu7_pcie_performance_request(struct pp_hwmgr *hwmgr)
> {
> struct smu7_hwmgr *data = (struct smu7_hwmgr *)(hwmgr->backend);
> data->pcie_performance_request = true;
> @@ -1161,7 +1161,7 @@ int smu7_pcie_performance_request(struct pp_hwmgr *hwmgr)
> return 0;
> }
>
> -int smu7_enable_dpm_tasks(struct pp_hwmgr *hwmgr)
> +static int smu7_enable_dpm_tasks(struct pp_hwmgr *hwmgr)
> {
> int tmp_result = 0;
> int result = 0;
> @@ -1277,7 +1277,7 @@ int smu7_enable_dpm_tasks(struct pp_hwmgr *hwmgr)
> return 0;
> }
>
> -int smu7_disable_dpm_tasks(struct pp_hwmgr *hwmgr)
> +static int smu7_disable_dpm_tasks(struct pp_hwmgr *hwmgr)
> {
> int tmp_result, result = 0;
>
> @@ -1341,7 +1341,7 @@ int smu7_disable_dpm_tasks(struct pp_hwmgr *hwmgr)
> return result;
> }
>
> -int smu7_reset_asic_tasks(struct pp_hwmgr *hwmgr)
> +static int smu7_reset_asic_tasks(struct pp_hwmgr *hwmgr)
> {
>
> return 0;
> @@ -1864,7 +1864,7 @@ static int smu7_set_private_data_based_on_pptable_v1(struct pp_hwmgr *hwmgr)
> return 0;
> }
>
> -int smu7_patch_voltage_workaround(struct pp_hwmgr *hwmgr)
> +static int smu7_patch_voltage_workaround(struct pp_hwmgr *hwmgr)
> {
> struct phm_ppt_v1_information *table_info =
> (struct phm_ppt_v1_information *)(hwmgr->pptable);
> @@ -2253,7 +2253,7 @@ static int smu7_set_private_data_based_on_pptable_v0(struct pp_hwmgr *hwmgr)
> return 0;
> }
>
> -int smu7_hwmgr_backend_init(struct pp_hwmgr *hwmgr)
> +static int smu7_hwmgr_backend_init(struct pp_hwmgr *hwmgr)
> {
> struct smu7_hwmgr *data;
> int result;
> @@ -3672,14 +3672,16 @@ static int smu7_set_max_fan_pwm_output(struct pp_hwmgr *hwmgr, uint16_t us_max_f
> PPSMC_MSG_SetFanPwmMax, us_max_fan_pwm);
> }
>
> -int smu7_notify_smc_display_change(struct pp_hwmgr *hwmgr, bool has_display)
> +static int
> +smu7_notify_smc_display_change(struct pp_hwmgr *hwmgr, bool has_display)
> {
> PPSMC_Msg msg = has_display ? (PPSMC_Msg)PPSMC_HasDisplay : (PPSMC_Msg)PPSMC_NoDisplay;
>
> return (smum_send_msg_to_smc(hwmgr->smumgr, msg) == 0) ? 0 : -1;
> }
>
> -int smu7_notify_smc_display_config_after_ps_adjustment(struct pp_hwmgr *hwmgr)
> +static int
> +smu7_notify_smc_display_config_after_ps_adjustment(struct pp_hwmgr *hwmgr)
> {
> uint32_t num_active_displays = 0;
> struct cgs_display_info info = {0};
> @@ -3701,7 +3703,7 @@ int smu7_notify_smc_display_config_after_ps_adjustment(struct pp_hwmgr *hwmgr)
> * @param hwmgr the address of the powerplay hardware manager.
> * @return always OK
> */
> -int smu7_program_display_gap(struct pp_hwmgr *hwmgr)
> +static int smu7_program_display_gap(struct pp_hwmgr *hwmgr)
> {
> struct smu7_hwmgr *data = (struct smu7_hwmgr *)(hwmgr->backend);
> uint32_t num_active_displays = 0;
> @@ -3751,7 +3753,7 @@ int smu7_program_display_gap(struct pp_hwmgr *hwmgr)
> return 0;
> }
>
> -int smu7_display_configuration_changed_task(struct pp_hwmgr *hwmgr)
> +static int smu7_display_configuration_changed_task(struct pp_hwmgr *hwmgr)
> {
> return smu7_program_display_gap(hwmgr);
> }
> @@ -3775,13 +3777,14 @@ static int smu7_set_max_fan_rpm_output(struct pp_hwmgr *hwmgr, uint16_t us_max_f
> PPSMC_MSG_SetFanRpmMax, us_max_fan_rpm);
> }
>
> -int smu7_register_internal_thermal_interrupt(struct pp_hwmgr *hwmgr,
> +static int smu7_register_internal_thermal_interrupt(struct pp_hwmgr *hwmgr,
> const void *thermal_interrupt_info)
> {
> return 0;
> }
>
> -bool smu7_check_smc_update_required_for_display_configuration(struct pp_hwmgr *hwmgr)
> +static bool smu7_check_smc_update_required_for_display_configuration(
> + struct pp_hwmgr *hwmgr)
> {
> struct smu7_hwmgr *data = (struct smu7_hwmgr *)(hwmgr->backend);
> bool is_update_required = false;
> @@ -3810,7 +3813,9 @@ static inline bool smu7_are_power_levels_equal(const struct smu7_performance_lev
> (pl1->pcie_lane == pl2->pcie_lane));
> }
>
> -int smu7_check_states_equal(struct pp_hwmgr *hwmgr, const struct pp_hw_power_state *pstate1, const struct pp_hw_power_state *pstate2, bool *equal)
> +static int smu7_check_states_equal(struct pp_hwmgr *hwmgr,
> + const struct pp_hw_power_state *pstate1,
> + const struct pp_hw_power_state *pstate2, bool *equal)
> {
> const struct smu7_power_state *psa;
> const struct smu7_power_state *psb;
> @@ -3843,7 +3848,7 @@ int smu7_check_states_equal(struct pp_hwmgr *hwmgr, const struct pp_hw_power_sta
> return 0;
> }
>
> -int smu7_upload_mc_firmware(struct pp_hwmgr *hwmgr)
> +static int smu7_upload_mc_firmware(struct pp_hwmgr *hwmgr)
> {
> struct smu7_hwmgr *data = (struct smu7_hwmgr *)(hwmgr->backend);
>
> @@ -3972,7 +3977,7 @@ static int smu7_init_sclk_threshold(struct pp_hwmgr *hwmgr)
> return 0;
> }
>
> -int smu7_setup_asic_task(struct pp_hwmgr *hwmgr)
> +static int smu7_setup_asic_task(struct pp_hwmgr *hwmgr)
> {
> int tmp_result, result = 0;
>
> diff --git a/drivers/gpu/drm/amd/powerplay/smumgr/fiji_smc.c b/drivers/gpu/drm/amd/powerplay/smumgr/fiji_smc.c
> index 76310ac..e7e8944 100644
> --- a/drivers/gpu/drm/amd/powerplay/smumgr/fiji_smc.c
> +++ b/drivers/gpu/drm/amd/powerplay/smumgr/fiji_smc.c
> @@ -2049,7 +2049,7 @@ int fiji_thermal_setup_fan_table(struct pp_hwmgr *hwmgr)
> return 0;
> }
>
> -int fiji_program_mem_timing_parameters(struct pp_hwmgr *hwmgr)
> +static int fiji_program_mem_timing_parameters(struct pp_hwmgr *hwmgr)
> {
> struct smu7_hwmgr *data = (struct smu7_hwmgr *)(hwmgr->backend);
>
> diff --git a/drivers/gpu/drm/amd/powerplay/smumgr/fiji_smumgr.c b/drivers/gpu/drm/amd/powerplay/smumgr/fiji_smumgr.c
> index 02fe1df..b86e48f 100755
> --- a/drivers/gpu/drm/amd/powerplay/smumgr/fiji_smumgr.c
> +++ b/drivers/gpu/drm/amd/powerplay/smumgr/fiji_smumgr.c
> @@ -159,7 +159,7 @@ static int fiji_start_smu_in_non_protection_mode(struct pp_smumgr *smumgr)
> return result;
> }
>
> -int fiji_setup_pwr_virus(struct pp_smumgr *smumgr)
> +static int fiji_setup_pwr_virus(struct pp_smumgr *smumgr)
> {
> int i, result = -1;
> uint32_t reg, data;
> @@ -224,7 +224,7 @@ static int fiji_start_avfs_btc(struct pp_smumgr *smumgr)
> return result;
> }
>
> -int fiji_setup_pm_fuse_for_avfs(struct pp_smumgr *smumgr)
> +static int fiji_setup_pm_fuse_for_avfs(struct pp_smumgr *smumgr)
> {
> int result = 0;
> uint32_t table_start;
> @@ -260,7 +260,7 @@ int fiji_setup_pm_fuse_for_avfs(struct pp_smumgr *smumgr)
> return result;
> }
>
> -int fiji_setup_graphics_level_structure(struct pp_smumgr *smumgr)
> +static int fiji_setup_graphics_level_structure(struct pp_smumgr *smumgr)
> {
> int32_t vr_config;
> uint32_t table_start;
> @@ -299,7 +299,7 @@ int fiji_setup_graphics_level_structure(struct pp_smumgr *smumgr)
> }
>
> /* Work in Progress */
> -int fiji_restore_vft_table(struct pp_smumgr *smumgr)
> +static int fiji_restore_vft_table(struct pp_smumgr *smumgr)
> {
> struct fiji_smumgr *priv = (struct fiji_smumgr *)(smumgr->backend);
>
> @@ -311,7 +311,7 @@ int fiji_restore_vft_table(struct pp_smumgr *smumgr)
> }
>
> /* Work in Progress */
> -int fiji_save_vft_table(struct pp_smumgr *smumgr)
> +static int fiji_save_vft_table(struct pp_smumgr *smumgr)
> {
> struct fiji_smumgr *priv = (struct fiji_smumgr *)(smumgr->backend);
>
> @@ -322,7 +322,7 @@ int fiji_save_vft_table(struct pp_smumgr *smumgr)
> return -EINVAL;
> }
>
> -int fiji_avfs_event_mgr(struct pp_smumgr *smumgr, bool smu_started)
> +static int fiji_avfs_event_mgr(struct pp_smumgr *smumgr, bool smu_started)
> {
> struct fiji_smumgr *priv = (struct fiji_smumgr *)(smumgr->backend);
>
> diff --git a/drivers/gpu/drm/amd/powerplay/smumgr/polaris10_smumgr.c b/drivers/gpu/drm/amd/powerplay/smumgr/polaris10_smumgr.c
> index 5c3598a..f38a687 100644
> --- a/drivers/gpu/drm/amd/powerplay/smumgr/polaris10_smumgr.c
> +++ b/drivers/gpu/drm/amd/powerplay/smumgr/polaris10_smumgr.c
> @@ -118,7 +118,7 @@ static int polaris10_perform_btc(struct pp_smumgr *smumgr)
> }
>
>
> -int polaris10_setup_graphics_level_structure(struct pp_smumgr *smumgr)
> +static int polaris10_setup_graphics_level_structure(struct pp_smumgr *smumgr)
> {
> uint32_t vr_config;
> uint32_t dpm_table_start;
> @@ -172,7 +172,8 @@ int polaris10_setup_graphics_level_structure(struct pp_smumgr *smumgr)
> return 0;
> }
>
> -int polaris10_avfs_event_mgr(struct pp_smumgr *smumgr, bool SMU_VFT_INTACT)
> +static int
> +polaris10_avfs_event_mgr(struct pp_smumgr *smumgr, bool SMU_VFT_INTACT)
> {
> struct polaris10_smumgr *smu_data = (struct polaris10_smumgr *)(smumgr->backend);
>
>
On Sat, Oct 22, 2016 at 4:56 AM, Baoyou Xie <[email protected]> wrote:
> We get a few warnings when building kernel with W=1:
> drivers/gpu/drm/amd/amdgpu/../powerplay/smumgr/fiji_smumgr.c:162:5: warning: no previous prototype for 'fiji_setup_pwr_virus' [-Wmissing-prototypes]
> drivers/gpu/drm/amd/amdgpu/../powerplay/smumgr/fiji_smc.c:2052:5: warning: no previous prototype for 'fiji_program_mem_timing_parameters' [-Wmissing-prototypes]
> drivers/gpu/drm/amd/amdgpu/../powerplay/smumgr/polaris10_smumgr.c:175:5: warning: no previous prototype for 'polaris10_avfs_event_mgr' [-Wmissing-prototypes]
> drivers/gpu/drm/amd/amdgpu/../powerplay/hwmgr/cz_hwmgr.c:1020:5: warning: no previous prototype for 'cz_tf_reset_acp_boot_level' [-Wmissing-prototypes]
> drivers/gpu/drm/amd/amdgpu/../powerplay/hwmgr/smu7_hwmgr.c:92:26: warning: no previous prototype for 'cast_phw_smu7_power_state' [-Wmissing-prototypes]
> ....
>
> In fact, these functions are only used in the file in which they are
> declared and don't need a declaration, but can be made static.
> So this patch marks these functions with 'static'.
>
> Signed-off-by: Baoyou Xie <[email protected]>
This was already applied the last time you sent it out. Sorry if I
didn't mention that previously.
Alex
On Monday, October 24, 2016 12:36:52 PM CEST Alex Deucher wrote:
> On Sat, Oct 22, 2016 at 4:56 AM, Baoyou Xie <[email protected]> wrote:
> > We get a few warnings when building kernel with W=1:
> > drivers/gpu/drm/amd/amdgpu/../powerplay/smumgr/fiji_smumgr.c:162:5: warning: no previous prototype for 'fiji_setup_pwr_virus' [-Wmissing-prototypes]
> > drivers/gpu/drm/amd/amdgpu/../powerplay/smumgr/fiji_smc.c:2052:5: warning: no previous prototype for 'fiji_program_mem_timing_parameters' [-Wmissing-prototypes]
> > drivers/gpu/drm/amd/amdgpu/../powerplay/smumgr/polaris10_smumgr.c:175:5: warning: no previous prototype for 'polaris10_avfs_event_mgr' [-Wmissing-prototypes]
> > drivers/gpu/drm/amd/amdgpu/../powerplay/hwmgr/cz_hwmgr.c:1020:5: warning: no previous prototype for 'cz_tf_reset_acp_boot_level' [-Wmissing-prototypes]
> > drivers/gpu/drm/amd/amdgpu/../powerplay/hwmgr/smu7_hwmgr.c:92:26: warning: no previous prototype for 'cast_phw_smu7_power_state' [-Wmissing-prototypes]
> > ....
> >
> > In fact, these functions are only used in the file in which they are
> > declared and don't need a declaration, but can be made static.
> > So this patch marks these functions with 'static'.
> >
> > Signed-off-by: Baoyou Xie <[email protected]>
>
> This was already applied the last time you sent it out. Sorry if I
> didn't mention that previously.
For some reason the patch hasn't made it into linux-next, so I can see
why Baoyou was getting confused here. Can you clarify what the timeline
is for the AMD DRM driver patches from between they get applied to the
AMD tree to when they make it into linux-next?
I've occasionally had a hard time with DRM (and a few other subsystems)
with bugfix patches trying to find out whether they got lost or
whether they just haven't made it into -next but are in some other tree.
Baoyou, when you resend a patch, please try to list explicitly why
you are resending it, when it was last sent, and what kind of reply
you got (integrating any Ack, listing what changes you did, and
if there are no other changes, why you think you have to resend it).
Arnd
> -----Original Message-----
> From: Arnd Bergmann [mailto:[email protected]]
> Sent: Monday, October 24, 2016 3:49 PM
> To: Alex Deucher
> Cc: Baoyou Xie; Deucher, Alexander; Dave Airlie; Zhu, Rex; Zhou, Jammy;
> Huang, JinHuiEric; StDenis, Tom; Edward O'Callaghan; Prosyak, Vitaly; Yang,
> Eric; Yang, Young; Huang, Ray; Dan Carpenter; Cui, Flora; Nils Wallm?nius; Liu,
> Monk; Wang, Ken; Min, Frank; [email protected];
> [email protected]; LKML; Maling list - DRI developers;
> [email protected]
> Subject: Re: [PATCH] drm/amd/powerplay: mark symbols static where
> possible
>
> On Monday, October 24, 2016 12:36:52 PM CEST Alex Deucher wrote:
> > On Sat, Oct 22, 2016 at 4:56 AM, Baoyou Xie <[email protected]>
> wrote:
> > > We get a few warnings when building kernel with W=1:
> > >
> drivers/gpu/drm/amd/amdgpu/../powerplay/smumgr/fiji_smumgr.c:162:5:
> warning: no previous prototype for 'fiji_setup_pwr_virus' [-Wmissing-
> prototypes]
> > > drivers/gpu/drm/amd/amdgpu/../powerplay/smumgr/fiji_smc.c:2052:5:
> warning: no previous prototype for 'fiji_program_mem_timing_parameters'
> [-Wmissing-prototypes]
> > >
> drivers/gpu/drm/amd/amdgpu/../powerplay/smumgr/polaris10_smumgr.c:
> 175:5: warning: no previous prototype for 'polaris10_avfs_event_mgr' [-
> Wmissing-prototypes]
> > >
> drivers/gpu/drm/amd/amdgpu/../powerplay/hwmgr/cz_hwmgr.c:1020:5:
> warning: no previous prototype for 'cz_tf_reset_acp_boot_level' [-
> Wmissing-prototypes]
> > >
> drivers/gpu/drm/amd/amdgpu/../powerplay/hwmgr/smu7_hwmgr.c:92:26:
> warning: no previous prototype for 'cast_phw_smu7_power_state' [-
> Wmissing-prototypes]
> > > ....
> > >
> > > In fact, these functions are only used in the file in which they are
> > > declared and don't need a declaration, but can be made static.
> > > So this patch marks these functions with 'static'.
> > >
> > > Signed-off-by: Baoyou Xie <[email protected]>
> >
> > This was already applied the last time you sent it out. Sorry if I
> > didn't mention that previously.
>
> For some reason the patch hasn't made it into linux-next, so I can see
> why Baoyou was getting confused here. Can you clarify what the timeline
> is for the AMD DRM driver patches from between they get applied to the
> AMD tree to when they make it into linux-next?
>
It came in late enough last cycle that it didn't make it into 4.9 (this is just a clean up not a critical bug fix), so I queued it for 4.10. I try to reply when I apply a patch, but sometimes I miss one here and there. Once Dave starts the drm-next tree for 4.10, it will be included in my pull request. Pending -next patches are in my drm-next-<kernel version>-wip tree until I send Dave a formal request.
> I've occasionally had a hard time with DRM (and a few other subsystems)
> with bugfix patches trying to find out whether they got lost or
> whether they just haven't made it into -next but are in some other tree.
>
For bug fixes we usually send Dave ~weekly pull requests for each -rc as necessary. For -next stuff, each driver usually sends at least one, sometimes several pull requests for the next merge window.
Alex
> Baoyou, when you resend a patch, please try to list explicitly why
> you are resending it, when it was last sent, and what kind of reply
> you got (integrating any Ack, listing what changes you did, and
> if there are no other changes, why you think you have to resend it).
>
> Arnd
On Monday, October 24, 2016 8:07:16 PM CEST Deucher, Alexander wrote:
> > > > In fact, these functions are only used in the file in which they are
> > > > declared and don't need a declaration, but can be made static.
> > > > So this patch marks these functions with 'static'.
> > > >
> > > > Signed-off-by: Baoyou Xie <[email protected]>
> > >
> > > This was already applied the last time you sent it out. Sorry if I
> > > didn't mention that previously.
> >
> > For some reason the patch hasn't made it into linux-next, so I can see
> > why Baoyou was getting confused here. Can you clarify what the timeline
> > is for the AMD DRM driver patches from between they get applied to the
> > AMD tree to when they make it into linux-next?
> >
>
> It came in late enough last cycle that it didn't make it into 4.9 (this is just a clean up not a critical bug fix), so I queued it for 4.10. I try to reply when I apply a patch, but sometimes I miss one here and there. Once Dave starts the drm-next tree for 4.10, it will be included in my pull request. Pending -next patches are in my drm-next-<kernel version>-wip tree until I send Dave a formal request.
>
> > I've occasionally had a hard time with DRM (and a few other subsystems)
> > with bugfix patches trying to find out whether they got lost or
> > whether they just haven't made it into -next but are in some other tree.
> >
>
> For bug fixes we usually send Dave ~weekly pull requests for each -rc as necessary. For -next stuff, each driver usually sends at least one, sometimes several pull requests for the next merge window.
Ok, got it. Thanks for the detailed reply!
Do you think it would be appropriate to include your drm-next-wip tree in
linux-next? I think this is how a lot of the multi-level maintainer
setups work as it give faster feedback about when things break.
Arnd
On Saturday, October 22, 2016 4:56:22 PM CEST Baoyou Xie wrote:
> @@ -1341,7 +1341,7 @@ int smu7_disable_dpm_tasks(struct pp_hwmgr *hwmgr)
> return result;
> }
>
> -int smu7_reset_asic_tasks(struct pp_hwmgr *hwmgr)
> +static int smu7_reset_asic_tasks(struct pp_hwmgr *hwmgr)
> {
>
> return 0;
>
This needs to be done differently:
../drivers/gpu/drm/amd/amdgpu/../powerplay/hwmgr/smu7_hwmgr.c:1344:12: error: 'smu7_reset_asic_tasks' defined but not used [-Werror=unused-function]
The function has no callers, so the easiest way would be to remove it
entirely, but it's possible that there are plans to add users soon.
Arnd
On Mon, Oct 24, 2016 at 10:41:16PM +0200, Arnd Bergmann wrote:
> On Monday, October 24, 2016 8:07:16 PM CEST Deucher, Alexander wrote:
> > > > > In fact, these functions are only used in the file in which they are
> > > > > declared and don't need a declaration, but can be made static.
> > > > > So this patch marks these functions with 'static'.
> > > > >
> > > > > Signed-off-by: Baoyou Xie <[email protected]>
> > > >
> > > > This was already applied the last time you sent it out. Sorry if I
> > > > didn't mention that previously.
> > >
> > > For some reason the patch hasn't made it into linux-next, so I can see
> > > why Baoyou was getting confused here. Can you clarify what the timeline
> > > is for the AMD DRM driver patches from between they get applied to the
> > > AMD tree to when they make it into linux-next?
> > >
> >
> > It came in late enough last cycle that it didn't make it into 4.9 (this is just a clean up not a critical bug fix), so I queued it for 4.10. I try to reply when I apply a patch, but sometimes I miss one here and there. Once Dave starts the drm-next tree for 4.10, it will be included in my pull request. Pending -next patches are in my drm-next-<kernel version>-wip tree until I send Dave a formal request.
> >
> > > I've occasionally had a hard time with DRM (and a few other subsystems)
> > > with bugfix patches trying to find out whether they got lost or
> > > whether they just haven't made it into -next but are in some other tree.
> > >
> >
> > For bug fixes we usually send Dave ~weekly pull requests for each -rc as necessary. For -next stuff, each driver usually sends at least one, sometimes several pull requests for the next merge window.
>
> Ok, got it. Thanks for the detailed reply!
>
> Do you think it would be appropriate to include your drm-next-wip tree in
> linux-next? I think this is how a lot of the multi-level maintainer
> setups work as it give faster feedback about when things break.
tbh I think all drm drivers should be in linux-next. The early head-ups
about conflicts are really useful. Same for nouveau, but given that
nouveau is developed in a userspace git repo that's harder to pull off.
-Daniel
--
Daniel Vetter
Software Engineer, Intel Corporation
http://blog.ffwll.ch
Am 25.10.2016 um 08:41 schrieb Daniel Vetter:
> On Mon, Oct 24, 2016 at 10:41:16PM +0200, Arnd Bergmann wrote:
>> On Monday, October 24, 2016 8:07:16 PM CEST Deucher, Alexander wrote:
>>>>>> In fact, these functions are only used in the file in which they are
>>>>>> declared and don't need a declaration, but can be made static.
>>>>>> So this patch marks these functions with 'static'.
>>>>>>
>>>>>> Signed-off-by: Baoyou Xie <[email protected]>
>>>>> This was already applied the last time you sent it out. Sorry if I
>>>>> didn't mention that previously.
>>>> For some reason the patch hasn't made it into linux-next, so I can see
>>>> why Baoyou was getting confused here. Can you clarify what the timeline
>>>> is for the AMD DRM driver patches from between they get applied to the
>>>> AMD tree to when they make it into linux-next?
>>>>
>>> It came in late enough last cycle that it didn't make it into 4.9 (this is just a clean up not a critical bug fix), so I queued it for 4.10. I try to reply when I apply a patch, but sometimes I miss one here and there. Once Dave starts the drm-next tree for 4.10, it will be included in my pull request. Pending -next patches are in my drm-next-<kernel version>-wip tree until I send Dave a formal request.
>>>
>>>> I've occasionally had a hard time with DRM (and a few other subsystems)
>>>> with bugfix patches trying to find out whether they got lost or
>>>> whether they just haven't made it into -next but are in some other tree.
>>>>
>>> For bug fixes we usually send Dave ~weekly pull requests for each -rc as necessary. For -next stuff, each driver usually sends at least one, sometimes several pull requests for the next merge window.
>> Ok, got it. Thanks for the detailed reply!
>>
>> Do you think it would be appropriate to include your drm-next-wip tree in
>> linux-next? I think this is how a lot of the multi-level maintainer
>> setups work as it give faster feedback about when things break.
> tbh I think all drm drivers should be in linux-next. The early head-ups
> about conflicts are really useful. Same for nouveau, but given that
> nouveau is developed in a userspace git repo that's harder to pull off.
Mhm, in general I agree that seeing merge conflicts and getting a bit
more testing earlier would be a good idea.
But Alex has the practice of regenerating his -wip branches multiple
times. That is usually not a problem because the only one occasionally
basing work on that branch is me, but it would be if you start to merge
it somewhere.
Christian.
> -Daniel
On Tue, Oct 25, 2016 at 09:09:01AM +0200, Christian K?nig wrote:
> Am 25.10.2016 um 08:41 schrieb Daniel Vetter:
> > On Mon, Oct 24, 2016 at 10:41:16PM +0200, Arnd Bergmann wrote:
> > > On Monday, October 24, 2016 8:07:16 PM CEST Deucher, Alexander wrote:
> > > > > > > In fact, these functions are only used in the file in which they are
> > > > > > > declared and don't need a declaration, but can be made static.
> > > > > > > So this patch marks these functions with 'static'.
> > > > > > >
> > > > > > > Signed-off-by: Baoyou Xie <[email protected]>
> > > > > > This was already applied the last time you sent it out. Sorry if I
> > > > > > didn't mention that previously.
> > > > > For some reason the patch hasn't made it into linux-next, so I can see
> > > > > why Baoyou was getting confused here. Can you clarify what the timeline
> > > > > is for the AMD DRM driver patches from between they get applied to the
> > > > > AMD tree to when they make it into linux-next?
> > > > >
> > > > It came in late enough last cycle that it didn't make it into 4.9 (this is just a clean up not a critical bug fix), so I queued it for 4.10. I try to reply when I apply a patch, but sometimes I miss one here and there. Once Dave starts the drm-next tree for 4.10, it will be included in my pull request. Pending -next patches are in my drm-next-<kernel version>-wip tree until I send Dave a formal request.
> > > >
> > > > > I've occasionally had a hard time with DRM (and a few other subsystems)
> > > > > with bugfix patches trying to find out whether they got lost or
> > > > > whether they just haven't made it into -next but are in some other tree.
> > > > >
> > > > For bug fixes we usually send Dave ~weekly pull requests for each -rc as necessary. For -next stuff, each driver usually sends at least one, sometimes several pull requests for the next merge window.
> > > Ok, got it. Thanks for the detailed reply!
> > >
> > > Do you think it would be appropriate to include your drm-next-wip tree in
> > > linux-next? I think this is how a lot of the multi-level maintainer
> > > setups work as it give faster feedback about when things break.
> > tbh I think all drm drivers should be in linux-next. The early head-ups
> > about conflicts are really useful. Same for nouveau, but given that
> > nouveau is developed in a userspace git repo that's harder to pull off.
>
> Mhm, in general I agree that seeing merge conflicts and getting a bit more
> testing earlier would be a good idea.
>
> But Alex has the practice of regenerating his -wip branches multiple times.
> That is usually not a problem because the only one occasionally basing work
> on that branch is me, but it would be if you start to merge it somewhere.
linux-next is fine with rebasing branches. drm-intel is in there since
years, and we've only very recently stopped rebasing our main branch. What
Alex might need to change is switching the branch name for each kernel
release, i.e. amd-wip instead of amd-4.10-wip. And be more careful with
making sure only stuff heading for the current merge window shows up in
there.
-Daniel
--
Daniel Vetter
Software Engineer, Intel Corporation
http://blog.ffwll.ch
On Tuesday, October 25, 2016 10:31:21 AM CEST Baoyou Xie wrote:
> On 25 October 2016 at 04:51, Arnd Bergmann <[email protected]> wrote:
> > On Saturday, October 22, 2016 4:56:22 PM CEST Baoyou Xie wrote:
> > The function has no callers, so the easiest way would be to remove it
> > entirely, but it's possible that there are plans to add users soon.
> >
> > It was assumed that this function will be used soon, so this patch remains
> it.
> if it still not be used in 4.10, then we can remove it.
> is it right?
There is no such rule in general, it's up to the maintainer and
it depends on the specific reason for why the function ended up
being unused in the first place.
However, we can expect the maintainer to come up with some solution
to address the warning. Possible options include:
- calling the function from where it was meant to be used
- removing the function
- adding __maybe_unused
- adding an #if 0
I have not looked at this specific example and do not know
which of them would be appropriate here. If you look at the
output of 'git log -p drivers/gpu/drm/amd/amdgpu/../powerplay/hwmgr/smu7_hwmgr.c'
you might find it out yourself.
Arnd
> -----Original Message-----
> From: Arnd Bergmann [mailto:[email protected]]
> Sent: Tuesday, October 25, 2016 4:15 AM
> To: Baoyou Xie
> Cc: Deucher, Alexander; Dave Airlie; Zhu, Rex; Zhou, Jammy; Huang,
> JinHuiEric; StDenis, Tom; Edward O'Callaghan; Prosyak, Vitaly; Yang, Eric;
> Yang, Young; Huang, Ray; Dan Carpenter; Cui, Flora; Nils Wallm?nius; Liu,
> Monk; Wang, Ken; Min, Frank; dri-devel; Linux Kernel Mailing List;
> [email protected]; [email protected]; [email protected]
> Subject: Re: [PATCH] drm/amd/powerplay: mark symbols static where
> possible
>
> On Tuesday, October 25, 2016 10:31:21 AM CEST Baoyou Xie wrote:
> > On 25 October 2016 at 04:51, Arnd Bergmann <[email protected]> wrote:
> > > On Saturday, October 22, 2016 4:56:22 PM CEST Baoyou Xie wrote:
> > > The function has no callers, so the easiest way would be to remove it
> > > entirely, but it's possible that there are plans to add users soon.
> > >
> > > It was assumed that this function will be used soon, so this patch remains
> > it.
> > if it still not be used in 4.10, then we can remove it.
> > is it right?
>
> There is no such rule in general, it's up to the maintainer and
> it depends on the specific reason for why the function ended up
> being unused in the first place.
>
> However, we can expect the maintainer to come up with some solution
> to address the warning. Possible options include:
>
> - calling the function from where it was meant to be used
> - removing the function
> - adding __maybe_unused
> - adding an #if 0
>
> I have not looked at this specific example and do not know
> which of them would be appropriate here. If you look at the
> output of 'git log -p
> drivers/gpu/drm/amd/amdgpu/../powerplay/hwmgr/smu7_hwmgr.c'
> you might find it out yourself.
This is mostly fallout from a big cleanup/re-org of the powerplay code in the 4.9. Rex said he was going to use these soon.
Alex