This series fix the MDIO interface for the lan9303 DSA driver.
Bugs found after testing on actual HW.
This series is extracted from the first patch of my first large
series. Significant changes from that version are:
- use mdiobus_write_nested, mdiobus_read_nested.
- EXPORT lan9303_indirect_phy_ops
Unfortunately I do not have access to i2c based system for
testing.
Egil Hjelmeland (4):
net: dsa: lan9303: Fix lan9303_detect_phy_setup() for MDIO
net: dsa: lan9303: Multiply by 4 to get MDIO register
net: dsa: lan9303: Renamed indirect phy access functions
net: dsa: lan9303: MDIO access phy registers directly
drivers/net/dsa/lan9303-core.c | 43 +++++++++++++++++++++++++++---------------
drivers/net/dsa/lan9303.h | 11 +++++++++++
drivers/net/dsa/lan9303_i2c.c | 2 ++
drivers/net/dsa/lan9303_mdio.c | 23 ++++++++++++++++++++++
4 files changed, 64 insertions(+), 15 deletions(-)
--
2.11.0
Handle that MDIO read with no response return 0xffff.
Signed-off-by: Egil Hjelmeland <[email protected]>
---
drivers/net/dsa/lan9303-core.c | 3 ++-
1 file changed, 2 insertions(+), 1 deletion(-)
diff --git a/drivers/net/dsa/lan9303-core.c b/drivers/net/dsa/lan9303-core.c
index cd76e61f1fca..9d0ab77edb4a 100644
--- a/drivers/net/dsa/lan9303-core.c
+++ b/drivers/net/dsa/lan9303-core.c
@@ -427,6 +427,7 @@ static int lan9303_detect_phy_setup(struct lan9303 *chip)
* Special reg 18 of phy 3 reads as 0x0000, if 'phy_addr_sel_strap' is 0
* and the IDs are 0-1-2, else it contains something different from
* 0x0000, which means 'phy_addr_sel_strap' is 1 and the IDs are 1-2-3.
+ * 0xffff is returned on MDIO read with no response.
*/
reg = lan9303_port_phy_reg_read(chip, 3, MII_LAN911X_SPECIAL_MODES);
if (reg < 0) {
@@ -434,7 +435,7 @@ static int lan9303_detect_phy_setup(struct lan9303 *chip)
return reg;
}
- if (reg != 0)
+ if ((reg != 0) && (reg != 0xffff))
chip->phy_addr_sel_strap = 1;
else
chip->phy_addr_sel_strap = 0;
--
2.11.0
lan9303_mdio_write()/_read() must multiply register number by 4 to get
offset.
Added some commments to the register definitions.
Signed-off-by: Egil Hjelmeland <[email protected]>
---
drivers/net/dsa/lan9303-core.c | 6 ++++++
drivers/net/dsa/lan9303_mdio.c | 2 ++
2 files changed, 8 insertions(+)
diff --git a/drivers/net/dsa/lan9303-core.c b/drivers/net/dsa/lan9303-core.c
index 9d0ab77edb4a..96ebeb9bd59a 100644
--- a/drivers/net/dsa/lan9303-core.c
+++ b/drivers/net/dsa/lan9303-core.c
@@ -20,6 +20,9 @@
#include "lan9303.h"
+/* 13.2 System Control and Status Registers
+ * Multiply register number by 4 to get address offset.
+ */
#define LAN9303_CHIP_REV 0x14
# define LAN9303_CHIP_ID 0x9303
#define LAN9303_IRQ_CFG 0x15
@@ -53,6 +56,9 @@
#define LAN9303_VIRT_PHY_BASE 0x70
#define LAN9303_VIRT_SPECIAL_CTRL 0x77
+/*13.4 Switch Fabric Control and Status Registers
+ * Accessed indirectly via SWITCH_CSR_CMD, SWITCH_CSR_DATA.
+ */
#define LAN9303_SW_DEV_ID 0x0000
#define LAN9303_SW_RESET 0x0001
#define LAN9303_SW_RESET_RESET BIT(0)
diff --git a/drivers/net/dsa/lan9303_mdio.c b/drivers/net/dsa/lan9303_mdio.c
index 93c36c0541cf..2db7970fc88c 100644
--- a/drivers/net/dsa/lan9303_mdio.c
+++ b/drivers/net/dsa/lan9303_mdio.c
@@ -40,6 +40,7 @@ static int lan9303_mdio_write(void *ctx, uint32_t reg, uint32_t val)
{
struct lan9303_mdio *sw_dev = (struct lan9303_mdio *)ctx;
+ reg <<= 2; /* reg num to offset */
mutex_lock(&sw_dev->device->bus->mdio_lock);
lan9303_mdio_real_write(sw_dev->device, reg, val & 0xffff);
lan9303_mdio_real_write(sw_dev->device, reg + 2, (val >> 16) & 0xffff);
@@ -57,6 +58,7 @@ static int lan9303_mdio_read(void *ctx, uint32_t reg, uint32_t *val)
{
struct lan9303_mdio *sw_dev = (struct lan9303_mdio *)ctx;
+ reg <<= 2; /* reg num to offset */
mutex_lock(&sw_dev->device->bus->mdio_lock);
*val = lan9303_mdio_real_read(sw_dev->device, reg);
*val |= (lan9303_mdio_real_read(sw_dev->device, reg + 2) << 16);
--
2.11.0
Indirect access (PMI) to phy register only work in I2C mode. In
MDIO mode phy registers must be accessed directly. Introduced
struct lan9303_phy_ops to handle the two modes.
Signed-off-by: Egil Hjelmeland <[email protected]>
---
drivers/net/dsa/lan9303-core.c | 20 +++++++++++++-------
drivers/net/dsa/lan9303.h | 11 +++++++++++
drivers/net/dsa/lan9303_i2c.c | 2 ++
drivers/net/dsa/lan9303_mdio.c | 21 +++++++++++++++++++++
4 files changed, 47 insertions(+), 7 deletions(-)
diff --git a/drivers/net/dsa/lan9303-core.c b/drivers/net/dsa/lan9303-core.c
index 9427c3b0ced2..9910fc9d5dd6 100644
--- a/drivers/net/dsa/lan9303-core.c
+++ b/drivers/net/dsa/lan9303-core.c
@@ -334,6 +334,12 @@ static int lan9303_indirect_phy_write(struct lan9303 *chip, int addr,
return ret;
}
+const struct lan9303_phy_ops lan9303_indirect_phy_ops = {
+ .phy_read = lan9303_indirect_phy_read,
+ .phy_write = lan9303_indirect_phy_write,
+};
+EXPORT_SYMBOL(lan9303_indirect_phy_ops);
+
static int lan9303_switch_wait_for_completion(struct lan9303 *chip)
{
int ret, i;
@@ -435,7 +441,7 @@ static int lan9303_detect_phy_setup(struct lan9303 *chip)
* 0x0000, which means 'phy_addr_sel_strap' is 1 and the IDs are 1-2-3.
* 0xffff is returned on MDIO read with no response.
*/
- reg = lan9303_indirect_phy_read(chip, 3, MII_LAN911X_SPECIAL_MODES);
+ reg = chip->ops->phy_read(chip, 3, MII_LAN911X_SPECIAL_MODES);
if (reg < 0) {
dev_err(chip->dev, "Failed to detect phy config: %d\n", reg);
return reg;
@@ -726,7 +732,7 @@ static int lan9303_phy_read(struct dsa_switch *ds, int phy, int regnum)
if (phy > phy_base + 2)
return -ENODEV;
- return lan9303_indirect_phy_read(chip, phy, regnum);
+ return chip->ops->phy_read(chip, phy, regnum);
}
static int lan9303_phy_write(struct dsa_switch *ds, int phy, int regnum,
@@ -740,7 +746,7 @@ static int lan9303_phy_write(struct dsa_switch *ds, int phy, int regnum,
if (phy > phy_base + 2)
return -ENODEV;
- return lan9303_indirect_phy_write(chip, phy, regnum, val);
+ return chip->ops->phy_write(chip, phy, regnum, val);
}
static int lan9303_port_enable(struct dsa_switch *ds, int port,
@@ -773,13 +779,13 @@ static void lan9303_port_disable(struct dsa_switch *ds, int port,
switch (port) {
case 1:
lan9303_disable_packet_processing(chip, LAN9303_PORT_1_OFFSET);
- lan9303_indirect_phy_write(chip, chip->phy_addr_sel_strap + 1,
- MII_BMCR, BMCR_PDOWN);
+ lan9303_phy_write(ds, chip->phy_addr_sel_strap + 1,
+ MII_BMCR, BMCR_PDOWN);
break;
case 2:
lan9303_disable_packet_processing(chip, LAN9303_PORT_2_OFFSET);
- lan9303_indirect_phy_write(chip, chip->phy_addr_sel_strap + 2,
- MII_BMCR, BMCR_PDOWN);
+ lan9303_phy_write(ds, chip->phy_addr_sel_strap + 2,
+ MII_BMCR, BMCR_PDOWN);
break;
default:
dev_dbg(chip->dev,
diff --git a/drivers/net/dsa/lan9303.h b/drivers/net/dsa/lan9303.h
index d1512dad2d90..4d8be555ff4d 100644
--- a/drivers/net/dsa/lan9303.h
+++ b/drivers/net/dsa/lan9303.h
@@ -2,6 +2,15 @@
#include <linux/device.h>
#include <net/dsa.h>
+struct lan9303;
+
+struct lan9303_phy_ops {
+ /* PHY 1 and 2 access*/
+ int (*phy_read)(struct lan9303 *chip, int port, int regnum);
+ int (*phy_write)(struct lan9303 *chip, int port,
+ int regnum, u16 val);
+};
+
struct lan9303 {
struct device *dev;
struct regmap *regmap;
@@ -11,9 +20,11 @@ struct lan9303 {
bool phy_addr_sel_strap;
struct dsa_switch *ds;
struct mutex indirect_mutex; /* protect indexed register access */
+ const struct lan9303_phy_ops *ops;
};
extern const struct regmap_access_table lan9303_register_set;
+extern const struct lan9303_phy_ops lan9303_indirect_phy_ops;
int lan9303_probe(struct lan9303 *chip, struct device_node *np);
int lan9303_remove(struct lan9303 *chip);
diff --git a/drivers/net/dsa/lan9303_i2c.c b/drivers/net/dsa/lan9303_i2c.c
index ab3ce0da5071..24ec20f7f444 100644
--- a/drivers/net/dsa/lan9303_i2c.c
+++ b/drivers/net/dsa/lan9303_i2c.c
@@ -63,6 +63,8 @@ static int lan9303_i2c_probe(struct i2c_client *client,
i2c_set_clientdata(client, sw_dev);
sw_dev->chip.dev = &client->dev;
+ sw_dev->chip.ops = &lan9303_indirect_phy_ops;
+
ret = lan9303_probe(&sw_dev->chip, client->dev.of_node);
if (ret != 0)
return ret;
diff --git a/drivers/net/dsa/lan9303_mdio.c b/drivers/net/dsa/lan9303_mdio.c
index 2db7970fc88c..fc16668a487f 100644
--- a/drivers/net/dsa/lan9303_mdio.c
+++ b/drivers/net/dsa/lan9303_mdio.c
@@ -67,6 +67,25 @@ static int lan9303_mdio_read(void *ctx, uint32_t reg, uint32_t *val)
return 0;
}
+int lan9303_mdio_phy_write(struct lan9303 *chip, int phy, int reg, u16 val)
+{
+ struct lan9303_mdio *sw_dev = dev_get_drvdata(chip->dev);
+
+ return mdiobus_write_nested(sw_dev->device->bus, phy, reg, val);
+}
+
+int lan9303_mdio_phy_read(struct lan9303 *chip, int phy, int reg)
+{
+ struct lan9303_mdio *sw_dev = dev_get_drvdata(chip->dev);
+
+ return mdiobus_read_nested(sw_dev->device->bus, phy, reg);
+}
+
+static const struct lan9303_phy_ops lan9303_mdio_phy_ops = {
+ .phy_read = lan9303_mdio_phy_read,
+ .phy_write = lan9303_mdio_phy_write,
+};
+
static const struct regmap_config lan9303_mdio_regmap_config = {
.reg_bits = 8,
.val_bits = 32,
@@ -108,6 +127,8 @@ static int lan9303_mdio_probe(struct mdio_device *mdiodev)
dev_set_drvdata(&mdiodev->dev, sw_dev);
sw_dev->chip.dev = &mdiodev->dev;
+ sw_dev->chip.ops = &lan9303_mdio_phy_ops;
+
ret = lan9303_probe(&sw_dev->chip, mdiodev->dev.of_node);
if (ret != 0)
return ret;
--
2.11.0
Preparing for the following fix of MDIO phy access:
Renamed functions that access PHY 1 and 2 indirectly through PMI
registers.
lan9303_port_phy_reg_wait_for_completion() to
lan9303_indirect_phy_wait_for_completion()
lan9303_port_phy_reg_read() to
lan9303_indirect_phy_read()
lan9303_port_phy_reg_write() to
lan9303_indirect_phy_write()
Also changed "val" parameter of lan9303_indirect_phy_write() to u16,
for clarity.
Signed-off-by: Egil Hjelmeland <[email protected]>
---
drivers/net/dsa/lan9303-core.c | 28 ++++++++++++++--------------
1 file changed, 14 insertions(+), 14 deletions(-)
diff --git a/drivers/net/dsa/lan9303-core.c b/drivers/net/dsa/lan9303-core.c
index 96ebeb9bd59a..9427c3b0ced2 100644
--- a/drivers/net/dsa/lan9303-core.c
+++ b/drivers/net/dsa/lan9303-core.c
@@ -248,7 +248,7 @@ static int lan9303_virt_phy_reg_write(struct lan9303 *chip, int regnum, u16 val)
return regmap_write(chip->regmap, LAN9303_VIRT_PHY_BASE + regnum, val);
}
-static int lan9303_port_phy_reg_wait_for_completion(struct lan9303 *chip)
+static int lan9303_indirect_phy_wait_for_completion(struct lan9303 *chip)
{
int ret, i;
u32 reg;
@@ -268,7 +268,7 @@ static int lan9303_port_phy_reg_wait_for_completion(struct lan9303 *chip)
return -EIO;
}
-static int lan9303_port_phy_reg_read(struct lan9303 *chip, int addr, int regnum)
+static int lan9303_indirect_phy_read(struct lan9303 *chip, int addr, int regnum)
{
int ret;
u32 val;
@@ -278,7 +278,7 @@ static int lan9303_port_phy_reg_read(struct lan9303 *chip, int addr, int regnum)
mutex_lock(&chip->indirect_mutex);
- ret = lan9303_port_phy_reg_wait_for_completion(chip);
+ ret = lan9303_indirect_phy_wait_for_completion(chip);
if (ret)
goto on_error;
@@ -287,7 +287,7 @@ static int lan9303_port_phy_reg_read(struct lan9303 *chip, int addr, int regnum)
if (ret)
goto on_error;
- ret = lan9303_port_phy_reg_wait_for_completion(chip);
+ ret = lan9303_indirect_phy_wait_for_completion(chip);
if (ret)
goto on_error;
@@ -305,8 +305,8 @@ static int lan9303_port_phy_reg_read(struct lan9303 *chip, int addr, int regnum)
return ret;
}
-static int lan9303_phy_reg_write(struct lan9303 *chip, int addr, int regnum,
- unsigned int val)
+static int lan9303_indirect_phy_write(struct lan9303 *chip, int addr,
+ int regnum, u16 val)
{
int ret;
u32 reg;
@@ -317,7 +317,7 @@ static int lan9303_phy_reg_write(struct lan9303 *chip, int addr, int regnum,
mutex_lock(&chip->indirect_mutex);
- ret = lan9303_port_phy_reg_wait_for_completion(chip);
+ ret = lan9303_indirect_phy_wait_for_completion(chip);
if (ret)
goto on_error;
@@ -435,7 +435,7 @@ static int lan9303_detect_phy_setup(struct lan9303 *chip)
* 0x0000, which means 'phy_addr_sel_strap' is 1 and the IDs are 1-2-3.
* 0xffff is returned on MDIO read with no response.
*/
- reg = lan9303_port_phy_reg_read(chip, 3, MII_LAN911X_SPECIAL_MODES);
+ reg = lan9303_indirect_phy_read(chip, 3, MII_LAN911X_SPECIAL_MODES);
if (reg < 0) {
dev_err(chip->dev, "Failed to detect phy config: %d\n", reg);
return reg;
@@ -726,7 +726,7 @@ static int lan9303_phy_read(struct dsa_switch *ds, int phy, int regnum)
if (phy > phy_base + 2)
return -ENODEV;
- return lan9303_port_phy_reg_read(chip, phy, regnum);
+ return lan9303_indirect_phy_read(chip, phy, regnum);
}
static int lan9303_phy_write(struct dsa_switch *ds, int phy, int regnum,
@@ -740,7 +740,7 @@ static int lan9303_phy_write(struct dsa_switch *ds, int phy, int regnum,
if (phy > phy_base + 2)
return -ENODEV;
- return lan9303_phy_reg_write(chip, phy, regnum, val);
+ return lan9303_indirect_phy_write(chip, phy, regnum, val);
}
static int lan9303_port_enable(struct dsa_switch *ds, int port,
@@ -773,13 +773,13 @@ static void lan9303_port_disable(struct dsa_switch *ds, int port,
switch (port) {
case 1:
lan9303_disable_packet_processing(chip, LAN9303_PORT_1_OFFSET);
- lan9303_phy_reg_write(chip, chip->phy_addr_sel_strap + 1,
- MII_BMCR, BMCR_PDOWN);
+ lan9303_indirect_phy_write(chip, chip->phy_addr_sel_strap + 1,
+ MII_BMCR, BMCR_PDOWN);
break;
case 2:
lan9303_disable_packet_processing(chip, LAN9303_PORT_2_OFFSET);
- lan9303_phy_reg_write(chip, chip->phy_addr_sel_strap + 2,
- MII_BMCR, BMCR_PDOWN);
+ lan9303_indirect_phy_write(chip, chip->phy_addr_sel_strap + 2,
+ MII_BMCR, BMCR_PDOWN);
break;
default:
dev_dbg(chip->dev,
--
2.11.0
On Fri, Jul 28, 2017 at 05:11:54PM +0200, Egil Hjelmeland wrote:
> Handle that MDIO read with no response return 0xffff.
>
> Signed-off-by: Egil Hjelmeland <[email protected]>
Reviewed-by: Andrew Lunn <[email protected]>
Andrew
On Fri, Jul 28, 2017 at 05:11:55PM +0200, Egil Hjelmeland wrote:
> lan9303_mdio_write()/_read() must multiply register number by 4 to get
> offset.
>
> Added some commments to the register definitions.
>
> Signed-off-by: Egil Hjelmeland <[email protected]>
Reviewed-by: Andrew Lunn <[email protected]>
Andrew
On Fri, Jul 28, 2017 at 05:11:56PM +0200, Egil Hjelmeland wrote:
> Preparing for the following fix of MDIO phy access:
>
> Renamed functions that access PHY 1 and 2 indirectly through PMI
> registers.
>
> lan9303_port_phy_reg_wait_for_completion() to
> lan9303_indirect_phy_wait_for_completion()
>
> lan9303_port_phy_reg_read() to
> lan9303_indirect_phy_read()
>
> lan9303_port_phy_reg_write() to
> lan9303_indirect_phy_write()
>
> Also changed "val" parameter of lan9303_indirect_phy_write() to u16,
> for clarity.
>
> Signed-off-by: Egil Hjelmeland <[email protected]>
Reviewed-by: Andrew Lunn <[email protected]>
Andrew
On Fri, Jul 28, 2017 at 05:11:57PM +0200, Egil Hjelmeland wrote:
> Indirect access (PMI) to phy register only work in I2C mode. In
> MDIO mode phy registers must be accessed directly. Introduced
> struct lan9303_phy_ops to handle the two modes.
>
> Signed-off-by: Egil Hjelmeland <[email protected]>
Reviewed-by: Andrew Lunn <[email protected]>
Andrew
On Fri, Jul 28, 2017 at 05:11:53PM +0200, Egil Hjelmeland wrote:
> This series fix the MDIO interface for the lan9303 DSA driver.
> Bugs found after testing on actual HW.
>
> This series is extracted from the first patch of my first large
> series.
Hi Egil
Thanks for breaking the patch up. It was much easier to understand and
review.
Andrew
Egil Hjelmeland <[email protected]> writes:
> Handle that MDIO read with no response return 0xffff.
>
> Signed-off-by: Egil Hjelmeland <[email protected]>
Reviewed-by: Vivien Didelot <[email protected]>
Egil Hjelmeland <[email protected]> writes:
> lan9303_mdio_write()/_read() must multiply register number by 4 to get
> offset.
>
> Added some commments to the register definitions.
>
> Signed-off-by: Egil Hjelmeland <[email protected]>
Reviewed-by: Vivien Didelot <[email protected]>
Egil Hjelmeland <[email protected]> writes:
> Preparing for the following fix of MDIO phy access:
>
> Renamed functions that access PHY 1 and 2 indirectly through PMI
> registers.
>
> lan9303_port_phy_reg_wait_for_completion() to
> lan9303_indirect_phy_wait_for_completion()
>
> lan9303_port_phy_reg_read() to
> lan9303_indirect_phy_read()
>
> lan9303_port_phy_reg_write() to
> lan9303_indirect_phy_write()
>
> Also changed "val" parameter of lan9303_indirect_phy_write() to u16,
> for clarity.
>
> Signed-off-by: Egil Hjelmeland <[email protected]>
Reviewed-by: Vivien Didelot <[email protected]>
Hi Egil,
Egil Hjelmeland <[email protected]> writes:
> +const struct lan9303_phy_ops lan9303_indirect_phy_ops = {
> + .phy_read = lan9303_indirect_phy_read,
> + .phy_write = lan9303_indirect_phy_write,
> +};
> +EXPORT_SYMBOL(lan9303_indirect_phy_ops);
Isn't EXPORT_SYMBOL_GPL prefered over EXPORT_SYMBOL?
Thanks,
Vivien
Den 28. juli 2017 17:39, skrev Vivien Didelot:
> Hi Egil,
>
> Egil Hjelmeland <[email protected]> writes:
>
>> +const struct lan9303_phy_ops lan9303_indirect_phy_ops = {
>> + .phy_read = lan9303_indirect_phy_read,
>> + .phy_write = lan9303_indirect_phy_write,
>> +};
>> +EXPORT_SYMBOL(lan9303_indirect_phy_ops);
>
> Isn't EXPORT_SYMBOL_GPL prefered over EXPORT_SYMBOL?
>
>
> Thanks,
>
> Vivien
>
I have no opinion. I just used the same variant as the other EXPORTS in
the file.
Egil
Hi Egil,
Egil Hjelmeland <[email protected]> writes:
>>> +const struct lan9303_phy_ops lan9303_indirect_phy_ops = {
>>> + .phy_read = lan9303_indirect_phy_read,
>>> + .phy_write = lan9303_indirect_phy_write,
>>> +};
>>> +EXPORT_SYMBOL(lan9303_indirect_phy_ops);
>>
>> Isn't EXPORT_SYMBOL_GPL prefered over EXPORT_SYMBOL?
>
> I have no opinion. I just used the same variant as the other EXPORTS
> in the file.
If there is no concern from others about this, LGTM too:
Reviewed-by: Vivien Didelot <[email protected]>
Thanks,
Vivien
On 07/28/2017 08:11 AM, Egil Hjelmeland wrote:
> Handle that MDIO read with no response return 0xffff.
>
> Signed-off-by: Egil Hjelmeland <[email protected]>
Reviewed-by: Florian Fainelli <[email protected]>
--
Florian
On 07/28/2017 08:11 AM, Egil Hjelmeland wrote:
> lan9303_mdio_write()/_read() must multiply register number by 4 to get
> offset.
>
> Added some commments to the register definitions.
>
> Signed-off-by: Egil Hjelmeland <[email protected]>
Reviewed-by: Florian Fainelli <[email protected]>
--
Florian
On 07/28/2017 08:11 AM, Egil Hjelmeland wrote:
> Preparing for the following fix of MDIO phy access:
>
> Renamed functions that access PHY 1 and 2 indirectly through PMI
> registers.
>
> lan9303_port_phy_reg_wait_for_completion() to
> lan9303_indirect_phy_wait_for_completion()
>
> lan9303_port_phy_reg_read() to
> lan9303_indirect_phy_read()
>
> lan9303_port_phy_reg_write() to
> lan9303_indirect_phy_write()
>
> Also changed "val" parameter of lan9303_indirect_phy_write() to u16,
> for clarity.
>
> Signed-off-by: Egil Hjelmeland <[email protected]>
Reviewed-by: Florian Fainelli <[email protected]>
--
Florian
On 07/28/2017 09:55 AM, Vivien Didelot wrote:
> Hi Egil,
>
> Egil Hjelmeland <[email protected]> writes:
>
>>>> +const struct lan9303_phy_ops lan9303_indirect_phy_ops = {
>>>> + .phy_read = lan9303_indirect_phy_read,
>>>> + .phy_write = lan9303_indirect_phy_write,
>>>> +};
>>>> +EXPORT_SYMBOL(lan9303_indirect_phy_ops);
>>>
>>> Isn't EXPORT_SYMBOL_GPL prefered over EXPORT_SYMBOL?
>>
>> I have no opinion. I just used the same variant as the other EXPORTS
>> in the file.
>
> If there is no concern from others about this, LGTM too:
Since the kernel module license is GPL, EXPORT_SYMBOL_GPL() would seem
to be appropriate, which can be done as a subsequent patch.
Reviewed-by: Florian Fainelli <[email protected]>
--
Florian
Den 28. juli 2017 19:05, skrev Florian Fainelli:
> On 07/28/2017 09:55 AM, Vivien Didelot wrote:
>> Hi Egil,
>>
>> Egil Hjelmeland <[email protected]> writes:
>>
>>>>> +const struct lan9303_phy_ops lan9303_indirect_phy_ops = {
>>>>> + .phy_read = lan9303_indirect_phy_read,
>>>>> + .phy_write = lan9303_indirect_phy_write,
>>>>> +};
>>>>> +EXPORT_SYMBOL(lan9303_indirect_phy_ops);
>>>>
>>>> Isn't EXPORT_SYMBOL_GPL prefered over EXPORT_SYMBOL?
>>>
>>> I have no opinion. I just used the same variant as the other EXPORTS
>>> in the file.
>>
>> If there is no concern from others about this, LGTM too:
>
> Since the kernel module license is GPL, EXPORT_SYMBOL_GPL() would seem
> to be appropriate, which can be done as a subsequent patch.
>
> Reviewed-by: Florian Fainelli <[email protected]>
>
I have no idea how these legalities work. But for the record,
I give consent to change to EXPORT_SYMBOL_GPL at any time.
Egil Hjelmeland
> >Since the kernel module license is GPL, EXPORT_SYMBOL_GPL() would seem
> >to be appropriate, which can be done as a subsequent patch.
> >
> >Reviewed-by: Florian Fainelli <[email protected]>
> >
> I have no idea how these legalities work. But for the record,
> I give consent to change to EXPORT_SYMBOL_GPL at any time.
Hi Egil
What is better, is that when somebody posts such a patch, send an
Acked-by: It will get added to the patch, leaving a record in git that
you agreed to the change.
Andrew
Den 28. juli 2017 23:28, skrev Andrew Lunn:
>>> Since the kernel module license is GPL, EXPORT_SYMBOL_GPL() would seem
>>> to be appropriate, which can be done as a subsequent patch.
>>>
>>> Reviewed-by: Florian Fainelli <[email protected]>
>>>
>> I have no idea how these legalities work. But for the record,
>> I give consent to change to EXPORT_SYMBOL_GPL at any time.
>
> Hi Egil
>
> What is better, is that when somebody posts such a patch, send an
> Acked-by: It will get added to the patch, leaving a record in git that
> you agreed to the change.
>
> Andrew
>
In case I think I prefer to get off the hook now by issuing
a PATCH v2 adding "_GPL" when I show up in office Monday.
Egil
From: Florian Fainelli
> Sent: 28 July 2017 18:05
...
> >>>> +EXPORT_SYMBOL(lan9303_indirect_phy_ops);
> >>>
> >>> Isn't EXPORT_SYMBOL_GPL prefered over EXPORT_SYMBOL?
> >>
> >> I have no opinion. I just used the same variant as the other EXPORTS
> >> in the file.
> >
> > If there is no concern from others about this, LGTM too:
>
> Since the kernel module license is GPL, EXPORT_SYMBOL_GPL() would seem
> to be appropriate, which can be done as a subsequent patch.
It depends on whether the function needs to be usable by 'out of tree'
non-GPL modules.
This looks like a 'private' export between related modules.
The problems arise with functions like put_ns() and put_pid()
which can easily be needed by non-GPL code.
David