Hi Andy,
This patchset adds support to Dragonboard 600c which is based on APQ8064.
With this patchset, except spi I was able to test all the below features
on this board on top of linus master branch.
1> i2c
2> spi
3> sd/mmc with card detect
4> eMMC
5> USB
6> SATA
7> on board Ethernet based on PCIE.
8> user and activity leds.
AHCI SATA is broken on APQ8064 on mainline, due to changes in libahci, fix is
being discussed which should not effect this dt patches anyway.
This patchset also has a fix to i2c/spi pinctrls which was not set correctly
in my previous apq8064 patches, I have verified this patchset with eeprom and
sensors on the board, you might want to take that patch in next rc.
Thanks,
srini
Srinivas Kandagatla (12):
ARM: dts: apq8064: fix the pinctrls for i2c and spi
ARM: dts: apq8064: add support to gsbi1 uart
ARM: dts: apq8064: add gsbi7 i2c support
ARM: dts: dragonboard-600c: add board support with serial
ARM: dts: dragonboard-600c: add pmic regulator supplies
ARM: dts: dragonboard-600c: Add eMMC and SD card support
ARM: dts: dragonboard-600c: add usb support
ARM: dts: dragonboard-600c: add pcie support
ARM: dts: dragonboard-600c: add on board sata support.
ARM: dts: dragonboard-600c: Add on board leds support
ARM: dts: dragonboard-600c: add i2c support
ARM: dts: dragonboard-600c: add spi support
arch/arm/boot/dts/Makefile | 1 +
.../arm/boot/dts/qcom-apq8064-dragonboard-600c.dts | 377 +++++++++++++++++++++
arch/arm/boot/dts/qcom-apq8064-pins.dtsi | 39 +++
arch/arm/boot/dts/qcom-apq8064.dtsi | 41 ++-
4 files changed, 452 insertions(+), 6 deletions(-)
create mode 100644 arch/arm/boot/dts/qcom-apq8064-dragonboard-600c.dts
--
2.5.0
This patch fixes pinctrls for spi and i2c nodes whose default and sleep
states are together, which is incorrect.
Without this patch i2c/spi would not be functional.
Signed-off-by: Srinivas Kandagatla <[email protected]>
---
arch/arm/boot/dts/qcom-apq8064.dtsi | 18 ++++++++++++------
1 file changed, 12 insertions(+), 6 deletions(-)
diff --git a/arch/arm/boot/dts/qcom-apq8064.dtsi b/arch/arm/boot/dts/qcom-apq8064.dtsi
index 65d0e8d..c6ff8fc 100644
--- a/arch/arm/boot/dts/qcom-apq8064.dtsi
+++ b/arch/arm/boot/dts/qcom-apq8064.dtsi
@@ -227,7 +227,8 @@
gsbi1_i2c: i2c@12460000 {
compatible = "qcom,i2c-qup-v1.1.1";
- pinctrl-0 = <&i2c1_pins &i2c1_pins_sleep>;
+ pinctrl-0 = <&i2c1_pins>;
+ pinctrl-1 = <&i2c1_pins_sleep>;
pinctrl-names = "default", "sleep";
reg = <0x12460000 0x1000>;
interrupts = <0 194 IRQ_TYPE_NONE>;
@@ -255,7 +256,8 @@
gsbi2_i2c: i2c@124a0000 {
compatible = "qcom,i2c-qup-v1.1.1";
reg = <0x124a0000 0x1000>;
- pinctrl-0 = <&i2c2_pins &i2c2_pins_sleep>;
+ pinctrl-0 = <&i2c2_pins>;
+ pinctrl-1 = <&i2c2_pins_sleep>;
pinctrl-names = "default", "sleep";
interrupts = <0 196 IRQ_TYPE_NONE>;
clocks = <&gcc GSBI2_QUP_CLK>, <&gcc GSBI2_H_CLK>;
@@ -277,7 +279,8 @@
ranges;
gsbi3_i2c: i2c@16280000 {
compatible = "qcom,i2c-qup-v1.1.1";
- pinctrl-0 = <&i2c3_pins &i2c3_pins_sleep>;
+ pinctrl-0 = <&i2c3_pins>;
+ pinctrl-1 = <&i2c3_pins_sleep>;
pinctrl-names = "default", "sleep";
reg = <0x16280000 0x1000>;
interrupts = <GIC_SPI 151 IRQ_TYPE_NONE>;
@@ -302,7 +305,8 @@
gsbi4_i2c: i2c@16380000 {
compatible = "qcom,i2c-qup-v1.1.1";
- pinctrl-0 = <&i2c4_pins &i2c4_pins_sleep>;
+ pinctrl-0 = <&i2c4_pins>;
+ pinctrl-1 = <&i2c4_pins_sleep>;
pinctrl-names = "default", "sleep";
reg = <0x16380000 0x1000>;
interrupts = <GIC_SPI 153 IRQ_TYPE_NONE>;
@@ -337,7 +341,8 @@
compatible = "qcom,spi-qup-v1.1.1";
reg = <0x1a280000 0x1000>;
interrupts = <0 155 0>;
- pinctrl-0 = <&spi5_default &spi5_sleep>;
+ pinctrl-0 = <&spi5_default>;
+ pinctrl-1 = <&spi5_sleep>;
pinctrl-names = "default", "sleep";
clocks = <&gcc GSBI5_QUP_CLK>, <&gcc GSBI5_H_CLK>;
clock-names = "core", "iface";
@@ -370,7 +375,8 @@
gsbi6_i2c: i2c@16580000 {
compatible = "qcom,i2c-qup-v1.1.1";
- pinctrl-0 = <&i2c6_pins &i2c6_pins_sleep>;
+ pinctrl-0 = <&i2c6_pins>;
+ pinctrl-1 = <&i2c6_pins_sleep>;
pinctrl-names = "default", "sleep";
reg = <0x16580000 0x1000>;
interrupts = <GIC_SPI 157 IRQ_TYPE_NONE>;
--
2.5.0
This patch adds support to gsbi1 uart and its pinctrls nodes.
Signed-off-by: Srinivas Kandagatla <[email protected]>
---
arch/arm/boot/dts/qcom-apq8064-pins.dtsi | 14 ++++++++++++++
arch/arm/boot/dts/qcom-apq8064.dtsi | 10 ++++++++++
2 files changed, 24 insertions(+)
diff --git a/arch/arm/boot/dts/qcom-apq8064-pins.dtsi b/arch/arm/boot/dts/qcom-apq8064-pins.dtsi
index b57c59d..8bb5e5f 100644
--- a/arch/arm/boot/dts/qcom-apq8064-pins.dtsi
+++ b/arch/arm/boot/dts/qcom-apq8064-pins.dtsi
@@ -39,6 +39,20 @@
};
};
+ gsbi1_uart_2pins: gsbi1_uart_2pins {
+ mux {
+ pins = "gpio18", "gpio19";
+ function = "gsbi1";
+ };
+ };
+
+ gsbi1_uart_4pins: gsbi1_uart_4pins {
+ mux {
+ pins = "gpio18", "gpio19", "gpio20", "gpio21";
+ function = "gsbi1";
+ };
+ };
+
i2c2_pins: i2c2 {
mux {
pins = "gpio24", "gpio25";
diff --git a/arch/arm/boot/dts/qcom-apq8064.dtsi b/arch/arm/boot/dts/qcom-apq8064.dtsi
index c6ff8fc..81b4290 100644
--- a/arch/arm/boot/dts/qcom-apq8064.dtsi
+++ b/arch/arm/boot/dts/qcom-apq8064.dtsi
@@ -225,6 +225,16 @@
syscon-tcsr = <&tcsr>;
+ gsbi1_serial: serial@12450000 {
+ compatible = "qcom,msm-uartdm-v1.3", "qcom,msm-uartdm";
+ reg = <0x12450000 0x100>,
+ <0x12400000 0x03>;
+ interrupts = <0 193 0x0>;
+ clocks = <&gcc GSBI1_UART_CLK>, <&gcc GSBI1_H_CLK>;
+ clock-names = "core", "iface";
+ status = "disabled";
+ };
+
gsbi1_i2c: i2c@12460000 {
compatible = "qcom,i2c-qup-v1.1.1";
pinctrl-0 = <&i2c1_pins>;
--
2.5.0
This patch adds support to gsbi7 i2c which is used in some of the new
boards.
Signed-off-by: Srinivas Kandagatla <[email protected]>
---
arch/arm/boot/dts/qcom-apq8064-pins.dtsi | 25 +++++++++++++++++++++++++
arch/arm/boot/dts/qcom-apq8064.dtsi | 13 +++++++++++++
2 files changed, 38 insertions(+)
diff --git a/arch/arm/boot/dts/qcom-apq8064-pins.dtsi b/arch/arm/boot/dts/qcom-apq8064-pins.dtsi
index 8bb5e5f..4102a98 100644
--- a/arch/arm/boot/dts/qcom-apq8064-pins.dtsi
+++ b/arch/arm/boot/dts/qcom-apq8064-pins.dtsi
@@ -219,4 +219,29 @@
function = "gsbi7";
};
};
+
+ i2c7_pins: i2c7 {
+ mux {
+ pins = "gpio84", "gpio85";
+ function = "gsbi7";
+ };
+
+ pinconf {
+ pins = "gpio84", "gpio85";
+ drive-strength = <16>;
+ bias-disable;
+ };
+ };
+
+ i2c7_pins_sleep: i2c7_pins_sleep {
+ mux {
+ pins = "gpio84", "gpio85";
+ function = "gpio";
+ };
+ pinconf {
+ pins = "gpio84", "gpio85";
+ drive-strength = <2>;
+ bias-disable = <0>;
+ };
+ };
};
diff --git a/arch/arm/boot/dts/qcom-apq8064.dtsi b/arch/arm/boot/dts/qcom-apq8064.dtsi
index 81b4290..f064f59 100644
--- a/arch/arm/boot/dts/qcom-apq8064.dtsi
+++ b/arch/arm/boot/dts/qcom-apq8064.dtsi
@@ -417,6 +417,19 @@
clock-names = "core", "iface";
status = "disabled";
};
+
+ gsbi7_i2c: i2c@16680000 {
+ compatible = "qcom,i2c-qup-v1.1.1";
+ pinctrl-0 = <&i2c7_pins>;
+ pinctrl-1 = <&i2c7_pins_sleep>;
+ pinctrl-names = "default", "sleep";
+ reg = <0x16680000 0x1000>;
+ interrupts = <GIC_SPI 159 IRQ_TYPE_NONE>;
+ clocks = <&gcc GSBI7_QUP_CLK>,
+ <&gcc GSBI7_H_CLK>;
+ clock-names = "core", "iface";
+ status = "disabled";
+ };
};
rng@1a500000 {
--
2.5.0
This patch adds support to DragonBoard600 with basic serial ports.
DragonBoard600 is based on APQ8064.
Signed-off-by: Srinivas Kandagatla <[email protected]>
---
arch/arm/boot/dts/Makefile | 1 +
.../arm/boot/dts/qcom-apq8064-dragonboard-600c.dts | 36 ++++++++++++++++++++++
2 files changed, 37 insertions(+)
create mode 100644 arch/arm/boot/dts/qcom-apq8064-dragonboard-600c.dts
diff --git a/arch/arm/boot/dts/Makefile b/arch/arm/boot/dts/Makefile
index 52b34a0..265941a4 100644
--- a/arch/arm/boot/dts/Makefile
+++ b/arch/arm/boot/dts/Makefile
@@ -532,6 +532,7 @@ dtb-$(CONFIG_ARCH_PRIMA2) += \
prima2-evb.dtb
dtb-$(CONFIG_ARCH_QCOM) += \
qcom-apq8064-cm-qs600.dtb \
+ qcom-apq8064-dragonboard-600c.dtb \
qcom-apq8064-ifc6410.dtb \
qcom-apq8064-sony-xperia-yuga.dtb \
qcom-apq8064-asus-nexus7-flo.dtb \
diff --git a/arch/arm/boot/dts/qcom-apq8064-dragonboard-600c.dts b/arch/arm/boot/dts/qcom-apq8064-dragonboard-600c.dts
new file mode 100644
index 0000000..e96aab6
--- /dev/null
+++ b/arch/arm/boot/dts/qcom-apq8064-dragonboard-600c.dts
@@ -0,0 +1,36 @@
+#include "qcom-apq8064-v2.0.dtsi"
+
+/ {
+ model = "Qualcomm Technologies, Inc. APQ8064 DragonBoard600c";
+ compatible = "qcom,apq8064-dragonboard600c", "qcom,apq8064";
+
+ aliases {
+ serial0 = &gsbi7_serial;
+ serial1 = &gsbi1_serial;
+ };
+
+ soc {
+ gsbi@12440000 {
+ status = "okay";
+ qcom,mode = <GSBI_PROT_UART_W_FC>;
+ serial@12450000 {
+ label = "LS-UART1";
+ status = "okay";
+ pinctrl-names = "default";
+ pinctrl-0 = <&gsbi1_uart_4pins>;
+ };
+ };
+
+ /* DEBUG UART */
+ gsbi@16600000 {
+ status = "okay";
+ qcom,mode = <GSBI_PROT_I2C_UART>;
+ serial@16640000 {
+ label = "LS-UART0";
+ status = "okay";
+ pinctrl-names = "default";
+ pinctrl-0 = <&gsbi7_uart_2pins>;
+ };
+ };
+ };
+};
--
2.5.0
This patch adds pmic regulator supplies connected on the board.
Rest of the invidual regulators would be added as and when required by
the devices.
Signed-off-by: Srinivas Kandagatla <[email protected]>
---
.../arm/boot/dts/qcom-apq8064-dragonboard-600c.dts | 55 ++++++++++++++++++++++
1 file changed, 55 insertions(+)
diff --git a/arch/arm/boot/dts/qcom-apq8064-dragonboard-600c.dts b/arch/arm/boot/dts/qcom-apq8064-dragonboard-600c.dts
index e96aab6..0a0bcfe 100644
--- a/arch/arm/boot/dts/qcom-apq8064-dragonboard-600c.dts
+++ b/arch/arm/boot/dts/qcom-apq8064-dragonboard-600c.dts
@@ -9,7 +9,62 @@
serial1 = &gsbi1_serial;
};
+ regulators {
+ compatible = "simple-bus";
+ vph: regulator-fixed@1 {
+ compatible = "regulator-fixed";
+ regulator-min-microvolt = <4500000>;
+ regulator-max-microvolt = <4500000>;
+ regulator-name = "VPH";
+ regulator-type = "voltage";
+ regulator-boot-on;
+ };
+ };
+
soc {
+ rpm@108000 {
+ regulators {
+ vdd_l1_l2_l12_l18-supply = <&pm8921_s4>;
+ vdd_l3_15_17-supply = <&vph>;
+ vdd_l4_14-supply = <&vph>;
+ vdd_l5_8_16-supply = <&vph>;
+ vdd_l6_7-supply = <&vph>;
+ vdd_l9_11-supply = <&vph>;
+ vdd_l10_22-supply = <&vph>;
+ vdd_l21_23_29-supply = <&vph>;
+ vdd_l24-supply = <&pm8921_s1>;
+ vdd_l25-supply = <&pm8921_s1>;
+ vdd_l26-supply = <&pm8921_s7>;
+ vdd_l27-supply = <&pm8921_s7>;
+ vdd_l28-supply = <&pm8921_s7>;
+ vin_lvs1_3_6-supply = <&pm8921_s4>;
+ vin_lvs2-supply = <&pm8921_s1>;
+ vin_lvs4_5_7-supply = <&pm8921_s4>;
+
+ s1 {
+ regulator-always-on;
+ regulator-min-microvolt = <1225000>;
+ regulator-max-microvolt = <1225000>;
+ qcom,switch-mode-frequency = <3200000>;
+ bias-pull-down;
+ };
+
+ s4 {
+ regulator-min-microvolt = <1800000>;
+ regulator-max-microvolt = <1800000>;
+ qcom,switch-mode-frequency = <3200000>;
+ bias-pull-down;
+ regulator-always-on;
+ };
+
+ s7 {
+ regulator-min-microvolt = <1300000>;
+ regulator-max-microvolt = <1300000>;
+ qcom,switch-mode-frequency = <3200000>;
+ };
+ };
+ };
+
gsbi@12440000 {
status = "okay";
qcom,mode = <GSBI_PROT_UART_W_FC>;
--
2.5.0
This patch adds eMMC and SD card support with card detect and adding
required regulators.
Signed-off-by: Srinivas Kandagatla <[email protected]>
---
.../arm/boot/dts/qcom-apq8064-dragonboard-600c.dts | 41 ++++++++++++++++++++++
1 file changed, 41 insertions(+)
diff --git a/arch/arm/boot/dts/qcom-apq8064-dragonboard-600c.dts b/arch/arm/boot/dts/qcom-apq8064-dragonboard-600c.dts
index 0a0bcfe..a977314 100644
--- a/arch/arm/boot/dts/qcom-apq8064-dragonboard-600c.dts
+++ b/arch/arm/boot/dts/qcom-apq8064-dragonboard-600c.dts
@@ -1,4 +1,5 @@
#include "qcom-apq8064-v2.0.dtsi"
+#include <dt-bindings/gpio/gpio.h>
/ {
model = "Qualcomm Technologies, Inc. APQ8064 DragonBoard600c";
@@ -22,6 +23,16 @@
};
soc {
+ pinctrl@800000 {
+ card_detect: card_detect {
+ mux {
+ pins = "gpio26";
+ function = "gpio";
+ bias-disable;
+ };
+ };
+ };
+
rpm@108000 {
regulators {
vdd_l1_l2_l12_l18-supply = <&pm8921_s4>;
@@ -62,6 +73,18 @@
regulator-max-microvolt = <1300000>;
qcom,switch-mode-frequency = <3200000>;
};
+
+ l5 {
+ regulator-min-microvolt = <2750000>;
+ regulator-max-microvolt = <3000000>;
+ bias-pull-down;
+ };
+
+ l6 {
+ regulator-min-microvolt = <2950000>;
+ regulator-max-microvolt = <2950000>;
+ bias-pull-down;
+ };
};
};
@@ -87,5 +110,23 @@
pinctrl-0 = <&gsbi7_uart_2pins>;
};
};
+
+ amba {
+ /* eMMC */
+ sdcc@12400000 {
+ status = "okay";
+ vmmc-supply = <&pm8921_l5>;
+ vqmmc-supply = <&pm8921_s4>;
+ };
+
+ /* External micro SD card */
+ sdcc@12180000 {
+ status = "okay";
+ vmmc-supply = <&pm8921_l6>;
+ pinctrl-names = "default";
+ pinctrl-0 = <&card_detect>;
+ cd-gpios = <&tlmm_pinmux 26 GPIO_ACTIVE_HIGH>;
+ };
+ };
};
};
--
2.5.0
This patch adds pcie and regulators required to get on board ATL1C
ethernet working.
---
.../arm/boot/dts/qcom-apq8064-dragonboard-600c.dts | 36 ++++++++++++++++++++++
1 file changed, 36 insertions(+)
diff --git a/arch/arm/boot/dts/qcom-apq8064-dragonboard-600c.dts b/arch/arm/boot/dts/qcom-apq8064-dragonboard-600c.dts
index 5374510..d3e6193 100644
--- a/arch/arm/boot/dts/qcom-apq8064-dragonboard-600c.dts
+++ b/arch/arm/boot/dts/qcom-apq8064-dragonboard-600c.dts
@@ -20,6 +20,16 @@
regulator-type = "voltage";
regulator-boot-on;
};
+
+ /* on board fixed 3.3v supply */
+ vcc3v3: vcc3v3 {
+ compatible = "regulator-fixed";
+ regulator-name = "VCC3V3";
+ regulator-min-microvolt = <3300000>;
+ regulator-max-microvolt = <3300000>;
+ regulator-always-on;
+ };
+
};
soc {
@@ -31,6 +41,18 @@
bias-disable;
};
};
+
+ pcie_pins: pcie_pinmux {
+ mux {
+ pins = "gpio27";
+ function = "gpio";
+ };
+ conf {
+ pins = "gpio27";
+ drive-strength = <12>;
+ bias-disable;
+ };
+ };
};
rpm@108000 {
@@ -109,6 +131,10 @@
regulator-max-microvolt = <1900000>;
bias-pull-down;
};
+
+ lvs6 {
+ bias-pull-down;
+ };
};
};
@@ -135,6 +161,16 @@
};
};
+ pci@1b500000 {
+ status = "okay";
+ vdda-supply = <&pm8921_s3>;
+ vdda_phy-supply = <&pm8921_lvs6>;
+ vdda_refclk-supply = <&vcc3v3>;
+ pinctrl-0 = <&pcie_pins>;
+ pinctrl-names = "default";
+ perst-gpio = <&tlmm_pinmux 27 GPIO_ACTIVE_LOW>;
+ };
+
/* OTG */
phy@12500000 {
status = "okay";
--
2.5.0
This patch adds usb host and otg support on board with required
regulators.
Signed-off-by: Srinivas Kandagatla <[email protected]>
---
.../arm/boot/dts/qcom-apq8064-dragonboard-600c.dts | 64 ++++++++++++++++++++++
1 file changed, 64 insertions(+)
diff --git a/arch/arm/boot/dts/qcom-apq8064-dragonboard-600c.dts b/arch/arm/boot/dts/qcom-apq8064-dragonboard-600c.dts
index a977314..5374510 100644
--- a/arch/arm/boot/dts/qcom-apq8064-dragonboard-600c.dts
+++ b/arch/arm/boot/dts/qcom-apq8064-dragonboard-600c.dts
@@ -60,6 +60,12 @@
bias-pull-down;
};
+ s3 {
+ regulator-min-microvolt = <1000000>;
+ regulator-max-microvolt = <1400000>;
+ qcom,switch-mode-frequency = <4800000>;
+ };
+
s4 {
regulator-min-microvolt = <1800000>;
regulator-max-microvolt = <1800000>;
@@ -74,6 +80,18 @@
qcom,switch-mode-frequency = <3200000>;
};
+ l3 {
+ regulator-min-microvolt = <3050000>;
+ regulator-max-microvolt = <3300000>;
+ bias-pull-down;
+ };
+
+ l4 {
+ regulator-min-microvolt = <1000000>;
+ regulator-max-microvolt = <1800000>;
+ bias-pull-down;
+ };
+
l5 {
regulator-min-microvolt = <2750000>;
regulator-max-microvolt = <3000000>;
@@ -85,6 +103,12 @@
regulator-max-microvolt = <2950000>;
bias-pull-down;
};
+
+ l23 {
+ regulator-min-microvolt = <1700000>;
+ regulator-max-microvolt = <1900000>;
+ bias-pull-down;
+ };
};
};
@@ -111,6 +135,46 @@
};
};
+ /* OTG */
+ phy@12500000 {
+ status = "okay";
+ dr_mode = "peripheral";
+ vddcx-supply = <&pm8921_s3>;
+ v3p3-supply = <&pm8921_l3>;
+ v1p8-supply = <&pm8921_l4>;
+ };
+
+ phy@12520000 {
+ status = "okay";
+ vddcx-supply = <&pm8921_s3>;
+ v3p3-supply = <&pm8921_l3>;
+ v1p8-supply = <&pm8921_l23>;
+ };
+
+ phy@12530000 {
+ status = "okay";
+ vddcx-supply = <&pm8921_s3>;
+ v3p3-supply = <&pm8921_l3>;
+ v1p8-supply = <&pm8921_l23>;
+ };
+
+ gadget@12500000 {
+ status = "okay";
+ };
+
+ /* OTG */
+ usb@12500000 {
+ status = "okay";
+ };
+
+ usb@12520000 {
+ status = "okay";
+ };
+
+ usb@12530000 {
+ status = "okay";
+ };
+
amba {
/* eMMC */
sdcc@12400000 {
--
2.5.0
This patch adds nodes required to enable 4 i2c buses on the board which
are connected to various sensors and eeprom.
Signed-off-by: Srinivas Kandagatla <[email protected]>
---
.../arm/boot/dts/qcom-apq8064-dragonboard-600c.dts | 46 ++++++++++++++++++++++
1 file changed, 46 insertions(+)
diff --git a/arch/arm/boot/dts/qcom-apq8064-dragonboard-600c.dts b/arch/arm/boot/dts/qcom-apq8064-dragonboard-600c.dts
index 4fecd94..942de04 100644
--- a/arch/arm/boot/dts/qcom-apq8064-dragonboard-600c.dts
+++ b/arch/arm/boot/dts/qcom-apq8064-dragonboard-600c.dts
@@ -8,6 +8,10 @@
aliases {
serial0 = &gsbi7_serial;
serial1 = &gsbi1_serial;
+ i2c0 = &gsbi2_i2c;
+ i2c1 = &gsbi3_i2c;
+ i2c2 = &gsbi4_i2c;
+ i2c3 = &gsbi7_i2c;
};
regulators {
@@ -180,6 +184,42 @@
};
};
+ gsbi@12480000 {
+ status = "okay";
+ qcom,mode = <GSBI_PROT_I2C>;
+ i2c@124a0000 {
+ /* On Low speed expansion and Sensors */
+ label = "LS-I2C0";
+ status = "okay";
+ };
+ };
+
+ gsbi@16200000 {
+ status = "okay";
+ qcom,mode = <GSBI_PROT_I2C>;
+ i2c@16280000 {
+ /* On Low speed expansion */
+ status = "okay";
+ label = "LS-I2C1";
+ clock-frequency = <200000>;
+ eeprom@52 {
+ compatible = "atmel,24c128";
+ reg = <0x52>;
+ pagesize = <64>;
+ };
+ };
+ };
+
+ gsbi@16300000 {
+ status = "okay";
+ qcom,mode = <GSBI_PROT_I2C>;
+ i2c@16380000 {
+ /* On High speed expansion */
+ label = "HS-CAM-I2C3";
+ status = "okay";
+ };
+ };
+
/* DEBUG UART */
gsbi@16600000 {
status = "okay";
@@ -190,6 +230,12 @@
pinctrl-names = "default";
pinctrl-0 = <&gsbi7_uart_2pins>;
};
+
+ i2c@16680000 {
+ /* On High speed expansion */
+ status = "okay";
+ label = "HS-CAM-I2C2";
+ };
};
leds {
--
2.5.0
This patch enables sata and regulators required to get on board sata
working.
Signed-off-by: Srinivas Kandagatla <[email protected]>
---
arch/arm/boot/dts/qcom-apq8064-dragonboard-600c.dts | 13 +++++++++++++
1 file changed, 13 insertions(+)
diff --git a/arch/arm/boot/dts/qcom-apq8064-dragonboard-600c.dts b/arch/arm/boot/dts/qcom-apq8064-dragonboard-600c.dts
index d3e6193..52f742c 100644
--- a/arch/arm/boot/dts/qcom-apq8064-dragonboard-600c.dts
+++ b/arch/arm/boot/dts/qcom-apq8064-dragonboard-600c.dts
@@ -135,6 +135,10 @@
lvs6 {
bias-pull-down;
};
+
+ lvs7 {
+ bias-pull-down;
+ };
};
};
@@ -171,6 +175,15 @@
perst-gpio = <&tlmm_pinmux 27 GPIO_ACTIVE_LOW>;
};
+ phy@1b400000 {
+ status = "okay";
+ };
+
+ sata@29000000 {
+ status = "okay";
+ target-supply = <&pm8921_lvs7>;
+ };
+
/* OTG */
phy@12500000 {
status = "okay";
--
2.5.0
This patch adds spi nodes required to provide spi bus support on LS
expansion.
Signed-off-by: Srinivas Kandagatla <[email protected]>
---
arch/arm/boot/dts/qcom-apq8064-dragonboard-600c.dts | 10 ++++++++++
1 file changed, 10 insertions(+)
diff --git a/arch/arm/boot/dts/qcom-apq8064-dragonboard-600c.dts b/arch/arm/boot/dts/qcom-apq8064-dragonboard-600c.dts
index 942de04..2201240 100644
--- a/arch/arm/boot/dts/qcom-apq8064-dragonboard-600c.dts
+++ b/arch/arm/boot/dts/qcom-apq8064-dragonboard-600c.dts
@@ -12,6 +12,7 @@
i2c1 = &gsbi3_i2c;
i2c2 = &gsbi4_i2c;
i2c3 = &gsbi7_i2c;
+ spi0 = &gsbi5_spi;
};
regulators {
@@ -220,6 +221,15 @@
};
};
+ gsbi@1a200000 {
+ status = "okay";
+ spi@1a280000 {
+ /* On Low speed expansion */
+ label = "LS-SPI0";
+ status = "okay";
+ };
+ };
+
/* DEBUG UART */
gsbi@16600000 {
status = "okay";
--
2.5.0
This patch adds support to 4 user leds, wlan and bt led on board.
Signed-off-by: Srinivas Kandagatla <[email protected]>
---
.../arm/boot/dts/qcom-apq8064-dragonboard-600c.dts | 76 ++++++++++++++++++++++
1 file changed, 76 insertions(+)
diff --git a/arch/arm/boot/dts/qcom-apq8064-dragonboard-600c.dts b/arch/arm/boot/dts/qcom-apq8064-dragonboard-600c.dts
index 52f742c..4fecd94 100644
--- a/arch/arm/boot/dts/qcom-apq8064-dragonboard-600c.dts
+++ b/arch/arm/boot/dts/qcom-apq8064-dragonboard-600c.dts
@@ -53,6 +53,33 @@
bias-disable;
};
};
+
+ user_leds: user_leds {
+ mux {
+ pins = "gpio3", "gpio7", "gpio10", "gpio11";
+ function = "gpio";
+ };
+
+ conf {
+ pins = "gpio3", "gpio7", "gpio10", "gpio11";
+ function = "gpio";
+ output-low;
+ };
+ };
+ };
+
+ qcom,ssbi@500000 {
+ pmic@0 {
+ mpps@50 {
+ mpp_leds: mpp_leds {
+ pinconf {
+ pins = "mpp7", "mpp8";
+ function = "digital";
+ output-low;
+ };
+ };
+ };
+ };
};
rpm@108000 {
@@ -165,6 +192,55 @@
};
};
+ leds {
+ pinctrl-names = "default";
+ pinctrl-0 = <&user_leds>, <&mpp_leds>;
+
+ compatible = "gpio-leds";
+
+ led@1 {
+ label = "dragonboard-600c:green:user1";
+ gpios = <&tlmm_pinmux 3 GPIO_ACTIVE_HIGH>;
+ linux,default-trigger = "heartbeat";
+ default-state = "off";
+ };
+
+ led@2 {
+ label = "dragonboard-600c:green:user2";
+ gpios = <&tlmm_pinmux 7 GPIO_ACTIVE_HIGH>;
+ linux,default-trigger = "mmc0";
+ default-state = "off";
+ };
+
+ led@3 {
+ label = "dragonboard-600c:green:user3";
+ gpios = <&tlmm_pinmux 10 GPIO_ACTIVE_HIGH>;
+ linux,default-trigger = "mmc1";
+ default-state = "off";
+ };
+
+ led@4 {
+ label = "apq8016-sbc:green:user4";
+ gpios = <&tlmm_pinmux 11 GPIO_ACTIVE_HIGH>;
+ linux,default-trigger = "none";
+ default-state = "off";
+ };
+
+ led@5 {
+ label = "dragonboard-600c:yellow:wlan";
+ gpios = <&pm8921_mpps 7 GPIO_ACTIVE_HIGH>;
+ linux,default-trigger = "wlan";
+ default-state = "off";
+ };
+
+ led@6 {
+ label = "dragonboard-600c:blue:bt";
+ gpios = <&pm8921_mpps 8 GPIO_ACTIVE_HIGH>;
+ linux,default-trigger = "bt";
+ default-state = "off";
+ };
+ };
+
pci@1b500000 {
status = "okay";
vdda-supply = <&pm8921_s3>;
--
2.5.0
On 03/23/2016 12:47 PM, Srinivas Kandagatla wrote:
> diff --git a/arch/arm/boot/dts/qcom-apq8064-dragonboard-600c.dts b/arch/arm/boot/dts/qcom-apq8064-dragonboard-600c.dts
> new file mode 100644
> index 0000000..e96aab6
> --- /dev/null
> +++ b/arch/arm/boot/dts/qcom-apq8064-dragonboard-600c.dts
> @@ -0,0 +1,36 @@
> +#include "qcom-apq8064-v2.0.dtsi"
> +
> +/ {
> + model = "Qualcomm Technologies, Inc. APQ8064 DragonBoard600c";
> + compatible = "qcom,apq8064-dragonboard600c", "qcom,apq8064";
Does the bootloader look at this string at all or is it using appended
DTB design? I'm mostly worried about having that
qcom,apq8064-dragonboard600c part. It should probably be
qcom,apq8064-sbc or something like that instead.
--
Qualcomm Innovation Center, Inc. is a member of Code Aurora Forum,
a Linux Foundation Collaborative Project
On 23/03/16 20:07, Stephen Boyd wrote:
> On 03/23/2016 12:47 PM, Srinivas Kandagatla wrote:
>> diff --git a/arch/arm/boot/dts/qcom-apq8064-dragonboard-600c.dts b/arch/arm/boot/dts/qcom-apq8064-dragonboard-600c.dts
>> new file mode 100644
>> index 0000000..e96aab6
>> --- /dev/null
>> +++ b/arch/arm/boot/dts/qcom-apq8064-dragonboard-600c.dts
>> @@ -0,0 +1,36 @@
>> +#include "qcom-apq8064-v2.0.dtsi"
>> +
>> +/ {
>> + model = "Qualcomm Technologies, Inc. APQ8064 DragonBoard600c";
>> + compatible = "qcom,apq8064-dragonboard600c", "qcom,apq8064";
>
> Does the bootloader look at this string at all or is it using appended
> DTB design? I'm mostly worried about having that
Not at least on APQ8064 bootloaders, as they are still missing DT
support. Currently we append dtb to the kernel.
> qcom,apq8064-dragonboard600c part. It should probably be
> qcom,apq8064-sbc or something like that instead.
Will do that in next version.
thanks,
srini
>
On Wed, Mar 23, 2016 at 1:30 PM, Srinivas Kandagatla
<[email protected]> wrote:
>
>
> On 23/03/16 20:07, Stephen Boyd wrote:
>>
>> On 03/23/2016 12:47 PM, Srinivas Kandagatla wrote:
>>>
>>> diff --git a/arch/arm/boot/dts/qcom-apq8064-dragonboard-600c.dts
>>> b/arch/arm/boot/dts/qcom-apq8064-dragonboard-600c.dts
>>> new file mode 100644
>>> index 0000000..e96aab6
>>> --- /dev/null
>>> +++ b/arch/arm/boot/dts/qcom-apq8064-dragonboard-600c.dts
>>> @@ -0,0 +1,36 @@
>>> +#include "qcom-apq8064-v2.0.dtsi"
>>> +
>>> +/ {
>>> + model = "Qualcomm Technologies, Inc. APQ8064 DragonBoard600c";
>>> + compatible = "qcom,apq8064-dragonboard600c", "qcom,apq8064";
>>
>>
>> Does the bootloader look at this string at all or is it using appended
>> DTB design? I'm mostly worried about having that
>
> Not at least on APQ8064 bootloaders, as they are still missing DT support.
> Currently we append dtb to the kernel.
>>
>> qcom,apq8064-dragonboard600c part. It should probably be
>> qcom,apq8064-sbc or something like that instead.
>
> Will do that in next version.
>
This "sbc" isn't that just the abbreviation for "single board
computer"? I find it hard to believe this is _the_ 8064 sbc or the
only 8064 sbc.
Also, if I make a product based of this board, with some minor
changes, is that still the sbc?
I think the compatible should be "qcom,apq8064-db600c",
"qcom,apq8064-sbc", "qcom,apq8064"
Regards,
Bjorn
On 03/23/2016 06:04 PM, Bjorn Andersson wrote:
> On Wed, Mar 23, 2016 at 1:30 PM, Srinivas Kandagatla
> <[email protected]> wrote:
>>
>> On 23/03/16 20:07, Stephen Boyd wrote:
>>> On 03/23/2016 12:47 PM, Srinivas Kandagatla wrote:
>>>> diff --git a/arch/arm/boot/dts/qcom-apq8064-dragonboard-600c.dts
>>>> b/arch/arm/boot/dts/qcom-apq8064-dragonboard-600c.dts
>>>> new file mode 100644
>>>> index 0000000..e96aab6
>>>> --- /dev/null
>>>> +++ b/arch/arm/boot/dts/qcom-apq8064-dragonboard-600c.dts
>>>> @@ -0,0 +1,36 @@
>>>> +#include "qcom-apq8064-v2.0.dtsi"
>>>> +
>>>> +/ {
>>>> + model = "Qualcomm Technologies, Inc. APQ8064 DragonBoard600c";
>>>> + compatible = "qcom,apq8064-dragonboard600c", "qcom,apq8064";
>>>
>>> Does the bootloader look at this string at all or is it using appended
>>> DTB design? I'm mostly worried about having that
>> Not at least on APQ8064 bootloaders, as they are still missing DT support.
>> Currently we append dtb to the kernel.
>>> qcom,apq8064-dragonboard600c part. It should probably be
>>> qcom,apq8064-sbc or something like that instead.
>> Will do that in next version.
>>
> This "sbc" isn't that just the abbreviation for "single board
> computer"? I find it hard to believe this is _the_ 8064 sbc or the
> only 8064 sbc.
I don't make up the names, but for other qcom sbc products the
bootloader is looking for sbc there to make sure it picks the right dtb
blob. So I guess this is _the_ qcom 8064 sbc? Definitely not _the_ 8064
sbc though.
If this device won't get those bootloaders that look for this then it
doesn't really matter and I don't care what this is named. Please take a
look at Documentation/devicetree/bindings/arm/qcom.txt for what I'm
talking about though.
>
> Also, if I make a product based of this board, with some minor
> changes, is that still the sbc?
>
> I think the compatible should be "qcom,apq8064-db600c",
> "qcom,apq8064-sbc", "qcom,apq8064"
>
>
I really hope that people don't keep using the qcom bootloader dtb
picking design if they make a new product based off qcom boards with a
slight variation. They should replace the vendor part of the compatible
anyway with their own vendor prefix, and then the bootloader would need
to be updated to look for that string or something else. I really don't
want to get in the business of updating dtbTool for all the non-qcom
designs that pop up because they keep using the qcom dtb identification
scheme. It almost doesn't scale right now and that's just qcom designs.
--
Qualcomm Innovation Center, Inc. is a member of Code Aurora Forum,
a Linux Foundation Collaborative Project
On Wednesday 23 March 2016 18:48:46 Stephen Boyd wrote:
> >>
> > This "sbc" isn't that just the abbreviation for "single board
> > computer"? I find it hard to believe this is _the_ 8064 sbc or the
> > only 8064 sbc.
>
> I don't make up the names, but for other qcom sbc products the
> bootloader is looking for sbc there to make sure it picks the right dtb
> blob. So I guess this is _the_ qcom 8064 sbc? Definitely not _the_ 8064
> sbc though.
>
Is it even made by Qualcomm? IIRC the 410c is made by Arrow, not Qualcomm.
Arnd
On Wed, Mar 23, 2016 at 8:48 PM, Srinivas Kandagatla
<[email protected]> wrote:
> + led@1 {
> + label = "dragonboard-600c:green:user1";
> + gpios = <&tlmm_pinmux 3 GPIO_ACTIVE_HIGH>;
> + linux,default-trigger = "heartbeat";
> + default-state = "off";
> + };
> +
> + led@2 {
> + label = "dragonboard-600c:green:user2";
> + gpios = <&tlmm_pinmux 7 GPIO_ACTIVE_HIGH>;
> + linux,default-trigger = "mmc0";
> + default-state = "off";
> + };
> +
> + led@3 {
> + label = "dragonboard-600c:green:user3";
> + gpios = <&tlmm_pinmux 10 GPIO_ACTIVE_HIGH>;
> + linux,default-trigger = "mmc1";
> + default-state = "off";
> + };
> +
> + led@4 {
> + label = "apq8016-sbc:green:user4";
typo ^^
> + gpios = <&tlmm_pinmux 11 GPIO_ACTIVE_HIGH>;
> + linux,default-trigger = "none";
> + default-state = "off";
> + };
also, if i read the 96boards specs correctly, the LED are labeled
3-2-1-0 , if you look at the board with the LEDs on the bottom. With
this DT config, you end up with 0-1-2-3 instead.
also, they should be labeled 0 to 3, not 1 to 4.
On Thu, Mar 24, 2016 at 2:48 AM, Stephen Boyd <[email protected]> wrote:
> I don't make up the names, but for other qcom sbc products the
> bootloader is looking for sbc there to make sure it picks the right dtb
> blob. So I guess this is _the_ qcom 8064 sbc? Definitely not _the_ 8064
> sbc though.
>
> If this device won't get those bootloaders that look for this then it
> doesn't really matter and I don't care what this is named. Please take a
> look at Documentation/devicetree/bindings/arm/qcom.txt for what I'm
> talking about though.
I would really want to get rid of the 'i need to append the DTB' on
this board. the DT support in the bootloader have been backported , I
am really hoping we can use this DT aware LK, and thus rely on the
compatible string, like we do on db410c. So this is important to get
the name/property right, since we will get there. In fact, I am even
hoping that once we publish this DT aware LK along with this board,
the other myriad of 8064 based 'SBC' from various vendors will upgrade
their bootloader, so that we can have a single 'boot' image (generated
with the help of dtbTool) that works across all devices.
On Wed 23 Mar 12:48 PDT 2016, Srinivas Kandagatla wrote:
> This patch adds support to 4 user leds, wlan and bt led on board.
>
> Signed-off-by: Srinivas Kandagatla <[email protected]>
I'm not fond of the overly complicated names; and I think it should at
least be shortened to "db600c:...".
Tested this on my DB600c, seems to work, except the WiFi/BT triggers,
see comments below.
> + leds {
> + pinctrl-names = "default";
> + pinctrl-0 = <&user_leds>, <&mpp_leds>;
> +
> + compatible = "gpio-leds";
> +
> + led@1 {
> + label = "dragonboard-600c:green:user1";
> + gpios = <&tlmm_pinmux 3 GPIO_ACTIVE_HIGH>;
> + linux,default-trigger = "heartbeat";
> + default-state = "off";
> + };
> +
> + led@2 {
> + label = "dragonboard-600c:green:user2";
> + gpios = <&tlmm_pinmux 7 GPIO_ACTIVE_HIGH>;
> + linux,default-trigger = "mmc0";
> + default-state = "off";
> + };
> +
> + led@3 {
> + label = "dragonboard-600c:green:user3";
> + gpios = <&tlmm_pinmux 10 GPIO_ACTIVE_HIGH>;
> + linux,default-trigger = "mmc1";
> + default-state = "off";
> + };
> +
> + led@4 {
> + label = "apq8016-sbc:green:user4";
> + gpios = <&tlmm_pinmux 11 GPIO_ACTIVE_HIGH>;
> + linux,default-trigger = "none";
> + default-state = "off";
> + };
> +
> + led@5 {
> + label = "dragonboard-600c:yellow:wlan";
> + gpios = <&pm8921_mpps 7 GPIO_ACTIVE_HIGH>;
> + linux,default-trigger = "wlan";
This should either be "phy0rx", "phy0tx", "phy0assoc" or "phy0radio". TX
does not seem to work, so this should be debugged; "assoc" is probably
the one that makes most sense.
> + default-state = "off";
> + };
> +
> + led@6 {
> + label = "dragonboard-600c:blue:bt";
> + gpios = <&pm8921_mpps 8 GPIO_ACTIVE_HIGH>;
> + linux,default-trigger = "bt";
This should be "hci0-power".
> + default-state = "off";
> + };
> + };
> +
Regards,
Bjorn
Thanks Nico,
On 24/03/16 16:51, Nicolas Dechesne wrote:
> On Wed, Mar 23, 2016 at 8:48 PM, Srinivas Kandagatla
> <[email protected]> wrote:
>> + led@1 {
>> + label = "dragonboard-600c:green:user1";
>> + gpios = <&tlmm_pinmux 3 GPIO_ACTIVE_HIGH>;
>> + linux,default-trigger = "heartbeat";
>> + default-state = "off";
>> + };
>> +
>> + led@2 {
>> + label = "dragonboard-600c:green:user2";
>> + gpios = <&tlmm_pinmux 7 GPIO_ACTIVE_HIGH>;
>> + linux,default-trigger = "mmc0";
>> + default-state = "off";
>> + };
>> +
>> + led@3 {
>> + label = "dragonboard-600c:green:user3";
>> + gpios = <&tlmm_pinmux 10 GPIO_ACTIVE_HIGH>;
>> + linux,default-trigger = "mmc1";
>> + default-state = "off";
>> + };
>> +
>> + led@4 {
>> + label = "apq8016-sbc:green:user4";
>
> typo ^^
>
Yep, Will fix this.
>> + gpios = <&tlmm_pinmux 11 GPIO_ACTIVE_HIGH>;
>> + linux,default-trigger = "none";
>> + default-state = "off";
>> + };
>
> also, if i read the 96boards specs correctly, the LED are labeled
> 3-2-1-0 , if you look at the board with the LEDs on the bottom. With
> this DT config, you end up with 0-1-2-3 instead.
>
> also, they should be labeled 0 to 3, not 1 to 4.
I agree Will fix it. The structure was copied from the 8016.
Its strange that DB410c LEDS labels on the board are from 1 to 4 rather
than 0 to 3, on the other hand DB600c does not have any labels as such.
For Now I can change DB600c to start with 0 rather than 1.
>
Thanks Bjorn,
On 27/03/16 06:50, Bjorn Andersson wrote:
> On Wed 23 Mar 12:48 PDT 2016, Srinivas Kandagatla wrote:
>
>> This patch adds support to 4 user leds, wlan and bt led on board.
>>
>> Signed-off-by: Srinivas Kandagatla <[email protected]>
>
> I'm not fond of the overly complicated names; and I think it should at
> least be shortened to "db600c:...".
I agree, I will fix this in next version.
>
> Tested this on my DB600c, seems to work, except the WiFi/BT triggers,
> see comments below.
>
>> + leds {
>> + pinctrl-names = "default";
>> + pinctrl-0 = <&user_leds>, <&mpp_leds>;
>> +
>> + compatible = "gpio-leds";
>> +
>> + led@1 {
>> + label = "dragonboard-600c:green:user1";
>> + gpios = <&tlmm_pinmux 3 GPIO_ACTIVE_HIGH>;
>> + linux,default-trigger = "heartbeat";
>> + default-state = "off";
>> + };
>> +
>> + led@2 {
>> + label = "dragonboard-600c:green:user2";
>> + gpios = <&tlmm_pinmux 7 GPIO_ACTIVE_HIGH>;
>> + linux,default-trigger = "mmc0";
>> + default-state = "off";
>> + };
>> +
>> + led@3 {
>> + label = "dragonboard-600c:green:user3";
>> + gpios = <&tlmm_pinmux 10 GPIO_ACTIVE_HIGH>;
>> + linux,default-trigger = "mmc1";
>> + default-state = "off";
>> + };
>> +
>> + led@4 {
>> + label = "apq8016-sbc:green:user4";
>> + gpios = <&tlmm_pinmux 11 GPIO_ACTIVE_HIGH>;
>> + linux,default-trigger = "none";
>> + default-state = "off";
>> + };
>> +
>> + led@5 {
>> + label = "dragonboard-600c:yellow:wlan";
>> + gpios = <&pm8921_mpps 7 GPIO_ACTIVE_HIGH>;
>> + linux,default-trigger = "wlan";
>
> This should either be "phy0rx", "phy0tx", "phy0assoc" or "phy0radio". TX
> does not seem to work, so this should be debugged; "assoc" is probably
> the one that makes most sense.
Am ok, to change, did you get activity leds works with any of these
strings with WLAN or BT?
phy0rx/tx seems to be bit more generic and atleast the name looks bit
non-specific to wlan.
These names should be documented somewhere, Its very difficult to find
which names to use unless you read the code.
It would be nice to just provide a phandle to the device which
led-trigger should use, which makes it clear and explicit.
>
>> + default-state = "off";
>> + };
>> +
>> + led@6 {
>> + label = "dragonboard-600c:blue:bt";
>> + gpios = <&pm8921_mpps 8 GPIO_ACTIVE_HIGH>;
>> + linux,default-trigger = "bt";
>
> This should be "hci0-power".
Does this trigger work for you?
Name is bit misleading though.
Thanks,
srini
>
>> + default-state = "off";
>> + };
>> + };
>> +
>
> Regards,
> Bjorn
>
On Wed 23 Mar 18:48 PDT 2016, Stephen Boyd wrote:
> On 03/23/2016 06:04 PM, Bjorn Andersson wrote:
> > On Wed, Mar 23, 2016 at 1:30 PM, Srinivas Kandagatla
> > <[email protected]> wrote:
> >>
> >> On 23/03/16 20:07, Stephen Boyd wrote:
[..]
> >
> > Also, if I make a product based of this board, with some minor
> > changes, is that still the sbc?
> >
> > I think the compatible should be "qcom,apq8064-db600c",
> > "qcom,apq8064-sbc", "qcom,apq8064"
> >
> >
>
> I really hope that people don't keep using the qcom bootloader dtb
> picking design if they make a new product based off qcom boards with a
> slight variation. They should replace the vendor part of the compatible
> anyway with their own vendor prefix, and then the bootloader would need
> to be updated to look for that string or something else. I really don't
> want to get in the business of updating dtbTool for all the non-qcom
> designs that pop up because they keep using the qcom dtb identification
> scheme. It almost doesn't scale right now and that's just qcom designs.
At that other company the various dtb's that was to be picked for a
given product was always to support the various SoC versions; so those
devices always shipped with the mtp board-id and msm-id.
As far as I've seen this is how Qualcomm's Android customers does it.
But as things progress further I do see a need for being able to also
pick the right product and at that point you're right that the vendor
must change their boot loader.
Regards,
Bjorn
On Wed 23 Mar 12:47 PDT 2016, Srinivas Kandagatla wrote:
> This patch fixes pinctrls for spi and i2c nodes whose default and sleep
> states are together, which is incorrect.
>
> Without this patch i2c/spi would not be functional.
>
> Signed-off-by: Srinivas Kandagatla <[email protected]>
The change in itself is sound, but I don't understand why i2c/spi fails
to function if we don't bring them to a sleep state. Can you please
update the commit message with an explanation?
PS. Whenever there's multiple states for a thing I do prefer prefixing
them _a and _s to highlight that difference (not only suffixing the
sleep state). And use abbreviations :)
Regards,
Bjorn
> ---
> arch/arm/boot/dts/qcom-apq8064.dtsi | 18 ++++++++++++------
> 1 file changed, 12 insertions(+), 6 deletions(-)
>
> diff --git a/arch/arm/boot/dts/qcom-apq8064.dtsi b/arch/arm/boot/dts/qcom-apq8064.dtsi
> index 65d0e8d..c6ff8fc 100644
> --- a/arch/arm/boot/dts/qcom-apq8064.dtsi
> +++ b/arch/arm/boot/dts/qcom-apq8064.dtsi
> @@ -227,7 +227,8 @@
>
> gsbi1_i2c: i2c@12460000 {
> compatible = "qcom,i2c-qup-v1.1.1";
> - pinctrl-0 = <&i2c1_pins &i2c1_pins_sleep>;
> + pinctrl-0 = <&i2c1_pins>;
> + pinctrl-1 = <&i2c1_pins_sleep>;
> pinctrl-names = "default", "sleep";
> reg = <0x12460000 0x1000>;
> interrupts = <0 194 IRQ_TYPE_NONE>;
> @@ -255,7 +256,8 @@
> gsbi2_i2c: i2c@124a0000 {
> compatible = "qcom,i2c-qup-v1.1.1";
> reg = <0x124a0000 0x1000>;
> - pinctrl-0 = <&i2c2_pins &i2c2_pins_sleep>;
> + pinctrl-0 = <&i2c2_pins>;
> + pinctrl-1 = <&i2c2_pins_sleep>;
> pinctrl-names = "default", "sleep";
> interrupts = <0 196 IRQ_TYPE_NONE>;
> clocks = <&gcc GSBI2_QUP_CLK>, <&gcc GSBI2_H_CLK>;
> @@ -277,7 +279,8 @@
> ranges;
> gsbi3_i2c: i2c@16280000 {
> compatible = "qcom,i2c-qup-v1.1.1";
> - pinctrl-0 = <&i2c3_pins &i2c3_pins_sleep>;
> + pinctrl-0 = <&i2c3_pins>;
> + pinctrl-1 = <&i2c3_pins_sleep>;
> pinctrl-names = "default", "sleep";
> reg = <0x16280000 0x1000>;
> interrupts = <GIC_SPI 151 IRQ_TYPE_NONE>;
> @@ -302,7 +305,8 @@
>
> gsbi4_i2c: i2c@16380000 {
> compatible = "qcom,i2c-qup-v1.1.1";
> - pinctrl-0 = <&i2c4_pins &i2c4_pins_sleep>;
> + pinctrl-0 = <&i2c4_pins>;
> + pinctrl-1 = <&i2c4_pins_sleep>;
> pinctrl-names = "default", "sleep";
> reg = <0x16380000 0x1000>;
> interrupts = <GIC_SPI 153 IRQ_TYPE_NONE>;
> @@ -337,7 +341,8 @@
> compatible = "qcom,spi-qup-v1.1.1";
> reg = <0x1a280000 0x1000>;
> interrupts = <0 155 0>;
> - pinctrl-0 = <&spi5_default &spi5_sleep>;
> + pinctrl-0 = <&spi5_default>;
> + pinctrl-1 = <&spi5_sleep>;
> pinctrl-names = "default", "sleep";
> clocks = <&gcc GSBI5_QUP_CLK>, <&gcc GSBI5_H_CLK>;
> clock-names = "core", "iface";
> @@ -370,7 +375,8 @@
>
> gsbi6_i2c: i2c@16580000 {
> compatible = "qcom,i2c-qup-v1.1.1";
> - pinctrl-0 = <&i2c6_pins &i2c6_pins_sleep>;
> + pinctrl-0 = <&i2c6_pins>;
> + pinctrl-1 = <&i2c6_pins_sleep>;
> pinctrl-names = "default", "sleep";
> reg = <0x16580000 0x1000>;
> interrupts = <GIC_SPI 157 IRQ_TYPE_NONE>;
> --
> 2.5.0
>
On Wed 23 Mar 12:47 PDT 2016, Srinivas Kandagatla wrote:
> This patch adds support to gsbi1 uart and its pinctrls nodes.
>
> Signed-off-by: Srinivas Kandagatla <[email protected]>
> ---
> arch/arm/boot/dts/qcom-apq8064-pins.dtsi | 14 ++++++++++++++
> arch/arm/boot/dts/qcom-apq8064.dtsi | 10 ++++++++++
> 2 files changed, 24 insertions(+)
>
> diff --git a/arch/arm/boot/dts/qcom-apq8064-pins.dtsi b/arch/arm/boot/dts/qcom-apq8064-pins.dtsi
> index b57c59d..8bb5e5f 100644
> --- a/arch/arm/boot/dts/qcom-apq8064-pins.dtsi
> +++ b/arch/arm/boot/dts/qcom-apq8064-pins.dtsi
> @@ -39,6 +39,20 @@
> };
> };
>
> + gsbi1_uart_2pins: gsbi1_uart_2pins {
> + mux {
> + pins = "gpio18", "gpio19";
> + function = "gsbi1";
> + };
> + };
> +
> + gsbi1_uart_4pins: gsbi1_uart_4pins {
> + mux {
> + pins = "gpio18", "gpio19", "gpio20", "gpio21";
> + function = "gsbi1";
> + };
> + };
> +
No-one consumes this nodes.
> i2c2_pins: i2c2 {
> mux {
> pins = "gpio24", "gpio25";
> diff --git a/arch/arm/boot/dts/qcom-apq8064.dtsi b/arch/arm/boot/dts/qcom-apq8064.dtsi
> index c6ff8fc..81b4290 100644
> --- a/arch/arm/boot/dts/qcom-apq8064.dtsi
> +++ b/arch/arm/boot/dts/qcom-apq8064.dtsi
> @@ -225,6 +225,16 @@
>
> syscon-tcsr = <&tcsr>;
>
> + gsbi1_serial: serial@12450000 {
Are you going to reference this node? Otherwise it should not have a
label.
> + compatible = "qcom,msm-uartdm-v1.3", "qcom,msm-uartdm";
> + reg = <0x12450000 0x100>,
> + <0x12400000 0x03>;
> + interrupts = <0 193 0x0>;
> + clocks = <&gcc GSBI1_UART_CLK>, <&gcc GSBI1_H_CLK>;
> + clock-names = "core", "iface";
> + status = "disabled";
> + };
> +
Regards,
Bjorn
On Wed 23 Mar 12:47 PDT 2016, Srinivas Kandagatla wrote:
> This patch adds support to gsbi7 i2c which is used in some of the new
> boards.
>
> Signed-off-by: Srinivas Kandagatla <[email protected]>
> ---
> arch/arm/boot/dts/qcom-apq8064-pins.dtsi | 25 +++++++++++++++++++++++++
> arch/arm/boot/dts/qcom-apq8064.dtsi | 13 +++++++++++++
> 2 files changed, 38 insertions(+)
>
> diff --git a/arch/arm/boot/dts/qcom-apq8064-pins.dtsi b/arch/arm/boot/dts/qcom-apq8064-pins.dtsi
> index 8bb5e5f..4102a98 100644
> --- a/arch/arm/boot/dts/qcom-apq8064-pins.dtsi
> +++ b/arch/arm/boot/dts/qcom-apq8064-pins.dtsi
> @@ -219,4 +219,29 @@
> function = "gsbi7";
> };
> };
> +
> + i2c7_pins: i2c7 {
> + mux {
> + pins = "gpio84", "gpio85";
> + function = "gsbi7";
> + };
> +
> + pinconf {
> + pins = "gpio84", "gpio85";
> + drive-strength = <16>;
> + bias-disable;
> + };
> + };
> +
> + i2c7_pins_sleep: i2c7_pins_sleep {
> + mux {
> + pins = "gpio84", "gpio85";
> + function = "gpio";
> + };
> + pinconf {
> + pins = "gpio84", "gpio85";
> + drive-strength = <2>;
> + bias-disable = <0>;
> + };
> + };
I've been going back and forth about having default pinconfig settings
in the platform dtsi and having devices to override these later.
I do find it cleaner to push this down to the board, as they should
always be verified and tweaked by a hw guy for the specific board.
For some cases this isn't really the case, based on hard design
requirements, but for i2c it is.
> };
> diff --git a/arch/arm/boot/dts/qcom-apq8064.dtsi b/arch/arm/boot/dts/qcom-apq8064.dtsi
> index 81b4290..f064f59 100644
> --- a/arch/arm/boot/dts/qcom-apq8064.dtsi
> +++ b/arch/arm/boot/dts/qcom-apq8064.dtsi
> @@ -417,6 +417,19 @@
> clock-names = "core", "iface";
> status = "disabled";
> };
> +
> + gsbi7_i2c: i2c@16680000 {
We normally don't need to reference the i2c adaptors, so please drop
this label.
> + compatible = "qcom,i2c-qup-v1.1.1";
> + pinctrl-0 = <&i2c7_pins>;
> + pinctrl-1 = <&i2c7_pins_sleep>;
> + pinctrl-names = "default", "sleep";
> + reg = <0x16680000 0x1000>;
> + interrupts = <GIC_SPI 159 IRQ_TYPE_NONE>;
> + clocks = <&gcc GSBI7_QUP_CLK>,
> + <&gcc GSBI7_H_CLK>;
> + clock-names = "core", "iface";
> + status = "disabled";
> + };
Regards,
Bjorn
On Wed 23 Mar 12:47 PDT 2016, Srinivas Kandagatla wrote:
> This patch adds pmic regulator supplies connected on the board.
> Rest of the invidual regulators would be added as and when required by
> the devices.
>
I do think we should try to fill them all out, before they are needed.
Especially so that people don't take the easy path of just copying
pieces from some other 8064 dts to get going...
But we can do that in a follow up if you prefer.
Acked-by: Bjorn Andersson <[email protected]>
Regards,
Bjorn
> Signed-off-by: Srinivas Kandagatla <[email protected]>
> ---
> .../arm/boot/dts/qcom-apq8064-dragonboard-600c.dts | 55 ++++++++++++++++++++++
> 1 file changed, 55 insertions(+)
>
> diff --git a/arch/arm/boot/dts/qcom-apq8064-dragonboard-600c.dts b/arch/arm/boot/dts/qcom-apq8064-dragonboard-600c.dts
> index e96aab6..0a0bcfe 100644
> --- a/arch/arm/boot/dts/qcom-apq8064-dragonboard-600c.dts
> +++ b/arch/arm/boot/dts/qcom-apq8064-dragonboard-600c.dts
> @@ -9,7 +9,62 @@
> serial1 = &gsbi1_serial;
> };
>
> + regulators {
> + compatible = "simple-bus";
> + vph: regulator-fixed@1 {
> + compatible = "regulator-fixed";
> + regulator-min-microvolt = <4500000>;
> + regulator-max-microvolt = <4500000>;
> + regulator-name = "VPH";
> + regulator-type = "voltage";
> + regulator-boot-on;
> + };
> + };
> +
> soc {
> + rpm@108000 {
> + regulators {
> + vdd_l1_l2_l12_l18-supply = <&pm8921_s4>;
> + vdd_l3_15_17-supply = <&vph>;
> + vdd_l4_14-supply = <&vph>;
> + vdd_l5_8_16-supply = <&vph>;
> + vdd_l6_7-supply = <&vph>;
> + vdd_l9_11-supply = <&vph>;
> + vdd_l10_22-supply = <&vph>;
> + vdd_l21_23_29-supply = <&vph>;
> + vdd_l24-supply = <&pm8921_s1>;
> + vdd_l25-supply = <&pm8921_s1>;
> + vdd_l26-supply = <&pm8921_s7>;
> + vdd_l27-supply = <&pm8921_s7>;
> + vdd_l28-supply = <&pm8921_s7>;
> + vin_lvs1_3_6-supply = <&pm8921_s4>;
> + vin_lvs2-supply = <&pm8921_s1>;
> + vin_lvs4_5_7-supply = <&pm8921_s4>;
> +
> + s1 {
> + regulator-always-on;
> + regulator-min-microvolt = <1225000>;
> + regulator-max-microvolt = <1225000>;
> + qcom,switch-mode-frequency = <3200000>;
> + bias-pull-down;
> + };
> +
> + s4 {
> + regulator-min-microvolt = <1800000>;
> + regulator-max-microvolt = <1800000>;
> + qcom,switch-mode-frequency = <3200000>;
> + bias-pull-down;
> + regulator-always-on;
> + };
> +
> + s7 {
> + regulator-min-microvolt = <1300000>;
> + regulator-max-microvolt = <1300000>;
> + qcom,switch-mode-frequency = <3200000>;
> + };
> + };
> + };
> +
> gsbi@12440000 {
> status = "okay";
> qcom,mode = <GSBI_PROT_UART_W_FC>;
> --
> 2.5.0
>
> --
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> the body of a message to [email protected]
> More majordomo info at http://vger.kernel.org/majordomo-info.html
On Wed 23 Mar 12:47 PDT 2016, Srinivas Kandagatla wrote:
> This patch adds eMMC and SD card support with card detect and adding
> required regulators.
>
> Signed-off-by: Srinivas Kandagatla <[email protected]>
> ---
> .../arm/boot/dts/qcom-apq8064-dragonboard-600c.dts | 41 ++++++++++++++++++++++
> 1 file changed, 41 insertions(+)
>
> diff --git a/arch/arm/boot/dts/qcom-apq8064-dragonboard-600c.dts b/arch/arm/boot/dts/qcom-apq8064-dragonboard-600c.dts
> index 0a0bcfe..a977314 100644
> --- a/arch/arm/boot/dts/qcom-apq8064-dragonboard-600c.dts
> +++ b/arch/arm/boot/dts/qcom-apq8064-dragonboard-600c.dts
> @@ -1,4 +1,5 @@
> #include "qcom-apq8064-v2.0.dtsi"
> +#include <dt-bindings/gpio/gpio.h>
>
> / {
> model = "Qualcomm Technologies, Inc. APQ8064 DragonBoard600c";
> @@ -22,6 +23,16 @@
> };
>
> soc {
> + pinctrl@800000 {
> + card_detect: card_detect {
> + mux {
> + pins = "gpio26";
> + function = "gpio";
> + bias-disable;
> + };
> + };
> + };
> +
> rpm@108000 {
> regulators {
> vdd_l1_l2_l12_l18-supply = <&pm8921_s4>;
> @@ -62,6 +73,18 @@
> regulator-max-microvolt = <1300000>;
> qcom,switch-mode-frequency = <3200000>;
> };
> +
> + l5 {
> + regulator-min-microvolt = <2750000>;
> + regulator-max-microvolt = <3000000>;
> + bias-pull-down;
> + };
> +
> + l6 {
> + regulator-min-microvolt = <2950000>;
> + regulator-max-microvolt = <2950000>;
> + bias-pull-down;
> + };
I would prefer if you folded these into the regulator patch.
> };
> };
>
> @@ -87,5 +110,23 @@
> pinctrl-0 = <&gsbi7_uart_2pins>;
> };
> };
> +
> + amba {
> + /* eMMC */
> + sdcc@12400000 {
> + status = "okay";
> + vmmc-supply = <&pm8921_l5>;
> + vqmmc-supply = <&pm8921_s4>;
> + };
> +
> + /* External micro SD card */
> + sdcc@12180000 {
> + status = "okay";
> + vmmc-supply = <&pm8921_l6>;
> + pinctrl-names = "default";
> + pinctrl-0 = <&card_detect>;
> + cd-gpios = <&tlmm_pinmux 26 GPIO_ACTIVE_HIGH>;
> + };
> + };
Other than that,
Acked-by: Bjorn Andersson <[email protected]>
Regards,
Bjorn
On Wed 23 Mar 12:47 PDT 2016, Srinivas Kandagatla wrote:
> This patch adds usb host and otg support on board with required
> regulators.
>
Please fold the regulators into the regulator patch instead.
For the rest:
Acked-by: Bjorn Andersson <[email protected]>
Regards,
Bjorn
> Signed-off-by: Srinivas Kandagatla <[email protected]>
> ---
> .../arm/boot/dts/qcom-apq8064-dragonboard-600c.dts | 64 ++++++++++++++++++++++
> 1 file changed, 64 insertions(+)
>
> diff --git a/arch/arm/boot/dts/qcom-apq8064-dragonboard-600c.dts b/arch/arm/boot/dts/qcom-apq8064-dragonboard-600c.dts
> index a977314..5374510 100644
> --- a/arch/arm/boot/dts/qcom-apq8064-dragonboard-600c.dts
> +++ b/arch/arm/boot/dts/qcom-apq8064-dragonboard-600c.dts
> @@ -60,6 +60,12 @@
> bias-pull-down;
> };
>
> + s3 {
> + regulator-min-microvolt = <1000000>;
> + regulator-max-microvolt = <1400000>;
> + qcom,switch-mode-frequency = <4800000>;
> + };
> +
> s4 {
> regulator-min-microvolt = <1800000>;
> regulator-max-microvolt = <1800000>;
> @@ -74,6 +80,18 @@
> qcom,switch-mode-frequency = <3200000>;
> };
>
> + l3 {
> + regulator-min-microvolt = <3050000>;
> + regulator-max-microvolt = <3300000>;
> + bias-pull-down;
> + };
> +
> + l4 {
> + regulator-min-microvolt = <1000000>;
> + regulator-max-microvolt = <1800000>;
> + bias-pull-down;
> + };
> +
> l5 {
> regulator-min-microvolt = <2750000>;
> regulator-max-microvolt = <3000000>;
> @@ -85,6 +103,12 @@
> regulator-max-microvolt = <2950000>;
> bias-pull-down;
> };
> +
> + l23 {
> + regulator-min-microvolt = <1700000>;
> + regulator-max-microvolt = <1900000>;
> + bias-pull-down;
> + };
> };
> };
>
> @@ -111,6 +135,46 @@
> };
> };
>
> + /* OTG */
> + phy@12500000 {
> + status = "okay";
> + dr_mode = "peripheral";
> + vddcx-supply = <&pm8921_s3>;
> + v3p3-supply = <&pm8921_l3>;
> + v1p8-supply = <&pm8921_l4>;
> + };
> +
> + phy@12520000 {
> + status = "okay";
> + vddcx-supply = <&pm8921_s3>;
> + v3p3-supply = <&pm8921_l3>;
> + v1p8-supply = <&pm8921_l23>;
> + };
> +
> + phy@12530000 {
> + status = "okay";
> + vddcx-supply = <&pm8921_s3>;
> + v3p3-supply = <&pm8921_l3>;
> + v1p8-supply = <&pm8921_l23>;
> + };
> +
> + gadget@12500000 {
> + status = "okay";
> + };
> +
> + /* OTG */
> + usb@12500000 {
> + status = "okay";
> + };
> +
> + usb@12520000 {
> + status = "okay";
> + };
> +
> + usb@12530000 {
> + status = "okay";
> + };
> +
> amba {
> /* eMMC */
> sdcc@12400000 {
> --
> 2.5.0
>
> --
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On Wed 23 Mar 12:47 PDT 2016, Srinivas Kandagatla wrote:
> This patch adds pcie and regulators required to get on board ATL1C
> ethernet working.
> ---
Acked-by: Bjorn Andersson <[email protected]>
Regards,
Bjorn
> .../arm/boot/dts/qcom-apq8064-dragonboard-600c.dts | 36 ++++++++++++++++++++++
> 1 file changed, 36 insertions(+)
>
> diff --git a/arch/arm/boot/dts/qcom-apq8064-dragonboard-600c.dts b/arch/arm/boot/dts/qcom-apq8064-dragonboard-600c.dts
> index 5374510..d3e6193 100644
> --- a/arch/arm/boot/dts/qcom-apq8064-dragonboard-600c.dts
> +++ b/arch/arm/boot/dts/qcom-apq8064-dragonboard-600c.dts
> @@ -20,6 +20,16 @@
> regulator-type = "voltage";
> regulator-boot-on;
> };
> +
> + /* on board fixed 3.3v supply */
> + vcc3v3: vcc3v3 {
> + compatible = "regulator-fixed";
> + regulator-name = "VCC3V3";
> + regulator-min-microvolt = <3300000>;
> + regulator-max-microvolt = <3300000>;
> + regulator-always-on;
> + };
> +
> };
>
> soc {
> @@ -31,6 +41,18 @@
> bias-disable;
> };
> };
> +
> + pcie_pins: pcie_pinmux {
> + mux {
> + pins = "gpio27";
> + function = "gpio";
> + };
> + conf {
> + pins = "gpio27";
> + drive-strength = <12>;
> + bias-disable;
> + };
> + };
> };
>
> rpm@108000 {
> @@ -109,6 +131,10 @@
> regulator-max-microvolt = <1900000>;
> bias-pull-down;
> };
> +
> + lvs6 {
> + bias-pull-down;
> + };
> };
> };
>
> @@ -135,6 +161,16 @@
> };
> };
>
> + pci@1b500000 {
> + status = "okay";
> + vdda-supply = <&pm8921_s3>;
> + vdda_phy-supply = <&pm8921_lvs6>;
> + vdda_refclk-supply = <&vcc3v3>;
> + pinctrl-0 = <&pcie_pins>;
> + pinctrl-names = "default";
> + perst-gpio = <&tlmm_pinmux 27 GPIO_ACTIVE_LOW>;
> + };
> +
> /* OTG */
> phy@12500000 {
> status = "okay";
> --
> 2.5.0
>
> --
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On Wed 23 Mar 12:47 PDT 2016, Srinivas Kandagatla wrote:
> This patch enables sata and regulators required to get on board sata
> working.
>
Acked-by: Bjorn Andersson <[email protected]>
Regards,
Bjorn
> Signed-off-by: Srinivas Kandagatla <[email protected]>
> ---
> arch/arm/boot/dts/qcom-apq8064-dragonboard-600c.dts | 13 +++++++++++++
> 1 file changed, 13 insertions(+)
>
> diff --git a/arch/arm/boot/dts/qcom-apq8064-dragonboard-600c.dts b/arch/arm/boot/dts/qcom-apq8064-dragonboard-600c.dts
> index d3e6193..52f742c 100644
> --- a/arch/arm/boot/dts/qcom-apq8064-dragonboard-600c.dts
> +++ b/arch/arm/boot/dts/qcom-apq8064-dragonboard-600c.dts
> @@ -135,6 +135,10 @@
> lvs6 {
> bias-pull-down;
> };
> +
> + lvs7 {
> + bias-pull-down;
> + };
> };
> };
>
> @@ -171,6 +175,15 @@
> perst-gpio = <&tlmm_pinmux 27 GPIO_ACTIVE_LOW>;
> };
>
> + phy@1b400000 {
> + status = "okay";
> + };
> +
> + sata@29000000 {
> + status = "okay";
> + target-supply = <&pm8921_lvs7>;
> + };
> +
> /* OTG */
> phy@12500000 {
> status = "okay";
> --
> 2.5.0
>
On Wed 23 Mar 12:48 PDT 2016, Srinivas Kandagatla wrote:
> This patch adds nodes required to enable 4 i2c buses on the board which
> are connected to various sensors and eeprom.
>
I would like for the pinconf for these blocks to be in this patch (and
file) to make it clear how they are configured and where to change them.
Regards,
Bjorn
> Signed-off-by: Srinivas Kandagatla <[email protected]>
> ---
> .../arm/boot/dts/qcom-apq8064-dragonboard-600c.dts | 46 ++++++++++++++++++++++
> 1 file changed, 46 insertions(+)
>
> diff --git a/arch/arm/boot/dts/qcom-apq8064-dragonboard-600c.dts b/arch/arm/boot/dts/qcom-apq8064-dragonboard-600c.dts
> index 4fecd94..942de04 100644
> --- a/arch/arm/boot/dts/qcom-apq8064-dragonboard-600c.dts
> +++ b/arch/arm/boot/dts/qcom-apq8064-dragonboard-600c.dts
> @@ -8,6 +8,10 @@
> aliases {
> serial0 = &gsbi7_serial;
> serial1 = &gsbi1_serial;
> + i2c0 = &gsbi2_i2c;
> + i2c1 = &gsbi3_i2c;
> + i2c2 = &gsbi4_i2c;
> + i2c3 = &gsbi7_i2c;
> };
>
> regulators {
> @@ -180,6 +184,42 @@
> };
> };
>
> + gsbi@12480000 {
> + status = "okay";
> + qcom,mode = <GSBI_PROT_I2C>;
> + i2c@124a0000 {
> + /* On Low speed expansion and Sensors */
> + label = "LS-I2C0";
> + status = "okay";
> + };
> + };
> +
> + gsbi@16200000 {
> + status = "okay";
> + qcom,mode = <GSBI_PROT_I2C>;
> + i2c@16280000 {
> + /* On Low speed expansion */
> + status = "okay";
> + label = "LS-I2C1";
> + clock-frequency = <200000>;
> + eeprom@52 {
> + compatible = "atmel,24c128";
> + reg = <0x52>;
> + pagesize = <64>;
> + };
> + };
> + };
> +
> + gsbi@16300000 {
> + status = "okay";
> + qcom,mode = <GSBI_PROT_I2C>;
> + i2c@16380000 {
> + /* On High speed expansion */
> + label = "HS-CAM-I2C3";
> + status = "okay";
> + };
> + };
> +
> /* DEBUG UART */
> gsbi@16600000 {
> status = "okay";
> @@ -190,6 +230,12 @@
> pinctrl-names = "default";
> pinctrl-0 = <&gsbi7_uart_2pins>;
> };
> +
> + i2c@16680000 {
> + /* On High speed expansion */
> + status = "okay";
> + label = "HS-CAM-I2C2";
> + };
> };
>
> leds {
> --
> 2.5.0
>
On Tue 29 Mar 07:20 PDT 2016, Srinivas Kandagatla wrote:
> Thanks Bjorn,
>
> On 27/03/16 06:50, Bjorn Andersson wrote:
> >On Wed 23 Mar 12:48 PDT 2016, Srinivas Kandagatla wrote:
[..]
> >>+
> >>+ led@5 {
> >>+ label = "dragonboard-600c:yellow:wlan";
> >>+ gpios = <&pm8921_mpps 7 GPIO_ACTIVE_HIGH>;
> >>+ linux,default-trigger = "wlan";
> >
> >This should either be "phy0rx", "phy0tx", "phy0assoc" or "phy0radio". TX
> >does not seem to work, so this should be debugged; "assoc" is probably
> >the one that makes most sense.
>
>
> Am ok, to change, did you get activity leds works with any of these strings
> with WLAN or BT?
>
I did test them; rx, assoc and radio seems to work. Tx does not tickle
the led, but should probably.
I didn't find the spec for the baord, so I'm not sure what the LEDs
should indicate. But it feels like radio or assoc makes most sense, and
follows what we can do with the BT led.
> phy0rx/tx seems to be bit more generic and atleast the name looks bit
> non-specific to wlan.
>
> These names should be documented somewhere, Its very difficult to find which
> names to use unless you read the code.
>
> It would be nice to just provide a phandle to the device which led-trigger
> should use, which makes it clear and explicit.
>
I agree, I was surprised by their naming. The phandle solution would
have been nice, except that you have no way from sysfs to pick which
node to follow.
>
>
> >
> >>+ default-state = "off";
> >>+ };
> >>+
> >>+ led@6 {
> >>+ label = "dragonboard-600c:blue:bt";
> >>+ gpios = <&pm8921_mpps 8 GPIO_ACTIVE_HIGH>;
> >>+ linux,default-trigger = "bt";
> >
> >This should be "hci0-power".
>
> Does this trigger work for you?
> Name is bit misleading though.
>
I don't think I tested it, but it is the only bt led trigger exposed by
the bluetooth framework. I don't think we have any other hci devices on
this board, so it should be fine.
Regards,
Bjorn
On Wed 23 Mar 12:46 PDT 2016, Srinivas Kandagatla wrote:
> Hi Andy,
>
> This patchset adds support to Dragonboard 600c which is based on APQ8064.
>
> With this patchset, except spi I was able to test all the below features
> on this board on top of linus master branch.
> 1> i2c
> 2> spi
> 3> sd/mmc with card detect
> 4> eMMC
> 5> USB
> 6> SATA
> 7> on board Ethernet based on PCIE.
> 8> user and activity leds.
>
> AHCI SATA is broken on APQ8064 on mainline, due to changes in libahci, fix is
> being discussed which should not effect this dt patches anyway.
> This patchset also has a fix to i2c/spi pinctrls which was not set correctly
> in my previous apq8064 patches, I have verified this patchset with eeprom and
> sensors on the board, you might want to take that patch in next rc.
>
> Thanks,
> srini
>
> Srinivas Kandagatla (12):
> ARM: dts: apq8064: fix the pinctrls for i2c and spi
> ARM: dts: apq8064: add support to gsbi1 uart
> ARM: dts: apq8064: add gsbi7 i2c support
> ARM: dts: dragonboard-600c: add board support with serial
> ARM: dts: dragonboard-600c: add pmic regulator supplies
> ARM: dts: dragonboard-600c: Add eMMC and SD card support
> ARM: dts: dragonboard-600c: add usb support
> ARM: dts: dragonboard-600c: add pcie support
> ARM: dts: dragonboard-600c: add on board sata support.
> ARM: dts: dragonboard-600c: Add on board leds support
> ARM: dts: dragonboard-600c: add i2c support
> ARM: dts: dragonboard-600c: add spi support
Please abbreviate db600c (and drop those upper case As).
>
> arch/arm/boot/dts/Makefile | 1 +
> .../arm/boot/dts/qcom-apq8064-dragonboard-600c.dts | 377 +++++++++++++++++++++
Please make this qcom-apq8064-arrow-db600c.dts
> arch/arm/boot/dts/qcom-apq8064-pins.dtsi | 39 +++
> arch/arm/boot/dts/qcom-apq8064.dtsi | 41 ++-
> 4 files changed, 452 insertions(+), 6 deletions(-)
> create mode 100644 arch/arm/boot/dts/qcom-apq8064-dragonboard-600c.dts
Regards,
Bjorn
On 29/03/16 15:28, Bjorn Andersson wrote:
> On Wed 23 Mar 12:47 PDT 2016, Srinivas Kandagatla wrote:
>
>> This patch fixes pinctrls for spi and i2c nodes whose default and sleep
>> states are together, which is incorrect.
>>
>> Without this patch i2c/spi would not be functional.
>>
>> Signed-off-by: Srinivas Kandagatla <[email protected]>
>
> The change in itself is sound, but I don't understand why i2c/spi fails
> to function if we don't bring them to a sleep state. Can you please
> update the commit message with an explanation?
Yes, with the existing code the device would endup configuring the
default pinstate to sleep pinconf. So the i2c bus would not be functional.
If you try mainline on any 8064 based boards you would easily reproduce
the bug. For example read the eeprom on IFC6410.
>
>
> PS. Whenever there's multiple states for a thing I do prefer prefixing
> them _a and _s to highlight that difference (not only suffixing the
> sleep state). And use abbreviations :)
If I search for _sleep in dts folder these are widely used, am not sure
which is the prefered way to do this, as long as its readable by user am
ok to do it either way.
>
> Regards,
> Bjorn
>
>> ---
>> arch/arm/boot/dts/qcom-apq8064.dtsi | 18 ++++++++++++------
>> 1 file changed, 12 insertions(+), 6 deletions(-)
>>
>> diff --git a/arch/arm/boot/dts/qcom-apq8064.dtsi b/arch/arm/boot/dts/qcom-apq8064.dtsi
>> index 65d0e8d..c6ff8fc 100644
>> --- a/arch/arm/boot/dts/qcom-apq8064.dtsi
>> +++ b/arch/arm/boot/dts/qcom-apq8064.dtsi
>> @@ -227,7 +227,8 @@
>>
>> gsbi1_i2c: i2c@12460000 {
>> compatible = "qcom,i2c-qup-v1.1.1";
>> - pinctrl-0 = <&i2c1_pins &i2c1_pins_sleep>;
>> + pinctrl-0 = <&i2c1_pins>;
>> + pinctrl-1 = <&i2c1_pins_sleep>;
>> pinctrl-names = "default", "sleep";
>> reg = <0x12460000 0x1000>;
>> interrupts = <0 194 IRQ_TYPE_NONE>;
>> @@ -255,7 +256,8 @@
>> gsbi2_i2c: i2c@124a0000 {
>> compatible = "qcom,i2c-qup-v1.1.1";
>> reg = <0x124a0000 0x1000>;
>> - pinctrl-0 = <&i2c2_pins &i2c2_pins_sleep>;
>> + pinctrl-0 = <&i2c2_pins>;
>> + pinctrl-1 = <&i2c2_pins_sleep>;
>> pinctrl-names = "default", "sleep";
>> interrupts = <0 196 IRQ_TYPE_NONE>;
>> clocks = <&gcc GSBI2_QUP_CLK>, <&gcc GSBI2_H_CLK>;
>> @@ -277,7 +279,8 @@
>> ranges;
>> gsbi3_i2c: i2c@16280000 {
>> compatible = "qcom,i2c-qup-v1.1.1";
>> - pinctrl-0 = <&i2c3_pins &i2c3_pins_sleep>;
>> + pinctrl-0 = <&i2c3_pins>;
>> + pinctrl-1 = <&i2c3_pins_sleep>;
>> pinctrl-names = "default", "sleep";
>> reg = <0x16280000 0x1000>;
>> interrupts = <GIC_SPI 151 IRQ_TYPE_NONE>;
>> @@ -302,7 +305,8 @@
>>
>> gsbi4_i2c: i2c@16380000 {
>> compatible = "qcom,i2c-qup-v1.1.1";
>> - pinctrl-0 = <&i2c4_pins &i2c4_pins_sleep>;
>> + pinctrl-0 = <&i2c4_pins>;
>> + pinctrl-1 = <&i2c4_pins_sleep>;
>> pinctrl-names = "default", "sleep";
>> reg = <0x16380000 0x1000>;
>> interrupts = <GIC_SPI 153 IRQ_TYPE_NONE>;
>> @@ -337,7 +341,8 @@
>> compatible = "qcom,spi-qup-v1.1.1";
>> reg = <0x1a280000 0x1000>;
>> interrupts = <0 155 0>;
>> - pinctrl-0 = <&spi5_default &spi5_sleep>;
>> + pinctrl-0 = <&spi5_default>;
>> + pinctrl-1 = <&spi5_sleep>;
>> pinctrl-names = "default", "sleep";
>> clocks = <&gcc GSBI5_QUP_CLK>, <&gcc GSBI5_H_CLK>;
>> clock-names = "core", "iface";
>> @@ -370,7 +375,8 @@
>>
>> gsbi6_i2c: i2c@16580000 {
>> compatible = "qcom,i2c-qup-v1.1.1";
>> - pinctrl-0 = <&i2c6_pins &i2c6_pins_sleep>;
>> + pinctrl-0 = <&i2c6_pins>;
>> + pinctrl-1 = <&i2c6_pins_sleep>;
>> pinctrl-names = "default", "sleep";
>> reg = <0x16580000 0x1000>;
>> interrupts = <GIC_SPI 157 IRQ_TYPE_NONE>;
>> --
>> 2.5.0
>>
On 29/03/16 15:37, Bjorn Andersson wrote:
> On Wed 23 Mar 12:47 PDT 2016, Srinivas Kandagatla wrote:
>
>> This patch adds pmic regulator supplies connected on the board.
>> Rest of the invidual regulators would be added as and when required by
>> the devices.
>>
>
> I do think we should try to fill them all out, before they are needed.
> Especially so that people don't take the easy path of just copying
> pieces from some other 8064 dts to get going...
I agree, But I want to make sure that all the regulators entires are
tested before we actually see them in mainline. This would also deter
someone adding nodes without any regulator dependencies.
>
> But we can do that in a follow up if you prefer.
>
> Acked-by: Bjorn Andersson <[email protected]>
thanks for the Ack.
--srini
>
> Regards,
> Bjorn
>
>> Signed-off-by: Srinivas Kandagatla <[email protected]>
>> ---
>> .../arm/boot/dts/qcom-apq8064-dragonboard-600c.dts | 55 ++++++++++++++++++++++
>> 1 file changed, 55 insertions(+)
>>
>> diff --git a/arch/arm/boot/dts/qcom-apq8064-dragonboard-600c.dts b/arch/arm/boot/dts/qcom-apq8064-dragonboard-600c.dts
>> index e96aab6..0a0bcfe 100644
>> --- a/arch/arm/boot/dts/qcom-apq8064-dragonboard-600c.dts
>> +++ b/arch/arm/boot/dts/qcom-apq8064-dragonboard-600c.dts
>> @@ -9,7 +9,62 @@
>> serial1 = &gsbi1_serial;
>> };
>>
>> + regulators {
>> + compatible = "simple-bus";
>> + vph: regulator-fixed@1 {
>> + compatible = "regulator-fixed";
>> + regulator-min-microvolt = <4500000>;
>> + regulator-max-microvolt = <4500000>;
>> + regulator-name = "VPH";
>> + regulator-type = "voltage";
>> + regulator-boot-on;
>> + };
>> + };
>> +
>> soc {
>> + rpm@108000 {
>> + regulators {
>> + vdd_l1_l2_l12_l18-supply = <&pm8921_s4>;
>> + vdd_l3_15_17-supply = <&vph>;
>> + vdd_l4_14-supply = <&vph>;
>> + vdd_l5_8_16-supply = <&vph>;
>> + vdd_l6_7-supply = <&vph>;
>> + vdd_l9_11-supply = <&vph>;
>> + vdd_l10_22-supply = <&vph>;
>> + vdd_l21_23_29-supply = <&vph>;
>> + vdd_l24-supply = <&pm8921_s1>;
>> + vdd_l25-supply = <&pm8921_s1>;
>> + vdd_l26-supply = <&pm8921_s7>;
>> + vdd_l27-supply = <&pm8921_s7>;
>> + vdd_l28-supply = <&pm8921_s7>;
>> + vin_lvs1_3_6-supply = <&pm8921_s4>;
>> + vin_lvs2-supply = <&pm8921_s1>;
>> + vin_lvs4_5_7-supply = <&pm8921_s4>;
>> +
>> + s1 {
>> + regulator-always-on;
>> + regulator-min-microvolt = <1225000>;
>> + regulator-max-microvolt = <1225000>;
>> + qcom,switch-mode-frequency = <3200000>;
>> + bias-pull-down;
>> + };
>> +
>> + s4 {
>> + regulator-min-microvolt = <1800000>;
>> + regulator-max-microvolt = <1800000>;
>> + qcom,switch-mode-frequency = <3200000>;
>> + bias-pull-down;
>> + regulator-always-on;
>> + };
>> +
>> + s7 {
>> + regulator-min-microvolt = <1300000>;
>> + regulator-max-microvolt = <1300000>;
>> + qcom,switch-mode-frequency = <3200000>;
>> + };
>> + };
>> + };
>> +
>> gsbi@12440000 {
>> status = "okay";
>> qcom,mode = <GSBI_PROT_UART_W_FC>;
>> --
>> 2.5.0
>>
>> --
>> To unsubscribe from this list: send the line "unsubscribe devicetree" in
>> the body of a message to [email protected]
>> More majordomo info at http://vger.kernel.org/majordomo-info.html
On 29/03/16 15:44, Bjorn Andersson wrote:
> On Wed 23 Mar 12:48 PDT 2016, Srinivas Kandagatla wrote:
>
>> This patch adds nodes required to enable 4 i2c buses on the board which
>> are connected to various sensors and eeprom.
>>
>
> I would like for the pinconf for these blocks to be in this patch (and
> file) to make it clear how they are configured and where to change them.
>
When I started adding this I had same opinion, I will do that in next
release.
thanks,
srini
> Regards,
> Bjorn
>
>> Signed-off-by: Srinivas Kandagatla <[email protected]>
>> ---
>> .../arm/boot/dts/qcom-apq8064-dragonboard-600c.dts | 46 ++++++++++++++++++++++
>> 1 file changed, 46 insertions(+)
>>
>> diff --git a/arch/arm/boot/dts/qcom-apq8064-dragonboard-600c.dts b/arch/arm/boot/dts/qcom-apq8064-dragonboard-600c.dts
>> index 4fecd94..942de04 100644
>> --- a/arch/arm/boot/dts/qcom-apq8064-dragonboard-600c.dts
>> +++ b/arch/arm/boot/dts/qcom-apq8064-dragonboard-600c.dts
>> @@ -8,6 +8,10 @@
>> aliases {
>> serial0 = &gsbi7_serial;
>> serial1 = &gsbi1_serial;
>> + i2c0 = &gsbi2_i2c;
>> + i2c1 = &gsbi3_i2c;
>> + i2c2 = &gsbi4_i2c;
>> + i2c3 = &gsbi7_i2c;
>> };
>>
>> regulators {
>> @@ -180,6 +184,42 @@
>> };
>> };
>>
>> + gsbi@12480000 {
>> + status = "okay";
>> + qcom,mode = <GSBI_PROT_I2C>;
>> + i2c@124a0000 {
>> + /* On Low speed expansion and Sensors */
>> + label = "LS-I2C0";
>> + status = "okay";
>> + };
>> + };
>> +
>> + gsbi@16200000 {
>> + status = "okay";
>> + qcom,mode = <GSBI_PROT_I2C>;
>> + i2c@16280000 {
>> + /* On Low speed expansion */
>> + status = "okay";
>> + label = "LS-I2C1";
>> + clock-frequency = <200000>;
>> + eeprom@52 {
>> + compatible = "atmel,24c128";
>> + reg = <0x52>;
>> + pagesize = <64>;
>> + };
>> + };
>> + };
>> +
>> + gsbi@16300000 {
>> + status = "okay";
>> + qcom,mode = <GSBI_PROT_I2C>;
>> + i2c@16380000 {
>> + /* On High speed expansion */
>> + label = "HS-CAM-I2C3";
>> + status = "okay";
>> + };
>> + };
>> +
>> /* DEBUG UART */
>> gsbi@16600000 {
>> status = "okay";
>> @@ -190,6 +230,12 @@
>> pinctrl-names = "default";
>> pinctrl-0 = <&gsbi7_uart_2pins>;
>> };
>> +
>> + i2c@16680000 {
>> + /* On High speed expansion */
>> + status = "okay";
>> + label = "HS-CAM-I2C2";
>> + };
>> };
>>
>> leds {
>> --
>> 2.5.0
>>
On 29/03/16 15:54, Bjorn Andersson wrote:
> On Wed 23 Mar 12:46 PDT 2016, Srinivas Kandagatla wrote:
>
>> Hi Andy,
>>
>> This patchset adds support to Dragonboard 600c which is based on APQ8064.
>>
>> With this patchset, except spi I was able to test all the below features
>> on this board on top of linus master branch.
>> 1> i2c
>> 2> spi
>> 3> sd/mmc with card detect
>> 4> eMMC
>> 5> USB
>> 6> SATA
>> 7> on board Ethernet based on PCIE.
>> 8> user and activity leds.
>>
>> AHCI SATA is broken on APQ8064 on mainline, due to changes in libahci, fix is
>> being discussed which should not effect this dt patches anyway.
>> This patchset also has a fix to i2c/spi pinctrls which was not set correctly
>> in my previous apq8064 patches, I have verified this patchset with eeprom and
>> sensors on the board, you might want to take that patch in next rc.
>>
>> Thanks,
>> srini
>>
>> Srinivas Kandagatla (12):
>> ARM: dts: apq8064: fix the pinctrls for i2c and spi
>> ARM: dts: apq8064: add support to gsbi1 uart
>> ARM: dts: apq8064: add gsbi7 i2c support
>> ARM: dts: dragonboard-600c: add board support with serial
>> ARM: dts: dragonboard-600c: add pmic regulator supplies
>> ARM: dts: dragonboard-600c: Add eMMC and SD card support
>> ARM: dts: dragonboard-600c: add usb support
>> ARM: dts: dragonboard-600c: add pcie support
>> ARM: dts: dragonboard-600c: add on board sata support.
>> ARM: dts: dragonboard-600c: Add on board leds support
>> ARM: dts: dragonboard-600c: add i2c support
>> ARM: dts: dragonboard-600c: add spi support
>
> Please abbreviate db600c (and drop those upper case As).
Yep. Will do.
>
>>
>> arch/arm/boot/dts/Makefile | 1 +
>> .../arm/boot/dts/qcom-apq8064-dragonboard-600c.dts | 377 +++++++++++++++++++++
>
> Please make this qcom-apq8064-arrow-db600c.dts
Ok, makes sense.
thanks
srini
>
>> arch/arm/boot/dts/qcom-apq8064-pins.dtsi | 39 +++
>> arch/arm/boot/dts/qcom-apq8064.dtsi | 41 ++-
>> 4 files changed, 452 insertions(+), 6 deletions(-)
>> create mode 100644 arch/arm/boot/dts/qcom-apq8064-dragonboard-600c.dts
>
> Regards,
> Bjorn
>
On 29/03/16 15:38, Bjorn Andersson wrote:
> On Wed 23 Mar 12:47 PDT 2016, Srinivas Kandagatla wrote:
>
>> This patch adds eMMC and SD card support with card detect and adding
>> required regulators.
>>
>> Signed-off-by: Srinivas Kandagatla <[email protected]>
>> ---
>> .../arm/boot/dts/qcom-apq8064-dragonboard-600c.dts | 41 ++++++++++++++++++++++
>> 1 file changed, 41 insertions(+)
>>
>> diff --git a/arch/arm/boot/dts/qcom-apq8064-dragonboard-600c.dts b/arch/arm/boot/dts/qcom-apq8064-dragonboard-600c.dts
>> index 0a0bcfe..a977314 100644
>> --- a/arch/arm/boot/dts/qcom-apq8064-dragonboard-600c.dts
>> +++ b/arch/arm/boot/dts/qcom-apq8064-dragonboard-600c.dts
>> @@ -1,4 +1,5 @@
>> #include "qcom-apq8064-v2.0.dtsi"
>> +#include <dt-bindings/gpio/gpio.h>
>>
>> / {
>> model = "Qualcomm Technologies, Inc. APQ8064 DragonBoard600c";
>> @@ -22,6 +23,16 @@
>> };
>>
>> soc {
>> + pinctrl@800000 {
>> + card_detect: card_detect {
>> + mux {
>> + pins = "gpio26";
>> + function = "gpio";
>> + bias-disable;
>> + };
>> + };
>> + };
>> +
>> rpm@108000 {
>> regulators {
>> vdd_l1_l2_l12_l18-supply = <&pm8921_s4>;
>> @@ -62,6 +73,18 @@
>> regulator-max-microvolt = <1300000>;
>> qcom,switch-mode-frequency = <3200000>;
>> };
>> +
>> + l5 {
>> + regulator-min-microvolt = <2750000>;
>> + regulator-max-microvolt = <3000000>;
>> + bias-pull-down;
>> + };
>> +
>> + l6 {
>> + regulator-min-microvolt = <2950000>;
>> + regulator-max-microvolt = <2950000>;
>> + bias-pull-down;
>> + };
>
> I would prefer if you folded these into the regulator patch.
OK, I will give it a go and see how it looks.
>
>> };
>> };
>>
>> @@ -87,5 +110,23 @@
>> pinctrl-0 = <&gsbi7_uart_2pins>;
>> };
>> };
>> +
>> + amba {
>> + /* eMMC */
>> + sdcc@12400000 {
>> + status = "okay";
>> + vmmc-supply = <&pm8921_l5>;
>> + vqmmc-supply = <&pm8921_s4>;
>> + };
>> +
>> + /* External micro SD card */
>> + sdcc@12180000 {
>> + status = "okay";
>> + vmmc-supply = <&pm8921_l6>;
>> + pinctrl-names = "default";
>> + pinctrl-0 = <&card_detect>;
>> + cd-gpios = <&tlmm_pinmux 26 GPIO_ACTIVE_HIGH>;
>> + };
>> + };
>
> Other than that,
>
> Acked-by: Bjorn Andersson <[email protected]>
>
Thanks for the Ack.
> Regards,
> Bjorn
>
On Tue 29 Mar 08:02 PDT 2016, Srinivas Kandagatla wrote:
>
>
> On 29/03/16 15:28, Bjorn Andersson wrote:
> >On Wed 23 Mar 12:47 PDT 2016, Srinivas Kandagatla wrote:
> >
> >>This patch fixes pinctrls for spi and i2c nodes whose default and sleep
> >>states are together, which is incorrect.
> >>
> >>Without this patch i2c/spi would not be functional.
> >>
> >>Signed-off-by: Srinivas Kandagatla <[email protected]>
> >
> >The change in itself is sound, but I don't understand why i2c/spi fails
> >to function if we don't bring them to a sleep state. Can you please
> >update the commit message with an explanation?
>
> Yes, with the existing code the device would endup configuring the default
> pinstate to sleep pinconf. So the i2c bus would not be functional.
>
Ohh sorry, not sure why I didn't see that. Your fix is obviously
correct.
Acked-by: Bjorn Andersson <[email protected]>
Regards,
Bjorn
> If you try mainline on any 8064 based boards you would easily reproduce the
> bug. For example read the eeprom on IFC6410.
> >
> >
> >PS. Whenever there's multiple states for a thing I do prefer prefixing
> >them _a and _s to highlight that difference (not only suffixing the
> >sleep state). And use abbreviations :)
>
> If I search for _sleep in dts folder these are widely used, am not sure
> which is the prefered way to do this, as long as its readable by user am ok
> to do it either way.
>
> >
> >Regards,
> >Bjorn
> >
> >>---
> >> arch/arm/boot/dts/qcom-apq8064.dtsi | 18 ++++++++++++------
> >> 1 file changed, 12 insertions(+), 6 deletions(-)
> >>
> >>diff --git a/arch/arm/boot/dts/qcom-apq8064.dtsi b/arch/arm/boot/dts/qcom-apq8064.dtsi
> >>index 65d0e8d..c6ff8fc 100644
> >>--- a/arch/arm/boot/dts/qcom-apq8064.dtsi
> >>+++ b/arch/arm/boot/dts/qcom-apq8064.dtsi
> >>@@ -227,7 +227,8 @@
> >>
> >> gsbi1_i2c: i2c@12460000 {
> >> compatible = "qcom,i2c-qup-v1.1.1";
> >>- pinctrl-0 = <&i2c1_pins &i2c1_pins_sleep>;
> >>+ pinctrl-0 = <&i2c1_pins>;
> >>+ pinctrl-1 = <&i2c1_pins_sleep>;
> >> pinctrl-names = "default", "sleep";
> >> reg = <0x12460000 0x1000>;
> >> interrupts = <0 194 IRQ_TYPE_NONE>;
> >>@@ -255,7 +256,8 @@
> >> gsbi2_i2c: i2c@124a0000 {
> >> compatible = "qcom,i2c-qup-v1.1.1";
> >> reg = <0x124a0000 0x1000>;
> >>- pinctrl-0 = <&i2c2_pins &i2c2_pins_sleep>;
> >>+ pinctrl-0 = <&i2c2_pins>;
> >>+ pinctrl-1 = <&i2c2_pins_sleep>;
> >> pinctrl-names = "default", "sleep";
> >> interrupts = <0 196 IRQ_TYPE_NONE>;
> >> clocks = <&gcc GSBI2_QUP_CLK>, <&gcc GSBI2_H_CLK>;
> >>@@ -277,7 +279,8 @@
> >> ranges;
> >> gsbi3_i2c: i2c@16280000 {
> >> compatible = "qcom,i2c-qup-v1.1.1";
> >>- pinctrl-0 = <&i2c3_pins &i2c3_pins_sleep>;
> >>+ pinctrl-0 = <&i2c3_pins>;
> >>+ pinctrl-1 = <&i2c3_pins_sleep>;
> >> pinctrl-names = "default", "sleep";
> >> reg = <0x16280000 0x1000>;
> >> interrupts = <GIC_SPI 151 IRQ_TYPE_NONE>;
> >>@@ -302,7 +305,8 @@
> >>
> >> gsbi4_i2c: i2c@16380000 {
> >> compatible = "qcom,i2c-qup-v1.1.1";
> >>- pinctrl-0 = <&i2c4_pins &i2c4_pins_sleep>;
> >>+ pinctrl-0 = <&i2c4_pins>;
> >>+ pinctrl-1 = <&i2c4_pins_sleep>;
> >> pinctrl-names = "default", "sleep";
> >> reg = <0x16380000 0x1000>;
> >> interrupts = <GIC_SPI 153 IRQ_TYPE_NONE>;
> >>@@ -337,7 +341,8 @@
> >> compatible = "qcom,spi-qup-v1.1.1";
> >> reg = <0x1a280000 0x1000>;
> >> interrupts = <0 155 0>;
> >>- pinctrl-0 = <&spi5_default &spi5_sleep>;
> >>+ pinctrl-0 = <&spi5_default>;
> >>+ pinctrl-1 = <&spi5_sleep>;
> >> pinctrl-names = "default", "sleep";
> >> clocks = <&gcc GSBI5_QUP_CLK>, <&gcc GSBI5_H_CLK>;
> >> clock-names = "core", "iface";
> >>@@ -370,7 +375,8 @@
> >>
> >> gsbi6_i2c: i2c@16580000 {
> >> compatible = "qcom,i2c-qup-v1.1.1";
> >>- pinctrl-0 = <&i2c6_pins &i2c6_pins_sleep>;
> >>+ pinctrl-0 = <&i2c6_pins>;
> >>+ pinctrl-1 = <&i2c6_pins_sleep>;
> >> pinctrl-names = "default", "sleep";
> >> reg = <0x16580000 0x1000>;
> >> interrupts = <GIC_SPI 157 IRQ_TYPE_NONE>;
> >>--
> >>2.5.0
> >>
On Tue, Mar 29, 2016 at 4:51 PM, Bjorn Andersson
<[email protected]> wrote:
>> Am ok, to change, did you get activity leds works with any of these strings
>> with WLAN or BT?
>>
>
> I did test them; rx, assoc and radio seems to work. Tx does not tickle
> the led, but should probably.
>
> I didn't find the spec for the baord, so I'm not sure what the LEDs
> should indicate. But it feels like radio or assoc makes most sense, and
> follows what we can do with the BT led.
this is in the 96boards 'specs' at [1], which states
-
The User LEDs shall be directly programmable from the SoC.
1. WiFi activity LED
2. Bluetooth activity LED
-
[1] http://www.96boards.org/ce-specification
On 03/24, Nicolas Dechesne wrote:
> On Thu, Mar 24, 2016 at 2:48 AM, Stephen Boyd <[email protected]> wrote:
> > I don't make up the names, but for other qcom sbc products the
> > bootloader is looking for sbc there to make sure it picks the right dtb
> > blob. So I guess this is _the_ qcom 8064 sbc? Definitely not _the_ 8064
> > sbc though.
> >
> > If this device won't get those bootloaders that look for this then it
> > doesn't really matter and I don't care what this is named. Please take a
> > look at Documentation/devicetree/bindings/arm/qcom.txt for what I'm
> > talking about though.
>
>
> I would really want to get rid of the 'i need to append the DTB' on
> this board. the DT support in the bootloader have been backported , I
> am really hoping we can use this DT aware LK, and thus rely on the
> compatible string, like we do on db410c. So this is important to get
> the name/property right, since we will get there. In fact, I am even
> hoping that once we publish this DT aware LK along with this board,
> the other myriad of 8064 based 'SBC' from various vendors will upgrade
> their bootloader, so that we can have a single 'boot' image (generated
> with the help of dtbTool) that works across all devices.
Ok, I'm not sure how that's going to work though. If all these
'SBC' devices are using the same bootloader and that bootloader
is looking into SMEM for the different device identifying
attributes (called socinfo in the downstream kernel) we're going
to need to make sure that the devices identify uniquely.
There is the 'subtype' attribute, which is just a number to
identify different variations of a similar board. I hope that all
the 'SBC' boards are using different subtypes or things are going
to start getting messy.
--
Qualcomm Innovation Center, Inc. is a member of Code Aurora Forum,
a Linux Foundation Collaborative Project
On Tue 29 Mar 11:32 PDT 2016, Nicolas Dechesne wrote:
> On Tue, Mar 29, 2016 at 4:51 PM, Bjorn Andersson
> <[email protected]> wrote:
> >> Am ok, to change, did you get activity leds works with any of these strings
> >> with WLAN or BT?
> >>
> >
> > I did test them; rx, assoc and radio seems to work. Tx does not tickle
> > the led, but should probably.
> >
> > I didn't find the spec for the baord, so I'm not sure what the LEDs
> > should indicate. But it feels like radio or assoc makes most sense, and
> > follows what we can do with the BT led.
>
> this is in the 96boards 'specs' at [1], which states
>
> -
> The User LEDs shall be directly programmable from the SoC.
> 1. WiFi activity LED
> 2. Bluetooth activity LED
> -
>
> [1] http://www.96boards.org/ce-specification
Thanks Nico. I presume "activity" here means it should be off and blink
upon data being transmitted in either direction?
Sounds like we need to plan some work to extend the existing triggers
with a phyXactivity and hciX-activity.
For now I think we should go with phy0assoc and hci-power though, so we
have something related to WiFi and BT.
Regards,
Bjorn
On Sun, Mar 27, 2016 at 12:50 AM, Bjorn Andersson
<[email protected]> wrote:
> On Wed 23 Mar 12:48 PDT 2016, Srinivas Kandagatla wrote:
>
>> This patch adds support to 4 user leds, wlan and bt led on board.
>>
>> Signed-off-by: Srinivas Kandagatla <[email protected]>
>
> I'm not fond of the overly complicated names; and I think it should at
> least be shortened to "db600c:...".
These names are exposed to userspace. They should be the same across
all 96boards. Same goes for UART numbering and I2C bus labels on the
connector.
> Tested this on my DB600c, seems to work, except the WiFi/BT triggers,
> see comments below.
>
>> + leds {
>> + pinctrl-names = "default";
>> + pinctrl-0 = <&user_leds>, <&mpp_leds>;
>> +
>> + compatible = "gpio-leds";
>> +
>> + led@1 {
unit-address w/o reg property will warn on new dtc. I'd suggest
something like "userX-led".
>> + label = "dragonboard-600c:green:user1";
>> + gpios = <&tlmm_pinmux 3 GPIO_ACTIVE_HIGH>;
>> + linux,default-trigger = "heartbeat";
>> + default-state = "off";
>> + };